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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
92.15 97.51 92.84 98.61 80.85 95.88 90.96 88.38


Total test records in report: 834
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T617 /workspace/coverage/default/17.spi_device_tpm_all.3046873954 Apr 16 12:47:43 PM PDT 24 Apr 16 12:48:17 PM PDT 24 3294087360 ps
T173 /workspace/coverage/default/42.spi_device_upload.3178145428 Apr 16 12:48:50 PM PDT 24 Apr 16 12:49:26 PM PDT 24 23361259758 ps
T152 /workspace/coverage/default/42.spi_device_stress_all.2999880146 Apr 16 12:48:40 PM PDT 24 Apr 16 12:48:43 PM PDT 24 55186369 ps
T618 /workspace/coverage/default/20.spi_device_csb_read.2499859094 Apr 16 12:47:56 PM PDT 24 Apr 16 12:48:02 PM PDT 24 75346834 ps
T293 /workspace/coverage/default/28.spi_device_cfg_cmd.2765870764 Apr 16 12:48:14 PM PDT 24 Apr 16 12:48:20 PM PDT 24 2213692625 ps
T619 /workspace/coverage/default/47.spi_device_tpm_rw.1273733160 Apr 16 12:48:56 PM PDT 24 Apr 16 12:49:00 PM PDT 24 156915328 ps
T620 /workspace/coverage/default/23.spi_device_alert_test.4099897544 Apr 16 12:47:52 PM PDT 24 Apr 16 12:47:59 PM PDT 24 46617203 ps
T621 /workspace/coverage/default/38.spi_device_tpm_all.3763094418 Apr 16 12:48:31 PM PDT 24 Apr 16 12:48:41 PM PDT 24 6174714874 ps
T622 /workspace/coverage/default/34.spi_device_tpm_read_hw_reg.2889680246 Apr 16 12:48:32 PM PDT 24 Apr 16 12:48:51 PM PDT 24 4791071040 ps
T339 /workspace/coverage/default/18.spi_device_flash_mode.3887537079 Apr 16 12:47:48 PM PDT 24 Apr 16 12:48:48 PM PDT 24 3792108787 ps
T222 /workspace/coverage/default/19.spi_device_mailbox.3398606440 Apr 16 12:48:02 PM PDT 24 Apr 16 12:49:30 PM PDT 24 9284691812 ps
T623 /workspace/coverage/default/41.spi_device_csb_read.1034993105 Apr 16 12:48:43 PM PDT 24 Apr 16 12:48:47 PM PDT 24 62802920 ps
T624 /workspace/coverage/default/11.spi_device_upload.3905929655 Apr 16 12:47:17 PM PDT 24 Apr 16 12:47:36 PM PDT 24 12401865113 ps
T202 /workspace/coverage/default/17.spi_device_pass_addr_payload_swap.837744516 Apr 16 12:47:45 PM PDT 24 Apr 16 12:47:53 PM PDT 24 1389979641 ps
T625 /workspace/coverage/default/45.spi_device_alert_test.1333797304 Apr 16 12:48:53 PM PDT 24 Apr 16 12:48:56 PM PDT 24 12212954 ps
T626 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.4063791751 Apr 16 12:48:57 PM PDT 24 Apr 16 12:49:01 PM PDT 24 297329672 ps
T168 /workspace/coverage/default/23.spi_device_pass_cmd_filtering.401253520 Apr 16 12:47:52 PM PDT 24 Apr 16 12:48:11 PM PDT 24 20068218755 ps
T627 /workspace/coverage/default/2.spi_device_read_buffer_direct.1909651087 Apr 16 12:47:07 PM PDT 24 Apr 16 12:47:14 PM PDT 24 2116505504 ps
T628 /workspace/coverage/default/45.spi_device_read_buffer_direct.1146835066 Apr 16 12:48:57 PM PDT 24 Apr 16 12:49:03 PM PDT 24 491368785 ps
T629 /workspace/coverage/default/6.spi_device_tpm_all.2839333272 Apr 16 12:47:12 PM PDT 24 Apr 16 12:48:09 PM PDT 24 39857126935 ps
T630 /workspace/coverage/default/46.spi_device_flash_mode.3512006094 Apr 16 12:48:57 PM PDT 24 Apr 16 12:49:28 PM PDT 24 30294793148 ps
T631 /workspace/coverage/default/26.spi_device_tpm_rw.1531293999 Apr 16 12:47:57 PM PDT 24 Apr 16 12:48:04 PM PDT 24 82029845 ps
T44 /workspace/coverage/default/0.spi_device_sec_cm.2363560008 Apr 16 12:47:07 PM PDT 24 Apr 16 12:47:11 PM PDT 24 61426598 ps
T307 /workspace/coverage/default/47.spi_device_mailbox.2867673594 Apr 16 12:49:03 PM PDT 24 Apr 16 12:49:25 PM PDT 24 28555128044 ps
T632 /workspace/coverage/default/34.spi_device_tpm_sts_read.2063824356 Apr 16 12:48:22 PM PDT 24 Apr 16 12:48:26 PM PDT 24 139614573 ps
T77 /workspace/coverage/default/8.spi_device_intercept.2588627176 Apr 16 12:47:20 PM PDT 24 Apr 16 12:47:27 PM PDT 24 2726413441 ps
T295 /workspace/coverage/default/13.spi_device_pass_cmd_filtering.147337101 Apr 16 12:47:46 PM PDT 24 Apr 16 12:47:55 PM PDT 24 664619678 ps
T633 /workspace/coverage/default/43.spi_device_tpm_read_hw_reg.2097668256 Apr 16 12:48:42 PM PDT 24 Apr 16 12:48:51 PM PDT 24 2315239124 ps
T634 /workspace/coverage/default/25.spi_device_tpm_all.2096994871 Apr 16 12:47:59 PM PDT 24 Apr 16 12:48:15 PM PDT 24 2021119792 ps
T635 /workspace/coverage/default/48.spi_device_flash_mode.365104700 Apr 16 12:49:06 PM PDT 24 Apr 16 12:49:14 PM PDT 24 2105167035 ps
T636 /workspace/coverage/default/10.spi_device_tpm_all.3475502428 Apr 16 12:47:32 PM PDT 24 Apr 16 12:47:54 PM PDT 24 4399623351 ps
T212 /workspace/coverage/default/31.spi_device_pass_cmd_filtering.245319937 Apr 16 12:48:07 PM PDT 24 Apr 16 12:48:16 PM PDT 24 7443636737 ps
T637 /workspace/coverage/default/27.spi_device_csb_read.2702349741 Apr 16 12:48:18 PM PDT 24 Apr 16 12:48:21 PM PDT 24 40588674 ps
T638 /workspace/coverage/default/14.spi_device_read_buffer_direct.1667652697 Apr 16 12:47:46 PM PDT 24 Apr 16 12:47:58 PM PDT 24 3436471131 ps
T639 /workspace/coverage/default/49.spi_device_tpm_sts_read.3310550544 Apr 16 12:49:11 PM PDT 24 Apr 16 12:49:14 PM PDT 24 249063306 ps
T352 /workspace/coverage/default/5.spi_device_intercept.794511474 Apr 16 12:47:08 PM PDT 24 Apr 16 12:47:17 PM PDT 24 278289735 ps
T640 /workspace/coverage/default/37.spi_device_tpm_sts_read.301814612 Apr 16 12:48:33 PM PDT 24 Apr 16 12:48:36 PM PDT 24 112586774 ps
T641 /workspace/coverage/default/18.spi_device_csb_read.36031831 Apr 16 12:47:47 PM PDT 24 Apr 16 12:47:53 PM PDT 24 25450391 ps
T642 /workspace/coverage/default/18.spi_device_alert_test.1214982641 Apr 16 12:47:53 PM PDT 24 Apr 16 12:48:00 PM PDT 24 13695479 ps
T643 /workspace/coverage/default/25.spi_device_tpm_rw.2800435382 Apr 16 12:48:09 PM PDT 24 Apr 16 12:48:13 PM PDT 24 74541850 ps
T229 /workspace/coverage/default/12.spi_device_intercept.305515703 Apr 16 12:47:43 PM PDT 24 Apr 16 12:47:49 PM PDT 24 150760270 ps
T644 /workspace/coverage/default/24.spi_device_alert_test.3412638864 Apr 16 12:48:01 PM PDT 24 Apr 16 12:48:06 PM PDT 24 54249570 ps
T645 /workspace/coverage/default/3.spi_device_csb_read.3455058868 Apr 16 12:46:55 PM PDT 24 Apr 16 12:46:59 PM PDT 24 18012991 ps
T322 /workspace/coverage/default/25.spi_device_pass_addr_payload_swap.2813992997 Apr 16 12:47:57 PM PDT 24 Apr 16 12:48:05 PM PDT 24 369966564 ps
T280 /workspace/coverage/default/0.spi_device_pass_addr_payload_swap.2563797536 Apr 16 12:46:56 PM PDT 24 Apr 16 12:47:04 PM PDT 24 6641980612 ps
T646 /workspace/coverage/default/0.spi_device_alert_test.3802429660 Apr 16 12:46:53 PM PDT 24 Apr 16 12:46:57 PM PDT 24 28287822 ps
T647 /workspace/coverage/default/32.spi_device_read_buffer_direct.3727414327 Apr 16 12:48:36 PM PDT 24 Apr 16 12:48:43 PM PDT 24 8004395787 ps
T325 /workspace/coverage/default/1.spi_device_pass_addr_payload_swap.1028834846 Apr 16 12:47:33 PM PDT 24 Apr 16 12:47:43 PM PDT 24 4401969977 ps
T648 /workspace/coverage/default/4.spi_device_cfg_cmd.4052079430 Apr 16 12:47:05 PM PDT 24 Apr 16 12:47:21 PM PDT 24 17686003377 ps
T175 /workspace/coverage/default/10.spi_device_upload.1068015451 Apr 16 12:47:30 PM PDT 24 Apr 16 12:47:42 PM PDT 24 15003803480 ps
T649 /workspace/coverage/default/44.spi_device_tpm_rw.3348779677 Apr 16 12:48:54 PM PDT 24 Apr 16 12:48:57 PM PDT 24 216908807 ps
T278 /workspace/coverage/default/37.spi_device_intercept.782788131 Apr 16 12:48:36 PM PDT 24 Apr 16 12:48:42 PM PDT 24 228764641 ps
T650 /workspace/coverage/default/38.spi_device_tpm_rw.2060478990 Apr 16 12:48:42 PM PDT 24 Apr 16 12:48:48 PM PDT 24 190074130 ps
T396 /workspace/coverage/default/16.spi_device_tpm_all.894119801 Apr 16 12:47:44 PM PDT 24 Apr 16 12:48:50 PM PDT 24 26638712498 ps
T292 /workspace/coverage/default/20.spi_device_upload.3671947723 Apr 16 12:47:51 PM PDT 24 Apr 16 12:48:01 PM PDT 24 455524723 ps
T651 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.2584495900 Apr 16 12:47:58 PM PDT 24 Apr 16 12:48:30 PM PDT 24 40906242402 ps
T319 /workspace/coverage/default/23.spi_device_pass_addr_payload_swap.3492780617 Apr 16 12:47:57 PM PDT 24 Apr 16 12:48:26 PM PDT 24 27634252991 ps
T652 /workspace/coverage/default/40.spi_device_csb_read.1426002628 Apr 16 12:48:43 PM PDT 24 Apr 16 12:48:47 PM PDT 24 27625541 ps
T653 /workspace/coverage/default/13.spi_device_flash_mode.2449920383 Apr 16 12:47:34 PM PDT 24 Apr 16 12:48:38 PM PDT 24 8547944181 ps
T654 /workspace/coverage/default/36.spi_device_tpm_sts_read.97112808 Apr 16 12:48:34 PM PDT 24 Apr 16 12:48:36 PM PDT 24 114684260 ps
T655 /workspace/coverage/default/17.spi_device_stress_all.49859185 Apr 16 12:47:51 PM PDT 24 Apr 16 12:47:58 PM PDT 24 112985413 ps
T656 /workspace/coverage/default/45.spi_device_tpm_sts_read.1189860433 Apr 16 12:48:51 PM PDT 24 Apr 16 12:48:53 PM PDT 24 38934394 ps
T657 /workspace/coverage/default/20.spi_device_alert_test.648168994 Apr 16 12:47:51 PM PDT 24 Apr 16 12:47:58 PM PDT 24 12893594 ps
T291 /workspace/coverage/default/23.spi_device_upload.4119347129 Apr 16 12:47:58 PM PDT 24 Apr 16 12:48:14 PM PDT 24 7955964358 ps
T658 /workspace/coverage/default/49.spi_device_read_buffer_direct.616651912 Apr 16 12:49:08 PM PDT 24 Apr 16 12:49:18 PM PDT 24 908324154 ps
T659 /workspace/coverage/default/17.spi_device_tpm_read_hw_reg.3214114640 Apr 16 12:47:49 PM PDT 24 Apr 16 12:48:18 PM PDT 24 31228761981 ps
T360 /workspace/coverage/default/2.spi_device_intercept.2318264787 Apr 16 12:47:17 PM PDT 24 Apr 16 12:47:24 PM PDT 24 444088568 ps
T660 /workspace/coverage/default/44.spi_device_flash_mode.1597146719 Apr 16 12:49:00 PM PDT 24 Apr 16 12:50:14 PM PDT 24 13494898699 ps
T191 /workspace/coverage/default/26.spi_device_upload.4183535662 Apr 16 12:48:08 PM PDT 24 Apr 16 12:48:13 PM PDT 24 351623953 ps
T661 /workspace/coverage/default/12.spi_device_cfg_cmd.1524520111 Apr 16 12:47:31 PM PDT 24 Apr 16 12:47:43 PM PDT 24 1972134671 ps
T662 /workspace/coverage/default/28.spi_device_csb_read.2972773993 Apr 16 12:48:01 PM PDT 24 Apr 16 12:48:06 PM PDT 24 82789254 ps
T663 /workspace/coverage/default/43.spi_device_tpm_all.1221891109 Apr 16 12:48:44 PM PDT 24 Apr 16 12:48:59 PM PDT 24 4560561983 ps
T304 /workspace/coverage/default/16.spi_device_intercept.1009918771 Apr 16 12:47:48 PM PDT 24 Apr 16 12:48:02 PM PDT 24 882347630 ps
T664 /workspace/coverage/default/17.spi_device_tpm_rw.769815776 Apr 16 12:47:44 PM PDT 24 Apr 16 12:47:49 PM PDT 24 103881631 ps
T665 /workspace/coverage/default/18.spi_device_tpm_all.2014803739 Apr 16 12:47:50 PM PDT 24 Apr 16 12:48:00 PM PDT 24 879730190 ps
T350 /workspace/coverage/default/31.spi_device_intercept.620403267 Apr 16 12:48:06 PM PDT 24 Apr 16 12:48:46 PM PDT 24 4365047430 ps
T199 /workspace/coverage/default/35.spi_device_intercept.3978064333 Apr 16 12:48:28 PM PDT 24 Apr 16 12:48:34 PM PDT 24 453680808 ps
T666 /workspace/coverage/default/4.spi_device_tpm_sts_read.2989888818 Apr 16 12:47:28 PM PDT 24 Apr 16 12:47:32 PM PDT 24 40711230 ps
T667 /workspace/coverage/default/23.spi_device_csb_read.1946644124 Apr 16 12:47:56 PM PDT 24 Apr 16 12:48:02 PM PDT 24 53338621 ps
T324 /workspace/coverage/default/11.spi_device_pass_addr_payload_swap.3924140502 Apr 16 12:47:34 PM PDT 24 Apr 16 12:47:55 PM PDT 24 8983609585 ps
T316 /workspace/coverage/default/15.spi_device_pass_addr_payload_swap.2980849114 Apr 16 12:47:42 PM PDT 24 Apr 16 12:47:57 PM PDT 24 16176115305 ps
T668 /workspace/coverage/default/23.spi_device_mailbox.2568857751 Apr 16 12:47:56 PM PDT 24 Apr 16 12:48:18 PM PDT 24 7337300821 ps
T669 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.590498334 Apr 16 12:47:38 PM PDT 24 Apr 16 12:47:46 PM PDT 24 1777013272 ps
T327 /workspace/coverage/default/8.spi_device_pass_addr_payload_swap.2940064677 Apr 16 12:47:12 PM PDT 24 Apr 16 12:47:17 PM PDT 24 115241929 ps
T670 /workspace/coverage/default/48.spi_device_csb_read.3261274224 Apr 16 12:49:01 PM PDT 24 Apr 16 12:49:04 PM PDT 24 35284247 ps
T328 /workspace/coverage/default/36.spi_device_pass_cmd_filtering.1111403300 Apr 16 12:48:40 PM PDT 24 Apr 16 12:49:01 PM PDT 24 18897934147 ps
T671 /workspace/coverage/default/19.spi_device_tpm_read_hw_reg.3633699587 Apr 16 12:47:55 PM PDT 24 Apr 16 12:48:29 PM PDT 24 43114584975 ps
T672 /workspace/coverage/default/18.spi_device_mailbox.3527604706 Apr 16 12:47:56 PM PDT 24 Apr 16 12:49:06 PM PDT 24 6851201562 ps
T673 /workspace/coverage/default/46.spi_device_tpm_rw.1943270668 Apr 16 12:48:50 PM PDT 24 Apr 16 12:48:57 PM PDT 24 513628822 ps
T674 /workspace/coverage/default/29.spi_device_csb_read.3181399757 Apr 16 12:48:23 PM PDT 24 Apr 16 12:48:26 PM PDT 24 58198464 ps
T675 /workspace/coverage/default/22.spi_device_read_buffer_direct.3080729408 Apr 16 12:47:51 PM PDT 24 Apr 16 12:48:08 PM PDT 24 5555434206 ps
T288 /workspace/coverage/default/45.spi_device_intercept.348498976 Apr 16 12:48:52 PM PDT 24 Apr 16 12:49:06 PM PDT 24 746188813 ps
T294 /workspace/coverage/default/28.spi_device_pass_cmd_filtering.2206280312 Apr 16 12:48:03 PM PDT 24 Apr 16 12:48:11 PM PDT 24 1149270570 ps
T676 /workspace/coverage/default/39.spi_device_csb_read.1824353824 Apr 16 12:48:37 PM PDT 24 Apr 16 12:48:39 PM PDT 24 118267221 ps
T677 /workspace/coverage/default/32.spi_device_tpm_read_hw_reg.1091231168 Apr 16 12:48:18 PM PDT 24 Apr 16 12:48:47 PM PDT 24 9265320526 ps
T678 /workspace/coverage/default/12.spi_device_alert_test.2071823789 Apr 16 12:47:31 PM PDT 24 Apr 16 12:47:34 PM PDT 24 38640697 ps
T296 /workspace/coverage/default/40.spi_device_intercept.3986700123 Apr 16 12:48:43 PM PDT 24 Apr 16 12:48:53 PM PDT 24 1599555686 ps
T679 /workspace/coverage/default/31.spi_device_tpm_rw.1029955478 Apr 16 12:48:19 PM PDT 24 Apr 16 12:48:23 PM PDT 24 702126572 ps
T362 /workspace/coverage/default/27.spi_device_pass_cmd_filtering.3708953818 Apr 16 12:48:09 PM PDT 24 Apr 16 12:48:25 PM PDT 24 7427353030 ps
T680 /workspace/coverage/default/13.spi_device_tpm_sts_read.683740380 Apr 16 12:47:40 PM PDT 24 Apr 16 12:47:42 PM PDT 24 83157984 ps
T681 /workspace/coverage/default/29.spi_device_tpm_all.1642071639 Apr 16 12:48:13 PM PDT 24 Apr 16 12:48:19 PM PDT 24 3088276978 ps
T682 /workspace/coverage/default/21.spi_device_tpm_sts_read.2060290826 Apr 16 12:47:52 PM PDT 24 Apr 16 12:48:01 PM PDT 24 1255332976 ps
T683 /workspace/coverage/default/24.spi_device_tpm_sts_read.1661324738 Apr 16 12:47:58 PM PDT 24 Apr 16 12:48:04 PM PDT 24 374191102 ps
T684 /workspace/coverage/default/20.spi_device_tpm_sts_read.2405545666 Apr 16 12:47:52 PM PDT 24 Apr 16 12:48:01 PM PDT 24 149457922 ps
T215 /workspace/coverage/default/42.spi_device_intercept.1846426854 Apr 16 12:48:42 PM PDT 24 Apr 16 12:48:59 PM PDT 24 6230229745 ps
T685 /workspace/coverage/default/24.spi_device_tpm_read_hw_reg.1242435281 Apr 16 12:47:50 PM PDT 24 Apr 16 12:48:04 PM PDT 24 7375266962 ps
T686 /workspace/coverage/default/47.spi_device_flash_mode.1699416585 Apr 16 12:49:01 PM PDT 24 Apr 16 12:50:32 PM PDT 24 39509566692 ps
T249 /workspace/coverage/default/20.spi_device_intercept.1830929540 Apr 16 12:48:07 PM PDT 24 Apr 16 12:48:13 PM PDT 24 110796943 ps
T687 /workspace/coverage/default/15.spi_device_alert_test.3913441776 Apr 16 12:47:48 PM PDT 24 Apr 16 12:47:56 PM PDT 24 38590493 ps
T688 /workspace/coverage/default/29.spi_device_tpm_rw.386871176 Apr 16 12:48:01 PM PDT 24 Apr 16 12:48:10 PM PDT 24 1963808164 ps
T340 /workspace/coverage/default/33.spi_device_flash_mode.501664998 Apr 16 12:48:24 PM PDT 24 Apr 16 12:50:48 PM PDT 24 10102203042 ps
T689 /workspace/coverage/default/15.spi_device_csb_read.1096199524 Apr 16 12:47:43 PM PDT 24 Apr 16 12:47:46 PM PDT 24 58036524 ps
T690 /workspace/coverage/default/29.spi_device_tpm_sts_read.384506375 Apr 16 12:48:23 PM PDT 24 Apr 16 12:48:26 PM PDT 24 26924714 ps
T691 /workspace/coverage/default/16.spi_device_upload.3133411277 Apr 16 12:47:41 PM PDT 24 Apr 16 12:47:48 PM PDT 24 1747676169 ps
T692 /workspace/coverage/default/47.spi_device_cfg_cmd.2806792696 Apr 16 12:48:55 PM PDT 24 Apr 16 12:49:05 PM PDT 24 751502087 ps
T311 /workspace/coverage/default/38.spi_device_pass_cmd_filtering.274770189 Apr 16 12:48:37 PM PDT 24 Apr 16 12:48:48 PM PDT 24 1077547220 ps
T693 /workspace/coverage/default/18.spi_device_tpm_sts_read.3029381080 Apr 16 12:47:52 PM PDT 24 Apr 16 12:48:00 PM PDT 24 16644203 ps
T281 /workspace/coverage/default/9.spi_device_pass_addr_payload_swap.3120141296 Apr 16 12:47:21 PM PDT 24 Apr 16 12:47:42 PM PDT 24 1133844023 ps
T694 /workspace/coverage/default/7.spi_device_tpm_read_hw_reg.3893904020 Apr 16 12:47:18 PM PDT 24 Apr 16 12:47:23 PM PDT 24 818606530 ps
T317 /workspace/coverage/default/6.spi_device_pass_addr_payload_swap.3262686008 Apr 16 12:47:28 PM PDT 24 Apr 16 12:47:45 PM PDT 24 29105158903 ps
T695 /workspace/coverage/default/42.spi_device_tpm_all.3329314172 Apr 16 12:48:48 PM PDT 24 Apr 16 12:49:44 PM PDT 24 10757649980 ps
T210 /workspace/coverage/default/13.spi_device_mailbox.3249050225 Apr 16 12:47:38 PM PDT 24 Apr 16 12:48:59 PM PDT 24 9493191564 ps
T262 /workspace/coverage/default/7.spi_device_intercept.2779147123 Apr 16 12:47:09 PM PDT 24 Apr 16 12:47:34 PM PDT 24 11792819695 ps
T284 /workspace/coverage/default/43.spi_device_pass_addr_payload_swap.483662634 Apr 16 12:48:43 PM PDT 24 Apr 16 12:49:02 PM PDT 24 9228216910 ps
T696 /workspace/coverage/default/11.spi_device_tpm_rw.932715763 Apr 16 12:47:35 PM PDT 24 Apr 16 12:47:38 PM PDT 24 50224937 ps
T697 /workspace/coverage/default/45.spi_device_tpm_rw.423225990 Apr 16 12:48:52 PM PDT 24 Apr 16 12:49:00 PM PDT 24 742131863 ps
T251 /workspace/coverage/default/0.spi_device_upload.4101684080 Apr 16 12:47:04 PM PDT 24 Apr 16 12:47:19 PM PDT 24 60179235245 ps
T698 /workspace/coverage/default/18.spi_device_tpm_rw.2954897929 Apr 16 12:48:10 PM PDT 24 Apr 16 12:48:13 PM PDT 24 14932647 ps
T699 /workspace/coverage/default/0.spi_device_tpm_rw.470309727 Apr 16 12:47:04 PM PDT 24 Apr 16 12:47:08 PM PDT 24 357716242 ps
T700 /workspace/coverage/default/44.spi_device_tpm_sts_read.2172009186 Apr 16 12:48:50 PM PDT 24 Apr 16 12:48:52 PM PDT 24 193002882 ps
T261 /workspace/coverage/default/41.spi_device_pass_addr_payload_swap.187085201 Apr 16 12:48:45 PM PDT 24 Apr 16 12:48:51 PM PDT 24 2232349184 ps
T701 /workspace/coverage/default/33.spi_device_pass_cmd_filtering.409528283 Apr 16 12:48:27 PM PDT 24 Apr 16 12:48:34 PM PDT 24 1224566662 ps
T345 /workspace/coverage/default/42.spi_device_flash_mode.1252158860 Apr 16 12:48:43 PM PDT 24 Apr 16 12:50:14 PM PDT 24 7896649507 ps
T315 /workspace/coverage/default/48.spi_device_pass_addr_payload_swap.1883021978 Apr 16 12:49:01 PM PDT 24 Apr 16 12:49:10 PM PDT 24 837077360 ps
T702 /workspace/coverage/default/47.spi_device_alert_test.871181833 Apr 16 12:48:57 PM PDT 24 Apr 16 12:48:59 PM PDT 24 14523823 ps
T703 /workspace/coverage/default/39.spi_device_flash_mode.815883775 Apr 16 12:48:43 PM PDT 24 Apr 16 12:48:56 PM PDT 24 1169427053 ps
T704 /workspace/coverage/default/31.spi_device_flash_mode.3580500354 Apr 16 12:48:26 PM PDT 24 Apr 16 12:49:36 PM PDT 24 19154546013 ps
T705 /workspace/coverage/default/40.spi_device_tpm_all.2218873758 Apr 16 12:48:43 PM PDT 24 Apr 16 12:49:23 PM PDT 24 18096938409 ps
T45 /workspace/coverage/default/1.spi_device_sec_cm.51555363 Apr 16 12:47:06 PM PDT 24 Apr 16 12:47:09 PM PDT 24 327155983 ps
T298 /workspace/coverage/default/18.spi_device_upload.1869321747 Apr 16 12:47:51 PM PDT 24 Apr 16 12:48:01 PM PDT 24 1863920393 ps
T706 /workspace/coverage/default/34.spi_device_cfg_cmd.120857326 Apr 16 12:48:28 PM PDT 24 Apr 16 12:48:32 PM PDT 24 100667053 ps
T707 /workspace/coverage/default/22.spi_device_tpm_sts_read.2590427208 Apr 16 12:48:06 PM PDT 24 Apr 16 12:48:10 PM PDT 24 63579511 ps
T708 /workspace/coverage/default/8.spi_device_read_buffer_direct.1764287851 Apr 16 12:47:22 PM PDT 24 Apr 16 12:47:49 PM PDT 24 5061193344 ps
T709 /workspace/coverage/default/7.spi_device_tpm_all.4084438227 Apr 16 12:47:30 PM PDT 24 Apr 16 12:47:35 PM PDT 24 165754085 ps
T710 /workspace/coverage/default/17.spi_device_flash_mode.3529590483 Apr 16 12:47:53 PM PDT 24 Apr 16 12:49:10 PM PDT 24 7865726857 ps
T711 /workspace/coverage/default/48.spi_device_tpm_sts_read.3649224573 Apr 16 12:49:03 PM PDT 24 Apr 16 12:49:05 PM PDT 24 145352732 ps
T223 /workspace/coverage/default/31.spi_device_pass_addr_payload_swap.3265632886 Apr 16 12:48:03 PM PDT 24 Apr 16 12:48:28 PM PDT 24 15270661363 ps
T712 /workspace/coverage/default/15.spi_device_read_buffer_direct.3638292941 Apr 16 12:47:39 PM PDT 24 Apr 16 12:47:46 PM PDT 24 409024915 ps
T306 /workspace/coverage/default/4.spi_device_mailbox.1021803911 Apr 16 12:47:00 PM PDT 24 Apr 16 12:49:52 PM PDT 24 22125836938 ps
T329 /workspace/coverage/default/16.spi_device_pass_cmd_filtering.3781321949 Apr 16 12:47:45 PM PDT 24 Apr 16 12:48:01 PM PDT 24 4260642296 ps
T283 /workspace/coverage/default/5.spi_device_pass_addr_payload_swap.1621982690 Apr 16 12:47:12 PM PDT 24 Apr 16 12:47:23 PM PDT 24 3418264260 ps
T713 /workspace/coverage/default/44.spi_device_alert_test.2484667456 Apr 16 12:48:53 PM PDT 24 Apr 16 12:48:56 PM PDT 24 184646470 ps
T714 /workspace/coverage/default/48.spi_device_upload.1181346575 Apr 16 12:48:56 PM PDT 24 Apr 16 12:49:14 PM PDT 24 9114133153 ps
T309 /workspace/coverage/default/17.spi_device_cfg_cmd.2745115730 Apr 16 12:47:51 PM PDT 24 Apr 16 12:48:02 PM PDT 24 328269096 ps
T715 /workspace/coverage/default/36.spi_device_cfg_cmd.3975672108 Apr 16 12:48:24 PM PDT 24 Apr 16 12:48:34 PM PDT 24 468633772 ps
T716 /workspace/coverage/default/16.spi_device_tpm_rw.2618826513 Apr 16 12:47:45 PM PDT 24 Apr 16 12:47:50 PM PDT 24 41522099 ps
T717 /workspace/coverage/default/23.spi_device_tpm_sts_read.3176373315 Apr 16 12:47:59 PM PDT 24 Apr 16 12:48:04 PM PDT 24 31788009 ps
T718 /workspace/coverage/default/9.spi_device_read_buffer_direct.8865502 Apr 16 12:47:19 PM PDT 24 Apr 16 12:47:29 PM PDT 24 4278157878 ps
T719 /workspace/coverage/default/4.spi_device_read_buffer_direct.1467931456 Apr 16 12:47:02 PM PDT 24 Apr 16 12:47:10 PM PDT 24 292696535 ps
T34 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.1697939694 Apr 16 12:51:02 PM PDT 24 Apr 16 12:51:07 PM PDT 24 153540382 ps
T31 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.4260071813 Apr 16 12:51:06 PM PDT 24 Apr 16 12:51:16 PM PDT 24 1910849050 ps
T153 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.173744121 Apr 16 12:50:59 PM PDT 24 Apr 16 12:51:02 PM PDT 24 35476412 ps
T32 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.3854906413 Apr 16 12:50:59 PM PDT 24 Apr 16 12:51:06 PM PDT 24 156791395 ps
T33 /workspace/coverage/cover_reg_top/18.spi_device_tl_errors.2317590184 Apr 16 12:51:18 PM PDT 24 Apr 16 12:51:23 PM PDT 24 439044503 ps
T154 /workspace/coverage/cover_reg_top/13.spi_device_intr_test.1994495088 Apr 16 12:51:09 PM PDT 24 Apr 16 12:51:11 PM PDT 24 15858957 ps
T35 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.2767545064 Apr 16 12:51:18 PM PDT 24 Apr 16 12:51:32 PM PDT 24 872396028 ps
T122 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3765777915 Apr 16 12:51:13 PM PDT 24 Apr 16 12:51:16 PM PDT 24 140029919 ps
T104 /workspace/coverage/cover_reg_top/6.spi_device_tl_errors.2117645404 Apr 16 12:51:02 PM PDT 24 Apr 16 12:51:08 PM PDT 24 258270692 ps
T720 /workspace/coverage/cover_reg_top/18.spi_device_intr_test.2025433544 Apr 16 12:51:20 PM PDT 24 Apr 16 12:51:22 PM PDT 24 13462252 ps
T123 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1994922353 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:15 PM PDT 24 38385581 ps
T108 /workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.271531265 Apr 16 12:51:13 PM PDT 24 Apr 16 12:51:32 PM PDT 24 293279628 ps
T110 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.3653122930 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:10 PM PDT 24 95787359 ps
T721 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.2708397031 Apr 16 12:51:28 PM PDT 24 Apr 16 12:51:30 PM PDT 24 23252124 ps
T124 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2304078901 Apr 16 12:51:05 PM PDT 24 Apr 16 12:51:10 PM PDT 24 332467241 ps
T118 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.1954096207 Apr 16 12:51:08 PM PDT 24 Apr 16 12:51:12 PM PDT 24 496066080 ps
T113 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.4127684494 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:09 PM PDT 24 40185923 ps
T117 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.314097206 Apr 16 12:50:59 PM PDT 24 Apr 16 12:51:14 PM PDT 24 838332705 ps
T722 /workspace/coverage/cover_reg_top/31.spi_device_intr_test.1588258845 Apr 16 12:51:27 PM PDT 24 Apr 16 12:51:30 PM PDT 24 25149503 ps
T723 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.1198661017 Apr 16 12:51:24 PM PDT 24 Apr 16 12:51:25 PM PDT 24 37154666 ps
T724 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.3468481331 Apr 16 12:51:29 PM PDT 24 Apr 16 12:51:36 PM PDT 24 13544063 ps
T119 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.1050736116 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:10 PM PDT 24 159362821 ps
T125 /workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.1307655195 Apr 16 12:51:05 PM PDT 24 Apr 16 12:51:09 PM PDT 24 23771992 ps
T725 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.3953898781 Apr 16 12:51:02 PM PDT 24 Apr 16 12:51:11 PM PDT 24 212724498 ps
T726 /workspace/coverage/cover_reg_top/36.spi_device_intr_test.1224566841 Apr 16 12:51:15 PM PDT 24 Apr 16 12:51:17 PM PDT 24 16555553 ps
T145 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3340204079 Apr 16 12:51:16 PM PDT 24 Apr 16 12:51:25 PM PDT 24 1077629177 ps
T120 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.4056409414 Apr 16 12:51:05 PM PDT 24 Apr 16 12:51:09 PM PDT 24 57668974 ps
T727 /workspace/coverage/cover_reg_top/6.spi_device_intr_test.3357734769 Apr 16 12:51:00 PM PDT 24 Apr 16 12:51:03 PM PDT 24 39426112 ps
T728 /workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.284123305 Apr 16 12:51:13 PM PDT 24 Apr 16 12:51:18 PM PDT 24 207201983 ps
T136 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.1150407924 Apr 16 12:51:20 PM PDT 24 Apr 16 12:51:25 PM PDT 24 785966001 ps
T91 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.423023189 Apr 16 12:50:59 PM PDT 24 Apr 16 12:51:02 PM PDT 24 196110023 ps
T729 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.1617295019 Apr 16 12:51:24 PM PDT 24 Apr 16 12:51:26 PM PDT 24 17857202 ps
T137 /workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.2103841605 Apr 16 12:51:12 PM PDT 24 Apr 16 12:51:17 PM PDT 24 487141953 ps
T730 /workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.438129519 Apr 16 12:51:06 PM PDT 24 Apr 16 12:51:42 PM PDT 24 1842739498 ps
T731 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.2363180689 Apr 16 12:51:34 PM PDT 24 Apr 16 12:51:36 PM PDT 24 14529582 ps
T112 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.1292013672 Apr 16 12:51:08 PM PDT 24 Apr 16 12:51:13 PM PDT 24 535673426 ps
T126 /workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.440373987 Apr 16 12:50:57 PM PDT 24 Apr 16 12:51:14 PM PDT 24 626518359 ps
T146 /workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.2035539031 Apr 16 12:51:14 PM PDT 24 Apr 16 12:51:22 PM PDT 24 656127017 ps
T147 /workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.2018505054 Apr 16 12:51:02 PM PDT 24 Apr 16 12:51:07 PM PDT 24 450969202 ps
T732 /workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.1788080689 Apr 16 12:51:03 PM PDT 24 Apr 16 12:51:13 PM PDT 24 279487057 ps
T138 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.1342061801 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:13 PM PDT 24 161242105 ps
T139 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.712855035 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:11 PM PDT 24 340986963 ps
T140 /workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2954388057 Apr 16 12:51:13 PM PDT 24 Apr 16 12:51:19 PM PDT 24 416874260 ps
T148 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.1508857839 Apr 16 12:51:03 PM PDT 24 Apr 16 12:51:10 PM PDT 24 2620459148 ps
T369 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.2581634888 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:35 PM PDT 24 1525079452 ps
T149 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.125897796 Apr 16 12:51:03 PM PDT 24 Apr 16 12:51:10 PM PDT 24 649511684 ps
T366 /workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1798845712 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:22 PM PDT 24 2756123470 ps
T127 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.1516072798 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:09 PM PDT 24 90559927 ps
T733 /workspace/coverage/cover_reg_top/44.spi_device_intr_test.1187417287 Apr 16 12:51:31 PM PDT 24 Apr 16 12:51:33 PM PDT 24 16685260 ps
T92 /workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2782900819 Apr 16 12:51:17 PM PDT 24 Apr 16 12:51:19 PM PDT 24 41463761 ps
T734 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.3771410296 Apr 16 12:51:12 PM PDT 24 Apr 16 12:51:18 PM PDT 24 284965146 ps
T735 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.4185946811 Apr 16 12:51:15 PM PDT 24 Apr 16 12:51:18 PM PDT 24 209600261 ps
T736 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.832973254 Apr 16 12:51:12 PM PDT 24 Apr 16 12:51:17 PM PDT 24 133424710 ps
T115 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.3074148426 Apr 16 12:51:05 PM PDT 24 Apr 16 12:51:10 PM PDT 24 81467056 ps
T128 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.4112267532 Apr 16 12:51:16 PM PDT 24 Apr 16 12:51:20 PM PDT 24 77571964 ps
T737 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2032309614 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:15 PM PDT 24 254356024 ps
T738 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3967209181 Apr 16 12:51:18 PM PDT 24 Apr 16 12:51:20 PM PDT 24 44809385 ps
T739 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.2134443101 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:15 PM PDT 24 109973324 ps
T740 /workspace/coverage/cover_reg_top/45.spi_device_intr_test.2180472010 Apr 16 12:51:28 PM PDT 24 Apr 16 12:51:31 PM PDT 24 27867277 ps
T741 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.2987678001 Apr 16 12:51:01 PM PDT 24 Apr 16 12:51:04 PM PDT 24 48360918 ps
T742 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.3317415790 Apr 16 12:51:24 PM PDT 24 Apr 16 12:51:27 PM PDT 24 14410745 ps
T743 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.3944065034 Apr 16 12:51:03 PM PDT 24 Apr 16 12:51:07 PM PDT 24 30601872 ps
T129 /workspace/coverage/cover_reg_top/9.spi_device_csr_rw.2365115328 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:13 PM PDT 24 103914769 ps
T370 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.2188435463 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:28 PM PDT 24 2263312189 ps
T111 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.1444042024 Apr 16 12:51:03 PM PDT 24 Apr 16 12:51:10 PM PDT 24 173179884 ps
T744 /workspace/coverage/cover_reg_top/4.spi_device_mem_walk.2369913269 Apr 16 12:51:03 PM PDT 24 Apr 16 12:51:06 PM PDT 24 12254032 ps
T130 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.1847023725 Apr 16 12:50:59 PM PDT 24 Apr 16 12:51:17 PM PDT 24 625973122 ps
T131 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.2934385301 Apr 16 12:50:57 PM PDT 24 Apr 16 12:51:01 PM PDT 24 76084386 ps
T116 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.949353110 Apr 16 12:51:08 PM PDT 24 Apr 16 12:51:11 PM PDT 24 160618582 ps
T114 /workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1453098650 Apr 16 12:51:11 PM PDT 24 Apr 16 12:51:26 PM PDT 24 2154870601 ps
T745 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.3465436190 Apr 16 12:51:29 PM PDT 24 Apr 16 12:51:32 PM PDT 24 25077835 ps
T746 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.4127153729 Apr 16 12:51:12 PM PDT 24 Apr 16 12:51:15 PM PDT 24 83632362 ps
T747 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.2622461008 Apr 16 12:51:27 PM PDT 24 Apr 16 12:51:30 PM PDT 24 33576120 ps
T748 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3373605564 Apr 16 12:51:09 PM PDT 24 Apr 16 12:51:12 PM PDT 24 52807285 ps
T134 /workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3476323910 Apr 16 12:51:03 PM PDT 24 Apr 16 12:51:07 PM PDT 24 67838404 ps
T749 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.2294071149 Apr 16 12:51:01 PM PDT 24 Apr 16 12:51:04 PM PDT 24 57913207 ps
T750 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.1916482072 Apr 16 12:51:28 PM PDT 24 Apr 16 12:51:30 PM PDT 24 11902604 ps
T751 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3024560725 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:08 PM PDT 24 170005550 ps
T752 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.4279649926 Apr 16 12:51:08 PM PDT 24 Apr 16 12:51:10 PM PDT 24 26855799 ps
T132 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2182682578 Apr 16 12:51:02 PM PDT 24 Apr 16 12:51:44 PM PDT 24 5385034257 ps
T753 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.623144259 Apr 16 12:51:15 PM PDT 24 Apr 16 12:51:17 PM PDT 24 549750906 ps
T754 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.2024601584 Apr 16 12:51:05 PM PDT 24 Apr 16 12:51:09 PM PDT 24 54054309 ps
T367 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.1555451603 Apr 16 12:50:59 PM PDT 24 Apr 16 12:51:08 PM PDT 24 416179540 ps
T755 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.85932345 Apr 16 12:51:08 PM PDT 24 Apr 16 12:51:39 PM PDT 24 1066276062 ps
T756 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.2822890011 Apr 16 12:51:00 PM PDT 24 Apr 16 12:51:02 PM PDT 24 13917833 ps
T757 /workspace/coverage/cover_reg_top/7.spi_device_intr_test.387897041 Apr 16 12:51:13 PM PDT 24 Apr 16 12:51:15 PM PDT 24 35800912 ps
T758 /workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.2072080312 Apr 16 12:51:06 PM PDT 24 Apr 16 12:51:09 PM PDT 24 80395812 ps
T364 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1498578941 Apr 16 12:51:07 PM PDT 24 Apr 16 12:51:22 PM PDT 24 2254488776 ps
T759 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.3061128960 Apr 16 12:51:25 PM PDT 24 Apr 16 12:51:28 PM PDT 24 48638366 ps
T760 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.2436490430 Apr 16 12:51:20 PM PDT 24 Apr 16 12:51:21 PM PDT 24 14108590 ps
T133 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.682339035 Apr 16 12:51:04 PM PDT 24 Apr 16 12:51:08 PM PDT 24 37068101 ps
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