| T613 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.2561075641 |
|
|
Apr 21 12:56:02 PM PDT 24 |
Apr 21 12:56:06 PM PDT 24 |
245694633 ps |
| T614 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.1515653734 |
|
|
Apr 21 12:55:07 PM PDT 24 |
Apr 21 12:55:10 PM PDT 24 |
844908064 ps |
| T615 |
/workspace/coverage/default/49.spi_device_tpm_rw.1398112727 |
|
|
Apr 21 12:56:49 PM PDT 24 |
Apr 21 12:56:51 PM PDT 24 |
23776213 ps |
| T616 |
/workspace/coverage/default/12.spi_device_csb_read.3314907868 |
|
|
Apr 21 12:55:40 PM PDT 24 |
Apr 21 12:55:51 PM PDT 24 |
25817347 ps |
| T226 |
/workspace/coverage/default/37.spi_device_upload.4006947620 |
|
|
Apr 21 12:56:22 PM PDT 24 |
Apr 21 12:56:26 PM PDT 24 |
2135887259 ps |
| T617 |
/workspace/coverage/default/32.spi_device_read_buffer_direct.3983729847 |
|
|
Apr 21 12:56:10 PM PDT 24 |
Apr 21 12:56:24 PM PDT 24 |
7656647717 ps |
| T331 |
/workspace/coverage/default/39.spi_device_pass_addr_payload_swap.3152577970 |
|
|
Apr 21 12:56:24 PM PDT 24 |
Apr 21 12:56:27 PM PDT 24 |
77957595 ps |
| T618 |
/workspace/coverage/default/36.spi_device_tpm_read_hw_reg.3786900235 |
|
|
Apr 21 12:56:14 PM PDT 24 |
Apr 21 12:56:44 PM PDT 24 |
12141861512 ps |
| T619 |
/workspace/coverage/default/16.spi_device_alert_test.1565577174 |
|
|
Apr 21 12:55:33 PM PDT 24 |
Apr 21 12:55:35 PM PDT 24 |
19393881 ps |
| T256 |
/workspace/coverage/default/16.spi_device_intercept.586468472 |
|
|
Apr 21 12:55:49 PM PDT 24 |
Apr 21 12:56:04 PM PDT 24 |
6465504958 ps |
| T620 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.3754525356 |
|
|
Apr 21 12:56:19 PM PDT 24 |
Apr 21 12:56:20 PM PDT 24 |
280070803 ps |
| T202 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.3015765044 |
|
|
Apr 21 12:55:35 PM PDT 24 |
Apr 21 12:55:50 PM PDT 24 |
11564271390 ps |
| T621 |
/workspace/coverage/default/33.spi_device_tpm_rw.3584315310 |
|
|
Apr 21 12:56:07 PM PDT 24 |
Apr 21 12:56:10 PM PDT 24 |
182971060 ps |
| T622 |
/workspace/coverage/default/40.spi_device_alert_test.2239927577 |
|
|
Apr 21 12:56:32 PM PDT 24 |
Apr 21 12:56:33 PM PDT 24 |
14154366 ps |
| T623 |
/workspace/coverage/default/2.spi_device_tpm_rw.2501260879 |
|
|
Apr 21 12:54:57 PM PDT 24 |
Apr 21 12:55:00 PM PDT 24 |
165370774 ps |
| T333 |
/workspace/coverage/default/48.spi_device_pass_addr_payload_swap.468891936 |
|
|
Apr 21 12:56:49 PM PDT 24 |
Apr 21 12:56:57 PM PDT 24 |
5262640331 ps |
| T253 |
/workspace/coverage/default/14.spi_device_intercept.1870845336 |
|
|
Apr 21 12:55:22 PM PDT 24 |
Apr 21 12:55:25 PM PDT 24 |
39862810 ps |
| T339 |
/workspace/coverage/default/31.spi_device_pass_addr_payload_swap.3841321679 |
|
|
Apr 21 12:56:07 PM PDT 24 |
Apr 21 12:56:25 PM PDT 24 |
4610578921 ps |
| T294 |
/workspace/coverage/default/8.spi_device_flash_mode.122967798 |
|
|
Apr 21 12:55:10 PM PDT 24 |
Apr 21 12:56:02 PM PDT 24 |
3260973504 ps |
| T624 |
/workspace/coverage/default/30.spi_device_read_buffer_direct.2982973456 |
|
|
Apr 21 12:56:06 PM PDT 24 |
Apr 21 12:56:22 PM PDT 24 |
1174574506 ps |
| T189 |
/workspace/coverage/default/49.spi_device_mailbox.3897935309 |
|
|
Apr 21 12:56:54 PM PDT 24 |
Apr 21 12:57:29 PM PDT 24 |
3706579087 ps |
| T278 |
/workspace/coverage/default/18.spi_device_intercept.569400312 |
|
|
Apr 21 12:55:28 PM PDT 24 |
Apr 21 12:55:44 PM PDT 24 |
2551275795 ps |
| T316 |
/workspace/coverage/default/10.spi_device_cfg_cmd.1068807918 |
|
|
Apr 21 12:55:09 PM PDT 24 |
Apr 21 12:55:17 PM PDT 24 |
1143676623 ps |
| T625 |
/workspace/coverage/default/14.spi_device_csb_read.1155195530 |
|
|
Apr 21 12:55:31 PM PDT 24 |
Apr 21 12:55:32 PM PDT 24 |
16676905 ps |
| T378 |
/workspace/coverage/default/32.spi_device_tpm_all.2123962001 |
|
|
Apr 21 12:56:09 PM PDT 24 |
Apr 21 12:56:32 PM PDT 24 |
1420912902 ps |
| T276 |
/workspace/coverage/default/1.spi_device_mailbox.1851291947 |
|
|
Apr 21 12:54:52 PM PDT 24 |
Apr 21 12:54:56 PM PDT 24 |
294795489 ps |
| T626 |
/workspace/coverage/default/24.spi_device_alert_test.2894013806 |
|
|
Apr 21 12:55:57 PM PDT 24 |
Apr 21 12:55:59 PM PDT 24 |
15555265 ps |
| T318 |
/workspace/coverage/default/4.spi_device_upload.2344036430 |
|
|
Apr 21 12:55:03 PM PDT 24 |
Apr 21 12:55:07 PM PDT 24 |
304046171 ps |
| T627 |
/workspace/coverage/default/40.spi_device_tpm_rw.4029415162 |
|
|
Apr 21 12:56:30 PM PDT 24 |
Apr 21 12:56:32 PM PDT 24 |
53824690 ps |
| T628 |
/workspace/coverage/default/3.spi_device_csb_read.3701712788 |
|
|
Apr 21 12:55:20 PM PDT 24 |
Apr 21 12:55:21 PM PDT 24 |
22465016 ps |
| T629 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.697434259 |
|
|
Apr 21 12:56:11 PM PDT 24 |
Apr 21 12:56:12 PM PDT 24 |
197851257 ps |
| T257 |
/workspace/coverage/default/23.spi_device_pass_cmd_filtering.3146531470 |
|
|
Apr 21 12:55:47 PM PDT 24 |
Apr 21 12:55:58 PM PDT 24 |
12818134460 ps |
| T630 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.3367912799 |
|
|
Apr 21 12:55:04 PM PDT 24 |
Apr 21 12:55:28 PM PDT 24 |
4689111250 ps |
| T631 |
/workspace/coverage/default/27.spi_device_csb_read.2301077216 |
|
|
Apr 21 12:56:02 PM PDT 24 |
Apr 21 12:56:04 PM PDT 24 |
25723113 ps |
| T632 |
/workspace/coverage/default/34.spi_device_flash_mode.1763248815 |
|
|
Apr 21 12:56:14 PM PDT 24 |
Apr 21 12:56:30 PM PDT 24 |
787875677 ps |
| T289 |
/workspace/coverage/default/15.spi_device_flash_mode.907259862 |
|
|
Apr 21 12:55:36 PM PDT 24 |
Apr 21 12:56:57 PM PDT 24 |
29874650418 ps |
| T633 |
/workspace/coverage/default/25.spi_device_tpm_sts_read.239292700 |
|
|
Apr 21 12:55:59 PM PDT 24 |
Apr 21 12:56:01 PM PDT 24 |
119588701 ps |
| T336 |
/workspace/coverage/default/0.spi_device_pass_addr_payload_swap.1353564130 |
|
|
Apr 21 12:54:46 PM PDT 24 |
Apr 21 12:54:53 PM PDT 24 |
910460452 ps |
| T634 |
/workspace/coverage/default/39.spi_device_tpm_rw.261113203 |
|
|
Apr 21 12:56:28 PM PDT 24 |
Apr 21 12:56:30 PM PDT 24 |
53868732 ps |
| T635 |
/workspace/coverage/default/17.spi_device_tpm_all.3413114586 |
|
|
Apr 21 12:55:21 PM PDT 24 |
Apr 21 12:56:07 PM PDT 24 |
28277719720 ps |
| T340 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.2325282167 |
|
|
Apr 21 12:54:50 PM PDT 24 |
Apr 21 12:54:56 PM PDT 24 |
1078906186 ps |
| T221 |
/workspace/coverage/default/13.spi_device_pass_addr_payload_swap.3085174298 |
|
|
Apr 21 12:55:19 PM PDT 24 |
Apr 21 12:55:23 PM PDT 24 |
88274329 ps |
| T320 |
/workspace/coverage/default/32.spi_device_upload.910332765 |
|
|
Apr 21 12:56:08 PM PDT 24 |
Apr 21 12:56:12 PM PDT 24 |
1159415631 ps |
| T636 |
/workspace/coverage/default/27.spi_device_tpm_rw.2074912609 |
|
|
Apr 21 12:56:02 PM PDT 24 |
Apr 21 12:56:03 PM PDT 24 |
155157915 ps |
| T204 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.100998382 |
|
|
Apr 21 12:56:52 PM PDT 24 |
Apr 21 12:56:58 PM PDT 24 |
4050899877 ps |
| T637 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.965937870 |
|
|
Apr 21 12:54:53 PM PDT 24 |
Apr 21 12:55:08 PM PDT 24 |
7172502934 ps |
| T638 |
/workspace/coverage/default/15.spi_device_cfg_cmd.1258864893 |
|
|
Apr 21 12:55:27 PM PDT 24 |
Apr 21 12:55:41 PM PDT 24 |
1205307861 ps |
| T184 |
/workspace/coverage/default/49.spi_device_upload.2652255816 |
|
|
Apr 21 12:56:51 PM PDT 24 |
Apr 21 12:56:58 PM PDT 24 |
7918147696 ps |
| T639 |
/workspace/coverage/default/39.spi_device_csb_read.909514534 |
|
|
Apr 21 12:56:19 PM PDT 24 |
Apr 21 12:56:20 PM PDT 24 |
73056749 ps |
| T296 |
/workspace/coverage/default/9.spi_device_flash_mode.3902987393 |
|
|
Apr 21 12:55:21 PM PDT 24 |
Apr 21 12:55:42 PM PDT 24 |
605176937 ps |
| T162 |
/workspace/coverage/default/4.spi_device_stress_all.3281464171 |
|
|
Apr 21 12:55:00 PM PDT 24 |
Apr 21 12:55:02 PM PDT 24 |
79923988 ps |
| T404 |
/workspace/coverage/default/31.spi_device_tpm_all.701795985 |
|
|
Apr 21 12:56:06 PM PDT 24 |
Apr 21 12:56:14 PM PDT 24 |
985879540 ps |
| T640 |
/workspace/coverage/default/21.spi_device_alert_test.1130220223 |
|
|
Apr 21 12:55:52 PM PDT 24 |
Apr 21 12:55:53 PM PDT 24 |
28893968 ps |
| T641 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.3082387784 |
|
|
Apr 21 12:55:49 PM PDT 24 |
Apr 21 12:55:50 PM PDT 24 |
70582668 ps |
| T642 |
/workspace/coverage/default/5.spi_device_tpm_all.2200698046 |
|
|
Apr 21 12:54:57 PM PDT 24 |
Apr 21 12:55:01 PM PDT 24 |
576459336 ps |
| T317 |
/workspace/coverage/default/18.spi_device_upload.1844557697 |
|
|
Apr 21 12:55:42 PM PDT 24 |
Apr 21 12:55:45 PM PDT 24 |
265774768 ps |
| T643 |
/workspace/coverage/default/4.spi_device_flash_mode.4076865056 |
|
|
Apr 21 12:55:10 PM PDT 24 |
Apr 21 12:55:29 PM PDT 24 |
592154297 ps |
| T88 |
/workspace/coverage/default/35.spi_device_cfg_cmd.3847948940 |
|
|
Apr 21 12:56:09 PM PDT 24 |
Apr 21 12:56:18 PM PDT 24 |
1043145509 ps |
| T229 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.3947306041 |
|
|
Apr 21 12:55:16 PM PDT 24 |
Apr 21 12:55:42 PM PDT 24 |
55246686584 ps |
| T644 |
/workspace/coverage/default/22.spi_device_read_buffer_direct.4092644289 |
|
|
Apr 21 12:55:51 PM PDT 24 |
Apr 21 12:55:56 PM PDT 24 |
475644953 ps |
| T379 |
/workspace/coverage/default/26.spi_device_tpm_all.2026524553 |
|
|
Apr 21 12:55:48 PM PDT 24 |
Apr 21 12:56:05 PM PDT 24 |
38339713765 ps |
| T645 |
/workspace/coverage/default/18.spi_device_tpm_rw.1783468765 |
|
|
Apr 21 12:55:36 PM PDT 24 |
Apr 21 12:55:40 PM PDT 24 |
838005291 ps |
| T646 |
/workspace/coverage/default/0.spi_device_flash_mode.195824621 |
|
|
Apr 21 12:55:00 PM PDT 24 |
Apr 21 12:56:16 PM PDT 24 |
5359937891 ps |
| T255 |
/workspace/coverage/default/42.spi_device_intercept.876384139 |
|
|
Apr 21 12:56:41 PM PDT 24 |
Apr 21 12:56:46 PM PDT 24 |
1103946425 ps |
| T319 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.1512978926 |
|
|
Apr 21 12:55:02 PM PDT 24 |
Apr 21 12:55:18 PM PDT 24 |
3723654444 ps |
| T647 |
/workspace/coverage/default/16.spi_device_tpm_read_hw_reg.631005419 |
|
|
Apr 21 12:55:39 PM PDT 24 |
Apr 21 12:56:03 PM PDT 24 |
7423643615 ps |
| T648 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.2806756708 |
|
|
Apr 21 12:56:42 PM PDT 24 |
Apr 21 12:56:53 PM PDT 24 |
1833098014 ps |
| T649 |
/workspace/coverage/default/49.spi_device_cfg_cmd.1999991312 |
|
|
Apr 21 12:56:50 PM PDT 24 |
Apr 21 12:56:55 PM PDT 24 |
398158456 ps |
| T650 |
/workspace/coverage/default/43.spi_device_tpm_read_hw_reg.2282146252 |
|
|
Apr 21 12:56:40 PM PDT 24 |
Apr 21 12:56:55 PM PDT 24 |
6345200174 ps |
| T239 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.561414220 |
|
|
Apr 21 12:55:43 PM PDT 24 |
Apr 21 12:55:58 PM PDT 24 |
31302238253 ps |
| T651 |
/workspace/coverage/default/30.spi_device_alert_test.715707056 |
|
|
Apr 21 12:56:08 PM PDT 24 |
Apr 21 12:56:09 PM PDT 24 |
12204004 ps |
| T652 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.4182887036 |
|
|
Apr 21 12:56:21 PM PDT 24 |
Apr 21 12:56:26 PM PDT 24 |
1098680430 ps |
| T653 |
/workspace/coverage/default/44.spi_device_alert_test.154541776 |
|
|
Apr 21 12:56:42 PM PDT 24 |
Apr 21 12:56:43 PM PDT 24 |
14442343 ps |
| T654 |
/workspace/coverage/default/23.spi_device_tpm_all.55302614 |
|
|
Apr 21 12:55:49 PM PDT 24 |
Apr 21 12:56:25 PM PDT 24 |
3647305833 ps |
| T655 |
/workspace/coverage/default/24.spi_device_stress_all.1368101596 |
|
|
Apr 21 12:56:01 PM PDT 24 |
Apr 21 12:56:03 PM PDT 24 |
85905884 ps |
| T656 |
/workspace/coverage/default/12.spi_device_alert_test.1030110078 |
|
|
Apr 21 12:55:10 PM PDT 24 |
Apr 21 12:55:12 PM PDT 24 |
18960616 ps |
| T48 |
/workspace/coverage/default/3.spi_device_sec_cm.2338481827 |
|
|
Apr 21 12:54:55 PM PDT 24 |
Apr 21 12:54:56 PM PDT 24 |
228322621 ps |
| T657 |
/workspace/coverage/default/19.spi_device_read_buffer_direct.4131019255 |
|
|
Apr 21 12:55:44 PM PDT 24 |
Apr 21 12:55:50 PM PDT 24 |
348339188 ps |
| T382 |
/workspace/coverage/default/35.spi_device_tpm_all.291030484 |
|
|
Apr 21 12:56:05 PM PDT 24 |
Apr 21 12:56:32 PM PDT 24 |
1614584011 ps |
| T227 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.3191940035 |
|
|
Apr 21 12:56:17 PM PDT 24 |
Apr 21 12:56:21 PM PDT 24 |
817746218 ps |
| T658 |
/workspace/coverage/default/14.spi_device_read_buffer_direct.1947727300 |
|
|
Apr 21 12:55:14 PM PDT 24 |
Apr 21 12:55:28 PM PDT 24 |
3500010152 ps |
| T304 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.1090123495 |
|
|
Apr 21 12:56:02 PM PDT 24 |
Apr 21 12:56:14 PM PDT 24 |
6974080921 ps |
| T659 |
/workspace/coverage/default/21.spi_device_csb_read.358651091 |
|
|
Apr 21 12:55:46 PM PDT 24 |
Apr 21 12:55:47 PM PDT 24 |
103679636 ps |
| T660 |
/workspace/coverage/default/46.spi_device_alert_test.1686666152 |
|
|
Apr 21 12:56:48 PM PDT 24 |
Apr 21 12:56:50 PM PDT 24 |
26183409 ps |
| T190 |
/workspace/coverage/default/43.spi_device_upload.283442013 |
|
|
Apr 21 12:56:39 PM PDT 24 |
Apr 21 12:56:48 PM PDT 24 |
2099100410 ps |
| T661 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.659015923 |
|
|
Apr 21 12:56:18 PM PDT 24 |
Apr 21 12:56:19 PM PDT 24 |
129243717 ps |
| T350 |
/workspace/coverage/default/6.spi_device_flash_mode.2474163772 |
|
|
Apr 21 12:55:06 PM PDT 24 |
Apr 21 12:55:25 PM PDT 24 |
5628771554 ps |
| T662 |
/workspace/coverage/default/29.spi_device_tpm_rw.520517167 |
|
|
Apr 21 12:55:59 PM PDT 24 |
Apr 21 12:56:01 PM PDT 24 |
156921300 ps |
| T663 |
/workspace/coverage/default/27.spi_device_read_buffer_direct.3925856646 |
|
|
Apr 21 12:56:01 PM PDT 24 |
Apr 21 12:56:15 PM PDT 24 |
1533424242 ps |
| T664 |
/workspace/coverage/default/36.spi_device_tpm_rw.1786567443 |
|
|
Apr 21 12:56:15 PM PDT 24 |
Apr 21 12:56:21 PM PDT 24 |
4799525172 ps |
| T330 |
/workspace/coverage/default/3.spi_device_pass_cmd_filtering.3309088884 |
|
|
Apr 21 12:54:55 PM PDT 24 |
Apr 21 12:55:13 PM PDT 24 |
9996629266 ps |
| T665 |
/workspace/coverage/default/2.spi_device_stress_all.2031074854 |
|
|
Apr 21 12:54:59 PM PDT 24 |
Apr 21 12:55:01 PM PDT 24 |
276476535 ps |
| T666 |
/workspace/coverage/default/7.spi_device_flash_mode.3062376281 |
|
|
Apr 21 12:55:03 PM PDT 24 |
Apr 21 12:55:18 PM PDT 24 |
1379202540 ps |
| T667 |
/workspace/coverage/default/19.spi_device_mailbox.3243363896 |
|
|
Apr 21 12:55:31 PM PDT 24 |
Apr 21 12:55:54 PM PDT 24 |
8783333323 ps |
| T305 |
/workspace/coverage/default/30.spi_device_intercept.4018170299 |
|
|
Apr 21 12:56:06 PM PDT 24 |
Apr 21 12:56:50 PM PDT 24 |
20512461646 ps |
| T402 |
/workspace/coverage/default/47.spi_device_tpm_all.3769045063 |
|
|
Apr 21 12:56:43 PM PDT 24 |
Apr 21 12:57:52 PM PDT 24 |
12603347861 ps |
| T668 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.2707878954 |
|
|
Apr 21 12:56:00 PM PDT 24 |
Apr 21 12:56:04 PM PDT 24 |
4015804877 ps |
| T282 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.2543930407 |
|
|
Apr 21 12:55:29 PM PDT 24 |
Apr 21 12:55:52 PM PDT 24 |
6622496602 ps |
| T230 |
/workspace/coverage/default/0.spi_device_upload.2166578836 |
|
|
Apr 21 12:54:47 PM PDT 24 |
Apr 21 12:55:05 PM PDT 24 |
3650845369 ps |
| T669 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.3332674961 |
|
|
Apr 21 12:55:10 PM PDT 24 |
Apr 21 12:55:21 PM PDT 24 |
1686634685 ps |
| T670 |
/workspace/coverage/default/2.spi_device_csb_read.1436869464 |
|
|
Apr 21 12:55:04 PM PDT 24 |
Apr 21 12:55:05 PM PDT 24 |
214640628 ps |
| T671 |
/workspace/coverage/default/14.spi_device_tpm_read_hw_reg.1126190189 |
|
|
Apr 21 12:55:25 PM PDT 24 |
Apr 21 12:55:36 PM PDT 24 |
2246657396 ps |
| T672 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.2160355618 |
|
|
Apr 21 12:56:44 PM PDT 24 |
Apr 21 12:56:52 PM PDT 24 |
2547532718 ps |
| T673 |
/workspace/coverage/default/31.spi_device_read_buffer_direct.3175162675 |
|
|
Apr 21 12:56:10 PM PDT 24 |
Apr 21 12:56:19 PM PDT 24 |
832663508 ps |
| T674 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.3671279215 |
|
|
Apr 21 12:55:01 PM PDT 24 |
Apr 21 12:55:03 PM PDT 24 |
30677542 ps |
| T675 |
/workspace/coverage/default/24.spi_device_pass_cmd_filtering.2814022042 |
|
|
Apr 21 12:55:53 PM PDT 24 |
Apr 21 12:56:13 PM PDT 24 |
38291710335 ps |
| T676 |
/workspace/coverage/default/45.spi_device_pass_cmd_filtering.2337307518 |
|
|
Apr 21 12:56:42 PM PDT 24 |
Apr 21 12:56:48 PM PDT 24 |
3892518798 ps |
| T677 |
/workspace/coverage/default/47.spi_device_tpm_sts_read.3053854229 |
|
|
Apr 21 12:56:48 PM PDT 24 |
Apr 21 12:56:49 PM PDT 24 |
83418247 ps |
| T678 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.3382009541 |
|
|
Apr 21 12:56:48 PM PDT 24 |
Apr 21 12:56:50 PM PDT 24 |
35330156 ps |
| T347 |
/workspace/coverage/default/21.spi_device_upload.3505217216 |
|
|
Apr 21 12:55:49 PM PDT 24 |
Apr 21 12:55:53 PM PDT 24 |
492553008 ps |
| T679 |
/workspace/coverage/default/8.spi_device_alert_test.2155243554 |
|
|
Apr 21 12:55:19 PM PDT 24 |
Apr 21 12:55:21 PM PDT 24 |
13428037 ps |
| T680 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.3403816633 |
|
|
Apr 21 12:55:14 PM PDT 24 |
Apr 21 12:55:15 PM PDT 24 |
197740794 ps |
| T681 |
/workspace/coverage/default/44.spi_device_csb_read.713803564 |
|
|
Apr 21 12:56:40 PM PDT 24 |
Apr 21 12:56:41 PM PDT 24 |
90661427 ps |
| T300 |
/workspace/coverage/default/41.spi_device_flash_mode.2276351044 |
|
|
Apr 21 12:56:26 PM PDT 24 |
Apr 21 12:57:47 PM PDT 24 |
5360701704 ps |
| T682 |
/workspace/coverage/default/30.spi_device_tpm_read_hw_reg.861436338 |
|
|
Apr 21 12:55:56 PM PDT 24 |
Apr 21 12:56:12 PM PDT 24 |
28298392476 ps |
| T683 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.2020205387 |
|
|
Apr 21 12:56:20 PM PDT 24 |
Apr 21 12:56:26 PM PDT 24 |
2025530004 ps |
| T684 |
/workspace/coverage/default/25.spi_device_tpm_read_hw_reg.2322312168 |
|
|
Apr 21 12:55:53 PM PDT 24 |
Apr 21 12:55:56 PM PDT 24 |
690876842 ps |
| T685 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.937141700 |
|
|
Apr 21 12:55:16 PM PDT 24 |
Apr 21 12:55:21 PM PDT 24 |
186470827 ps |
| T686 |
/workspace/coverage/default/27.spi_device_tpm_read_hw_reg.1830531161 |
|
|
Apr 21 12:55:58 PM PDT 24 |
Apr 21 12:56:00 PM PDT 24 |
28446371 ps |
| T687 |
/workspace/coverage/default/24.spi_device_tpm_sts_read.2265081149 |
|
|
Apr 21 12:55:49 PM PDT 24 |
Apr 21 12:55:50 PM PDT 24 |
494174701 ps |
| T258 |
/workspace/coverage/default/28.spi_device_pass_cmd_filtering.2327674614 |
|
|
Apr 21 12:55:52 PM PDT 24 |
Apr 21 12:56:05 PM PDT 24 |
6829730491 ps |
| T688 |
/workspace/coverage/default/18.spi_device_mailbox.3978338374 |
|
|
Apr 21 12:55:43 PM PDT 24 |
Apr 21 12:55:47 PM PDT 24 |
496135122 ps |
| T689 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.1784598523 |
|
|
Apr 21 12:54:59 PM PDT 24 |
Apr 21 12:55:00 PM PDT 24 |
22017102 ps |
| T690 |
/workspace/coverage/default/32.spi_device_tpm_rw.2670362452 |
|
|
Apr 21 12:56:04 PM PDT 24 |
Apr 21 12:56:06 PM PDT 24 |
161801461 ps |
| T691 |
/workspace/coverage/default/49.spi_device_read_buffer_direct.4075835102 |
|
|
Apr 21 12:56:52 PM PDT 24 |
Apr 21 12:57:04 PM PDT 24 |
1642009092 ps |
| T692 |
/workspace/coverage/default/16.spi_device_flash_mode.1218389009 |
|
|
Apr 21 12:55:29 PM PDT 24 |
Apr 21 12:57:00 PM PDT 24 |
12128539132 ps |
| T693 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.3867529881 |
|
|
Apr 21 12:55:50 PM PDT 24 |
Apr 21 12:55:55 PM PDT 24 |
355728147 ps |
| T694 |
/workspace/coverage/default/49.spi_device_flash_mode.908447761 |
|
|
Apr 21 12:56:57 PM PDT 24 |
Apr 21 12:58:31 PM PDT 24 |
42908727855 ps |
| T695 |
/workspace/coverage/default/6.spi_device_tpm_rw.2817811731 |
|
|
Apr 21 12:55:06 PM PDT 24 |
Apr 21 12:55:07 PM PDT 24 |
28467007 ps |
| T279 |
/workspace/coverage/default/6.spi_device_mailbox.3506275173 |
|
|
Apr 21 12:55:07 PM PDT 24 |
Apr 21 12:55:16 PM PDT 24 |
1028738232 ps |
| T696 |
/workspace/coverage/default/26.spi_device_tpm_sts_read.1957324952 |
|
|
Apr 21 12:55:59 PM PDT 24 |
Apr 21 12:56:01 PM PDT 24 |
73577126 ps |
| T697 |
/workspace/coverage/default/41.spi_device_csb_read.2867707103 |
|
|
Apr 21 12:56:25 PM PDT 24 |
Apr 21 12:56:26 PM PDT 24 |
19118797 ps |
| T698 |
/workspace/coverage/default/22.spi_device_tpm_rw.1618482344 |
|
|
Apr 21 12:55:43 PM PDT 24 |
Apr 21 12:55:50 PM PDT 24 |
161658303 ps |
| T356 |
/workspace/coverage/default/22.spi_device_pass_cmd_filtering.1452833435 |
|
|
Apr 21 12:55:41 PM PDT 24 |
Apr 21 12:55:50 PM PDT 24 |
1109765942 ps |
| T699 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.3612331582 |
|
|
Apr 21 12:56:42 PM PDT 24 |
Apr 21 12:56:45 PM PDT 24 |
67996162 ps |
| T700 |
/workspace/coverage/default/46.spi_device_tpm_rw.668824131 |
|
|
Apr 21 12:56:41 PM PDT 24 |
Apr 21 12:56:44 PM PDT 24 |
126785552 ps |
| T109 |
/workspace/coverage/default/39.spi_device_cfg_cmd.3847824525 |
|
|
Apr 21 12:56:27 PM PDT 24 |
Apr 21 12:56:44 PM PDT 24 |
1857742229 ps |
| T701 |
/workspace/coverage/default/43.spi_device_tpm_all.3758566111 |
|
|
Apr 21 12:56:31 PM PDT 24 |
Apr 21 12:57:03 PM PDT 24 |
8995011167 ps |
| T702 |
/workspace/coverage/default/45.spi_device_tpm_sts_read.3889495426 |
|
|
Apr 21 12:56:46 PM PDT 24 |
Apr 21 12:56:47 PM PDT 24 |
36568158 ps |
| T335 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.871345087 |
|
|
Apr 21 12:56:40 PM PDT 24 |
Apr 21 12:56:47 PM PDT 24 |
1238148562 ps |
| T703 |
/workspace/coverage/default/32.spi_device_tpm_sts_read.2711488695 |
|
|
Apr 21 12:56:02 PM PDT 24 |
Apr 21 12:56:03 PM PDT 24 |
572104380 ps |
| T704 |
/workspace/coverage/default/9.spi_device_tpm_all.3119483293 |
|
|
Apr 21 12:55:05 PM PDT 24 |
Apr 21 12:55:24 PM PDT 24 |
6174412367 ps |
| T705 |
/workspace/coverage/default/7.spi_device_tpm_rw.4023854391 |
|
|
Apr 21 12:55:08 PM PDT 24 |
Apr 21 12:55:18 PM PDT 24 |
790842916 ps |
| T327 |
/workspace/coverage/default/21.spi_device_cfg_cmd.471421900 |
|
|
Apr 21 12:55:39 PM PDT 24 |
Apr 21 12:55:56 PM PDT 24 |
2152128014 ps |
| T706 |
/workspace/coverage/default/17.spi_device_alert_test.216977058 |
|
|
Apr 21 12:55:44 PM PDT 24 |
Apr 21 12:55:45 PM PDT 24 |
12814798 ps |
| T707 |
/workspace/coverage/default/8.spi_device_tpm_all.2928149478 |
|
|
Apr 21 12:55:09 PM PDT 24 |
Apr 21 12:55:43 PM PDT 24 |
10674515993 ps |
| T708 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.2815107911 |
|
|
Apr 21 12:56:14 PM PDT 24 |
Apr 21 12:56:38 PM PDT 24 |
8117848311 ps |
| T709 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.764541996 |
|
|
Apr 21 12:56:47 PM PDT 24 |
Apr 21 12:56:58 PM PDT 24 |
22010107060 ps |
| T261 |
/workspace/coverage/default/2.spi_device_cfg_cmd.1762068825 |
|
|
Apr 21 12:55:09 PM PDT 24 |
Apr 21 12:55:37 PM PDT 24 |
13697592411 ps |
| T710 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.3434729765 |
|
|
Apr 21 12:56:39 PM PDT 24 |
Apr 21 12:56:40 PM PDT 24 |
17132935 ps |
| T711 |
/workspace/coverage/default/0.spi_device_stress_all.2495518413 |
|
|
Apr 21 12:54:51 PM PDT 24 |
Apr 21 12:54:53 PM PDT 24 |
135869836 ps |
| T345 |
/workspace/coverage/default/10.spi_device_pass_addr_payload_swap.3829643143 |
|
|
Apr 21 12:55:25 PM PDT 24 |
Apr 21 12:55:37 PM PDT 24 |
3182441666 ps |
| T712 |
/workspace/coverage/default/15.spi_device_csb_read.1592809977 |
|
|
Apr 21 12:55:34 PM PDT 24 |
Apr 21 12:55:35 PM PDT 24 |
14406971 ps |
| T713 |
/workspace/coverage/default/28.spi_device_read_buffer_direct.3961076055 |
|
|
Apr 21 12:55:52 PM PDT 24 |
Apr 21 12:55:57 PM PDT 24 |
142130524 ps |
| T714 |
/workspace/coverage/default/33.spi_device_pass_cmd_filtering.786363305 |
|
|
Apr 21 12:56:15 PM PDT 24 |
Apr 21 12:56:18 PM PDT 24 |
68110657 ps |
| T715 |
/workspace/coverage/default/19.spi_device_alert_test.2358069927 |
|
|
Apr 21 12:55:29 PM PDT 24 |
Apr 21 12:55:30 PM PDT 24 |
22058145 ps |
| T716 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.643603947 |
|
|
Apr 21 12:55:10 PM PDT 24 |
Apr 21 12:55:14 PM PDT 24 |
183884822 ps |
| T717 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.3175464665 |
|
|
Apr 21 12:54:54 PM PDT 24 |
Apr 21 12:55:07 PM PDT 24 |
2579668569 ps |
| T718 |
/workspace/coverage/default/38.spi_device_alert_test.705987764 |
|
|
Apr 21 12:56:21 PM PDT 24 |
Apr 21 12:56:23 PM PDT 24 |
60028895 ps |
| T719 |
/workspace/coverage/default/24.spi_device_csb_read.201231092 |
|
|
Apr 21 12:55:53 PM PDT 24 |
Apr 21 12:55:55 PM PDT 24 |
61769922 ps |
| T720 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2576914547 |
|
|
Apr 21 12:39:18 PM PDT 24 |
Apr 21 12:39:19 PM PDT 24 |
12595334 ps |
| T35 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1455594415 |
|
|
Apr 21 12:39:18 PM PDT 24 |
Apr 21 12:39:36 PM PDT 24 |
1207763072 ps |
| T36 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.305313085 |
|
|
Apr 21 12:39:16 PM PDT 24 |
Apr 21 12:39:25 PM PDT 24 |
2309664786 ps |
| T37 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3189528792 |
|
|
Apr 21 12:38:58 PM PDT 24 |
Apr 21 12:39:01 PM PDT 24 |
78568531 ps |
| T110 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.2091797838 |
|
|
Apr 21 12:38:53 PM PDT 24 |
Apr 21 12:38:56 PM PDT 24 |
179682418 ps |
| T38 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.894591212 |
|
|
Apr 21 12:39:02 PM PDT 24 |
Apr 21 12:39:06 PM PDT 24 |
63067758 ps |
| T111 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2666235423 |
|
|
Apr 21 12:39:04 PM PDT 24 |
Apr 21 12:39:07 PM PDT 24 |
160901870 ps |
| T721 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.72519217 |
|
|
Apr 21 12:39:18 PM PDT 24 |
Apr 21 12:39:20 PM PDT 24 |
15859543 ps |
| T138 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.160593219 |
|
|
Apr 21 12:38:50 PM PDT 24 |
Apr 21 12:38:52 PM PDT 24 |
21519356 ps |
| T39 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.3309653526 |
|
|
Apr 21 12:38:45 PM PDT 24 |
Apr 21 12:39:01 PM PDT 24 |
3103493549 ps |
| T117 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2433604030 |
|
|
Apr 21 12:39:04 PM PDT 24 |
Apr 21 12:39:07 PM PDT 24 |
64742535 ps |
| T722 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.1218582988 |
|
|
Apr 21 12:39:32 PM PDT 24 |
Apr 21 12:39:34 PM PDT 24 |
22395074 ps |
| T112 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.3373405456 |
|
|
Apr 21 12:39:01 PM PDT 24 |
Apr 21 12:39:22 PM PDT 24 |
1126913603 ps |
| T134 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3314847720 |
|
|
Apr 21 12:39:05 PM PDT 24 |
Apr 21 12:39:13 PM PDT 24 |
105118737 ps |
| T163 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.729603444 |
|
|
Apr 21 12:39:06 PM PDT 24 |
Apr 21 12:39:07 PM PDT 24 |
21869549 ps |
| T98 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3071164324 |
|
|
Apr 21 12:38:40 PM PDT 24 |
Apr 21 12:38:41 PM PDT 24 |
53206944 ps |
| T118 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1436076671 |
|
|
Apr 21 12:39:24 PM PDT 24 |
Apr 21 12:39:27 PM PDT 24 |
29864145 ps |
| T136 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.3378614524 |
|
|
Apr 21 12:38:47 PM PDT 24 |
Apr 21 12:39:00 PM PDT 24 |
785367363 ps |
| T139 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.243171977 |
|
|
Apr 21 12:38:59 PM PDT 24 |
Apr 21 12:39:01 PM PDT 24 |
86728155 ps |
| T133 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.1764478947 |
|
|
Apr 21 12:39:07 PM PDT 24 |
Apr 21 12:39:11 PM PDT 24 |
199317911 ps |
| T723 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.180143569 |
|
|
Apr 21 12:39:12 PM PDT 24 |
Apr 21 12:39:14 PM PDT 24 |
53274060 ps |
| T135 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.440859280 |
|
|
Apr 21 12:39:06 PM PDT 24 |
Apr 21 12:39:13 PM PDT 24 |
104758776 ps |
| T128 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.1817926484 |
|
|
Apr 21 12:39:06 PM PDT 24 |
Apr 21 12:39:10 PM PDT 24 |
268925975 ps |
| T140 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3135652726 |
|
|
Apr 21 12:38:53 PM PDT 24 |
Apr 21 12:38:56 PM PDT 24 |
141572982 ps |
| T724 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.4209934423 |
|
|
Apr 21 12:38:53 PM PDT 24 |
Apr 21 12:38:55 PM PDT 24 |
20364205 ps |
| T725 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.3822923316 |
|
|
Apr 21 12:39:04 PM PDT 24 |
Apr 21 12:39:05 PM PDT 24 |
12268776 ps |
| T151 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.732973293 |
|
|
Apr 21 12:38:45 PM PDT 24 |
Apr 21 12:38:58 PM PDT 24 |
57817943 ps |
| T726 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.2996389052 |
|
|
Apr 21 12:39:26 PM PDT 24 |
Apr 21 12:39:27 PM PDT 24 |
16886593 ps |
| T123 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.2066864861 |
|
|
Apr 21 12:39:13 PM PDT 24 |
Apr 21 12:39:20 PM PDT 24 |
907739890 ps |
| T727 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.864233526 |
|
|
Apr 21 12:39:00 PM PDT 24 |
Apr 21 12:39:04 PM PDT 24 |
1225475851 ps |
| T125 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.3987914453 |
|
|
Apr 21 12:39:11 PM PDT 24 |
Apr 21 12:39:14 PM PDT 24 |
121176622 ps |
| T131 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.585803766 |
|
|
Apr 21 12:39:12 PM PDT 24 |
Apr 21 12:39:16 PM PDT 24 |
412655605 ps |
| T152 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.3589237525 |
|
|
Apr 21 12:39:30 PM PDT 24 |
Apr 21 12:39:35 PM PDT 24 |
676550438 ps |
| T124 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.3718362907 |
|
|
Apr 21 12:38:41 PM PDT 24 |
Apr 21 12:38:44 PM PDT 24 |
116299188 ps |
| T728 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.1839588115 |
|
|
Apr 21 12:39:17 PM PDT 24 |
Apr 21 12:39:19 PM PDT 24 |
14744109 ps |
| T141 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3242447293 |
|
|
Apr 21 12:39:15 PM PDT 24 |
Apr 21 12:39:18 PM PDT 24 |
64478849 ps |
| T729 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.1365444521 |
|
|
Apr 21 12:38:59 PM PDT 24 |
Apr 21 12:39:01 PM PDT 24 |
15596441 ps |
| T730 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.2872140787 |
|
|
Apr 21 12:39:26 PM PDT 24 |
Apr 21 12:39:32 PM PDT 24 |
13862355 ps |
| T731 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.2157751053 |
|
|
Apr 21 12:39:15 PM PDT 24 |
Apr 21 12:39:17 PM PDT 24 |
29847703 ps |
| T732 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.284710776 |
|
|
Apr 21 12:38:53 PM PDT 24 |
Apr 21 12:38:54 PM PDT 24 |
18347068 ps |
| T99 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.3322576197 |
|
|
Apr 21 12:39:07 PM PDT 24 |
Apr 21 12:39:09 PM PDT 24 |
41759767 ps |
| T130 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.1652211163 |
|
|
Apr 21 12:38:49 PM PDT 24 |
Apr 21 12:38:52 PM PDT 24 |
71749277 ps |
| T153 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1009713302 |
|
|
Apr 21 12:39:03 PM PDT 24 |
Apr 21 12:39:05 PM PDT 24 |
49293715 ps |
| T156 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.2084763510 |
|
|
Apr 21 12:39:09 PM PDT 24 |
Apr 21 12:39:26 PM PDT 24 |
761268675 ps |
| T733 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.1528191370 |
|
|
Apr 21 12:39:36 PM PDT 24 |
Apr 21 12:39:38 PM PDT 24 |
15059622 ps |
| T734 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.4015864186 |
|
|
Apr 21 12:39:00 PM PDT 24 |
Apr 21 12:39:03 PM PDT 24 |
47581122 ps |
| T735 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.1948882145 |
|
|
Apr 21 12:38:56 PM PDT 24 |
Apr 21 12:39:12 PM PDT 24 |
210065468 ps |
| T736 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.1122154521 |
|
|
Apr 21 12:39:00 PM PDT 24 |
Apr 21 12:39:03 PM PDT 24 |
11956253 ps |
| T737 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.3264450410 |
|
|
Apr 21 12:38:43 PM PDT 24 |
Apr 21 12:38:44 PM PDT 24 |
41649631 ps |
| T126 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.3792519895 |
|
|
Apr 21 12:39:13 PM PDT 24 |
Apr 21 12:39:18 PM PDT 24 |
470306548 ps |
| T127 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.2626146619 |
|
|
Apr 21 12:39:13 PM PDT 24 |
Apr 21 12:39:16 PM PDT 24 |
68201506 ps |
| T145 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.84888033 |
|
|
Apr 21 12:38:36 PM PDT 24 |
Apr 21 12:39:15 PM PDT 24 |
9488447322 ps |
| T738 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.4290810277 |
|
|
Apr 21 12:39:12 PM PDT 24 |
Apr 21 12:39:14 PM PDT 24 |
12683183 ps |
| T739 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.1518825211 |
|
|
Apr 21 12:39:14 PM PDT 24 |
Apr 21 12:39:16 PM PDT 24 |
14675713 ps |
| T740 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1658402249 |
|
|
Apr 21 12:39:16 PM PDT 24 |
Apr 21 12:39:17 PM PDT 24 |
26405786 ps |
| T154 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3367802001 |
|
|
Apr 21 12:38:53 PM PDT 24 |
Apr 21 12:38:55 PM PDT 24 |
41152060 ps |
| T366 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.1639850235 |
|
|
Apr 21 12:38:43 PM PDT 24 |
Apr 21 12:38:51 PM PDT 24 |
536507910 ps |
| T362 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.2034164529 |
|
|
Apr 21 12:39:12 PM PDT 24 |
Apr 21 12:39:20 PM PDT 24 |
1114664341 ps |
| T157 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.342078715 |
|
|
Apr 21 12:38:49 PM PDT 24 |
Apr 21 12:38:52 PM PDT 24 |
420895158 ps |
| T129 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.374892024 |
|
|
Apr 21 12:38:50 PM PDT 24 |
Apr 21 12:38:53 PM PDT 24 |
105547049 ps |
| T741 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2703672032 |
|
|
Apr 21 12:39:24 PM PDT 24 |
Apr 21 12:39:25 PM PDT 24 |
14206373 ps |
| T132 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3824196969 |
|
|
Apr 21 12:39:05 PM PDT 24 |
Apr 21 12:39:07 PM PDT 24 |
53381086 ps |
| T742 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.1205346641 |
|
|
Apr 21 12:38:59 PM PDT 24 |
Apr 21 12:39:14 PM PDT 24 |
800012659 ps |
| T155 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.487181715 |
|
|
Apr 21 12:39:13 PM PDT 24 |
Apr 21 12:39:16 PM PDT 24 |
96532098 ps |
| T142 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.1119113147 |
|
|
Apr 21 12:38:46 PM PDT 24 |
Apr 21 12:39:07 PM PDT 24 |
758693463 ps |
| T743 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3675186845 |
|
|
Apr 21 12:38:49 PM PDT 24 |
Apr 21 12:38:50 PM PDT 24 |
30058823 ps |
| T364 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.568835390 |
|
|
Apr 21 12:39:05 PM PDT 24 |
Apr 21 12:39:28 PM PDT 24 |
869951814 ps |
| T744 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.3745385777 |
|
|
Apr 21 12:39:16 PM PDT 24 |
Apr 21 12:39:19 PM PDT 24 |
94860772 ps |
| T745 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.3349451446 |
|
|
Apr 21 12:39:32 PM PDT 24 |
Apr 21 12:39:39 PM PDT 24 |
29999183 ps |
| T746 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.3295378629 |
|
|
Apr 21 12:39:15 PM PDT 24 |
Apr 21 12:39:16 PM PDT 24 |
15221673 ps |
| T158 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.2956197587 |
|
|
Apr 21 12:39:06 PM PDT 24 |
Apr 21 12:39:09 PM PDT 24 |
132373510 ps |
| T143 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3054435895 |
|
|
Apr 21 12:38:53 PM PDT 24 |
Apr 21 12:38:55 PM PDT 24 |
76296083 ps |
| T159 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.4024057951 |
|
|
Apr 21 12:38:49 PM PDT 24 |
Apr 21 12:38:52 PM PDT 24 |
422461241 ps |
| T747 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.632827430 |
|
|
Apr 21 12:39:09 PM PDT 24 |
Apr 21 12:39:47 PM PDT 24 |
3619593776 ps |
| T748 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.998579746 |
|
|
Apr 21 12:38:56 PM PDT 24 |
Apr 21 12:39:02 PM PDT 24 |
917411680 ps |
| T749 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.2837710548 |
|
|
Apr 21 12:38:53 PM PDT 24 |
Apr 21 12:38:55 PM PDT 24 |
13517101 ps |
| T750 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.392103070 |
|
|
Apr 21 12:39:05 PM PDT 24 |
Apr 21 12:39:12 PM PDT 24 |
127150880 ps |
| T144 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.3417091408 |
|
|
Apr 21 12:39:03 PM PDT 24 |
Apr 21 12:39:06 PM PDT 24 |
39973181 ps |
| T751 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.2927815895 |
|
|
Apr 21 12:38:57 PM PDT 24 |
Apr 21 12:39:11 PM PDT 24 |
936300075 ps |
| T752 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2173604243 |
|
|
Apr 21 12:39:06 PM PDT 24 |
Apr 21 12:39:08 PM PDT 24 |
18736269 ps |
| T368 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.3719174382 |
|
|
Apr 21 12:38:37 PM PDT 24 |
Apr 21 12:38:53 PM PDT 24 |
677247356 ps |
| T753 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.2874044748 |
|
|
Apr 21 12:39:13 PM PDT 24 |
Apr 21 12:39:15 PM PDT 24 |
39365171 ps |
| T146 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2315768046 |
|
|
Apr 21 12:39:17 PM PDT 24 |
Apr 21 12:39:32 PM PDT 24 |
1813387744 ps |
| T147 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.1603776377 |
|
|
Apr 21 12:38:56 PM PDT 24 |
Apr 21 12:38:59 PM PDT 24 |
91824753 ps |
| T754 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.1394196806 |
|
|
Apr 21 12:39:01 PM PDT 24 |
Apr 21 12:39:03 PM PDT 24 |
11372304 ps |
| T755 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.3826462592 |
|
|
Apr 21 12:38:57 PM PDT 24 |
Apr 21 12:39:01 PM PDT 24 |
71729116 ps |
| T756 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.4019092041 |
|
|
Apr 21 12:39:08 PM PDT 24 |
Apr 21 12:39:11 PM PDT 24 |
264534060 ps |
| T757 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2593690799 |
|
|
Apr 21 12:39:08 PM PDT 24 |
Apr 21 12:39:10 PM PDT 24 |
60917749 ps |
| T758 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.2057159960 |
|
|
Apr 21 12:39:16 PM PDT 24 |
Apr 21 12:39:17 PM PDT 24 |
16146217 ps |
| T148 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.1812529549 |
|
|
Apr 21 12:38:51 PM PDT 24 |
Apr 21 12:38:54 PM PDT 24 |
253086785 ps |