| T620 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.930210915 |
|
|
Apr 25 01:09:38 PM PDT 24 |
Apr 25 01:10:14 PM PDT 24 |
52082620171 ps |
| T92 |
/workspace/coverage/default/9.spi_device_cfg_cmd.3586482122 |
|
|
Apr 25 01:10:08 PM PDT 24 |
Apr 25 01:10:12 PM PDT 24 |
99919968 ps |
| T315 |
/workspace/coverage/default/15.spi_device_intercept.1655403935 |
|
|
Apr 25 01:10:17 PM PDT 24 |
Apr 25 01:10:22 PM PDT 24 |
81233837 ps |
| T621 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.3681983280 |
|
|
Apr 25 01:10:53 PM PDT 24 |
Apr 25 01:10:59 PM PDT 24 |
1034301241 ps |
| T622 |
/workspace/coverage/default/18.spi_device_tpm_rw.2921629482 |
|
|
Apr 25 01:10:30 PM PDT 24 |
Apr 25 01:10:32 PM PDT 24 |
56114043 ps |
| T336 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.3694248253 |
|
|
Apr 25 01:10:28 PM PDT 24 |
Apr 25 01:10:32 PM PDT 24 |
195400563 ps |
| T623 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.3866906236 |
|
|
Apr 25 01:09:58 PM PDT 24 |
Apr 25 01:10:06 PM PDT 24 |
191396403 ps |
| T624 |
/workspace/coverage/default/24.spi_device_tpm_all.2843725617 |
|
|
Apr 25 01:10:51 PM PDT 24 |
Apr 25 01:11:28 PM PDT 24 |
6688960206 ps |
| T224 |
/workspace/coverage/default/35.spi_device_mailbox.346452654 |
|
|
Apr 25 01:11:35 PM PDT 24 |
Apr 25 01:13:36 PM PDT 24 |
14147275530 ps |
| T625 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.1764013202 |
|
|
Apr 25 01:12:03 PM PDT 24 |
Apr 25 01:12:05 PM PDT 24 |
47556374 ps |
| T221 |
/workspace/coverage/default/36.spi_device_intercept.3548512633 |
|
|
Apr 25 01:11:42 PM PDT 24 |
Apr 25 01:11:59 PM PDT 24 |
6734112298 ps |
| T113 |
/workspace/coverage/default/44.spi_device_intercept.3905983181 |
|
|
Apr 25 01:12:18 PM PDT 24 |
Apr 25 01:12:49 PM PDT 24 |
7385411219 ps |
| T219 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.948674955 |
|
|
Apr 25 01:10:00 PM PDT 24 |
Apr 25 01:10:29 PM PDT 24 |
9088612745 ps |
| T626 |
/workspace/coverage/default/33.spi_device_csb_read.1276224178 |
|
|
Apr 25 01:11:30 PM PDT 24 |
Apr 25 01:11:31 PM PDT 24 |
34308358 ps |
| T627 |
/workspace/coverage/default/12.spi_device_tpm_read_hw_reg.683288525 |
|
|
Apr 25 01:10:07 PM PDT 24 |
Apr 25 01:10:12 PM PDT 24 |
551842555 ps |
| T628 |
/workspace/coverage/default/37.spi_device_alert_test.1212396991 |
|
|
Apr 25 01:11:48 PM PDT 24 |
Apr 25 01:11:50 PM PDT 24 |
11024415 ps |
| T629 |
/workspace/coverage/default/39.spi_device_read_buffer_direct.886114011 |
|
|
Apr 25 01:11:55 PM PDT 24 |
Apr 25 01:11:59 PM PDT 24 |
227834416 ps |
| T305 |
/workspace/coverage/default/21.spi_device_intercept.226892495 |
|
|
Apr 25 01:10:44 PM PDT 24 |
Apr 25 01:10:54 PM PDT 24 |
1311292608 ps |
| T209 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.3547599415 |
|
|
Apr 25 01:09:35 PM PDT 24 |
Apr 25 01:09:42 PM PDT 24 |
780213576 ps |
| T630 |
/workspace/coverage/default/47.spi_device_cfg_cmd.3204674672 |
|
|
Apr 25 01:12:37 PM PDT 24 |
Apr 25 01:12:48 PM PDT 24 |
2134093389 ps |
| T631 |
/workspace/coverage/default/3.spi_device_tpm_read_hw_reg.2870013813 |
|
|
Apr 25 01:09:45 PM PDT 24 |
Apr 25 01:10:00 PM PDT 24 |
14027452682 ps |
| T632 |
/workspace/coverage/default/33.spi_device_alert_test.3277986741 |
|
|
Apr 25 01:11:35 PM PDT 24 |
Apr 25 01:11:36 PM PDT 24 |
14215417 ps |
| T190 |
/workspace/coverage/default/31.spi_device_intercept.3970009395 |
|
|
Apr 25 01:11:22 PM PDT 24 |
Apr 25 01:11:39 PM PDT 24 |
8047245911 ps |
| T633 |
/workspace/coverage/default/31.spi_device_tpm_all.1043362969 |
|
|
Apr 25 01:11:22 PM PDT 24 |
Apr 25 01:11:28 PM PDT 24 |
193316526 ps |
| T312 |
/workspace/coverage/default/9.spi_device_mailbox.738491848 |
|
|
Apr 25 01:09:57 PM PDT 24 |
Apr 25 01:12:00 PM PDT 24 |
14760493925 ps |
| T301 |
/workspace/coverage/default/45.spi_device_pass_cmd_filtering.2530520251 |
|
|
Apr 25 01:12:18 PM PDT 24 |
Apr 25 01:12:25 PM PDT 24 |
350921461 ps |
| T634 |
/workspace/coverage/default/8.spi_device_tpm_all.4180374613 |
|
|
Apr 25 01:09:58 PM PDT 24 |
Apr 25 01:10:45 PM PDT 24 |
14691662592 ps |
| T635 |
/workspace/coverage/default/24.spi_device_stress_all.3806912762 |
|
|
Apr 25 01:10:51 PM PDT 24 |
Apr 25 01:10:52 PM PDT 24 |
63910084 ps |
| T283 |
/workspace/coverage/default/34.spi_device_flash_mode.3178715651 |
|
|
Apr 25 01:11:44 PM PDT 24 |
Apr 25 01:11:59 PM PDT 24 |
597616691 ps |
| T341 |
/workspace/coverage/default/31.spi_device_pass_addr_payload_swap.413303654 |
|
|
Apr 25 01:11:31 PM PDT 24 |
Apr 25 01:11:34 PM PDT 24 |
181042528 ps |
| T636 |
/workspace/coverage/default/14.spi_device_read_buffer_direct.2288030336 |
|
|
Apr 25 01:10:13 PM PDT 24 |
Apr 25 01:10:19 PM PDT 24 |
82923522 ps |
| T637 |
/workspace/coverage/default/6.spi_device_tpm_rw.2413005122 |
|
|
Apr 25 01:09:57 PM PDT 24 |
Apr 25 01:10:02 PM PDT 24 |
532533350 ps |
| T386 |
/workspace/coverage/default/47.spi_device_tpm_all.1698392204 |
|
|
Apr 25 01:12:31 PM PDT 24 |
Apr 25 01:12:41 PM PDT 24 |
7931628940 ps |
| T295 |
/workspace/coverage/default/10.spi_device_flash_mode.3230317014 |
|
|
Apr 25 01:10:05 PM PDT 24 |
Apr 25 01:10:28 PM PDT 24 |
994294949 ps |
| T351 |
/workspace/coverage/default/33.spi_device_intercept.4008717454 |
|
|
Apr 25 01:11:28 PM PDT 24 |
Apr 25 01:11:55 PM PDT 24 |
2765836521 ps |
| T638 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.4198183971 |
|
|
Apr 25 01:10:12 PM PDT 24 |
Apr 25 01:10:16 PM PDT 24 |
103684359 ps |
| T639 |
/workspace/coverage/default/31.spi_device_mailbox.2832194678 |
|
|
Apr 25 01:11:25 PM PDT 24 |
Apr 25 01:11:45 PM PDT 24 |
2061468644 ps |
| T640 |
/workspace/coverage/default/14.spi_device_stress_all.232063804 |
|
|
Apr 25 01:10:12 PM PDT 24 |
Apr 25 01:10:15 PM PDT 24 |
92641025 ps |
| T641 |
/workspace/coverage/default/0.spi_device_tpm_rw.1459731634 |
|
|
Apr 25 01:09:33 PM PDT 24 |
Apr 25 01:09:38 PM PDT 24 |
512408387 ps |
| T642 |
/workspace/coverage/default/6.spi_device_flash_mode.2855719376 |
|
|
Apr 25 01:09:57 PM PDT 24 |
Apr 25 01:10:17 PM PDT 24 |
828459663 ps |
| T382 |
/workspace/coverage/default/2.spi_device_tpm_all.1108126637 |
|
|
Apr 25 01:09:39 PM PDT 24 |
Apr 25 01:10:01 PM PDT 24 |
2282164236 ps |
| T643 |
/workspace/coverage/default/33.spi_device_tpm_rw.801016063 |
|
|
Apr 25 01:11:28 PM PDT 24 |
Apr 25 01:11:34 PM PDT 24 |
151239597 ps |
| T269 |
/workspace/coverage/default/0.spi_device_pass_addr_payload_swap.3572622807 |
|
|
Apr 25 01:09:33 PM PDT 24 |
Apr 25 01:09:45 PM PDT 24 |
5000370293 ps |
| T272 |
/workspace/coverage/default/31.spi_device_pass_cmd_filtering.1389703948 |
|
|
Apr 25 01:11:24 PM PDT 24 |
Apr 25 01:11:31 PM PDT 24 |
2787636088 ps |
| T644 |
/workspace/coverage/default/36.spi_device_tpm_rw.1715506778 |
|
|
Apr 25 01:11:41 PM PDT 24 |
Apr 25 01:11:43 PM PDT 24 |
39824116 ps |
| T645 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.3306847474 |
|
|
Apr 25 01:11:24 PM PDT 24 |
Apr 25 01:11:49 PM PDT 24 |
7457312266 ps |
| T646 |
/workspace/coverage/default/6.spi_device_tpm_all.2817411485 |
|
|
Apr 25 01:09:55 PM PDT 24 |
Apr 25 01:10:17 PM PDT 24 |
1391571757 ps |
| T647 |
/workspace/coverage/default/38.spi_device_tpm_rw.2775659355 |
|
|
Apr 25 01:11:47 PM PDT 24 |
Apr 25 01:11:49 PM PDT 24 |
17285420 ps |
| T648 |
/workspace/coverage/default/15.spi_device_tpm_rw.2946480569 |
|
|
Apr 25 01:10:22 PM PDT 24 |
Apr 25 01:10:24 PM PDT 24 |
143082192 ps |
| T207 |
/workspace/coverage/default/7.spi_device_intercept.1625476604 |
|
|
Apr 25 01:09:55 PM PDT 24 |
Apr 25 01:10:06 PM PDT 24 |
2731099622 ps |
| T352 |
/workspace/coverage/default/27.spi_device_mailbox.1702732735 |
|
|
Apr 25 01:11:02 PM PDT 24 |
Apr 25 01:11:53 PM PDT 24 |
10313378624 ps |
| T649 |
/workspace/coverage/default/41.spi_device_tpm_rw.3291502245 |
|
|
Apr 25 01:12:03 PM PDT 24 |
Apr 25 01:12:08 PM PDT 24 |
100579566 ps |
| T191 |
/workspace/coverage/default/28.spi_device_pass_cmd_filtering.745797275 |
|
|
Apr 25 01:11:10 PM PDT 24 |
Apr 25 01:11:15 PM PDT 24 |
304252566 ps |
| T347 |
/workspace/coverage/default/8.spi_device_mailbox.3853056453 |
|
|
Apr 25 01:09:58 PM PDT 24 |
Apr 25 01:10:19 PM PDT 24 |
5137846061 ps |
| T381 |
/workspace/coverage/default/35.spi_device_tpm_all.4286520427 |
|
|
Apr 25 01:11:35 PM PDT 24 |
Apr 25 01:12:25 PM PDT 24 |
9073068253 ps |
| T650 |
/workspace/coverage/default/1.spi_device_tpm_rw.3214286459 |
|
|
Apr 25 01:09:35 PM PDT 24 |
Apr 25 01:09:39 PM PDT 24 |
321522504 ps |
| T651 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.1085396591 |
|
|
Apr 25 01:11:49 PM PDT 24 |
Apr 25 01:11:54 PM PDT 24 |
136187411 ps |
| T652 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.3187228130 |
|
|
Apr 25 01:12:15 PM PDT 24 |
Apr 25 01:12:20 PM PDT 24 |
88622521 ps |
| T653 |
/workspace/coverage/default/12.spi_device_tpm_rw.3662436111 |
|
|
Apr 25 01:10:04 PM PDT 24 |
Apr 25 01:10:07 PM PDT 24 |
116385921 ps |
| T342 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.2710337391 |
|
|
Apr 25 01:10:24 PM PDT 24 |
Apr 25 01:10:39 PM PDT 24 |
6539204968 ps |
| T284 |
/workspace/coverage/default/0.spi_device_flash_mode.655659780 |
|
|
Apr 25 01:09:37 PM PDT 24 |
Apr 25 01:09:59 PM PDT 24 |
3915087769 ps |
| T338 |
/workspace/coverage/default/19.spi_device_pass_addr_payload_swap.771237078 |
|
|
Apr 25 01:10:37 PM PDT 24 |
Apr 25 01:10:46 PM PDT 24 |
751236454 ps |
| T311 |
/workspace/coverage/default/36.spi_device_mailbox.3457298823 |
|
|
Apr 25 01:11:42 PM PDT 24 |
Apr 25 01:12:07 PM PDT 24 |
16083505302 ps |
| T654 |
/workspace/coverage/default/18.spi_device_alert_test.778305963 |
|
|
Apr 25 01:10:37 PM PDT 24 |
Apr 25 01:10:39 PM PDT 24 |
45696640 ps |
| T655 |
/workspace/coverage/default/8.spi_device_flash_mode.1506072417 |
|
|
Apr 25 01:09:57 PM PDT 24 |
Apr 25 01:10:11 PM PDT 24 |
1276590523 ps |
| T656 |
/workspace/coverage/default/24.spi_device_tpm_sts_read.1482135710 |
|
|
Apr 25 01:10:50 PM PDT 24 |
Apr 25 01:10:52 PM PDT 24 |
117634017 ps |
| T303 |
/workspace/coverage/default/23.spi_device_mailbox.3898784768 |
|
|
Apr 25 01:10:59 PM PDT 24 |
Apr 25 01:12:05 PM PDT 24 |
4766412161 ps |
| T657 |
/workspace/coverage/default/47.spi_device_tpm_rw.2077310231 |
|
|
Apr 25 01:12:33 PM PDT 24 |
Apr 25 01:12:41 PM PDT 24 |
203002606 ps |
| T235 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.967884204 |
|
|
Apr 25 01:11:30 PM PDT 24 |
Apr 25 01:11:42 PM PDT 24 |
1078830973 ps |
| T330 |
/workspace/coverage/default/30.spi_device_upload.4241431468 |
|
|
Apr 25 01:11:21 PM PDT 24 |
Apr 25 01:11:39 PM PDT 24 |
4485773982 ps |
| T658 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.2018804578 |
|
|
Apr 25 01:09:57 PM PDT 24 |
Apr 25 01:10:04 PM PDT 24 |
510223476 ps |
| T659 |
/workspace/coverage/default/42.spi_device_csb_read.4162060006 |
|
|
Apr 25 01:12:13 PM PDT 24 |
Apr 25 01:12:15 PM PDT 24 |
16126747 ps |
| T660 |
/workspace/coverage/default/19.spi_device_tpm_rw.3330738863 |
|
|
Apr 25 01:10:39 PM PDT 24 |
Apr 25 01:10:41 PM PDT 24 |
26913675 ps |
| T661 |
/workspace/coverage/default/27.spi_device_alert_test.3264195312 |
|
|
Apr 25 01:11:05 PM PDT 24 |
Apr 25 01:11:07 PM PDT 24 |
15043776 ps |
| T662 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.370101103 |
|
|
Apr 25 01:10:47 PM PDT 24 |
Apr 25 01:10:49 PM PDT 24 |
104150720 ps |
| T663 |
/workspace/coverage/default/16.spi_device_alert_test.3925179468 |
|
|
Apr 25 01:10:23 PM PDT 24 |
Apr 25 01:10:24 PM PDT 24 |
29944188 ps |
| T233 |
/workspace/coverage/default/9.spi_device_intercept.4109799392 |
|
|
Apr 25 01:09:59 PM PDT 24 |
Apr 25 01:10:33 PM PDT 24 |
3045155807 ps |
| T664 |
/workspace/coverage/default/23.spi_device_tpm_read_hw_reg.4108203208 |
|
|
Apr 25 01:10:53 PM PDT 24 |
Apr 25 01:11:01 PM PDT 24 |
8624143924 ps |
| T383 |
/workspace/coverage/default/32.spi_device_tpm_all.139958357 |
|
|
Apr 25 01:11:25 PM PDT 24 |
Apr 25 01:11:56 PM PDT 24 |
16971165651 ps |
| T665 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.1177403019 |
|
|
Apr 25 01:10:05 PM PDT 24 |
Apr 25 01:10:08 PM PDT 24 |
31746231 ps |
| T666 |
/workspace/coverage/default/48.spi_device_tpm_all.1982159791 |
|
|
Apr 25 01:12:37 PM PDT 24 |
Apr 25 01:13:07 PM PDT 24 |
3440196813 ps |
| T339 |
/workspace/coverage/default/11.spi_device_pass_addr_payload_swap.2110457517 |
|
|
Apr 25 01:10:06 PM PDT 24 |
Apr 25 01:10:14 PM PDT 24 |
950677434 ps |
| T667 |
/workspace/coverage/default/15.spi_device_csb_read.2609146950 |
|
|
Apr 25 01:10:12 PM PDT 24 |
Apr 25 01:10:15 PM PDT 24 |
321569949 ps |
| T287 |
/workspace/coverage/default/5.spi_device_flash_mode.1981009503 |
|
|
Apr 25 01:09:55 PM PDT 24 |
Apr 25 01:10:41 PM PDT 24 |
3046464868 ps |
| T668 |
/workspace/coverage/default/1.spi_device_tpm_all.1921050595 |
|
|
Apr 25 01:09:30 PM PDT 24 |
Apr 25 01:09:35 PM PDT 24 |
587128471 ps |
| T217 |
/workspace/coverage/default/46.spi_device_pass_addr_payload_swap.2735028305 |
|
|
Apr 25 01:12:28 PM PDT 24 |
Apr 25 01:12:31 PM PDT 24 |
81396089 ps |
| T248 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.2798812083 |
|
|
Apr 25 01:11:49 PM PDT 24 |
Apr 25 01:12:10 PM PDT 24 |
12914436931 ps |
| T669 |
/workspace/coverage/default/21.spi_device_read_buffer_direct.1765548146 |
|
|
Apr 25 01:10:43 PM PDT 24 |
Apr 25 01:10:51 PM PDT 24 |
1478494448 ps |
| T670 |
/workspace/coverage/default/14.spi_device_tpm_rw.336177020 |
|
|
Apr 25 01:10:10 PM PDT 24 |
Apr 25 01:10:12 PM PDT 24 |
130312193 ps |
| T671 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.4056867711 |
|
|
Apr 25 01:11:35 PM PDT 24 |
Apr 25 01:12:10 PM PDT 24 |
50499730468 ps |
| T200 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.3017392890 |
|
|
Apr 25 01:11:19 PM PDT 24 |
Apr 25 01:11:27 PM PDT 24 |
1677437345 ps |
| T293 |
/workspace/coverage/default/40.spi_device_flash_mode.1688995852 |
|
|
Apr 25 01:12:03 PM PDT 24 |
Apr 25 01:13:46 PM PDT 24 |
33069538297 ps |
| T672 |
/workspace/coverage/default/46.spi_device_tpm_all.3856703460 |
|
|
Apr 25 01:12:28 PM PDT 24 |
Apr 25 01:13:26 PM PDT 24 |
21687301284 ps |
| T673 |
/workspace/coverage/default/2.spi_device_alert_test.2917297397 |
|
|
Apr 25 01:09:37 PM PDT 24 |
Apr 25 01:09:39 PM PDT 24 |
38423047 ps |
| T674 |
/workspace/coverage/default/0.spi_device_tpm_sts_read.1623760139 |
|
|
Apr 25 01:09:31 PM PDT 24 |
Apr 25 01:09:34 PM PDT 24 |
103945952 ps |
| T675 |
/workspace/coverage/default/24.spi_device_alert_test.380226019 |
|
|
Apr 25 01:10:53 PM PDT 24 |
Apr 25 01:10:55 PM PDT 24 |
12249639 ps |
| T676 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.3411482503 |
|
|
Apr 25 01:09:54 PM PDT 24 |
Apr 25 01:09:56 PM PDT 24 |
75450945 ps |
| T677 |
/workspace/coverage/default/32.spi_device_tpm_sts_read.456946529 |
|
|
Apr 25 01:11:22 PM PDT 24 |
Apr 25 01:11:23 PM PDT 24 |
189128857 ps |
| T678 |
/workspace/coverage/default/28.spi_device_tpm_rw.1452886791 |
|
|
Apr 25 01:11:03 PM PDT 24 |
Apr 25 01:11:05 PM PDT 24 |
42016242 ps |
| T679 |
/workspace/coverage/default/33.spi_device_flash_mode.3477297580 |
|
|
Apr 25 01:12:07 PM PDT 24 |
Apr 25 01:13:34 PM PDT 24 |
11669642389 ps |
| T680 |
/workspace/coverage/default/7.spi_device_tpm_rw.1801832375 |
|
|
Apr 25 01:09:56 PM PDT 24 |
Apr 25 01:09:59 PM PDT 24 |
32743751 ps |
| T340 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.3811221471 |
|
|
Apr 25 01:11:10 PM PDT 24 |
Apr 25 01:11:18 PM PDT 24 |
4244845855 ps |
| T681 |
/workspace/coverage/default/16.spi_device_csb_read.50762348 |
|
|
Apr 25 01:10:18 PM PDT 24 |
Apr 25 01:10:21 PM PDT 24 |
61716266 ps |
| T682 |
/workspace/coverage/default/23.spi_device_tpm_all.2289249091 |
|
|
Apr 25 01:10:52 PM PDT 24 |
Apr 25 01:11:21 PM PDT 24 |
11790168145 ps |
| T258 |
/workspace/coverage/default/26.spi_device_upload.1789073065 |
|
|
Apr 25 01:10:58 PM PDT 24 |
Apr 25 01:11:07 PM PDT 24 |
627497846 ps |
| T285 |
/workspace/coverage/default/44.spi_device_flash_mode.837544941 |
|
|
Apr 25 01:12:28 PM PDT 24 |
Apr 25 01:12:47 PM PDT 24 |
2190867203 ps |
| T260 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.3744952604 |
|
|
Apr 25 01:11:42 PM PDT 24 |
Apr 25 01:11:55 PM PDT 24 |
41429416668 ps |
| T683 |
/workspace/coverage/default/40.spi_device_alert_test.2457526508 |
|
|
Apr 25 01:12:05 PM PDT 24 |
Apr 25 01:12:07 PM PDT 24 |
15083300 ps |
| T384 |
/workspace/coverage/default/34.spi_device_tpm_all.190372338 |
|
|
Apr 25 01:11:35 PM PDT 24 |
Apr 25 01:11:48 PM PDT 24 |
7869317756 ps |
| T286 |
/workspace/coverage/default/16.spi_device_flash_mode.2423624354 |
|
|
Apr 25 01:10:17 PM PDT 24 |
Apr 25 01:11:01 PM PDT 24 |
11851490345 ps |
| T684 |
/workspace/coverage/default/27.spi_device_read_buffer_direct.1319663060 |
|
|
Apr 25 01:11:04 PM PDT 24 |
Apr 25 01:11:09 PM PDT 24 |
564310157 ps |
| T308 |
/workspace/coverage/default/41.spi_device_mailbox.2413984413 |
|
|
Apr 25 01:12:02 PM PDT 24 |
Apr 25 01:12:25 PM PDT 24 |
4268212594 ps |
| T685 |
/workspace/coverage/default/3.spi_device_csb_read.1453321058 |
|
|
Apr 25 01:09:40 PM PDT 24 |
Apr 25 01:09:43 PM PDT 24 |
34085641 ps |
| T686 |
/workspace/coverage/default/19.spi_device_alert_test.1144072438 |
|
|
Apr 25 01:10:45 PM PDT 24 |
Apr 25 01:10:47 PM PDT 24 |
24187863 ps |
| T687 |
/workspace/coverage/default/0.spi_device_csb_read.1685443278 |
|
|
Apr 25 01:09:36 PM PDT 24 |
Apr 25 01:09:39 PM PDT 24 |
238582731 ps |
| T178 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.2531132845 |
|
|
Apr 25 01:10:23 PM PDT 24 |
Apr 25 01:10:30 PM PDT 24 |
805542236 ps |
| T216 |
/workspace/coverage/default/42.spi_device_pass_addr_payload_swap.3461978515 |
|
|
Apr 25 01:12:16 PM PDT 24 |
Apr 25 01:12:22 PM PDT 24 |
197198556 ps |
| T688 |
/workspace/coverage/default/42.spi_device_cfg_cmd.2216547291 |
|
|
Apr 25 01:12:17 PM PDT 24 |
Apr 25 01:12:25 PM PDT 24 |
246011676 ps |
| T689 |
/workspace/coverage/default/44.spi_device_tpm_all.2728647429 |
|
|
Apr 25 01:12:21 PM PDT 24 |
Apr 25 01:12:51 PM PDT 24 |
5044006173 ps |
| T254 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.1064281989 |
|
|
Apr 25 01:10:15 PM PDT 24 |
Apr 25 01:10:26 PM PDT 24 |
34022057670 ps |
| T690 |
/workspace/coverage/default/40.spi_device_mailbox.981048481 |
|
|
Apr 25 01:12:01 PM PDT 24 |
Apr 25 01:13:29 PM PDT 24 |
18469264948 ps |
| T691 |
/workspace/coverage/default/49.spi_device_intercept.2001221647 |
|
|
Apr 25 01:12:39 PM PDT 24 |
Apr 25 01:13:03 PM PDT 24 |
9579460917 ps |
| T280 |
/workspace/coverage/default/36.spi_device_flash_mode.2332450814 |
|
|
Apr 25 01:11:44 PM PDT 24 |
Apr 25 01:12:50 PM PDT 24 |
4874449732 ps |
| T296 |
/workspace/coverage/default/22.spi_device_flash_mode.1312387751 |
|
|
Apr 25 01:10:46 PM PDT 24 |
Apr 25 01:11:08 PM PDT 24 |
2041843388 ps |
| T294 |
/workspace/coverage/default/13.spi_device_flash_mode.2813892640 |
|
|
Apr 25 01:10:12 PM PDT 24 |
Apr 25 01:10:23 PM PDT 24 |
262429954 ps |
| T692 |
/workspace/coverage/default/17.spi_device_tpm_read_hw_reg.3780362350 |
|
|
Apr 25 01:10:22 PM PDT 24 |
Apr 25 01:10:31 PM PDT 24 |
3159646369 ps |
| T693 |
/workspace/coverage/default/3.spi_device_tpm_sts_read.3170886864 |
|
|
Apr 25 01:09:39 PM PDT 24 |
Apr 25 01:09:42 PM PDT 24 |
541514719 ps |
| T313 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.2324546987 |
|
|
Apr 25 01:10:30 PM PDT 24 |
Apr 25 01:10:43 PM PDT 24 |
2235197326 ps |
| T694 |
/workspace/coverage/default/46.spi_device_alert_test.1912422368 |
|
|
Apr 25 01:12:28 PM PDT 24 |
Apr 25 01:12:30 PM PDT 24 |
23466617 ps |
| T695 |
/workspace/coverage/default/27.spi_device_csb_read.3539143795 |
|
|
Apr 25 01:11:00 PM PDT 24 |
Apr 25 01:11:02 PM PDT 24 |
16597044 ps |
| T696 |
/workspace/coverage/default/19.spi_device_mailbox.1656333720 |
|
|
Apr 25 01:10:38 PM PDT 24 |
Apr 25 01:13:12 PM PDT 24 |
20682867927 ps |
| T697 |
/workspace/coverage/default/44.spi_device_alert_test.601535404 |
|
|
Apr 25 01:12:21 PM PDT 24 |
Apr 25 01:12:23 PM PDT 24 |
21552334 ps |
| T345 |
/workspace/coverage/default/12.spi_device_upload.860918375 |
|
|
Apr 25 01:10:11 PM PDT 24 |
Apr 25 01:10:18 PM PDT 24 |
1469269709 ps |
| T698 |
/workspace/coverage/default/13.spi_device_tpm_sts_read.93585479 |
|
|
Apr 25 01:10:15 PM PDT 24 |
Apr 25 01:10:17 PM PDT 24 |
101604653 ps |
| T228 |
/workspace/coverage/default/38.spi_device_intercept.2025238880 |
|
|
Apr 25 01:11:49 PM PDT 24 |
Apr 25 01:11:56 PM PDT 24 |
1047697145 ps |
| T208 |
/workspace/coverage/default/28.spi_device_pass_addr_payload_swap.3762464283 |
|
|
Apr 25 01:11:03 PM PDT 24 |
Apr 25 01:11:11 PM PDT 24 |
1433575116 ps |
| T699 |
/workspace/coverage/default/4.spi_device_csb_read.3759275910 |
|
|
Apr 25 01:09:46 PM PDT 24 |
Apr 25 01:09:49 PM PDT 24 |
23497355 ps |
| T700 |
/workspace/coverage/default/45.spi_device_flash_mode.3048699715 |
|
|
Apr 25 01:12:28 PM PDT 24 |
Apr 25 01:12:40 PM PDT 24 |
290345945 ps |
| T243 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.677080648 |
|
|
Apr 25 01:09:53 PM PDT 24 |
Apr 25 01:10:05 PM PDT 24 |
4064660506 ps |
| T48 |
/workspace/coverage/default/0.spi_device_sec_cm.354344754 |
|
|
Apr 25 01:09:30 PM PDT 24 |
Apr 25 01:09:32 PM PDT 24 |
85146713 ps |
| T333 |
/workspace/coverage/default/20.spi_device_pass_addr_payload_swap.1033040320 |
|
|
Apr 25 01:10:37 PM PDT 24 |
Apr 25 01:10:53 PM PDT 24 |
29747596167 ps |
| T701 |
/workspace/coverage/default/18.spi_device_read_buffer_direct.2558549189 |
|
|
Apr 25 01:10:31 PM PDT 24 |
Apr 25 01:10:46 PM PDT 24 |
6953184914 ps |
| T702 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.2317487244 |
|
|
Apr 25 01:11:20 PM PDT 24 |
Apr 25 01:11:21 PM PDT 24 |
91051147 ps |
| T321 |
/workspace/coverage/default/25.spi_device_pass_cmd_filtering.2161857658 |
|
|
Apr 25 01:10:56 PM PDT 24 |
Apr 25 01:11:09 PM PDT 24 |
5689752099 ps |
| T703 |
/workspace/coverage/default/13.spi_device_tpm_read_hw_reg.1163339666 |
|
|
Apr 25 01:10:12 PM PDT 24 |
Apr 25 01:10:28 PM PDT 24 |
19374119435 ps |
| T704 |
/workspace/coverage/default/23.spi_device_intercept.3065297791 |
|
|
Apr 25 01:10:51 PM PDT 24 |
Apr 25 01:11:11 PM PDT 24 |
1700732302 ps |
| T705 |
/workspace/coverage/default/25.spi_device_csb_read.176784435 |
|
|
Apr 25 01:10:59 PM PDT 24 |
Apr 25 01:11:01 PM PDT 24 |
26909690 ps |
| T706 |
/workspace/coverage/default/30.spi_device_csb_read.2557804037 |
|
|
Apr 25 01:11:16 PM PDT 24 |
Apr 25 01:11:18 PM PDT 24 |
31126203 ps |
| T707 |
/workspace/coverage/default/7.spi_device_pass_cmd_filtering.4018134340 |
|
|
Apr 25 01:09:55 PM PDT 24 |
Apr 25 01:10:10 PM PDT 24 |
14673051775 ps |
| T708 |
/workspace/coverage/default/41.spi_device_alert_test.255893628 |
|
|
Apr 25 01:12:15 PM PDT 24 |
Apr 25 01:12:17 PM PDT 24 |
14437300 ps |
| T709 |
/workspace/coverage/default/38.spi_device_tpm_all.1635554392 |
|
|
Apr 25 01:11:48 PM PDT 24 |
Apr 25 01:12:05 PM PDT 24 |
5204482311 ps |
| T710 |
/workspace/coverage/default/24.spi_device_flash_mode.3720574594 |
|
|
Apr 25 01:10:58 PM PDT 24 |
Apr 25 01:11:45 PM PDT 24 |
3073288363 ps |
| T711 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.1966350556 |
|
|
Apr 25 01:10:09 PM PDT 24 |
Apr 25 01:10:19 PM PDT 24 |
5637723963 ps |
| T712 |
/workspace/coverage/default/9.spi_device_csb_read.3162508912 |
|
|
Apr 25 01:09:59 PM PDT 24 |
Apr 25 01:10:02 PM PDT 24 |
28254735 ps |
| T334 |
/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.1182006380 |
|
|
Apr 25 01:11:37 PM PDT 24 |
Apr 25 01:11:43 PM PDT 24 |
886912161 ps |
| T713 |
/workspace/coverage/default/22.spi_device_mailbox.419297921 |
|
|
Apr 25 01:10:43 PM PDT 24 |
Apr 25 01:11:08 PM PDT 24 |
13078540848 ps |
| T35 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.211266657 |
|
|
Apr 25 12:39:31 PM PDT 24 |
Apr 25 12:39:56 PM PDT 24 |
1962083101 ps |
| T125 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.1625960380 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:41 PM PDT 24 |
1599009751 ps |
| T97 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.271952865 |
|
|
Apr 25 12:39:11 PM PDT 24 |
Apr 25 12:39:18 PM PDT 24 |
31327030 ps |
| T36 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.933193770 |
|
|
Apr 25 12:39:16 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
2203326179 ps |
| T37 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.4191111444 |
|
|
Apr 25 12:39:29 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
653164801 ps |
| T38 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3769029069 |
|
|
Apr 25 12:39:35 PM PDT 24 |
Apr 25 12:39:39 PM PDT 24 |
50650229 ps |
| T144 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.2715426588 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:37 PM PDT 24 |
511877711 ps |
| T132 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.3608025525 |
|
|
Apr 25 12:39:25 PM PDT 24 |
Apr 25 12:39:53 PM PDT 24 |
1224988972 ps |
| T714 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.1994713959 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:18 PM PDT 24 |
45414449 ps |
| T108 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3363853133 |
|
|
Apr 25 12:39:23 PM PDT 24 |
Apr 25 12:39:30 PM PDT 24 |
569137796 ps |
| T155 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.2659491372 |
|
|
Apr 25 12:39:11 PM PDT 24 |
Apr 25 12:39:33 PM PDT 24 |
3950151992 ps |
| T109 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.1394189757 |
|
|
Apr 25 12:39:27 PM PDT 24 |
Apr 25 12:39:31 PM PDT 24 |
321335152 ps |
| T145 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.2609697254 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:38 PM PDT 24 |
398672599 ps |
| T114 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.1394381953 |
|
|
Apr 25 12:39:15 PM PDT 24 |
Apr 25 12:39:33 PM PDT 24 |
3668075859 ps |
| T146 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1476589292 |
|
|
Apr 25 12:39:14 PM PDT 24 |
Apr 25 12:39:24 PM PDT 24 |
186002292 ps |
| T127 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.334932860 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
312907258 ps |
| T147 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.559639211 |
|
|
Apr 25 12:39:28 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
331875878 ps |
| T715 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.3738309786 |
|
|
Apr 25 12:39:44 PM PDT 24 |
Apr 25 12:39:45 PM PDT 24 |
12636005 ps |
| T716 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.547132222 |
|
|
Apr 25 12:39:33 PM PDT 24 |
Apr 25 12:39:37 PM PDT 24 |
12144633 ps |
| T124 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2003689645 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:37 PM PDT 24 |
125374074 ps |
| T717 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.2265508522 |
|
|
Apr 25 12:39:48 PM PDT 24 |
Apr 25 12:39:51 PM PDT 24 |
39328774 ps |
| T115 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.358115559 |
|
|
Apr 25 12:39:29 PM PDT 24 |
Apr 25 12:39:38 PM PDT 24 |
70114017 ps |
| T161 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.2994607717 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:18 PM PDT 24 |
15151098 ps |
| T120 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.2110992364 |
|
|
Apr 25 12:39:11 PM PDT 24 |
Apr 25 12:39:19 PM PDT 24 |
118215990 ps |
| T133 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2576487565 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:44 PM PDT 24 |
1866670249 ps |
| T148 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.2759530931 |
|
|
Apr 25 12:39:27 PM PDT 24 |
Apr 25 12:39:32 PM PDT 24 |
81457746 ps |
| T718 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.3556796965 |
|
|
Apr 25 12:39:48 PM PDT 24 |
Apr 25 12:39:51 PM PDT 24 |
20768108 ps |
| T719 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3830686013 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:18 PM PDT 24 |
36051879 ps |
| T141 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.711239315 |
|
|
Apr 25 12:39:37 PM PDT 24 |
Apr 25 12:39:41 PM PDT 24 |
386032260 ps |
| T126 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.1324870311 |
|
|
Apr 25 12:39:25 PM PDT 24 |
Apr 25 12:39:30 PM PDT 24 |
141647172 ps |
| T720 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.4008107109 |
|
|
Apr 25 12:39:28 PM PDT 24 |
Apr 25 12:39:32 PM PDT 24 |
45139519 ps |
| T129 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.988909717 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
86344035 ps |
| T118 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.1373171512 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:21 PM PDT 24 |
77144541 ps |
| T721 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.2587891501 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:19 PM PDT 24 |
52204169 ps |
| T134 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.221687063 |
|
|
Apr 25 12:39:18 PM PDT 24 |
Apr 25 12:39:38 PM PDT 24 |
2444965027 ps |
| T722 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.3637326390 |
|
|
Apr 25 12:39:29 PM PDT 24 |
Apr 25 12:39:41 PM PDT 24 |
1215054742 ps |
| T723 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.1183626493 |
|
|
Apr 25 12:39:40 PM PDT 24 |
Apr 25 12:39:43 PM PDT 24 |
25925105 ps |
| T724 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.3009780019 |
|
|
Apr 25 12:39:17 PM PDT 24 |
Apr 25 12:39:24 PM PDT 24 |
29420933 ps |
| T358 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3640996910 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:55 PM PDT 24 |
818814514 ps |
| T135 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.58220383 |
|
|
Apr 25 12:39:17 PM PDT 24 |
Apr 25 12:39:31 PM PDT 24 |
762001005 ps |
| T725 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3383753596 |
|
|
Apr 25 12:39:22 PM PDT 24 |
Apr 25 12:39:27 PM PDT 24 |
83483246 ps |
| T726 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.252449234 |
|
|
Apr 25 12:39:28 PM PDT 24 |
Apr 25 12:39:35 PM PDT 24 |
56592274 ps |
| T727 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.49629538 |
|
|
Apr 25 12:39:33 PM PDT 24 |
Apr 25 12:39:37 PM PDT 24 |
69435881 ps |
| T728 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.149299843 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:18 PM PDT 24 |
80425382 ps |
| T729 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.698732648 |
|
|
Apr 25 12:39:31 PM PDT 24 |
Apr 25 12:39:35 PM PDT 24 |
18469916 ps |
| T730 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2883768043 |
|
|
Apr 25 12:39:24 PM PDT 24 |
Apr 25 12:39:31 PM PDT 24 |
137509308 ps |
| T731 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3100356112 |
|
|
Apr 25 12:39:17 PM PDT 24 |
Apr 25 12:39:26 PM PDT 24 |
40243096 ps |
| T128 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.3987791070 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:39 PM PDT 24 |
2155050382 ps |
| T732 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.1986788477 |
|
|
Apr 25 12:39:42 PM PDT 24 |
Apr 25 12:39:44 PM PDT 24 |
11260136 ps |
| T149 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3484130579 |
|
|
Apr 25 12:39:20 PM PDT 24 |
Apr 25 12:39:27 PM PDT 24 |
168270151 ps |
| T150 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.708239496 |
|
|
Apr 25 12:39:35 PM PDT 24 |
Apr 25 12:39:39 PM PDT 24 |
27501998 ps |
| T156 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3389603290 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:43 PM PDT 24 |
2250521481 ps |
| T733 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.2856459323 |
|
|
Apr 25 12:39:37 PM PDT 24 |
Apr 25 12:39:39 PM PDT 24 |
31199742 ps |
| T136 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.803906648 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:21 PM PDT 24 |
91603867 ps |
| T734 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.3920525955 |
|
|
Apr 25 12:39:10 PM PDT 24 |
Apr 25 12:39:16 PM PDT 24 |
393170306 ps |
| T735 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.1436111146 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:19 PM PDT 24 |
23976980 ps |
| T736 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.2376442579 |
|
|
Apr 25 12:39:29 PM PDT 24 |
Apr 25 12:39:33 PM PDT 24 |
14097032 ps |
| T737 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3005760109 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:21 PM PDT 24 |
54267895 ps |
| T738 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.1654247949 |
|
|
Apr 25 12:39:29 PM PDT 24 |
Apr 25 12:39:34 PM PDT 24 |
10733731 ps |
| T739 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.4118745902 |
|
|
Apr 25 12:39:11 PM PDT 24 |
Apr 25 12:39:20 PM PDT 24 |
209318311 ps |
| T157 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.3308766905 |
|
|
Apr 25 12:39:28 PM PDT 24 |
Apr 25 12:39:35 PM PDT 24 |
138095777 ps |
| T137 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.681309990 |
|
|
Apr 25 12:39:15 PM PDT 24 |
Apr 25 12:39:56 PM PDT 24 |
1935659466 ps |
| T740 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3425146400 |
|
|
Apr 25 12:39:25 PM PDT 24 |
Apr 25 12:39:32 PM PDT 24 |
211108391 ps |
| T117 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.332559615 |
|
|
Apr 25 12:39:44 PM PDT 24 |
Apr 25 12:39:46 PM PDT 24 |
35684246 ps |
| T741 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.715065081 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:37 PM PDT 24 |
85724246 ps |
| T359 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.3371482601 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:47 PM PDT 24 |
408527165 ps |
| T742 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1313211120 |
|
|
Apr 25 12:39:45 PM PDT 24 |
Apr 25 12:39:47 PM PDT 24 |
16947575 ps |
| T743 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.1467549550 |
|
|
Apr 25 12:39:35 PM PDT 24 |
Apr 25 12:39:38 PM PDT 24 |
20175966 ps |
| T744 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.2491806983 |
|
|
Apr 25 12:39:29 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
113242392 ps |
| T138 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3536764948 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:20 PM PDT 24 |
145588157 ps |
| T139 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.3107495721 |
|
|
Apr 25 12:39:31 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
44559273 ps |
| T745 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2249341479 |
|
|
Apr 25 12:39:20 PM PDT 24 |
Apr 25 12:39:27 PM PDT 24 |
28624040 ps |
| T746 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1619351537 |
|
|
Apr 25 12:39:10 PM PDT 24 |
Apr 25 12:39:16 PM PDT 24 |
158504698 ps |
| T747 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.860537190 |
|
|
Apr 25 12:39:27 PM PDT 24 |
Apr 25 12:39:33 PM PDT 24 |
170951304 ps |
| T748 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.737980049 |
|
|
Apr 25 12:39:31 PM PDT 24 |
Apr 25 12:39:35 PM PDT 24 |
52091615 ps |
| T749 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.518206263 |
|
|
Apr 25 12:39:33 PM PDT 24 |
Apr 25 12:39:37 PM PDT 24 |
111302715 ps |
| T140 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.599433616 |
|
|
Apr 25 12:39:22 PM PDT 24 |
Apr 25 12:39:29 PM PDT 24 |
451268985 ps |
| T119 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.3191687438 |
|
|
Apr 25 12:39:06 PM PDT 24 |
Apr 25 12:39:12 PM PDT 24 |
663608436 ps |
| T750 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.404822092 |
|
|
Apr 25 12:39:38 PM PDT 24 |
Apr 25 12:39:40 PM PDT 24 |
100226768 ps |
| T751 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.2117710748 |
|
|
Apr 25 12:39:38 PM PDT 24 |
Apr 25 12:39:40 PM PDT 24 |
46548498 ps |
| T752 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2451334887 |
|
|
Apr 25 12:39:10 PM PDT 24 |
Apr 25 12:39:14 PM PDT 24 |
46415508 ps |
| T753 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.1006810833 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:20 PM PDT 24 |
382906131 ps |
| T754 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.3256650239 |
|
|
Apr 25 12:39:20 PM PDT 24 |
Apr 25 12:39:26 PM PDT 24 |
13446003 ps |
| T142 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.1874254736 |
|
|
Apr 25 12:39:48 PM PDT 24 |
Apr 25 12:39:52 PM PDT 24 |
74151855 ps |
| T121 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3557467912 |
|
|
Apr 25 12:39:28 PM PDT 24 |
Apr 25 12:39:36 PM PDT 24 |
700409483 ps |
| T143 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.1592379714 |
|
|
Apr 25 12:39:27 PM PDT 24 |
Apr 25 12:39:50 PM PDT 24 |
1501591157 ps |
| T755 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.3285255207 |
|
|
Apr 25 12:39:12 PM PDT 24 |
Apr 25 12:39:19 PM PDT 24 |
55178916 ps |
| T756 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.691150410 |
|
|
Apr 25 12:39:30 PM PDT 24 |
Apr 25 12:39:34 PM PDT 24 |
18139776 ps |
| T757 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.1585500153 |
|
|
Apr 25 12:39:13 PM PDT 24 |
Apr 25 12:39:21 PM PDT 24 |
334302444 ps |
| T360 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3154893443 |
|
|
Apr 25 12:39:26 PM PDT 24 |
Apr 25 12:39:49 PM PDT 24 |
925939603 ps |
| T758 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.3570016733 |
|
|
Apr 25 12:39:51 PM PDT 24 |
Apr 25 12:39:54 PM PDT 24 |
16611383 ps |
| T759 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.1852193886 |
|
|
Apr 25 12:39:36 PM PDT 24 |
Apr 25 12:39:38 PM PDT 24 |
25072248 ps |
| T122 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3054435575 |
|
|
Apr 25 12:39:25 PM PDT 24 |
Apr 25 12:39:31 PM PDT 24 |
47222733 ps |
| T760 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.4024845977 |
|
|
Apr 25 12:39:09 PM PDT 24 |
Apr 25 12:39:15 PM PDT 24 |
516478648 ps |