| T621 |
/workspace/coverage/default/15.spi_device_alert_test.2254848098 |
|
|
Apr 28 01:13:30 PM PDT 24 |
Apr 28 01:13:33 PM PDT 24 |
21853278 ps |
| T326 |
/workspace/coverage/default/2.spi_device_upload.1655255239 |
|
|
Apr 28 01:12:31 PM PDT 24 |
Apr 28 01:12:35 PM PDT 24 |
103806814 ps |
| T622 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3478885765 |
|
|
Apr 28 01:12:57 PM PDT 24 |
Apr 28 01:13:08 PM PDT 24 |
4077908483 ps |
| T623 |
/workspace/coverage/default/35.spi_device_tpm_rw.1501812144 |
|
|
Apr 28 01:15:28 PM PDT 24 |
Apr 28 01:16:06 PM PDT 24 |
71744696 ps |
| T624 |
/workspace/coverage/default/17.spi_device_upload.2992081836 |
|
|
Apr 28 01:13:40 PM PDT 24 |
Apr 28 01:13:51 PM PDT 24 |
1248045819 ps |
| T331 |
/workspace/coverage/default/5.spi_device_mailbox.2563620490 |
|
|
Apr 28 01:12:47 PM PDT 24 |
Apr 28 01:13:18 PM PDT 24 |
2449128656 ps |
| T316 |
/workspace/coverage/default/19.spi_device_flash_mode.3356336733 |
|
|
Apr 28 01:13:46 PM PDT 24 |
Apr 28 01:14:04 PM PDT 24 |
2020702030 ps |
| T625 |
/workspace/coverage/default/17.spi_device_alert_test.4108724997 |
|
|
Apr 28 01:13:41 PM PDT 24 |
Apr 28 01:13:50 PM PDT 24 |
11379459 ps |
| T258 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.2771200727 |
|
|
Apr 28 01:13:37 PM PDT 24 |
Apr 28 01:13:53 PM PDT 24 |
3364455779 ps |
| T626 |
/workspace/coverage/default/24.spi_device_tpm_all.1324305063 |
|
|
Apr 28 01:14:10 PM PDT 24 |
Apr 28 01:14:25 PM PDT 24 |
270282000 ps |
| T627 |
/workspace/coverage/default/24.spi_device_csb_read.1112662587 |
|
|
Apr 28 01:14:08 PM PDT 24 |
Apr 28 01:14:17 PM PDT 24 |
129226976 ps |
| T296 |
/workspace/coverage/default/6.spi_device_mailbox.4056789399 |
|
|
Apr 28 01:12:54 PM PDT 24 |
Apr 28 01:13:01 PM PDT 24 |
229844247 ps |
| T166 |
/workspace/coverage/default/2.spi_device_stress_all.1390889104 |
|
|
Apr 28 01:12:36 PM PDT 24 |
Apr 28 01:12:38 PM PDT 24 |
72856586 ps |
| T628 |
/workspace/coverage/default/35.spi_device_tpm_all.2215083875 |
|
|
Apr 28 01:15:27 PM PDT 24 |
Apr 28 01:16:14 PM PDT 24 |
6573514465 ps |
| T629 |
/workspace/coverage/default/6.spi_device_tpm_sts_read.1013252316 |
|
|
Apr 28 01:12:50 PM PDT 24 |
Apr 28 01:12:52 PM PDT 24 |
118591510 ps |
| T630 |
/workspace/coverage/default/25.spi_device_tpm_all.1032159397 |
|
|
Apr 28 01:14:20 PM PDT 24 |
Apr 28 01:14:56 PM PDT 24 |
12259205214 ps |
| T631 |
/workspace/coverage/default/21.spi_device_alert_test.36892516 |
|
|
Apr 28 01:13:59 PM PDT 24 |
Apr 28 01:14:04 PM PDT 24 |
12777634 ps |
| T320 |
/workspace/coverage/default/47.spi_device_flash_mode.3132546470 |
|
|
Apr 28 01:17:31 PM PDT 24 |
Apr 28 01:18:56 PM PDT 24 |
5474990852 ps |
| T632 |
/workspace/coverage/default/37.spi_device_read_buffer_direct.1540047024 |
|
|
Apr 28 01:15:54 PM PDT 24 |
Apr 28 01:16:36 PM PDT 24 |
277711012 ps |
| T633 |
/workspace/coverage/default/5.spi_device_alert_test.2693570652 |
|
|
Apr 28 01:12:50 PM PDT 24 |
Apr 28 01:12:52 PM PDT 24 |
12300835 ps |
| T634 |
/workspace/coverage/default/18.spi_device_tpm_all.1782563398 |
|
|
Apr 28 01:13:41 PM PDT 24 |
Apr 28 01:14:21 PM PDT 24 |
9136612565 ps |
| T635 |
/workspace/coverage/default/25.spi_device_csb_read.3880582727 |
|
|
Apr 28 01:14:15 PM PDT 24 |
Apr 28 01:14:31 PM PDT 24 |
52253915 ps |
| T636 |
/workspace/coverage/default/5.spi_device_csb_read.2513362698 |
|
|
Apr 28 01:12:46 PM PDT 24 |
Apr 28 01:12:48 PM PDT 24 |
18005667 ps |
| T392 |
/workspace/coverage/default/39.spi_device_tpm_all.118748661 |
|
|
Apr 28 01:16:03 PM PDT 24 |
Apr 28 01:17:27 PM PDT 24 |
5547239847 ps |
| T300 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.4065914984 |
|
|
Apr 28 01:14:15 PM PDT 24 |
Apr 28 01:14:35 PM PDT 24 |
459787116 ps |
| T637 |
/workspace/coverage/default/24.spi_device_alert_test.3423246985 |
|
|
Apr 28 01:14:17 PM PDT 24 |
Apr 28 01:14:38 PM PDT 24 |
17936250 ps |
| T638 |
/workspace/coverage/default/30.spi_device_tpm_rw.3696977205 |
|
|
Apr 28 01:14:40 PM PDT 24 |
Apr 28 01:15:17 PM PDT 24 |
61361714 ps |
| T639 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.2578227306 |
|
|
Apr 28 01:12:55 PM PDT 24 |
Apr 28 01:13:05 PM PDT 24 |
1311067781 ps |
| T325 |
/workspace/coverage/default/27.spi_device_intercept.1608253904 |
|
|
Apr 28 01:14:35 PM PDT 24 |
Apr 28 01:15:16 PM PDT 24 |
1083738132 ps |
| T250 |
/workspace/coverage/default/21.spi_device_pass_cmd_filtering.2155822748 |
|
|
Apr 28 01:13:51 PM PDT 24 |
Apr 28 01:14:03 PM PDT 24 |
18353266813 ps |
| T640 |
/workspace/coverage/default/28.spi_device_pass_cmd_filtering.1966966180 |
|
|
Apr 28 01:14:29 PM PDT 24 |
Apr 28 01:15:13 PM PDT 24 |
78003323696 ps |
| T641 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.1104454033 |
|
|
Apr 28 01:14:35 PM PDT 24 |
Apr 28 01:15:09 PM PDT 24 |
44343878 ps |
| T642 |
/workspace/coverage/default/45.spi_device_csb_read.1786125397 |
|
|
Apr 28 01:17:04 PM PDT 24 |
Apr 28 01:17:51 PM PDT 24 |
16299228 ps |
| T643 |
/workspace/coverage/default/43.spi_device_upload.2868856170 |
|
|
Apr 28 01:16:54 PM PDT 24 |
Apr 28 01:17:45 PM PDT 24 |
1146479842 ps |
| T644 |
/workspace/coverage/default/11.spi_device_csb_read.2245016017 |
|
|
Apr 28 01:13:05 PM PDT 24 |
Apr 28 01:13:07 PM PDT 24 |
27806884 ps |
| T283 |
/workspace/coverage/default/11.spi_device_mailbox.2903760175 |
|
|
Apr 28 01:13:07 PM PDT 24 |
Apr 28 01:13:36 PM PDT 24 |
5380143657 ps |
| T645 |
/workspace/coverage/default/21.spi_device_tpm_all.3612548432 |
|
|
Apr 28 01:13:55 PM PDT 24 |
Apr 28 01:14:16 PM PDT 24 |
3372369949 ps |
| T332 |
/workspace/coverage/default/48.spi_device_upload.622131427 |
|
|
Apr 28 01:17:51 PM PDT 24 |
Apr 28 01:19:06 PM PDT 24 |
40030446882 ps |
| T240 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.1336851136 |
|
|
Apr 28 01:13:21 PM PDT 24 |
Apr 28 01:13:28 PM PDT 24 |
1679146730 ps |
| T646 |
/workspace/coverage/default/1.spi_device_tpm_rw.2772976694 |
|
|
Apr 28 01:12:27 PM PDT 24 |
Apr 28 01:12:30 PM PDT 24 |
56425667 ps |
| T241 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.1666077104 |
|
|
Apr 28 01:15:55 PM PDT 24 |
Apr 28 01:16:45 PM PDT 24 |
3349689096 ps |
| T647 |
/workspace/coverage/default/7.spi_device_tpm_rw.1697393738 |
|
|
Apr 28 01:12:56 PM PDT 24 |
Apr 28 01:12:59 PM PDT 24 |
348759342 ps |
| T648 |
/workspace/coverage/default/36.spi_device_tpm_rw.1858247958 |
|
|
Apr 28 01:15:36 PM PDT 24 |
Apr 28 01:16:13 PM PDT 24 |
144913257 ps |
| T322 |
/workspace/coverage/default/41.spi_device_flash_mode.25507850 |
|
|
Apr 28 01:16:33 PM PDT 24 |
Apr 28 01:17:44 PM PDT 24 |
4144243814 ps |
| T209 |
/workspace/coverage/default/41.spi_device_pass_cmd_filtering.35030886 |
|
|
Apr 28 01:16:30 PM PDT 24 |
Apr 28 01:17:25 PM PDT 24 |
7061078900 ps |
| T649 |
/workspace/coverage/default/31.spi_device_csb_read.1038068035 |
|
|
Apr 28 01:14:45 PM PDT 24 |
Apr 28 01:15:21 PM PDT 24 |
14050572 ps |
| T220 |
/workspace/coverage/default/26.spi_device_pass_addr_payload_swap.3613655027 |
|
|
Apr 28 01:14:27 PM PDT 24 |
Apr 28 01:15:05 PM PDT 24 |
3722861478 ps |
| T363 |
/workspace/coverage/default/36.spi_device_intercept.1445817675 |
|
|
Apr 28 01:15:44 PM PDT 24 |
Apr 28 01:16:21 PM PDT 24 |
145605990 ps |
| T650 |
/workspace/coverage/default/14.spi_device_flash_mode.2330493724 |
|
|
Apr 28 01:13:29 PM PDT 24 |
Apr 28 01:13:48 PM PDT 24 |
1073988483 ps |
| T651 |
/workspace/coverage/default/27.spi_device_alert_test.1146720304 |
|
|
Apr 28 01:14:30 PM PDT 24 |
Apr 28 01:15:01 PM PDT 24 |
40702601 ps |
| T652 |
/workspace/coverage/default/41.spi_device_read_buffer_direct.3028397681 |
|
|
Apr 28 01:16:31 PM PDT 24 |
Apr 28 01:17:25 PM PDT 24 |
3502274121 ps |
| T317 |
/workspace/coverage/default/45.spi_device_flash_mode.3797211713 |
|
|
Apr 28 01:17:10 PM PDT 24 |
Apr 28 01:18:29 PM PDT 24 |
2124958877 ps |
| T109 |
/workspace/coverage/default/44.spi_device_flash_mode.2573728636 |
|
|
Apr 28 01:17:02 PM PDT 24 |
Apr 28 01:19:26 PM PDT 24 |
60793964430 ps |
| T653 |
/workspace/coverage/default/36.spi_device_alert_test.2680399148 |
|
|
Apr 28 01:15:53 PM PDT 24 |
Apr 28 01:16:31 PM PDT 24 |
16961619 ps |
| T654 |
/workspace/coverage/default/3.spi_device_tpm_rw.3632854163 |
|
|
Apr 28 01:12:39 PM PDT 24 |
Apr 28 01:12:40 PM PDT 24 |
32073616 ps |
| T284 |
/workspace/coverage/default/21.spi_device_mailbox.3990705758 |
|
|
Apr 28 01:13:55 PM PDT 24 |
Apr 28 01:14:01 PM PDT 24 |
67175314 ps |
| T655 |
/workspace/coverage/default/32.spi_device_flash_mode.2406437557 |
|
|
Apr 28 01:14:59 PM PDT 24 |
Apr 28 01:17:23 PM PDT 24 |
29717107234 ps |
| T656 |
/workspace/coverage/default/2.spi_device_tpm_rw.2618130477 |
|
|
Apr 28 01:12:32 PM PDT 24 |
Apr 28 01:12:36 PM PDT 24 |
941854765 ps |
| T657 |
/workspace/coverage/default/15.spi_device_tpm_all.1124503862 |
|
|
Apr 28 01:13:25 PM PDT 24 |
Apr 28 01:14:30 PM PDT 24 |
25869233992 ps |
| T658 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.2638089773 |
|
|
Apr 28 01:12:29 PM PDT 24 |
Apr 28 01:12:34 PM PDT 24 |
417899851 ps |
| T294 |
/workspace/coverage/default/45.spi_device_upload.868197624 |
|
|
Apr 28 01:17:09 PM PDT 24 |
Apr 28 01:17:56 PM PDT 24 |
825174282 ps |
| T659 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.3996834261 |
|
|
Apr 28 01:17:49 PM PDT 24 |
Apr 28 01:18:36 PM PDT 24 |
578532023 ps |
| T217 |
/workspace/coverage/default/40.spi_device_pass_cmd_filtering.1046979908 |
|
|
Apr 28 01:16:14 PM PDT 24 |
Apr 28 01:17:00 PM PDT 24 |
1299259249 ps |
| T660 |
/workspace/coverage/default/18.spi_device_alert_test.4150048594 |
|
|
Apr 28 01:13:40 PM PDT 24 |
Apr 28 01:13:48 PM PDT 24 |
14617440 ps |
| T236 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.1958767393 |
|
|
Apr 28 01:13:43 PM PDT 24 |
Apr 28 01:14:08 PM PDT 24 |
38840674207 ps |
| T661 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.3083271422 |
|
|
Apr 28 01:15:50 PM PDT 24 |
Apr 28 01:16:30 PM PDT 24 |
664176122 ps |
| T662 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.545642960 |
|
|
Apr 28 01:16:00 PM PDT 24 |
Apr 28 01:16:52 PM PDT 24 |
4289017210 ps |
| T663 |
/workspace/coverage/default/47.spi_device_read_buffer_direct.449327441 |
|
|
Apr 28 01:17:32 PM PDT 24 |
Apr 28 01:18:23 PM PDT 24 |
1022962893 ps |
| T664 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.2115906635 |
|
|
Apr 28 01:15:48 PM PDT 24 |
Apr 28 01:16:26 PM PDT 24 |
220111804 ps |
| T251 |
/workspace/coverage/default/7.spi_device_intercept.269838118 |
|
|
Apr 28 01:12:59 PM PDT 24 |
Apr 28 01:13:08 PM PDT 24 |
252376646 ps |
| T665 |
/workspace/coverage/default/32.spi_device_csb_read.389088297 |
|
|
Apr 28 01:14:56 PM PDT 24 |
Apr 28 01:15:33 PM PDT 24 |
49920347 ps |
| T348 |
/workspace/coverage/default/1.spi_device_upload.1575722091 |
|
|
Apr 28 01:12:27 PM PDT 24 |
Apr 28 01:12:41 PM PDT 24 |
3892112359 ps |
| T267 |
/workspace/coverage/default/9.spi_device_upload.2437627312 |
|
|
Apr 28 01:13:02 PM PDT 24 |
Apr 28 01:13:06 PM PDT 24 |
571558691 ps |
| T666 |
/workspace/coverage/default/16.spi_device_alert_test.1962389436 |
|
|
Apr 28 01:13:36 PM PDT 24 |
Apr 28 01:13:40 PM PDT 24 |
106053329 ps |
| T667 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.2024614182 |
|
|
Apr 28 01:12:57 PM PDT 24 |
Apr 28 01:13:03 PM PDT 24 |
1002388009 ps |
| T668 |
/workspace/coverage/default/34.spi_device_tpm_rw.4059550798 |
|
|
Apr 28 01:15:18 PM PDT 24 |
Apr 28 01:15:57 PM PDT 24 |
214668806 ps |
| T669 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.477317225 |
|
|
Apr 28 01:13:52 PM PDT 24 |
Apr 28 01:13:58 PM PDT 24 |
182535341 ps |
| T670 |
/workspace/coverage/default/5.spi_device_read_buffer_direct.4194899197 |
|
|
Apr 28 01:12:44 PM PDT 24 |
Apr 28 01:12:50 PM PDT 24 |
1081457317 ps |
| T349 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.3428651043 |
|
|
Apr 28 01:16:59 PM PDT 24 |
Apr 28 01:18:06 PM PDT 24 |
21359391686 ps |
| T671 |
/workspace/coverage/default/10.spi_device_stress_all.1038881376 |
|
|
Apr 28 01:13:06 PM PDT 24 |
Apr 28 01:13:08 PM PDT 24 |
108563970 ps |
| T352 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.3567346720 |
|
|
Apr 28 01:12:57 PM PDT 24 |
Apr 28 01:13:04 PM PDT 24 |
231196956 ps |
| T672 |
/workspace/coverage/default/48.spi_device_intercept.3344198976 |
|
|
Apr 28 01:17:48 PM PDT 24 |
Apr 28 01:18:44 PM PDT 24 |
2886512904 ps |
| T673 |
/workspace/coverage/default/34.spi_device_read_buffer_direct.2784217219 |
|
|
Apr 28 01:15:20 PM PDT 24 |
Apr 28 01:16:01 PM PDT 24 |
368092899 ps |
| T310 |
/workspace/coverage/default/10.spi_device_flash_mode.1309213946 |
|
|
Apr 28 01:13:07 PM PDT 24 |
Apr 28 01:14:19 PM PDT 24 |
23693883799 ps |
| T278 |
/workspace/coverage/default/5.spi_device_intercept.2096751180 |
|
|
Apr 28 01:12:48 PM PDT 24 |
Apr 28 01:12:55 PM PDT 24 |
1481862055 ps |
| T674 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.1924830060 |
|
|
Apr 28 01:12:55 PM PDT 24 |
Apr 28 01:13:05 PM PDT 24 |
1436169887 ps |
| T336 |
/workspace/coverage/default/0.spi_device_upload.3338324957 |
|
|
Apr 28 01:12:21 PM PDT 24 |
Apr 28 01:12:24 PM PDT 24 |
846112443 ps |
| T675 |
/workspace/coverage/default/2.spi_device_tpm_all.1565617553 |
|
|
Apr 28 01:12:32 PM PDT 24 |
Apr 28 01:13:26 PM PDT 24 |
40324414121 ps |
| T676 |
/workspace/coverage/default/27.spi_device_tpm_sts_read.1762595807 |
|
|
Apr 28 01:14:24 PM PDT 24 |
Apr 28 01:14:51 PM PDT 24 |
67077040 ps |
| T677 |
/workspace/coverage/default/40.spi_device_intercept.3175142146 |
|
|
Apr 28 01:16:20 PM PDT 24 |
Apr 28 01:17:08 PM PDT 24 |
164124450 ps |
| T342 |
/workspace/coverage/default/34.spi_device_mailbox.1506578220 |
|
|
Apr 28 01:15:19 PM PDT 24 |
Apr 28 01:16:19 PM PDT 24 |
35503189288 ps |
| T364 |
/workspace/coverage/default/7.spi_device_pass_cmd_filtering.3957955784 |
|
|
Apr 28 01:13:00 PM PDT 24 |
Apr 28 01:13:06 PM PDT 24 |
603117305 ps |
| T678 |
/workspace/coverage/default/30.spi_device_tpm_read_hw_reg.1282171633 |
|
|
Apr 28 01:14:40 PM PDT 24 |
Apr 28 01:15:21 PM PDT 24 |
790449637 ps |
| T358 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.1889443206 |
|
|
Apr 28 01:13:26 PM PDT 24 |
Apr 28 01:13:35 PM PDT 24 |
521603419 ps |
| T226 |
/workspace/coverage/default/12.spi_device_cfg_cmd.3552160582 |
|
|
Apr 28 01:13:11 PM PDT 24 |
Apr 28 01:13:16 PM PDT 24 |
239034078 ps |
| T679 |
/workspace/coverage/default/2.spi_device_read_buffer_direct.2525149019 |
|
|
Apr 28 01:12:38 PM PDT 24 |
Apr 28 01:12:49 PM PDT 24 |
3861130142 ps |
| T680 |
/workspace/coverage/default/39.spi_device_read_buffer_direct.897695021 |
|
|
Apr 28 01:16:08 PM PDT 24 |
Apr 28 01:17:05 PM PDT 24 |
6332721133 ps |
| T681 |
/workspace/coverage/default/3.spi_device_tpm_all.1501564573 |
|
|
Apr 28 01:12:37 PM PDT 24 |
Apr 28 01:13:05 PM PDT 24 |
35634440834 ps |
| T682 |
/workspace/coverage/default/35.spi_device_alert_test.4281814420 |
|
|
Apr 28 01:15:36 PM PDT 24 |
Apr 28 01:16:11 PM PDT 24 |
13760225 ps |
| T683 |
/workspace/coverage/default/26.spi_device_csb_read.1645874233 |
|
|
Apr 28 01:14:21 PM PDT 24 |
Apr 28 01:14:46 PM PDT 24 |
22039646 ps |
| T684 |
/workspace/coverage/default/46.spi_device_csb_read.3228775840 |
|
|
Apr 28 01:17:14 PM PDT 24 |
Apr 28 01:17:57 PM PDT 24 |
14030877 ps |
| T685 |
/workspace/coverage/default/8.spi_device_tpm_rw.3578167891 |
|
|
Apr 28 01:12:56 PM PDT 24 |
Apr 28 01:13:00 PM PDT 24 |
72124093 ps |
| T686 |
/workspace/coverage/default/31.spi_device_stress_all.1391356638 |
|
|
Apr 28 01:14:55 PM PDT 24 |
Apr 28 01:15:32 PM PDT 24 |
34398881 ps |
| T687 |
/workspace/coverage/default/16.spi_device_tpm_read_hw_reg.1456310394 |
|
|
Apr 28 01:13:31 PM PDT 24 |
Apr 28 01:13:39 PM PDT 24 |
2060357736 ps |
| T688 |
/workspace/coverage/default/33.spi_device_upload.2245457084 |
|
|
Apr 28 01:15:10 PM PDT 24 |
Apr 28 01:15:53 PM PDT 24 |
1268623537 ps |
| T689 |
/workspace/coverage/default/18.spi_device_read_buffer_direct.479452955 |
|
|
Apr 28 01:13:41 PM PDT 24 |
Apr 28 01:13:53 PM PDT 24 |
507338781 ps |
| T690 |
/workspace/coverage/default/1.spi_device_tpm_sts_read.1963282889 |
|
|
Apr 28 01:12:28 PM PDT 24 |
Apr 28 01:12:30 PM PDT 24 |
46789663 ps |
| T691 |
/workspace/coverage/default/26.spi_device_tpm_rw.3198669845 |
|
|
Apr 28 01:14:24 PM PDT 24 |
Apr 28 01:14:52 PM PDT 24 |
43283210 ps |
| T692 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.3119349837 |
|
|
Apr 28 01:12:58 PM PDT 24 |
Apr 28 01:13:03 PM PDT 24 |
158672233 ps |
| T337 |
/workspace/coverage/default/31.spi_device_cfg_cmd.3815928028 |
|
|
Apr 28 01:14:48 PM PDT 24 |
Apr 28 01:15:28 PM PDT 24 |
1834144634 ps |
| T362 |
/workspace/coverage/default/2.spi_device_intercept.1425436206 |
|
|
Apr 28 01:12:30 PM PDT 24 |
Apr 28 01:12:40 PM PDT 24 |
1970813160 ps |
| T693 |
/workspace/coverage/default/2.spi_device_tpm_sts_read.22947648 |
|
|
Apr 28 01:12:32 PM PDT 24 |
Apr 28 01:12:34 PM PDT 24 |
566315033 ps |
| T285 |
/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.2140455838 |
|
|
Apr 28 01:15:21 PM PDT 24 |
Apr 28 01:16:16 PM PDT 24 |
8971150327 ps |
| T48 |
/workspace/coverage/default/1.spi_device_sec_cm.660506346 |
|
|
Apr 28 01:12:31 PM PDT 24 |
Apr 28 01:12:33 PM PDT 24 |
183068755 ps |
| T694 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.625926435 |
|
|
Apr 28 01:17:59 PM PDT 24 |
Apr 28 01:18:37 PM PDT 24 |
296703335 ps |
| T695 |
/workspace/coverage/default/22.spi_device_flash_mode.1560879486 |
|
|
Apr 28 01:13:58 PM PDT 24 |
Apr 28 01:15:19 PM PDT 24 |
5824675182 ps |
| T696 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.3986315170 |
|
|
Apr 28 01:13:40 PM PDT 24 |
Apr 28 01:13:59 PM PDT 24 |
4179794465 ps |
| T396 |
/workspace/coverage/default/36.spi_device_tpm_all.1271406429 |
|
|
Apr 28 01:15:36 PM PDT 24 |
Apr 28 01:17:13 PM PDT 24 |
13128974895 ps |
| T697 |
/workspace/coverage/default/38.spi_device_tpm_rw.260818599 |
|
|
Apr 28 01:15:54 PM PDT 24 |
Apr 28 01:16:33 PM PDT 24 |
70300080 ps |
| T299 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.524882544 |
|
|
Apr 28 01:13:34 PM PDT 24 |
Apr 28 01:13:52 PM PDT 24 |
6465839373 ps |
| T698 |
/workspace/coverage/default/20.spi_device_alert_test.437649567 |
|
|
Apr 28 01:13:53 PM PDT 24 |
Apr 28 01:13:58 PM PDT 24 |
14520557 ps |
| T383 |
/workspace/coverage/default/39.spi_device_upload.716959567 |
|
|
Apr 28 01:16:09 PM PDT 24 |
Apr 28 01:16:56 PM PDT 24 |
4404443295 ps |
| T699 |
/workspace/coverage/default/48.spi_device_tpm_all.1524956478 |
|
|
Apr 28 01:17:42 PM PDT 24 |
Apr 28 01:18:55 PM PDT 24 |
4701502652 ps |
| T700 |
/workspace/coverage/default/25.spi_device_alert_test.791276130 |
|
|
Apr 28 01:14:18 PM PDT 24 |
Apr 28 01:14:40 PM PDT 24 |
20716853 ps |
| T257 |
/workspace/coverage/default/42.spi_device_intercept.3418144911 |
|
|
Apr 28 01:16:35 PM PDT 24 |
Apr 28 01:17:27 PM PDT 24 |
361116188 ps |
| T701 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.2316963632 |
|
|
Apr 28 01:12:22 PM PDT 24 |
Apr 28 01:12:34 PM PDT 24 |
2135262892 ps |
| T702 |
/workspace/coverage/default/46.spi_device_tpm_rw.1348714407 |
|
|
Apr 28 01:17:15 PM PDT 24 |
Apr 28 01:18:00 PM PDT 24 |
587707315 ps |
| T703 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.3133570422 |
|
|
Apr 28 01:15:36 PM PDT 24 |
Apr 28 01:16:11 PM PDT 24 |
31998115 ps |
| T704 |
/workspace/coverage/default/27.spi_device_upload.1921367887 |
|
|
Apr 28 01:14:30 PM PDT 24 |
Apr 28 01:15:34 PM PDT 24 |
10336931654 ps |
| T705 |
/workspace/coverage/default/29.spi_device_flash_mode.3392470362 |
|
|
Apr 28 01:14:32 PM PDT 24 |
Apr 28 01:16:02 PM PDT 24 |
14629935136 ps |
| T110 |
/workspace/coverage/default/32.spi_device_intercept.3223247968 |
|
|
Apr 28 01:14:59 PM PDT 24 |
Apr 28 01:15:57 PM PDT 24 |
1803740791 ps |
| T706 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.4201191803 |
|
|
Apr 28 01:14:40 PM PDT 24 |
Apr 28 01:15:16 PM PDT 24 |
88498513 ps |
| T707 |
/workspace/coverage/default/22.spi_device_upload.4195038999 |
|
|
Apr 28 01:13:58 PM PDT 24 |
Apr 28 01:14:13 PM PDT 24 |
3350352410 ps |
| T395 |
/workspace/coverage/default/16.spi_device_tpm_all.4283661370 |
|
|
Apr 28 01:13:30 PM PDT 24 |
Apr 28 01:14:05 PM PDT 24 |
24416970009 ps |
| T708 |
/workspace/coverage/default/17.spi_device_tpm_all.2459424794 |
|
|
Apr 28 01:13:43 PM PDT 24 |
Apr 28 01:14:31 PM PDT 24 |
6152204139 ps |
| T709 |
/workspace/coverage/default/35.spi_device_pass_addr_payload_swap.2513453797 |
|
|
Apr 28 01:15:32 PM PDT 24 |
Apr 28 01:16:11 PM PDT 24 |
365445625 ps |
| T211 |
/workspace/coverage/default/29.spi_device_upload.2274058821 |
|
|
Apr 28 01:14:32 PM PDT 24 |
Apr 28 01:15:13 PM PDT 24 |
2317114436 ps |
| T710 |
/workspace/coverage/default/0.spi_device_csb_read.1104617939 |
|
|
Apr 28 01:12:22 PM PDT 24 |
Apr 28 01:12:24 PM PDT 24 |
28116688 ps |
| T711 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.1540035671 |
|
|
Apr 28 01:12:56 PM PDT 24 |
Apr 28 01:13:00 PM PDT 24 |
346698765 ps |
| T321 |
/workspace/coverage/default/6.spi_device_flash_mode.1980216310 |
|
|
Apr 28 01:12:51 PM PDT 24 |
Apr 28 01:13:16 PM PDT 24 |
6563076270 ps |
| T221 |
/workspace/coverage/default/6.spi_device_pass_cmd_filtering.1729371264 |
|
|
Apr 28 01:12:52 PM PDT 24 |
Apr 28 01:13:01 PM PDT 24 |
2127337576 ps |
| T712 |
/workspace/coverage/default/27.spi_device_tpm_all.2383499596 |
|
|
Apr 28 01:14:28 PM PDT 24 |
Apr 28 01:15:05 PM PDT 24 |
3779191548 ps |
| T713 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.624213045 |
|
|
Apr 28 01:14:14 PM PDT 24 |
Apr 28 01:14:34 PM PDT 24 |
528873648 ps |
| T344 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.670740984 |
|
|
Apr 28 01:13:02 PM PDT 24 |
Apr 28 01:13:34 PM PDT 24 |
46435655074 ps |
| T714 |
/workspace/coverage/default/1.spi_device_stress_all.2264206876 |
|
|
Apr 28 01:12:37 PM PDT 24 |
Apr 28 01:12:39 PM PDT 24 |
154557247 ps |
| T715 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.436585864 |
|
|
Apr 28 01:16:30 PM PDT 24 |
Apr 28 01:17:18 PM PDT 24 |
107526381 ps |
| T716 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.489707340 |
|
|
Apr 28 01:15:25 PM PDT 24 |
Apr 28 01:16:01 PM PDT 24 |
556937059 ps |
| T717 |
/workspace/coverage/default/22.spi_device_tpm_rw.1282524520 |
|
|
Apr 28 01:13:59 PM PDT 24 |
Apr 28 01:14:04 PM PDT 24 |
67646731 ps |
| T289 |
/workspace/coverage/default/36.spi_device_mailbox.2293623496 |
|
|
Apr 28 01:15:43 PM PDT 24 |
Apr 28 01:18:13 PM PDT 24 |
26227424881 ps |
| T34 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.100491200 |
|
|
Apr 28 01:04:09 PM PDT 24 |
Apr 28 01:04:18 PM PDT 24 |
347985522 ps |
| T718 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.1101379075 |
|
|
Apr 28 01:04:39 PM PDT 24 |
Apr 28 01:04:41 PM PDT 24 |
22601867 ps |
| T719 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.3361199701 |
|
|
Apr 28 01:04:20 PM PDT 24 |
Apr 28 01:04:22 PM PDT 24 |
191246950 ps |
| T35 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.3217284488 |
|
|
Apr 28 01:04:19 PM PDT 24 |
Apr 28 01:04:23 PM PDT 24 |
141241094 ps |
| T36 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2200562757 |
|
|
Apr 28 01:04:25 PM PDT 24 |
Apr 28 01:04:27 PM PDT 24 |
28317247 ps |
| T720 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.1847656895 |
|
|
Apr 28 01:04:29 PM PDT 24 |
Apr 28 01:04:30 PM PDT 24 |
11424339 ps |
| T37 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.4182603466 |
|
|
Apr 28 01:04:21 PM PDT 24 |
Apr 28 01:04:23 PM PDT 24 |
32170307 ps |
| T138 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.1813535494 |
|
|
Apr 28 01:04:04 PM PDT 24 |
Apr 28 01:04:18 PM PDT 24 |
819628367 ps |
| T153 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1208933158 |
|
|
Apr 28 01:03:59 PM PDT 24 |
Apr 28 01:04:02 PM PDT 24 |
1159571178 ps |
| T38 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.574329792 |
|
|
Apr 28 01:04:01 PM PDT 24 |
Apr 28 01:04:09 PM PDT 24 |
499589432 ps |
| T139 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.239704779 |
|
|
Apr 28 01:04:19 PM PDT 24 |
Apr 28 01:04:22 PM PDT 24 |
447015037 ps |
| T721 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.1411406830 |
|
|
Apr 28 01:04:13 PM PDT 24 |
Apr 28 01:04:15 PM PDT 24 |
11413410 ps |
| T94 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.2116309502 |
|
|
Apr 28 01:04:01 PM PDT 24 |
Apr 28 01:04:03 PM PDT 24 |
31437805 ps |
| T112 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.713148024 |
|
|
Apr 28 01:04:07 PM PDT 24 |
Apr 28 01:04:10 PM PDT 24 |
962273877 ps |
| T722 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.413597899 |
|
|
Apr 28 01:04:37 PM PDT 24 |
Apr 28 01:04:39 PM PDT 24 |
14922293 ps |
| T95 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.2284915184 |
|
|
Apr 28 01:03:58 PM PDT 24 |
Apr 28 01:04:00 PM PDT 24 |
130002749 ps |
| T723 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.3631054999 |
|
|
Apr 28 01:04:16 PM PDT 24 |
Apr 28 01:04:17 PM PDT 24 |
37343676 ps |
| T113 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.443815761 |
|
|
Apr 28 01:04:33 PM PDT 24 |
Apr 28 01:04:36 PM PDT 24 |
106295373 ps |
| T129 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.543830437 |
|
|
Apr 28 01:04:22 PM PDT 24 |
Apr 28 01:04:27 PM PDT 24 |
512897863 ps |
| T167 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.755891580 |
|
|
Apr 28 01:04:29 PM PDT 24 |
Apr 28 01:04:31 PM PDT 24 |
15148106 ps |
| T140 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3360417406 |
|
|
Apr 28 01:04:31 PM PDT 24 |
Apr 28 01:04:34 PM PDT 24 |
79188142 ps |
| T724 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.673764556 |
|
|
Apr 28 01:04:33 PM PDT 24 |
Apr 28 01:04:34 PM PDT 24 |
23595552 ps |
| T114 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.1912016724 |
|
|
Apr 28 01:04:13 PM PDT 24 |
Apr 28 01:04:16 PM PDT 24 |
96266133 ps |
| T725 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.1162846123 |
|
|
Apr 28 01:04:34 PM PDT 24 |
Apr 28 01:04:35 PM PDT 24 |
42760432 ps |
| T154 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1666797539 |
|
|
Apr 28 01:04:00 PM PDT 24 |
Apr 28 01:04:04 PM PDT 24 |
105914451 ps |
| T96 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.1554868044 |
|
|
Apr 28 01:03:59 PM PDT 24 |
Apr 28 01:04:01 PM PDT 24 |
22493700 ps |
| T168 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.3034788287 |
|
|
Apr 28 01:04:32 PM PDT 24 |
Apr 28 01:04:34 PM PDT 24 |
64991478 ps |
| T118 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.2104517866 |
|
|
Apr 28 01:04:28 PM PDT 24 |
Apr 28 01:04:35 PM PDT 24 |
395435489 ps |
| T135 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.585338932 |
|
|
Apr 28 01:04:37 PM PDT 24 |
Apr 28 01:04:41 PM PDT 24 |
151243189 ps |
| T726 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2491951682 |
|
|
Apr 28 01:04:37 PM PDT 24 |
Apr 28 01:04:39 PM PDT 24 |
33092802 ps |
| T169 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.3484647061 |
|
|
Apr 28 01:04:35 PM PDT 24 |
Apr 28 01:04:37 PM PDT 24 |
21554037 ps |
| T155 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.1347877193 |
|
|
Apr 28 01:04:06 PM PDT 24 |
Apr 28 01:04:09 PM PDT 24 |
405233342 ps |
| T727 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.2991810458 |
|
|
Apr 28 01:04:33 PM PDT 24 |
Apr 28 01:04:35 PM PDT 24 |
23377145 ps |
| T728 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.3129249460 |
|
|
Apr 28 01:04:34 PM PDT 24 |
Apr 28 01:04:36 PM PDT 24 |
38598802 ps |
| T141 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.2324814835 |
|
|
Apr 28 01:04:02 PM PDT 24 |
Apr 28 01:04:05 PM PDT 24 |
187341155 ps |
| T170 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.325092973 |
|
|
Apr 28 01:04:39 PM PDT 24 |
Apr 28 01:04:41 PM PDT 24 |
65677748 ps |
| T127 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.448916896 |
|
|
Apr 28 01:04:06 PM PDT 24 |
Apr 28 01:04:09 PM PDT 24 |
30818609 ps |
| T729 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.2186568570 |
|
|
Apr 28 01:04:23 PM PDT 24 |
Apr 28 01:04:25 PM PDT 24 |
142583140 ps |
| T156 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.1968144669 |
|
|
Apr 28 01:04:28 PM PDT 24 |
Apr 28 01:04:32 PM PDT 24 |
86006971 ps |
| T134 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.3910267011 |
|
|
Apr 28 01:04:18 PM PDT 24 |
Apr 28 01:04:37 PM PDT 24 |
307863256 ps |
| T730 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.848071395 |
|
|
Apr 28 01:04:20 PM PDT 24 |
Apr 28 01:04:21 PM PDT 24 |
13300457 ps |
| T157 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.586344501 |
|
|
Apr 28 01:04:28 PM PDT 24 |
Apr 28 01:04:32 PM PDT 24 |
156865299 ps |
| T731 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1342579012 |
|
|
Apr 28 01:03:59 PM PDT 24 |
Apr 28 01:04:01 PM PDT 24 |
12931444 ps |
| T158 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.1072585482 |
|
|
Apr 28 01:04:33 PM PDT 24 |
Apr 28 01:04:35 PM PDT 24 |
29063764 ps |
| T142 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.570107418 |
|
|
Apr 28 01:04:32 PM PDT 24 |
Apr 28 01:04:35 PM PDT 24 |
128540276 ps |
| T732 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1248965029 |
|
|
Apr 28 01:04:06 PM PDT 24 |
Apr 28 01:04:08 PM PDT 24 |
10246027 ps |
| T143 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1986640917 |
|
|
Apr 28 01:04:13 PM PDT 24 |
Apr 28 01:04:16 PM PDT 24 |
78181376 ps |
| T144 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.1419406854 |
|
|
Apr 28 01:04:00 PM PDT 24 |
Apr 28 01:04:16 PM PDT 24 |
2428076578 ps |
| T136 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.138921061 |
|
|
Apr 28 01:04:24 PM PDT 24 |
Apr 28 01:04:38 PM PDT 24 |
3452987747 ps |
| T733 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.444328903 |
|
|
Apr 28 01:04:33 PM PDT 24 |
Apr 28 01:04:38 PM PDT 24 |
118642710 ps |
| T124 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.1549054219 |
|
|
Apr 28 01:04:15 PM PDT 24 |
Apr 28 01:04:18 PM PDT 24 |
42018187 ps |
| T145 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.1288783153 |
|
|
Apr 28 01:03:58 PM PDT 24 |
Apr 28 01:04:00 PM PDT 24 |
32143496 ps |
| T146 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.4006531743 |
|
|
Apr 28 01:04:18 PM PDT 24 |
Apr 28 01:04:21 PM PDT 24 |
76304142 ps |
| T734 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.3383853853 |
|
|
Apr 28 01:04:32 PM PDT 24 |
Apr 28 01:04:34 PM PDT 24 |
15363137 ps |
| T735 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.2344005148 |
|
|
Apr 28 01:03:57 PM PDT 24 |
Apr 28 01:04:31 PM PDT 24 |
538097461 ps |
| T736 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.3956499135 |
|
|
Apr 28 01:04:38 PM PDT 24 |
Apr 28 01:04:39 PM PDT 24 |
20673085 ps |
| T162 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.1016251341 |
|
|
Apr 28 01:04:14 PM PDT 24 |
Apr 28 01:04:18 PM PDT 24 |
538488491 ps |
| T737 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.3023811680 |
|
|
Apr 28 01:04:19 PM PDT 24 |
Apr 28 01:04:22 PM PDT 24 |
216695287 ps |
| T163 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.789830047 |
|
|
Apr 28 01:04:11 PM PDT 24 |
Apr 28 01:04:15 PM PDT 24 |
163031464 ps |
| T147 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.968110135 |
|
|
Apr 28 01:04:19 PM PDT 24 |
Apr 28 01:04:23 PM PDT 24 |
119501675 ps |
| T164 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.1111975185 |
|
|
Apr 28 01:04:31 PM PDT 24 |
Apr 28 01:04:34 PM PDT 24 |
1243866746 ps |
| T150 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.4169058845 |
|
|
Apr 28 01:04:19 PM PDT 24 |
Apr 28 01:04:21 PM PDT 24 |
115116509 ps |
| T738 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.3763328689 |
|
|
Apr 28 01:04:23 PM PDT 24 |
Apr 28 01:04:25 PM PDT 24 |
41454146 ps |
| T379 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.644940986 |
|
|
Apr 28 01:04:22 PM PDT 24 |
Apr 28 01:04:44 PM PDT 24 |
827544366 ps |
| T98 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.3129039940 |
|
|
Apr 28 01:04:10 PM PDT 24 |
Apr 28 01:04:12 PM PDT 24 |
23102157 ps |
| T739 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1756800037 |
|
|
Apr 28 01:04:33 PM PDT 24 |
Apr 28 01:04:38 PM PDT 24 |
130489786 ps |
| T376 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.35298313 |
|
|
Apr 28 01:04:26 PM PDT 24 |
Apr 28 01:04:44 PM PDT 24 |
1195315583 ps |
| T740 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.4204870474 |
|
|
Apr 28 01:04:06 PM PDT 24 |
Apr 28 01:04:09 PM PDT 24 |
61462550 ps |
| T741 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.1390522070 |
|
|
Apr 28 01:04:03 PM PDT 24 |
Apr 28 01:04:06 PM PDT 24 |
121912913 ps |
| T742 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.2302946454 |
|
|
Apr 28 01:03:59 PM PDT 24 |
Apr 28 01:04:23 PM PDT 24 |
9053588003 ps |
| T743 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.559484790 |
|
|
Apr 28 01:04:22 PM PDT 24 |
Apr 28 01:04:24 PM PDT 24 |
56268970 ps |
| T125 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.798559693 |
|
|
Apr 28 01:04:23 PM PDT 24 |
Apr 28 01:04:27 PM PDT 24 |
33858483 ps |
| T132 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.438151135 |
|
|
Apr 28 01:04:07 PM PDT 24 |
Apr 28 01:04:09 PM PDT 24 |
413608266 ps |
| T744 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.3738911601 |
|
|
Apr 28 01:04:28 PM PDT 24 |
Apr 28 01:04:30 PM PDT 24 |
161928671 ps |
| T745 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.2418783979 |
|
|
Apr 28 01:04:09 PM PDT 24 |
Apr 28 01:04:10 PM PDT 24 |
11618023 ps |
| T122 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.3383064549 |
|
|
Apr 28 01:04:01 PM PDT 24 |
Apr 28 01:04:05 PM PDT 24 |
139406735 ps |
| T746 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.2231134732 |
|
|
Apr 28 01:04:36 PM PDT 24 |
Apr 28 01:04:37 PM PDT 24 |
12422463 ps |
| T747 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.1594245548 |
|
|
Apr 28 01:04:32 PM PDT 24 |
Apr 28 01:04:33 PM PDT 24 |
52170710 ps |
| T748 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.2249241080 |
|
|
Apr 28 01:04:22 PM PDT 24 |
Apr 28 01:04:24 PM PDT 24 |
64195365 ps |
| T749 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.1156206467 |
|
|
Apr 28 01:04:22 PM PDT 24 |
Apr 28 01:04:24 PM PDT 24 |
42369875 ps |
| T750 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.2420706485 |
|
|
Apr 28 01:04:11 PM PDT 24 |
Apr 28 01:04:13 PM PDT 24 |
27480833 ps |
| T128 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3653895532 |
|
|
Apr 28 01:04:18 PM PDT 24 |
Apr 28 01:04:23 PM PDT 24 |
249253305 ps |
| T751 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.3885774541 |
|
|
Apr 28 01:04:17 PM PDT 24 |
Apr 28 01:04:18 PM PDT 24 |
13077917 ps |
| T148 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.790321834 |
|
|
Apr 28 01:04:07 PM PDT 24 |
Apr 28 01:04:09 PM PDT 24 |
216575893 ps |
| T165 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.489612727 |
|
|
Apr 28 01:04:17 PM PDT 24 |
Apr 28 01:04:25 PM PDT 24 |
373606613 ps |
| T752 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.4188711767 |
|
|
Apr 28 01:04:29 PM PDT 24 |
Apr 28 01:04:33 PM PDT 24 |
139508847 ps |
| T753 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.4261253463 |
|
|
Apr 28 01:04:34 PM PDT 24 |
Apr 28 01:04:36 PM PDT 24 |
13462586 ps |
| T754 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.4162997803 |
|
|
Apr 28 01:04:14 PM PDT 24 |
Apr 28 01:04:17 PM PDT 24 |
28900403 ps |
| T755 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.2341099115 |
|
|
Apr 28 01:03:59 PM PDT 24 |
Apr 28 01:04:01 PM PDT 24 |
56360475 ps |
| T756 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2455942418 |
|
|
Apr 28 01:04:36 PM PDT 24 |
Apr 28 01:04:38 PM PDT 24 |
11882890 ps |
| T133 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2590810203 |
|
|
Apr 28 01:04:03 PM PDT 24 |
Apr 28 01:04:06 PM PDT 24 |
106181195 ps |
| T757 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3023295294 |
|
|
Apr 28 01:03:57 PM PDT 24 |
Apr 28 01:03:58 PM PDT 24 |
17644965 ps |
| T758 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.2969818348 |
|
|
Apr 28 01:04:35 PM PDT 24 |
Apr 28 01:04:36 PM PDT 24 |
37259071 ps |
| T759 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.3993548012 |
|
|
Apr 28 01:04:03 PM PDT 24 |
Apr 28 01:04:05 PM PDT 24 |
14503578 ps |
| T760 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.3637109938 |
|
|
Apr 28 01:04:33 PM PDT 24 |
Apr 28 01:04:35 PM PDT 24 |
53373445 ps |
| T761 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.1143595458 |
|
|
Apr 28 01:04:08 PM PDT 24 |
Apr 28 01:04:10 PM PDT 24 |
54076524 ps |
| T149 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.1901088063 |
|
|
Apr 28 01:04:03 PM PDT 24 |
Apr 28 01:04:05 PM PDT 24 |
47725761 ps |
| T762 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.12753776 |
|
|
Apr 28 01:04:29 PM PDT 24 |
Apr 28 01:04:31 PM PDT 24 |
54888783 ps |
| T178 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1511743438 |
|
|
Apr 28 01:04:17 PM PDT 24 |
Apr 28 01:04:21 PM PDT 24 |
186367746 ps |
| T763 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.101780487 |
|
|
Apr 28 01:03:59 PM PDT 24 |
Apr 28 01:04:00 PM PDT 24 |
55202281 ps |
| T123 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.14004178 |
|
|
Apr 28 01:04:28 PM PDT 24 |
Apr 28 01:04:33 PM PDT 24 |
624119243 ps |