T631 |
/workspace/coverage/default/14.spi_device_read_buffer_direct.639541160 |
|
|
May 05 01:56:14 PM PDT 24 |
May 05 01:56:19 PM PDT 24 |
83080149 ps |
T231 |
/workspace/coverage/default/28.spi_device_pass_addr_payload_swap.392420885 |
|
|
May 05 01:57:08 PM PDT 24 |
May 05 01:57:22 PM PDT 24 |
14424911235 ps |
T316 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.1663032644 |
|
|
May 05 01:58:01 PM PDT 24 |
May 05 01:58:10 PM PDT 24 |
978973976 ps |
T318 |
/workspace/coverage/default/23.spi_device_cfg_cmd.479830131 |
|
|
May 05 01:56:47 PM PDT 24 |
May 05 01:57:02 PM PDT 24 |
5887644935 ps |
T632 |
/workspace/coverage/default/9.spi_device_flash_mode.4255521664 |
|
|
May 05 01:56:16 PM PDT 24 |
May 05 01:56:43 PM PDT 24 |
938452745 ps |
T633 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.2629182278 |
|
|
May 05 01:58:09 PM PDT 24 |
May 05 01:58:12 PM PDT 24 |
388489750 ps |
T332 |
/workspace/coverage/default/34.spi_device_upload.3909098219 |
|
|
May 05 01:57:26 PM PDT 24 |
May 05 01:57:37 PM PDT 24 |
13428589431 ps |
T324 |
/workspace/coverage/default/15.spi_device_mailbox.1329817080 |
|
|
May 05 01:56:19 PM PDT 24 |
May 05 01:57:41 PM PDT 24 |
21248852817 ps |
T312 |
/workspace/coverage/default/17.spi_device_upload.687524653 |
|
|
May 05 01:56:35 PM PDT 24 |
May 05 01:56:56 PM PDT 24 |
11330443752 ps |
T634 |
/workspace/coverage/default/7.spi_device_csb_read.1349352380 |
|
|
May 05 01:55:56 PM PDT 24 |
May 05 01:55:58 PM PDT 24 |
64862428 ps |
T635 |
/workspace/coverage/default/12.spi_device_tpm_all.2131988947 |
|
|
May 05 01:56:13 PM PDT 24 |
May 05 01:56:31 PM PDT 24 |
3731945696 ps |
T337 |
/workspace/coverage/default/47.spi_device_intercept.312428247 |
|
|
May 05 01:58:12 PM PDT 24 |
May 05 01:58:19 PM PDT 24 |
222263487 ps |
T46 |
/workspace/coverage/default/5.spi_device_intercept.2253998135 |
|
|
May 05 01:55:59 PM PDT 24 |
May 05 01:56:25 PM PDT 24 |
2468491888 ps |
T344 |
/workspace/coverage/default/27.spi_device_mailbox.1761587127 |
|
|
May 05 01:56:57 PM PDT 24 |
May 05 01:57:31 PM PDT 24 |
3691778932 ps |
T331 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.3104469936 |
|
|
May 05 01:57:30 PM PDT 24 |
May 05 01:57:37 PM PDT 24 |
300876318 ps |
T389 |
/workspace/coverage/default/10.spi_device_tpm_all.3987610011 |
|
|
May 05 01:56:04 PM PDT 24 |
May 05 01:56:34 PM PDT 24 |
5128138361 ps |
T636 |
/workspace/coverage/default/27.spi_device_tpm_rw.3250292201 |
|
|
May 05 01:56:58 PM PDT 24 |
May 05 01:57:11 PM PDT 24 |
474167155 ps |
T637 |
/workspace/coverage/default/10.spi_device_csb_read.4152824950 |
|
|
May 05 01:56:17 PM PDT 24 |
May 05 01:56:19 PM PDT 24 |
46250155 ps |
T293 |
/workspace/coverage/default/26.spi_device_pass_addr_payload_swap.906195123 |
|
|
May 05 01:56:54 PM PDT 24 |
May 05 01:57:02 PM PDT 24 |
22514288824 ps |
T638 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.539082568 |
|
|
May 05 01:55:48 PM PDT 24 |
May 05 01:56:22 PM PDT 24 |
11296484313 ps |
T639 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.662978351 |
|
|
May 05 01:57:27 PM PDT 24 |
May 05 01:57:28 PM PDT 24 |
67598682 ps |
T640 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.697557627 |
|
|
May 05 01:56:22 PM PDT 24 |
May 05 01:56:23 PM PDT 24 |
72935932 ps |
T641 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.830874610 |
|
|
May 05 01:56:21 PM PDT 24 |
May 05 01:56:34 PM PDT 24 |
6860036147 ps |
T116 |
/workspace/coverage/default/10.spi_device_intercept.1382314261 |
|
|
May 05 01:56:11 PM PDT 24 |
May 05 01:56:43 PM PDT 24 |
10045856308 ps |
T642 |
/workspace/coverage/default/23.spi_device_alert_test.2093788780 |
|
|
May 05 01:56:47 PM PDT 24 |
May 05 01:56:48 PM PDT 24 |
31174696 ps |
T347 |
/workspace/coverage/default/20.spi_device_pass_addr_payload_swap.2142926636 |
|
|
May 05 01:56:44 PM PDT 24 |
May 05 01:56:55 PM PDT 24 |
13306542496 ps |
T643 |
/workspace/coverage/default/17.spi_device_alert_test.1849649343 |
|
|
May 05 01:56:41 PM PDT 24 |
May 05 01:56:42 PM PDT 24 |
14230536 ps |
T644 |
/workspace/coverage/default/32.spi_device_alert_test.3864035224 |
|
|
May 05 01:57:18 PM PDT 24 |
May 05 01:57:19 PM PDT 24 |
45651062 ps |
T302 |
/workspace/coverage/default/29.spi_device_flash_mode.4166236734 |
|
|
May 05 01:57:10 PM PDT 24 |
May 05 01:57:30 PM PDT 24 |
946664735 ps |
T117 |
/workspace/coverage/default/47.spi_device_mailbox.2556799630 |
|
|
May 05 01:58:13 PM PDT 24 |
May 05 01:58:45 PM PDT 24 |
2288206072 ps |
T645 |
/workspace/coverage/default/0.spi_device_tpm_all.758327074 |
|
|
May 05 01:55:51 PM PDT 24 |
May 05 01:56:01 PM PDT 24 |
3539798442 ps |
T255 |
/workspace/coverage/default/46.spi_device_pass_cmd_filtering.314971741 |
|
|
May 05 01:58:06 PM PDT 24 |
May 05 01:58:09 PM PDT 24 |
625239732 ps |
T646 |
/workspace/coverage/default/43.spi_device_csb_read.2712523962 |
|
|
May 05 01:57:55 PM PDT 24 |
May 05 01:57:57 PM PDT 24 |
36506662 ps |
T647 |
/workspace/coverage/default/20.spi_device_tpm_rw.554636206 |
|
|
May 05 01:56:44 PM PDT 24 |
May 05 01:56:50 PM PDT 24 |
243136772 ps |
T277 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.708209053 |
|
|
May 05 01:57:38 PM PDT 24 |
May 05 01:57:47 PM PDT 24 |
12571234856 ps |
T648 |
/workspace/coverage/default/47.spi_device_tpm_all.3900116876 |
|
|
May 05 01:58:10 PM PDT 24 |
May 05 01:58:35 PM PDT 24 |
6347113260 ps |
T649 |
/workspace/coverage/default/24.spi_device_tpm_rw.2626038198 |
|
|
May 05 01:56:45 PM PDT 24 |
May 05 01:56:47 PM PDT 24 |
154568320 ps |
T650 |
/workspace/coverage/default/39.spi_device_csb_read.4288976298 |
|
|
May 05 01:57:42 PM PDT 24 |
May 05 01:57:43 PM PDT 24 |
173091978 ps |
T651 |
/workspace/coverage/default/26.spi_device_csb_read.1104408441 |
|
|
May 05 01:56:57 PM PDT 24 |
May 05 01:56:58 PM PDT 24 |
27016183 ps |
T652 |
/workspace/coverage/default/7.spi_device_cfg_cmd.2463580687 |
|
|
May 05 01:56:06 PM PDT 24 |
May 05 01:56:09 PM PDT 24 |
164216899 ps |
T257 |
/workspace/coverage/default/10.spi_device_mailbox.2622538063 |
|
|
May 05 01:56:04 PM PDT 24 |
May 05 01:58:31 PM PDT 24 |
135265337636 ps |
T236 |
/workspace/coverage/default/40.spi_device_mailbox.3120134112 |
|
|
May 05 01:57:41 PM PDT 24 |
May 05 01:59:08 PM PDT 24 |
23792998088 ps |
T653 |
/workspace/coverage/default/49.spi_device_tpm_all.1394505180 |
|
|
May 05 01:58:19 PM PDT 24 |
May 05 01:59:18 PM PDT 24 |
9114798826 ps |
T654 |
/workspace/coverage/default/18.spi_device_alert_test.4111468109 |
|
|
May 05 01:56:48 PM PDT 24 |
May 05 01:56:49 PM PDT 24 |
12310693 ps |
T341 |
/workspace/coverage/default/27.spi_device_pass_cmd_filtering.3138105337 |
|
|
May 05 01:56:57 PM PDT 24 |
May 05 01:57:08 PM PDT 24 |
5494238579 ps |
T655 |
/workspace/coverage/default/21.spi_device_alert_test.298789658 |
|
|
May 05 01:56:52 PM PDT 24 |
May 05 01:56:53 PM PDT 24 |
13269807 ps |
T656 |
/workspace/coverage/default/1.spi_device_csb_read.1309966790 |
|
|
May 05 01:55:53 PM PDT 24 |
May 05 01:55:54 PM PDT 24 |
61987509 ps |
T358 |
/workspace/coverage/default/49.spi_device_mailbox.3761083741 |
|
|
May 05 01:58:20 PM PDT 24 |
May 05 01:58:46 PM PDT 24 |
3776066344 ps |
T657 |
/workspace/coverage/default/14.spi_device_tpm_rw.2202630571 |
|
|
May 05 01:56:18 PM PDT 24 |
May 05 01:56:20 PM PDT 24 |
102528987 ps |
T221 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.914208897 |
|
|
May 05 01:58:25 PM PDT 24 |
May 05 01:58:33 PM PDT 24 |
635194489 ps |
T658 |
/workspace/coverage/default/6.spi_device_alert_test.3201534956 |
|
|
May 05 01:56:09 PM PDT 24 |
May 05 01:56:11 PM PDT 24 |
12196740 ps |
T659 |
/workspace/coverage/default/15.spi_device_stress_all.3290170081 |
|
|
May 05 01:56:35 PM PDT 24 |
May 05 01:56:36 PM PDT 24 |
191269504 ps |
T660 |
/workspace/coverage/default/35.spi_device_tpm_rw.1256519137 |
|
|
May 05 01:57:31 PM PDT 24 |
May 05 01:57:33 PM PDT 24 |
97922728 ps |
T365 |
/workspace/coverage/default/16.spi_device_flash_mode.781078576 |
|
|
May 05 01:56:34 PM PDT 24 |
May 05 01:57:10 PM PDT 24 |
32627366121 ps |
T661 |
/workspace/coverage/default/34.spi_device_cfg_cmd.834082457 |
|
|
May 05 01:57:22 PM PDT 24 |
May 05 01:57:24 PM PDT 24 |
66000718 ps |
T662 |
/workspace/coverage/default/15.spi_device_tpm_all.1778128646 |
|
|
May 05 01:56:22 PM PDT 24 |
May 05 01:56:33 PM PDT 24 |
2977444208 ps |
T663 |
/workspace/coverage/default/40.spi_device_intercept.1888027749 |
|
|
May 05 01:57:44 PM PDT 24 |
May 05 01:58:00 PM PDT 24 |
1275304907 ps |
T664 |
/workspace/coverage/default/29.spi_device_alert_test.4191064705 |
|
|
May 05 01:57:08 PM PDT 24 |
May 05 01:57:09 PM PDT 24 |
39867290 ps |
T329 |
/workspace/coverage/default/35.spi_device_intercept.3294548387 |
|
|
May 05 01:57:29 PM PDT 24 |
May 05 01:58:06 PM PDT 24 |
17593087371 ps |
T665 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.2768793703 |
|
|
May 05 01:58:11 PM PDT 24 |
May 05 01:58:23 PM PDT 24 |
2517322056 ps |
T666 |
/workspace/coverage/default/36.spi_device_csb_read.1006036703 |
|
|
May 05 01:57:29 PM PDT 24 |
May 05 01:57:30 PM PDT 24 |
51554904 ps |
T667 |
/workspace/coverage/default/30.spi_device_tpm_all.2579840174 |
|
|
May 05 01:57:15 PM PDT 24 |
May 05 01:57:29 PM PDT 24 |
4065696750 ps |
T668 |
/workspace/coverage/default/10.spi_device_tpm_read_hw_reg.3064915115 |
|
|
May 05 01:56:03 PM PDT 24 |
May 05 01:56:13 PM PDT 24 |
11055063071 ps |
T669 |
/workspace/coverage/default/36.spi_device_tpm_rw.287363505 |
|
|
May 05 01:57:29 PM PDT 24 |
May 05 01:57:31 PM PDT 24 |
42402109 ps |
T670 |
/workspace/coverage/default/14.spi_device_tpm_read_hw_reg.491226308 |
|
|
May 05 01:56:15 PM PDT 24 |
May 05 01:56:26 PM PDT 24 |
5593880373 ps |
T363 |
/workspace/coverage/default/7.spi_device_intercept.3473550941 |
|
|
May 05 01:55:59 PM PDT 24 |
May 05 01:56:04 PM PDT 24 |
1016648554 ps |
T334 |
/workspace/coverage/default/0.spi_device_intercept.1616218605 |
|
|
May 05 01:55:54 PM PDT 24 |
May 05 01:56:18 PM PDT 24 |
3137730266 ps |
T390 |
/workspace/coverage/default/21.spi_device_tpm_all.562742842 |
|
|
May 05 01:56:43 PM PDT 24 |
May 05 01:57:17 PM PDT 24 |
5593181762 ps |
T291 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.1928900964 |
|
|
May 05 01:56:57 PM PDT 24 |
May 05 01:57:04 PM PDT 24 |
676013469 ps |
T268 |
/workspace/coverage/default/22.spi_device_upload.2216875017 |
|
|
May 05 01:56:48 PM PDT 24 |
May 05 01:56:54 PM PDT 24 |
1380126708 ps |
T671 |
/workspace/coverage/default/15.spi_device_alert_test.738486497 |
|
|
May 05 01:56:22 PM PDT 24 |
May 05 01:56:23 PM PDT 24 |
14285908 ps |
T672 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.1438014138 |
|
|
May 05 01:57:29 PM PDT 24 |
May 05 01:57:34 PM PDT 24 |
369712954 ps |
T673 |
/workspace/coverage/default/32.spi_device_tpm_all.3812442233 |
|
|
May 05 01:57:23 PM PDT 24 |
May 05 01:57:56 PM PDT 24 |
19853335527 ps |
T232 |
/workspace/coverage/default/43.spi_device_mailbox.514735085 |
|
|
May 05 01:57:55 PM PDT 24 |
May 05 01:58:02 PM PDT 24 |
240247166 ps |
T354 |
/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.2411352301 |
|
|
May 05 01:57:27 PM PDT 24 |
May 05 01:58:16 PM PDT 24 |
16246666858 ps |
T674 |
/workspace/coverage/default/0.spi_device_tpm_rw.3968445910 |
|
|
May 05 01:55:37 PM PDT 24 |
May 05 01:55:39 PM PDT 24 |
79118025 ps |
T675 |
/workspace/coverage/default/20.spi_device_upload.3690412637 |
|
|
May 05 01:56:50 PM PDT 24 |
May 05 01:57:22 PM PDT 24 |
9330165595 ps |
T676 |
/workspace/coverage/default/39.spi_device_tpm_all.4024215523 |
|
|
May 05 01:57:37 PM PDT 24 |
May 05 01:58:03 PM PDT 24 |
12402326025 ps |
T677 |
/workspace/coverage/default/40.spi_device_tpm_rw.664653134 |
|
|
May 05 01:57:42 PM PDT 24 |
May 05 01:57:47 PM PDT 24 |
1837545960 ps |
T678 |
/workspace/coverage/default/24.spi_device_tpm_sts_read.2432188707 |
|
|
May 05 01:56:48 PM PDT 24 |
May 05 01:56:50 PM PDT 24 |
98469226 ps |
T679 |
/workspace/coverage/default/25.spi_device_alert_test.3854443862 |
|
|
May 05 01:56:53 PM PDT 24 |
May 05 01:56:54 PM PDT 24 |
75449022 ps |
T680 |
/workspace/coverage/default/37.spi_device_csb_read.1175914037 |
|
|
May 05 01:57:33 PM PDT 24 |
May 05 01:57:34 PM PDT 24 |
51793378 ps |
T304 |
/workspace/coverage/default/25.spi_device_flash_mode.1623820981 |
|
|
May 05 01:56:54 PM PDT 24 |
May 05 01:57:25 PM PDT 24 |
6721448115 ps |
T335 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.2578139332 |
|
|
May 05 01:57:08 PM PDT 24 |
May 05 01:57:14 PM PDT 24 |
356399091 ps |
T681 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.1406500455 |
|
|
May 05 01:56:04 PM PDT 24 |
May 05 01:56:06 PM PDT 24 |
215605574 ps |
T682 |
/workspace/coverage/default/3.spi_device_tpm_all.2257994897 |
|
|
May 05 01:55:48 PM PDT 24 |
May 05 01:56:19 PM PDT 24 |
17863850324 ps |
T118 |
/workspace/coverage/default/4.spi_device_intercept.2421876094 |
|
|
May 05 01:55:57 PM PDT 24 |
May 05 01:56:09 PM PDT 24 |
613881501 ps |
T683 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.3520586930 |
|
|
May 05 01:56:57 PM PDT 24 |
May 05 01:57:24 PM PDT 24 |
34017135205 ps |
T684 |
/workspace/coverage/default/2.spi_device_mailbox.1553077469 |
|
|
May 05 01:55:52 PM PDT 24 |
May 05 01:56:07 PM PDT 24 |
3459871582 ps |
T685 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.3613130798 |
|
|
May 05 01:57:39 PM PDT 24 |
May 05 01:57:45 PM PDT 24 |
260748708 ps |
T686 |
/workspace/coverage/default/38.spi_device_stress_all.2350857433 |
|
|
May 05 01:57:37 PM PDT 24 |
May 05 01:57:39 PM PDT 24 |
186488761 ps |
T325 |
/workspace/coverage/default/20.spi_device_mailbox.1143821530 |
|
|
May 05 01:56:36 PM PDT 24 |
May 05 01:57:10 PM PDT 24 |
5774809541 ps |
T687 |
/workspace/coverage/default/47.spi_device_tpm_sts_read.190290234 |
|
|
May 05 01:58:11 PM PDT 24 |
May 05 01:58:12 PM PDT 24 |
40374777 ps |
T688 |
/workspace/coverage/default/46.spi_device_csb_read.3405424778 |
|
|
May 05 01:58:12 PM PDT 24 |
May 05 01:58:13 PM PDT 24 |
34269718 ps |
T689 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.377753660 |
|
|
May 05 01:56:48 PM PDT 24 |
May 05 01:56:55 PM PDT 24 |
3980891994 ps |
T290 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.3150003344 |
|
|
May 05 01:56:46 PM PDT 24 |
May 05 01:56:55 PM PDT 24 |
4814673526 ps |
T50 |
/workspace/coverage/default/4.spi_device_sec_cm.1644471229 |
|
|
May 05 01:55:53 PM PDT 24 |
May 05 01:55:55 PM PDT 24 |
132235084 ps |
T690 |
/workspace/coverage/default/26.spi_device_alert_test.1438697932 |
|
|
May 05 01:57:00 PM PDT 24 |
May 05 01:57:01 PM PDT 24 |
14558561 ps |
T691 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.1382862235 |
|
|
May 05 01:57:17 PM PDT 24 |
May 05 01:57:20 PM PDT 24 |
462662418 ps |
T348 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.3994314870 |
|
|
May 05 01:56:36 PM PDT 24 |
May 05 01:56:51 PM PDT 24 |
14948021041 ps |
T692 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.2265986399 |
|
|
May 05 01:56:50 PM PDT 24 |
May 05 01:56:57 PM PDT 24 |
2789624342 ps |
T693 |
/workspace/coverage/default/46.spi_device_read_buffer_direct.3105515677 |
|
|
May 05 01:58:12 PM PDT 24 |
May 05 01:58:22 PM PDT 24 |
944447461 ps |
T694 |
/workspace/coverage/default/42.spi_device_mailbox.4152515504 |
|
|
May 05 01:57:52 PM PDT 24 |
May 05 01:59:11 PM PDT 24 |
81593956487 ps |
T695 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.4196079308 |
|
|
May 05 01:57:27 PM PDT 24 |
May 05 01:57:33 PM PDT 24 |
4852399390 ps |
T696 |
/workspace/coverage/default/16.spi_device_csb_read.2852808523 |
|
|
May 05 01:56:31 PM PDT 24 |
May 05 01:56:32 PM PDT 24 |
33658588 ps |
T697 |
/workspace/coverage/default/3.spi_device_read_buffer_direct.1592190101 |
|
|
May 05 01:55:55 PM PDT 24 |
May 05 01:56:09 PM PDT 24 |
4355815926 ps |
T275 |
/workspace/coverage/default/44.spi_device_mailbox.1175729241 |
|
|
May 05 01:58:01 PM PDT 24 |
May 05 01:58:04 PM PDT 24 |
733522500 ps |
T317 |
/workspace/coverage/default/3.spi_device_upload.4219649126 |
|
|
May 05 01:55:47 PM PDT 24 |
May 05 01:55:51 PM PDT 24 |
946264471 ps |
T698 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.3031783185 |
|
|
May 05 01:56:41 PM PDT 24 |
May 05 01:56:45 PM PDT 24 |
136561414 ps |
T267 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.2607765093 |
|
|
May 05 01:55:56 PM PDT 24 |
May 05 01:56:04 PM PDT 24 |
887636348 ps |
T258 |
/workspace/coverage/default/48.spi_device_mailbox.1656871203 |
|
|
May 05 01:58:16 PM PDT 24 |
May 05 02:01:28 PM PDT 24 |
131547231208 ps |
T219 |
/workspace/coverage/default/26.spi_device_upload.342707064 |
|
|
May 05 01:56:54 PM PDT 24 |
May 05 01:57:13 PM PDT 24 |
21741982560 ps |
T699 |
/workspace/coverage/default/4.spi_device_tpm_all.2048883216 |
|
|
May 05 01:55:59 PM PDT 24 |
May 05 01:56:09 PM PDT 24 |
921260173 ps |
T700 |
/workspace/coverage/default/49.spi_device_cfg_cmd.2794117252 |
|
|
May 05 01:58:21 PM PDT 24 |
May 05 01:58:54 PM PDT 24 |
7739071913 ps |
T701 |
/workspace/coverage/default/8.spi_device_tpm_rw.2357739128 |
|
|
May 05 01:56:00 PM PDT 24 |
May 05 01:56:03 PM PDT 24 |
51771261 ps |
T333 |
/workspace/coverage/default/39.spi_device_intercept.2422689942 |
|
|
May 05 01:57:41 PM PDT 24 |
May 05 01:57:49 PM PDT 24 |
507773306 ps |
T702 |
/workspace/coverage/default/39.spi_device_tpm_read_hw_reg.2191345892 |
|
|
May 05 01:57:37 PM PDT 24 |
May 05 01:57:58 PM PDT 24 |
73463064669 ps |
T196 |
/workspace/coverage/default/19.spi_device_mailbox.2818261374 |
|
|
May 05 01:56:47 PM PDT 24 |
May 05 01:57:08 PM PDT 24 |
4679487678 ps |
T703 |
/workspace/coverage/default/17.spi_device_tpm_all.1378617301 |
|
|
May 05 01:56:31 PM PDT 24 |
May 05 01:57:04 PM PDT 24 |
4883086299 ps |
T704 |
/workspace/coverage/default/7.spi_device_alert_test.2278992911 |
|
|
May 05 01:55:59 PM PDT 24 |
May 05 01:56:00 PM PDT 24 |
49994143 ps |
T705 |
/workspace/coverage/default/2.spi_device_flash_mode.1400397869 |
|
|
May 05 01:55:51 PM PDT 24 |
May 05 01:58:15 PM PDT 24 |
18708134257 ps |
T706 |
/workspace/coverage/default/46.spi_device_flash_mode.89196722 |
|
|
May 05 01:58:10 PM PDT 24 |
May 05 01:58:29 PM PDT 24 |
2848168670 ps |
T707 |
/workspace/coverage/default/45.spi_device_upload.2664167717 |
|
|
May 05 01:58:08 PM PDT 24 |
May 05 01:58:16 PM PDT 24 |
869745918 ps |
T708 |
/workspace/coverage/default/7.spi_device_tpm_rw.3008691538 |
|
|
May 05 01:56:02 PM PDT 24 |
May 05 01:56:05 PM PDT 24 |
62800029 ps |
T222 |
/workspace/coverage/default/4.spi_device_cfg_cmd.2838204941 |
|
|
May 05 01:56:11 PM PDT 24 |
May 05 01:56:17 PM PDT 24 |
1057147145 ps |
T709 |
/workspace/coverage/default/30.spi_device_flash_mode.188699449 |
|
|
May 05 01:57:10 PM PDT 24 |
May 05 01:57:40 PM PDT 24 |
7740192303 ps |
T710 |
/workspace/coverage/default/16.spi_device_tpm_all.1048601274 |
|
|
May 05 01:56:30 PM PDT 24 |
May 05 01:56:55 PM PDT 24 |
4687281931 ps |
T711 |
/workspace/coverage/default/32.spi_device_tpm_sts_read.2982874298 |
|
|
May 05 01:57:19 PM PDT 24 |
May 05 01:57:21 PM PDT 24 |
114741688 ps |
T361 |
/workspace/coverage/default/28.spi_device_intercept.3741545117 |
|
|
May 05 01:57:02 PM PDT 24 |
May 05 01:57:24 PM PDT 24 |
2193830610 ps |
T276 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.2920518155 |
|
|
May 05 01:56:36 PM PDT 24 |
May 05 01:56:41 PM PDT 24 |
366667725 ps |
T314 |
/workspace/coverage/default/20.spi_device_pass_cmd_filtering.4215775163 |
|
|
May 05 01:56:45 PM PDT 24 |
May 05 01:56:55 PM PDT 24 |
5764253018 ps |
T712 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.720247886 |
|
|
May 05 01:57:22 PM PDT 24 |
May 05 01:57:42 PM PDT 24 |
4903363739 ps |
T269 |
/workspace/coverage/default/33.spi_device_pass_addr_payload_swap.3682715330 |
|
|
May 05 01:57:24 PM PDT 24 |
May 05 01:57:34 PM PDT 24 |
5292910791 ps |
T713 |
/workspace/coverage/default/16.spi_device_pass_cmd_filtering.2059572287 |
|
|
May 05 01:56:33 PM PDT 24 |
May 05 01:56:36 PM PDT 24 |
402821566 ps |
T714 |
/workspace/coverage/default/38.spi_device_tpm_rw.1651531731 |
|
|
May 05 01:57:38 PM PDT 24 |
May 05 01:57:41 PM PDT 24 |
165610808 ps |
T715 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.1354031789 |
|
|
May 05 01:58:02 PM PDT 24 |
May 05 01:58:08 PM PDT 24 |
3782414601 ps |
T292 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.4170796259 |
|
|
May 05 01:56:50 PM PDT 24 |
May 05 01:57:13 PM PDT 24 |
7210126567 ps |
T716 |
/workspace/coverage/default/0.spi_device_csb_read.844953530 |
|
|
May 05 01:55:52 PM PDT 24 |
May 05 01:55:54 PM PDT 24 |
44925459 ps |
T260 |
/workspace/coverage/default/23.spi_device_intercept.2294135654 |
|
|
May 05 01:56:47 PM PDT 24 |
May 05 01:57:03 PM PDT 24 |
1556915351 ps |
T326 |
/workspace/coverage/default/40.spi_device_pass_cmd_filtering.923252832 |
|
|
May 05 01:57:42 PM PDT 24 |
May 05 01:57:47 PM PDT 24 |
2571791385 ps |
T350 |
/workspace/coverage/default/10.spi_device_pass_addr_payload_swap.357201757 |
|
|
May 05 01:55:59 PM PDT 24 |
May 05 01:56:03 PM PDT 24 |
1691833928 ps |
T366 |
/workspace/coverage/default/26.spi_device_flash_mode.1342647853 |
|
|
May 05 01:56:52 PM PDT 24 |
May 05 01:57:52 PM PDT 24 |
8415281041 ps |
T717 |
/workspace/coverage/default/49.spi_device_alert_test.536358994 |
|
|
May 05 01:58:21 PM PDT 24 |
May 05 01:58:22 PM PDT 24 |
24021821 ps |
T346 |
/workspace/coverage/default/27.spi_device_intercept.3433004057 |
|
|
May 05 01:56:56 PM PDT 24 |
May 05 01:57:05 PM PDT 24 |
2505680498 ps |
T718 |
/workspace/coverage/default/34.spi_device_tpm_read_hw_reg.1512809666 |
|
|
May 05 01:57:23 PM PDT 24 |
May 05 01:57:27 PM PDT 24 |
3445528387 ps |
T719 |
/workspace/coverage/default/28.spi_device_tpm_sts_read.3912971922 |
|
|
May 05 01:56:59 PM PDT 24 |
May 05 01:57:00 PM PDT 24 |
133232678 ps |
T197 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.2290752831 |
|
|
May 05 01:57:18 PM PDT 24 |
May 05 01:57:41 PM PDT 24 |
21143583480 ps |
T351 |
/workspace/coverage/default/6.spi_device_pass_addr_payload_swap.2373487134 |
|
|
May 05 01:56:02 PM PDT 24 |
May 05 01:56:05 PM PDT 24 |
2194710998 ps |
T313 |
/workspace/coverage/default/15.spi_device_cfg_cmd.3179663702 |
|
|
May 05 01:56:18 PM PDT 24 |
May 05 01:56:35 PM PDT 24 |
1584520583 ps |
T230 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.1518753592 |
|
|
May 05 01:56:07 PM PDT 24 |
May 05 01:56:15 PM PDT 24 |
1229338024 ps |
T720 |
/workspace/coverage/default/20.spi_device_read_buffer_direct.1291752726 |
|
|
May 05 01:56:47 PM PDT 24 |
May 05 01:56:51 PM PDT 24 |
507542134 ps |
T355 |
/workspace/coverage/default/8.spi_device_pass_addr_payload_swap.4010144561 |
|
|
May 05 01:56:14 PM PDT 24 |
May 05 01:56:26 PM PDT 24 |
5254363967 ps |
T721 |
/workspace/coverage/default/9.spi_device_csb_read.379318375 |
|
|
May 05 01:56:03 PM PDT 24 |
May 05 01:56:05 PM PDT 24 |
22992361 ps |
T359 |
/workspace/coverage/default/24.spi_device_mailbox.3282057606 |
|
|
May 05 01:56:44 PM PDT 24 |
May 05 01:56:52 PM PDT 24 |
627552745 ps |
T722 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.4137489619 |
|
|
May 05 01:56:07 PM PDT 24 |
May 05 01:56:25 PM PDT 24 |
1460130121 ps |
T723 |
/workspace/coverage/default/39.spi_device_alert_test.3126911809 |
|
|
May 05 01:57:41 PM PDT 24 |
May 05 01:57:42 PM PDT 24 |
43334156 ps |
T724 |
/workspace/coverage/default/30.spi_device_read_buffer_direct.1915795526 |
|
|
May 05 01:57:12 PM PDT 24 |
May 05 01:57:26 PM PDT 24 |
16775675067 ps |
T315 |
/workspace/coverage/default/34.spi_device_intercept.316598770 |
|
|
May 05 01:57:27 PM PDT 24 |
May 05 01:57:30 PM PDT 24 |
187568543 ps |
T278 |
/workspace/coverage/default/3.spi_device_mailbox.2698419170 |
|
|
May 05 01:55:55 PM PDT 24 |
May 05 01:56:09 PM PDT 24 |
990340756 ps |
T167 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.1446386291 |
|
|
May 05 01:41:04 PM PDT 24 |
May 05 01:41:06 PM PDT 24 |
46144334 ps |
T39 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.86532662 |
|
|
May 05 01:40:54 PM PDT 24 |
May 05 01:40:57 PM PDT 24 |
555530996 ps |
T40 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3702016980 |
|
|
May 05 01:41:21 PM PDT 24 |
May 05 01:41:25 PM PDT 24 |
520093560 ps |
T41 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.3650589514 |
|
|
May 05 01:40:46 PM PDT 24 |
May 05 01:40:51 PM PDT 24 |
154007688 ps |
T725 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.1800041159 |
|
|
May 05 01:41:15 PM PDT 24 |
May 05 01:41:16 PM PDT 24 |
28121143 ps |
T36 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.453264952 |
|
|
May 05 01:41:01 PM PDT 24 |
May 05 01:41:03 PM PDT 24 |
65205963 ps |
T37 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.396445571 |
|
|
May 05 01:41:07 PM PDT 24 |
May 05 01:41:28 PM PDT 24 |
3210016490 ps |
T168 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.2308288724 |
|
|
May 05 01:41:26 PM PDT 24 |
May 05 01:41:27 PM PDT 24 |
13754980 ps |
T38 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.15712486 |
|
|
May 05 01:40:56 PM PDT 24 |
May 05 01:40:59 PM PDT 24 |
412129255 ps |
T114 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1066735199 |
|
|
May 05 01:41:14 PM PDT 24 |
May 05 01:41:16 PM PDT 24 |
74025258 ps |
T726 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.2707805545 |
|
|
May 05 01:41:25 PM PDT 24 |
May 05 01:41:26 PM PDT 24 |
19017780 ps |
T157 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.1094168759 |
|
|
May 05 01:41:21 PM PDT 24 |
May 05 01:41:23 PM PDT 24 |
56808003 ps |
T121 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.3818348393 |
|
|
May 05 01:41:16 PM PDT 24 |
May 05 01:41:20 PM PDT 24 |
68136858 ps |
T115 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3357338828 |
|
|
May 05 01:41:05 PM PDT 24 |
May 05 01:41:08 PM PDT 24 |
166064484 ps |
T158 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.541951439 |
|
|
May 05 01:40:59 PM PDT 24 |
May 05 01:41:01 PM PDT 24 |
152520974 ps |
T119 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.215695188 |
|
|
May 05 01:40:48 PM PDT 24 |
May 05 01:41:07 PM PDT 24 |
302285189 ps |
T140 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.2032206783 |
|
|
May 05 01:40:56 PM PDT 24 |
May 05 01:41:00 PM PDT 24 |
663910257 ps |
T169 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.1675043360 |
|
|
May 05 01:40:59 PM PDT 24 |
May 05 01:41:00 PM PDT 24 |
60241445 ps |
T170 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.3795497418 |
|
|
May 05 01:41:15 PM PDT 24 |
May 05 01:41:16 PM PDT 24 |
18043836 ps |
T144 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.2493631803 |
|
|
May 05 01:40:56 PM PDT 24 |
May 05 01:40:58 PM PDT 24 |
77292429 ps |
T145 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.688596900 |
|
|
May 05 01:40:48 PM PDT 24 |
May 05 01:41:09 PM PDT 24 |
1295605101 ps |
T163 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.1571567792 |
|
|
May 05 01:40:55 PM PDT 24 |
May 05 01:41:12 PM PDT 24 |
872604644 ps |
T146 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.103226454 |
|
|
May 05 01:40:52 PM PDT 24 |
May 05 01:40:55 PM PDT 24 |
67694089 ps |
T131 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.444025581 |
|
|
May 05 01:41:07 PM PDT 24 |
May 05 01:41:09 PM PDT 24 |
52304191 ps |
T120 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.526457693 |
|
|
May 05 01:41:02 PM PDT 24 |
May 05 01:41:08 PM PDT 24 |
113642393 ps |
T727 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.1324715328 |
|
|
May 05 01:41:20 PM PDT 24 |
May 05 01:41:22 PM PDT 24 |
138550682 ps |
T147 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.1723705798 |
|
|
May 05 01:40:46 PM PDT 24 |
May 05 01:41:09 PM PDT 24 |
371187582 ps |
T141 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1890348900 |
|
|
May 05 01:40:45 PM PDT 24 |
May 05 01:40:57 PM PDT 24 |
417495923 ps |
T728 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.172960823 |
|
|
May 05 01:40:52 PM PDT 24 |
May 05 01:40:54 PM PDT 24 |
14981291 ps |
T148 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.2918953797 |
|
|
May 05 01:40:49 PM PDT 24 |
May 05 01:40:50 PM PDT 24 |
383851381 ps |
T729 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.2824106493 |
|
|
May 05 01:41:26 PM PDT 24 |
May 05 01:41:28 PM PDT 24 |
46779994 ps |
T149 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.557760483 |
|
|
May 05 01:40:58 PM PDT 24 |
May 05 01:41:00 PM PDT 24 |
51372742 ps |
T142 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.558263018 |
|
|
May 05 01:41:10 PM PDT 24 |
May 05 01:41:24 PM PDT 24 |
2254803515 ps |
T159 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2175217393 |
|
|
May 05 01:41:11 PM PDT 24 |
May 05 01:41:14 PM PDT 24 |
48385862 ps |
T127 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3825522903 |
|
|
May 05 01:41:08 PM PDT 24 |
May 05 01:41:12 PM PDT 24 |
54835282 ps |
T160 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.3548821051 |
|
|
May 05 01:41:07 PM PDT 24 |
May 05 01:41:10 PM PDT 24 |
143089490 ps |
T138 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2958363491 |
|
|
May 05 01:40:47 PM PDT 24 |
May 05 01:40:49 PM PDT 24 |
57594091 ps |
T730 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.76892167 |
|
|
May 05 01:41:18 PM PDT 24 |
May 05 01:41:20 PM PDT 24 |
50455834 ps |
T150 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.533422162 |
|
|
May 05 01:40:52 PM PDT 24 |
May 05 01:41:08 PM PDT 24 |
607904716 ps |
T731 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.1264946298 |
|
|
May 05 01:41:25 PM PDT 24 |
May 05 01:41:26 PM PDT 24 |
14171646 ps |
T151 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3557509595 |
|
|
May 05 01:40:49 PM PDT 24 |
May 05 01:40:51 PM PDT 24 |
575616329 ps |
T732 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.3314096083 |
|
|
May 05 01:41:18 PM PDT 24 |
May 05 01:41:19 PM PDT 24 |
15788897 ps |
T92 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.4043289111 |
|
|
May 05 01:40:57 PM PDT 24 |
May 05 01:40:58 PM PDT 24 |
50341992 ps |
T164 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.1872159336 |
|
|
May 05 01:41:14 PM PDT 24 |
May 05 01:41:18 PM PDT 24 |
140949852 ps |
T379 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.457272882 |
|
|
May 05 01:41:03 PM PDT 24 |
May 05 01:41:23 PM PDT 24 |
624570714 ps |
T375 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.2619041361 |
|
|
May 05 01:41:15 PM PDT 24 |
May 05 01:41:34 PM PDT 24 |
303781641 ps |
T733 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.1898558497 |
|
|
May 05 01:41:20 PM PDT 24 |
May 05 01:41:23 PM PDT 24 |
150953337 ps |
T152 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1564804497 |
|
|
May 05 01:41:01 PM PDT 24 |
May 05 01:41:03 PM PDT 24 |
72633039 ps |
T734 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2826440867 |
|
|
May 05 01:40:58 PM PDT 24 |
May 05 01:41:07 PM PDT 24 |
258751755 ps |
T137 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.1757044531 |
|
|
May 05 01:40:58 PM PDT 24 |
May 05 01:41:01 PM PDT 24 |
363763978 ps |
T735 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.407142242 |
|
|
May 05 01:41:00 PM PDT 24 |
May 05 01:41:02 PM PDT 24 |
245736469 ps |
T129 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.4262878660 |
|
|
May 05 01:41:05 PM PDT 24 |
May 05 01:41:10 PM PDT 24 |
261018199 ps |
T736 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.698131641 |
|
|
May 05 01:41:02 PM PDT 24 |
May 05 01:41:04 PM PDT 24 |
104596226 ps |
T737 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.2340638866 |
|
|
May 05 01:41:00 PM PDT 24 |
May 05 01:41:07 PM PDT 24 |
472773770 ps |
T738 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.984395039 |
|
|
May 05 01:41:04 PM PDT 24 |
May 05 01:41:08 PM PDT 24 |
208405449 ps |
T739 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1598124898 |
|
|
May 05 01:40:51 PM PDT 24 |
May 05 01:40:53 PM PDT 24 |
115538512 ps |
T153 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1126472729 |
|
|
May 05 01:41:15 PM PDT 24 |
May 05 01:41:17 PM PDT 24 |
60117553 ps |
T740 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.1478803397 |
|
|
May 05 01:41:19 PM PDT 24 |
May 05 01:41:21 PM PDT 24 |
13783109 ps |
T165 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3102213143 |
|
|
May 05 01:41:13 PM PDT 24 |
May 05 01:41:15 PM PDT 24 |
86535757 ps |
T154 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.740392700 |
|
|
May 05 01:41:07 PM PDT 24 |
May 05 01:41:10 PM PDT 24 |
384574854 ps |
T741 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.162902421 |
|
|
May 05 01:40:48 PM PDT 24 |
May 05 01:40:50 PM PDT 24 |
13161196 ps |
T155 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.569490010 |
|
|
May 05 01:40:46 PM PDT 24 |
May 05 01:40:48 PM PDT 24 |
44835606 ps |
T139 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.1591974984 |
|
|
May 05 01:41:13 PM PDT 24 |
May 05 01:41:16 PM PDT 24 |
128820523 ps |
T742 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.3404600377 |
|
|
May 05 01:41:15 PM PDT 24 |
May 05 01:41:17 PM PDT 24 |
10533872 ps |
T179 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.445966751 |
|
|
May 05 01:40:52 PM PDT 24 |
May 05 01:41:01 PM PDT 24 |
1529155687 ps |
T743 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.1472810890 |
|
|
May 05 01:41:17 PM PDT 24 |
May 05 01:41:19 PM PDT 24 |
28156074 ps |
T744 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.1241009606 |
|
|
May 05 01:41:00 PM PDT 24 |
May 05 01:41:03 PM PDT 24 |
41043241 ps |
T745 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.580123229 |
|
|
May 05 01:40:49 PM PDT 24 |
May 05 01:40:53 PM PDT 24 |
204751708 ps |
T93 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.1060025193 |
|
|
May 05 01:40:47 PM PDT 24 |
May 05 01:40:49 PM PDT 24 |
59194887 ps |
T376 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1255865572 |
|
|
May 05 01:41:16 PM PDT 24 |
May 05 01:41:31 PM PDT 24 |
1300074735 ps |
T133 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.1048837637 |
|
|
May 05 01:41:14 PM PDT 24 |
May 05 01:41:15 PM PDT 24 |
85040520 ps |
T746 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.3320896312 |
|
|
May 05 01:41:15 PM PDT 24 |
May 05 01:41:39 PM PDT 24 |
12082946225 ps |
T747 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.3807966889 |
|
|
May 05 01:40:52 PM PDT 24 |
May 05 01:40:53 PM PDT 24 |
10216068 ps |
T748 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.1639011355 |
|
|
May 05 01:41:15 PM PDT 24 |
May 05 01:41:17 PM PDT 24 |
19596907 ps |
T749 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.919133952 |
|
|
May 05 01:40:47 PM PDT 24 |
May 05 01:40:59 PM PDT 24 |
220614840 ps |
T750 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.2423761222 |
|
|
May 05 01:40:46 PM PDT 24 |
May 05 01:40:48 PM PDT 24 |
336089964 ps |
T377 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1807752428 |
|
|
May 05 01:41:11 PM PDT 24 |
May 05 01:41:20 PM PDT 24 |
377159300 ps |
T751 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.829581308 |
|
|
May 05 01:41:01 PM PDT 24 |
May 05 01:41:02 PM PDT 24 |
51062968 ps |
T752 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.431339200 |
|
|
May 05 01:41:11 PM PDT 24 |
May 05 01:41:12 PM PDT 24 |
65015471 ps |
T125 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.1588395077 |
|
|
May 05 01:41:05 PM PDT 24 |
May 05 01:41:08 PM PDT 24 |
197818500 ps |
T753 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.1820129001 |
|
|
May 05 01:41:19 PM PDT 24 |
May 05 01:41:20 PM PDT 24 |
50646523 ps |
T754 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3910570490 |
|
|
May 05 01:41:17 PM PDT 24 |
May 05 01:41:19 PM PDT 24 |
58233299 ps |
T755 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.3951950895 |
|
|
May 05 01:41:28 PM PDT 24 |
May 05 01:41:29 PM PDT 24 |
38359313 ps |
T756 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3868777252 |
|
|
May 05 01:40:59 PM PDT 24 |
May 05 01:41:00 PM PDT 24 |
14129563 ps |
T378 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.3916877009 |
|
|
May 05 01:40:55 PM PDT 24 |
May 05 01:41:14 PM PDT 24 |
336004233 ps |
T156 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1756753375 |
|
|
May 05 01:41:04 PM PDT 24 |
May 05 01:41:06 PM PDT 24 |
175194680 ps |
T380 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2924950012 |
|
|
May 05 01:40:48 PM PDT 24 |
May 05 01:41:04 PM PDT 24 |
2236305751 ps |
T757 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.931621937 |
|
|
May 05 01:40:59 PM PDT 24 |
May 05 01:41:04 PM PDT 24 |
158259995 ps |
T758 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.962226939 |
|
|
May 05 01:41:14 PM PDT 24 |
May 05 01:41:17 PM PDT 24 |
1204858640 ps |
T759 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.253381581 |
|
|
May 05 01:41:00 PM PDT 24 |
May 05 01:41:02 PM PDT 24 |
14404005 ps |
T760 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.4006764178 |
|
|
May 05 01:41:21 PM PDT 24 |
May 05 01:41:22 PM PDT 24 |
13073539 ps |