T822 |
/workspace/coverage/default/48.spi_device_mailbox.3965872980 |
|
|
May 19 12:53:05 PM PDT 24 |
May 19 12:54:34 PM PDT 24 |
40094457881 ps |
T823 |
/workspace/coverage/default/0.spi_device_csb_read.675635093 |
|
|
May 19 12:51:12 PM PDT 24 |
May 19 12:51:15 PM PDT 24 |
57283933 ps |
T824 |
/workspace/coverage/default/6.spi_device_pass_addr_payload_swap.361754929 |
|
|
May 19 12:51:29 PM PDT 24 |
May 19 12:51:39 PM PDT 24 |
1539068410 ps |
T825 |
/workspace/coverage/default/2.spi_device_tpm_rw.448772903 |
|
|
May 19 12:51:16 PM PDT 24 |
May 19 12:51:25 PM PDT 24 |
97417688 ps |
T826 |
/workspace/coverage/default/29.spi_device_intercept.1641358858 |
|
|
May 19 12:52:15 PM PDT 24 |
May 19 12:52:27 PM PDT 24 |
1045883130 ps |
T827 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.3416587922 |
|
|
May 19 12:51:25 PM PDT 24 |
May 19 12:51:41 PM PDT 24 |
2287629829 ps |
T828 |
/workspace/coverage/default/34.spi_device_upload.2603482747 |
|
|
May 19 12:52:23 PM PDT 24 |
May 19 12:52:43 PM PDT 24 |
42965446908 ps |
T829 |
/workspace/coverage/default/32.spi_device_cfg_cmd.804381944 |
|
|
May 19 12:52:19 PM PDT 24 |
May 19 12:52:32 PM PDT 24 |
5565488212 ps |
T830 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.3335476760 |
|
|
May 19 12:52:12 PM PDT 24 |
May 19 12:52:18 PM PDT 24 |
76257599 ps |
T831 |
/workspace/coverage/default/16.spi_device_flash_all.4069468374 |
|
|
May 19 12:51:53 PM PDT 24 |
May 19 12:55:03 PM PDT 24 |
111243848857 ps |
T832 |
/workspace/coverage/default/27.spi_device_tpm_rw.825575879 |
|
|
May 19 12:52:19 PM PDT 24 |
May 19 12:52:34 PM PDT 24 |
948812271 ps |
T833 |
/workspace/coverage/default/7.spi_device_tpm_read_hw_reg.518691063 |
|
|
May 19 12:51:24 PM PDT 24 |
May 19 12:51:36 PM PDT 24 |
5343490135 ps |
T834 |
/workspace/coverage/default/1.spi_device_flash_mode.56064690 |
|
|
May 19 12:51:17 PM PDT 24 |
May 19 12:51:39 PM PDT 24 |
1697232401 ps |
T835 |
/workspace/coverage/default/19.spi_device_upload.380259595 |
|
|
May 19 12:51:52 PM PDT 24 |
May 19 12:51:57 PM PDT 24 |
330700784 ps |
T836 |
/workspace/coverage/default/16.spi_device_upload.4083873708 |
|
|
May 19 12:51:53 PM PDT 24 |
May 19 12:52:05 PM PDT 24 |
10779474551 ps |
T269 |
/workspace/coverage/default/31.spi_device_flash_and_tpm_min_idle.682501666 |
|
|
May 19 12:52:21 PM PDT 24 |
May 19 12:57:56 PM PDT 24 |
108311525701 ps |
T310 |
/workspace/coverage/default/22.spi_device_flash_and_tpm.2617718212 |
|
|
May 19 12:52:09 PM PDT 24 |
May 19 01:00:22 PM PDT 24 |
536651178158 ps |
T837 |
/workspace/coverage/default/20.spi_device_intercept.452445186 |
|
|
May 19 12:52:06 PM PDT 24 |
May 19 12:52:13 PM PDT 24 |
334935549 ps |
T838 |
/workspace/coverage/default/10.spi_device_flash_mode.2630165568 |
|
|
May 19 12:51:37 PM PDT 24 |
May 19 12:51:46 PM PDT 24 |
238486404 ps |
T839 |
/workspace/coverage/default/46.spi_device_flash_mode.1058981872 |
|
|
May 19 12:52:59 PM PDT 24 |
May 19 12:53:09 PM PDT 24 |
4157104820 ps |
T840 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.2344676880 |
|
|
May 19 12:52:29 PM PDT 24 |
May 19 12:52:48 PM PDT 24 |
16918315170 ps |
T841 |
/workspace/coverage/default/43.spi_device_alert_test.3882298728 |
|
|
May 19 12:52:59 PM PDT 24 |
May 19 12:53:02 PM PDT 24 |
54341867 ps |
T842 |
/workspace/coverage/default/15.spi_device_intercept.961148745 |
|
|
May 19 12:51:54 PM PDT 24 |
May 19 12:52:02 PM PDT 24 |
1339354317 ps |
T843 |
/workspace/coverage/default/23.spi_device_flash_mode.845093401 |
|
|
May 19 12:52:10 PM PDT 24 |
May 19 12:52:23 PM PDT 24 |
276451401 ps |
T844 |
/workspace/coverage/default/39.spi_device_tpm_all.480413653 |
|
|
May 19 12:52:45 PM PDT 24 |
May 19 12:53:25 PM PDT 24 |
13069874082 ps |
T845 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.2944884359 |
|
|
May 19 12:51:45 PM PDT 24 |
May 19 12:51:51 PM PDT 24 |
1431663180 ps |
T846 |
/workspace/coverage/default/0.spi_device_tpm_sts_read.2173681355 |
|
|
May 19 12:51:08 PM PDT 24 |
May 19 12:51:10 PM PDT 24 |
401970952 ps |
T847 |
/workspace/coverage/default/32.spi_device_mailbox.1549565560 |
|
|
May 19 12:52:26 PM PDT 24 |
May 19 12:52:35 PM PDT 24 |
77329349 ps |
T307 |
/workspace/coverage/default/47.spi_device_flash_and_tpm.143256766 |
|
|
May 19 12:53:06 PM PDT 24 |
May 19 12:56:06 PM PDT 24 |
50901441085 ps |
T848 |
/workspace/coverage/default/39.spi_device_read_buffer_direct.1604629324 |
|
|
May 19 12:52:50 PM PDT 24 |
May 19 12:53:03 PM PDT 24 |
930036059 ps |
T849 |
/workspace/coverage/default/24.spi_device_mailbox.1429446726 |
|
|
May 19 12:52:10 PM PDT 24 |
May 19 12:53:29 PM PDT 24 |
23933376615 ps |
T850 |
/workspace/coverage/default/43.spi_device_pass_cmd_filtering.2463459627 |
|
|
May 19 12:53:03 PM PDT 24 |
May 19 12:53:10 PM PDT 24 |
580905484 ps |
T851 |
/workspace/coverage/default/21.spi_device_tpm_rw.3759134819 |
|
|
May 19 12:52:10 PM PDT 24 |
May 19 12:52:16 PM PDT 24 |
32623199 ps |
T852 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.1907708971 |
|
|
May 19 12:52:50 PM PDT 24 |
May 19 12:52:57 PM PDT 24 |
780161948 ps |
T853 |
/workspace/coverage/default/15.spi_device_upload.4270751643 |
|
|
May 19 12:51:57 PM PDT 24 |
May 19 12:52:04 PM PDT 24 |
41676039 ps |
T854 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.2305788803 |
|
|
May 19 12:52:57 PM PDT 24 |
May 19 12:53:09 PM PDT 24 |
3739099169 ps |
T855 |
/workspace/coverage/default/4.spi_device_intercept.2103586128 |
|
|
May 19 12:51:17 PM PDT 24 |
May 19 12:51:24 PM PDT 24 |
253153620 ps |
T296 |
/workspace/coverage/default/4.spi_device_stress_all.2621844176 |
|
|
May 19 12:51:17 PM PDT 24 |
May 19 12:59:11 PM PDT 24 |
37665483003 ps |
T856 |
/workspace/coverage/default/7.spi_device_mailbox.586436129 |
|
|
May 19 12:51:50 PM PDT 24 |
May 19 12:52:40 PM PDT 24 |
28276119465 ps |
T857 |
/workspace/coverage/default/10.spi_device_pass_addr_payload_swap.2440053602 |
|
|
May 19 12:51:38 PM PDT 24 |
May 19 12:51:42 PM PDT 24 |
614345642 ps |
T858 |
/workspace/coverage/default/30.spi_device_mailbox.2258581594 |
|
|
May 19 12:52:32 PM PDT 24 |
May 19 12:52:42 PM PDT 24 |
330732057 ps |
T859 |
/workspace/coverage/default/12.spi_device_stress_all.183707220 |
|
|
May 19 12:51:55 PM PDT 24 |
May 19 12:52:00 PM PDT 24 |
54246874 ps |
T860 |
/workspace/coverage/default/10.spi_device_tpm_sts_read.560451112 |
|
|
May 19 12:51:30 PM PDT 24 |
May 19 12:51:34 PM PDT 24 |
233935447 ps |
T861 |
/workspace/coverage/default/37.spi_device_tpm_sts_read.3210018951 |
|
|
May 19 12:52:53 PM PDT 24 |
May 19 12:52:56 PM PDT 24 |
353845631 ps |
T862 |
/workspace/coverage/default/5.spi_device_tpm_rw.1181020764 |
|
|
May 19 12:51:32 PM PDT 24 |
May 19 12:51:35 PM PDT 24 |
34378788 ps |
T863 |
/workspace/coverage/default/20.spi_device_read_buffer_direct.931851491 |
|
|
May 19 12:52:01 PM PDT 24 |
May 19 12:52:15 PM PDT 24 |
817940615 ps |
T864 |
/workspace/coverage/default/12.spi_device_flash_all.3279168096 |
|
|
May 19 12:51:48 PM PDT 24 |
May 19 12:53:56 PM PDT 24 |
55061135301 ps |
T865 |
/workspace/coverage/default/3.spi_device_tpm_all.2640409398 |
|
|
May 19 12:51:17 PM PDT 24 |
May 19 12:51:53 PM PDT 24 |
7023399521 ps |
T866 |
/workspace/coverage/default/21.spi_device_pass_cmd_filtering.615714063 |
|
|
May 19 12:52:11 PM PDT 24 |
May 19 12:52:22 PM PDT 24 |
3265828241 ps |
T867 |
/workspace/coverage/default/7.spi_device_upload.697596167 |
|
|
May 19 12:51:29 PM PDT 24 |
May 19 12:51:38 PM PDT 24 |
1793876514 ps |
T287 |
/workspace/coverage/default/47.spi_device_stress_all.3105651531 |
|
|
May 19 12:53:00 PM PDT 24 |
May 19 12:53:55 PM PDT 24 |
1971669550 ps |
T868 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.346122948 |
|
|
May 19 12:52:59 PM PDT 24 |
May 19 12:53:03 PM PDT 24 |
154075773 ps |
T869 |
/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.2703695907 |
|
|
May 19 12:52:06 PM PDT 24 |
May 19 12:52:56 PM PDT 24 |
4239340572 ps |
T870 |
/workspace/coverage/default/10.spi_device_alert_test.1721994968 |
|
|
May 19 12:51:36 PM PDT 24 |
May 19 12:51:38 PM PDT 24 |
58613041 ps |
T871 |
/workspace/coverage/default/14.spi_device_flash_all.3722914521 |
|
|
May 19 12:51:45 PM PDT 24 |
May 19 12:51:48 PM PDT 24 |
38458496 ps |
T872 |
/workspace/coverage/default/33.spi_device_tpm_rw.2952836527 |
|
|
May 19 12:52:27 PM PDT 24 |
May 19 12:52:36 PM PDT 24 |
335033989 ps |
T873 |
/workspace/coverage/default/8.spi_device_cfg_cmd.2023393116 |
|
|
May 19 12:51:29 PM PDT 24 |
May 19 12:51:49 PM PDT 24 |
3060006342 ps |
T874 |
/workspace/coverage/default/8.spi_device_flash_and_tpm.3647569011 |
|
|
May 19 12:51:24 PM PDT 24 |
May 19 12:51:51 PM PDT 24 |
4365186098 ps |
T875 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.597506524 |
|
|
May 19 12:52:21 PM PDT 24 |
May 19 12:52:58 PM PDT 24 |
45437876910 ps |
T876 |
/workspace/coverage/default/4.spi_device_tpm_all.1010310836 |
|
|
May 19 12:51:16 PM PDT 24 |
May 19 12:52:01 PM PDT 24 |
10324136847 ps |
T877 |
/workspace/coverage/default/34.spi_device_cfg_cmd.4125335639 |
|
|
May 19 12:52:23 PM PDT 24 |
May 19 12:52:36 PM PDT 24 |
552019237 ps |
T878 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.302031434 |
|
|
May 19 12:52:29 PM PDT 24 |
May 19 12:52:38 PM PDT 24 |
595477623 ps |
T879 |
/workspace/coverage/default/40.spi_device_tpm_sts_read.3713873027 |
|
|
May 19 12:52:52 PM PDT 24 |
May 19 12:52:55 PM PDT 24 |
27599795 ps |
T880 |
/workspace/coverage/default/11.spi_device_mailbox.2066867659 |
|
|
May 19 12:51:41 PM PDT 24 |
May 19 12:51:54 PM PDT 24 |
4447309984 ps |
T881 |
/workspace/coverage/default/33.spi_device_pass_cmd_filtering.2137149108 |
|
|
May 19 12:52:27 PM PDT 24 |
May 19 12:52:46 PM PDT 24 |
7433013945 ps |
T882 |
/workspace/coverage/default/12.spi_device_tpm_read_hw_reg.897019329 |
|
|
May 19 12:51:37 PM PDT 24 |
May 19 12:51:57 PM PDT 24 |
6921886107 ps |
T288 |
/workspace/coverage/default/25.spi_device_flash_and_tpm.2903016414 |
|
|
May 19 12:52:17 PM PDT 24 |
May 19 01:00:53 PM PDT 24 |
729778562005 ps |
T883 |
/workspace/coverage/default/44.spi_device_tpm_all.1615327283 |
|
|
May 19 12:53:10 PM PDT 24 |
May 19 12:53:35 PM PDT 24 |
4226224808 ps |
T884 |
/workspace/coverage/default/11.spi_device_flash_mode.697961610 |
|
|
May 19 12:51:54 PM PDT 24 |
May 19 12:52:04 PM PDT 24 |
558591283 ps |
T885 |
/workspace/coverage/default/48.spi_device_tpm_rw.2737915508 |
|
|
May 19 12:53:17 PM PDT 24 |
May 19 12:53:28 PM PDT 24 |
1510241852 ps |
T886 |
/workspace/coverage/default/20.spi_device_flash_mode.1062920095 |
|
|
May 19 12:52:04 PM PDT 24 |
May 19 12:52:16 PM PDT 24 |
594734115 ps |
T887 |
/workspace/coverage/default/20.spi_device_pass_cmd_filtering.379239662 |
|
|
May 19 12:52:04 PM PDT 24 |
May 19 12:52:20 PM PDT 24 |
10709243732 ps |
T888 |
/workspace/coverage/default/44.spi_device_flash_and_tpm.3674706384 |
|
|
May 19 12:53:04 PM PDT 24 |
May 19 12:54:38 PM PDT 24 |
14855476277 ps |
T889 |
/workspace/coverage/default/27.spi_device_stress_all.4065838849 |
|
|
May 19 12:52:20 PM PDT 24 |
May 19 12:53:01 PM PDT 24 |
5789696855 ps |
T134 |
/workspace/coverage/default/20.spi_device_stress_all.3025275521 |
|
|
May 19 12:52:08 PM PDT 24 |
May 19 12:54:30 PM PDT 24 |
30391520127 ps |
T890 |
/workspace/coverage/default/41.spi_device_upload.1232140932 |
|
|
May 19 12:53:17 PM PDT 24 |
May 19 12:53:25 PM PDT 24 |
689535528 ps |
T891 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.3457306232 |
|
|
May 19 12:52:06 PM PDT 24 |
May 19 12:52:16 PM PDT 24 |
461637174 ps |
T892 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.434660880 |
|
|
May 19 12:52:11 PM PDT 24 |
May 19 12:52:19 PM PDT 24 |
168278278 ps |
T893 |
/workspace/coverage/default/45.spi_device_intercept.3077085522 |
|
|
May 19 12:52:57 PM PDT 24 |
May 19 12:53:06 PM PDT 24 |
1345236464 ps |
T295 |
/workspace/coverage/default/29.spi_device_flash_all.2379021894 |
|
|
May 19 12:52:17 PM PDT 24 |
May 19 12:55:49 PM PDT 24 |
461369524325 ps |
T894 |
/workspace/coverage/default/3.spi_device_flash_and_tpm.357783223 |
|
|
May 19 12:51:21 PM PDT 24 |
May 19 12:52:13 PM PDT 24 |
9596321872 ps |
T895 |
/workspace/coverage/default/48.spi_device_upload.1459075936 |
|
|
May 19 12:53:08 PM PDT 24 |
May 19 12:53:17 PM PDT 24 |
219988316 ps |
T896 |
/workspace/coverage/default/5.spi_device_upload.2684783038 |
|
|
May 19 12:51:25 PM PDT 24 |
May 19 12:51:40 PM PDT 24 |
2675583420 ps |
T897 |
/workspace/coverage/default/24.spi_device_csb_read.47251082 |
|
|
May 19 12:52:13 PM PDT 24 |
May 19 12:52:18 PM PDT 24 |
26966077 ps |
T898 |
/workspace/coverage/default/47.spi_device_flash_mode.1724836785 |
|
|
May 19 12:52:56 PM PDT 24 |
May 19 12:53:25 PM PDT 24 |
3271741683 ps |
T899 |
/workspace/coverage/default/31.spi_device_tpm_all.4140244389 |
|
|
May 19 12:52:17 PM PDT 24 |
May 19 12:52:38 PM PDT 24 |
2956107422 ps |
T900 |
/workspace/coverage/default/19.spi_device_csb_read.215878208 |
|
|
May 19 12:51:57 PM PDT 24 |
May 19 12:52:02 PM PDT 24 |
12728393 ps |
T901 |
/workspace/coverage/default/14.spi_device_tpm_read_hw_reg.1283386925 |
|
|
May 19 12:51:47 PM PDT 24 |
May 19 12:52:13 PM PDT 24 |
16471856860 ps |
T902 |
/workspace/coverage/default/8.spi_device_intercept.1583954657 |
|
|
May 19 12:51:29 PM PDT 24 |
May 19 12:51:49 PM PDT 24 |
1084045925 ps |
T903 |
/workspace/coverage/default/32.spi_device_alert_test.465270551 |
|
|
May 19 12:52:25 PM PDT 24 |
May 19 12:52:32 PM PDT 24 |
59275547 ps |
T904 |
/workspace/coverage/default/47.spi_device_flash_all.3574811566 |
|
|
May 19 12:53:06 PM PDT 24 |
May 19 12:53:47 PM PDT 24 |
2024194337 ps |
T905 |
/workspace/coverage/default/27.spi_device_upload.858878686 |
|
|
May 19 12:52:32 PM PDT 24 |
May 19 12:52:49 PM PDT 24 |
7264176935 ps |
T906 |
/workspace/coverage/default/49.spi_device_mailbox.1272007628 |
|
|
May 19 12:53:12 PM PDT 24 |
May 19 12:53:26 PM PDT 24 |
584750139 ps |
T907 |
/workspace/coverage/default/20.spi_device_upload.773546289 |
|
|
May 19 12:52:19 PM PDT 24 |
May 19 12:52:30 PM PDT 24 |
250327109 ps |
T908 |
/workspace/coverage/default/35.spi_device_csb_read.1426079514 |
|
|
May 19 12:52:23 PM PDT 24 |
May 19 12:52:31 PM PDT 24 |
83350858 ps |
T909 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.824337651 |
|
|
May 19 12:51:22 PM PDT 24 |
May 19 12:51:30 PM PDT 24 |
360750957 ps |
T311 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.635404698 |
|
|
May 19 12:51:40 PM PDT 24 |
May 19 12:51:48 PM PDT 24 |
1809010543 ps |
T302 |
/workspace/coverage/default/7.spi_device_flash_all.1986025200 |
|
|
May 19 12:51:28 PM PDT 24 |
May 19 12:54:32 PM PDT 24 |
83761190988 ps |
T910 |
/workspace/coverage/default/35.spi_device_tpm_rw.1045869071 |
|
|
May 19 12:52:35 PM PDT 24 |
May 19 12:52:39 PM PDT 24 |
130418311 ps |
T911 |
/workspace/coverage/default/36.spi_device_tpm_rw.1310277269 |
|
|
May 19 12:52:42 PM PDT 24 |
May 19 12:52:45 PM PDT 24 |
678419946 ps |
T289 |
/workspace/coverage/default/42.spi_device_stress_all.1836838399 |
|
|
May 19 12:53:04 PM PDT 24 |
May 19 12:59:16 PM PDT 24 |
71742339149 ps |
T306 |
/workspace/coverage/default/24.spi_device_flash_all.4054543762 |
|
|
May 19 12:52:13 PM PDT 24 |
May 19 12:56:28 PM PDT 24 |
580211292408 ps |
T912 |
/workspace/coverage/default/2.spi_device_cfg_cmd.102076856 |
|
|
May 19 12:51:18 PM PDT 24 |
May 19 12:51:27 PM PDT 24 |
132681128 ps |
T913 |
/workspace/coverage/default/27.spi_device_tpm_sts_read.1543534226 |
|
|
May 19 12:52:16 PM PDT 24 |
May 19 12:52:22 PM PDT 24 |
125375228 ps |
T914 |
/workspace/coverage/default/16.spi_device_tpm_read_hw_reg.2395194112 |
|
|
May 19 12:51:48 PM PDT 24 |
May 19 12:51:59 PM PDT 24 |
1882373723 ps |
T915 |
/workspace/coverage/default/15.spi_device_tpm_rw.2994191118 |
|
|
May 19 12:52:00 PM PDT 24 |
May 19 12:52:08 PM PDT 24 |
189168784 ps |
T916 |
/workspace/coverage/default/6.spi_device_flash_all.1429895071 |
|
|
May 19 12:51:22 PM PDT 24 |
May 19 12:53:29 PM PDT 24 |
62058233290 ps |
T304 |
/workspace/coverage/default/1.spi_device_flash_and_tpm.3811694623 |
|
|
May 19 12:51:11 PM PDT 24 |
May 19 12:57:29 PM PDT 24 |
59787500872 ps |
T917 |
/workspace/coverage/default/18.spi_device_upload.4147074078 |
|
|
May 19 12:52:03 PM PDT 24 |
May 19 12:52:20 PM PDT 24 |
5352174147 ps |
T918 |
/workspace/coverage/default/40.spi_device_tpm_all.768686926 |
|
|
May 19 12:52:54 PM PDT 24 |
May 19 12:53:16 PM PDT 24 |
2165530785 ps |
T919 |
/workspace/coverage/default/27.spi_device_tpm_read_hw_reg.2744733246 |
|
|
May 19 12:52:13 PM PDT 24 |
May 19 12:52:32 PM PDT 24 |
9835997866 ps |
T920 |
/workspace/coverage/default/41.spi_device_tpm_all.838017500 |
|
|
May 19 12:52:51 PM PDT 24 |
May 19 12:53:07 PM PDT 24 |
3963633678 ps |
T290 |
/workspace/coverage/default/17.spi_device_flash_and_tpm.269291696 |
|
|
May 19 12:52:07 PM PDT 24 |
May 19 12:59:34 PM PDT 24 |
46169107615 ps |
T921 |
/workspace/coverage/default/31.spi_device_pass_cmd_filtering.2946782457 |
|
|
May 19 12:52:19 PM PDT 24 |
May 19 12:52:34 PM PDT 24 |
1694168725 ps |
T135 |
/workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.3336945864 |
|
|
May 19 12:52:20 PM PDT 24 |
May 19 12:54:26 PM PDT 24 |
6123174177 ps |
T922 |
/workspace/coverage/default/15.spi_device_pass_cmd_filtering.533903827 |
|
|
May 19 12:51:58 PM PDT 24 |
May 19 12:52:10 PM PDT 24 |
1095509780 ps |
T923 |
/workspace/coverage/default/48.spi_device_csb_read.2005470994 |
|
|
May 19 12:53:01 PM PDT 24 |
May 19 12:53:06 PM PDT 24 |
27668230 ps |
T924 |
/workspace/coverage/default/3.spi_device_flash_mode.2748978927 |
|
|
May 19 12:51:18 PM PDT 24 |
May 19 12:51:25 PM PDT 24 |
223561593 ps |
T925 |
/workspace/coverage/default/39.spi_device_csb_read.1476682077 |
|
|
May 19 12:52:41 PM PDT 24 |
May 19 12:52:43 PM PDT 24 |
39401981 ps |
T926 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.2855429580 |
|
|
May 19 12:52:11 PM PDT 24 |
May 19 12:52:24 PM PDT 24 |
1853308013 ps |
T927 |
/workspace/coverage/default/34.spi_device_flash_and_tpm.2982210056 |
|
|
May 19 12:52:26 PM PDT 24 |
May 19 12:53:31 PM PDT 24 |
7337488797 ps |
T928 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.2561801112 |
|
|
May 19 12:52:05 PM PDT 24 |
May 19 12:52:10 PM PDT 24 |
91512916 ps |
T929 |
/workspace/coverage/default/43.spi_device_csb_read.2175417552 |
|
|
May 19 12:53:04 PM PDT 24 |
May 19 12:53:09 PM PDT 24 |
23422859 ps |
T930 |
/workspace/coverage/default/27.spi_device_csb_read.1231303873 |
|
|
May 19 12:52:23 PM PDT 24 |
May 19 12:52:30 PM PDT 24 |
17748642 ps |
T931 |
/workspace/coverage/default/38.spi_device_alert_test.1173089013 |
|
|
May 19 12:52:34 PM PDT 24 |
May 19 12:52:38 PM PDT 24 |
14665872 ps |
T932 |
/workspace/coverage/default/38.spi_device_intercept.3745969014 |
|
|
May 19 12:52:39 PM PDT 24 |
May 19 12:52:49 PM PDT 24 |
2148964149 ps |
T933 |
/workspace/coverage/default/27.spi_device_alert_test.791028978 |
|
|
May 19 12:52:20 PM PDT 24 |
May 19 12:52:27 PM PDT 24 |
20775412 ps |
T934 |
/workspace/coverage/default/43.spi_device_tpm_read_hw_reg.2303472989 |
|
|
May 19 12:53:02 PM PDT 24 |
May 19 12:53:12 PM PDT 24 |
5412342279 ps |
T935 |
/workspace/coverage/default/5.spi_device_tpm_read_hw_reg.314616135 |
|
|
May 19 12:51:20 PM PDT 24 |
May 19 12:51:28 PM PDT 24 |
2342761238 ps |
T936 |
/workspace/coverage/default/21.spi_device_cfg_cmd.2785274967 |
|
|
May 19 12:52:07 PM PDT 24 |
May 19 12:52:14 PM PDT 24 |
211119257 ps |
T937 |
/workspace/coverage/default/1.spi_device_cfg_cmd.2284711634 |
|
|
May 19 12:51:18 PM PDT 24 |
May 19 12:51:32 PM PDT 24 |
186324014 ps |
T305 |
/workspace/coverage/default/20.spi_device_flash_and_tpm.2215259520 |
|
|
May 19 12:52:06 PM PDT 24 |
May 19 12:55:49 PM PDT 24 |
93995846471 ps |
T938 |
/workspace/coverage/default/13.spi_device_tpm_rw.94655777 |
|
|
May 19 12:51:42 PM PDT 24 |
May 19 12:51:44 PM PDT 24 |
60739741 ps |
T939 |
/workspace/coverage/default/5.spi_device_mailbox.2418978655 |
|
|
May 19 12:51:22 PM PDT 24 |
May 19 12:51:36 PM PDT 24 |
1562653640 ps |
T940 |
/workspace/coverage/default/39.spi_device_cfg_cmd.1867295180 |
|
|
May 19 12:52:57 PM PDT 24 |
May 19 12:53:02 PM PDT 24 |
132277333 ps |
T64 |
/workspace/coverage/default/1.spi_device_sec_cm.4047805143 |
|
|
May 19 12:51:13 PM PDT 24 |
May 19 12:51:16 PM PDT 24 |
73670462 ps |
T941 |
/workspace/coverage/default/10.spi_device_cfg_cmd.3324307215 |
|
|
May 19 12:51:32 PM PDT 24 |
May 19 12:51:36 PM PDT 24 |
144371160 ps |
T942 |
/workspace/coverage/default/8.spi_device_upload.3567258491 |
|
|
May 19 12:51:24 PM PDT 24 |
May 19 12:51:40 PM PDT 24 |
2743047848 ps |
T943 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.2024638000 |
|
|
May 19 12:51:53 PM PDT 24 |
May 19 12:52:01 PM PDT 24 |
1006230746 ps |
T944 |
/workspace/coverage/default/46.spi_device_alert_test.1950845383 |
|
|
May 19 12:53:26 PM PDT 24 |
May 19 12:53:28 PM PDT 24 |
17188065 ps |
T945 |
/workspace/coverage/default/46.spi_device_pass_cmd_filtering.600899658 |
|
|
May 19 12:53:02 PM PDT 24 |
May 19 12:53:19 PM PDT 24 |
6872631060 ps |
T946 |
/workspace/coverage/default/10.spi_device_mailbox.3168181236 |
|
|
May 19 12:51:49 PM PDT 24 |
May 19 12:53:03 PM PDT 24 |
16044989167 ps |
T947 |
/workspace/coverage/default/45.spi_device_upload.1065426023 |
|
|
May 19 12:53:13 PM PDT 24 |
May 19 12:53:49 PM PDT 24 |
10349094489 ps |
T948 |
/workspace/coverage/default/33.spi_device_mailbox.1024477033 |
|
|
May 19 12:52:32 PM PDT 24 |
May 19 12:52:52 PM PDT 24 |
5425344993 ps |
T949 |
/workspace/coverage/default/8.spi_device_pass_addr_payload_swap.615794363 |
|
|
May 19 12:51:47 PM PDT 24 |
May 19 12:51:56 PM PDT 24 |
2333717812 ps |
T950 |
/workspace/coverage/default/36.spi_device_mailbox.195724618 |
|
|
May 19 12:52:36 PM PDT 24 |
May 19 12:52:48 PM PDT 24 |
450073702 ps |
T951 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.1326998923 |
|
|
May 19 12:52:42 PM PDT 24 |
May 19 12:52:56 PM PDT 24 |
13451334681 ps |
T952 |
/workspace/coverage/default/46.spi_device_flash_and_tpm.2140271932 |
|
|
May 19 12:53:05 PM PDT 24 |
May 19 12:54:49 PM PDT 24 |
58204598593 ps |
T953 |
/workspace/coverage/default/47.spi_device_mailbox.2462224662 |
|
|
May 19 12:53:06 PM PDT 24 |
May 19 12:53:13 PM PDT 24 |
412115048 ps |
T954 |
/workspace/coverage/default/45.spi_device_flash_mode.3968620179 |
|
|
May 19 12:53:04 PM PDT 24 |
May 19 12:53:14 PM PDT 24 |
179229889 ps |
T270 |
/workspace/coverage/default/40.spi_device_flash_all.2371669318 |
|
|
May 19 12:52:51 PM PDT 24 |
May 19 12:58:01 PM PDT 24 |
456826495453 ps |
T955 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.3999273410 |
|
|
May 19 12:52:55 PM PDT 24 |
May 19 12:52:58 PM PDT 24 |
22397581 ps |
T956 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.2703404157 |
|
|
May 19 12:52:01 PM PDT 24 |
May 19 12:52:23 PM PDT 24 |
70144249840 ps |
T957 |
/workspace/coverage/default/10.spi_device_upload.3952308376 |
|
|
May 19 12:51:38 PM PDT 24 |
May 19 12:51:55 PM PDT 24 |
31233127534 ps |
T958 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.2722149192 |
|
|
May 19 12:51:21 PM PDT 24 |
May 19 12:51:38 PM PDT 24 |
23943680415 ps |
T959 |
/workspace/coverage/default/1.spi_device_csb_read.436822635 |
|
|
May 19 12:51:12 PM PDT 24 |
May 19 12:51:15 PM PDT 24 |
12433948 ps |
T55 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.1426935418 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:50:47 PM PDT 24 |
1809261262 ps |
T960 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.2164316981 |
|
|
May 19 12:50:29 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
15343268 ps |
T961 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.3028257710 |
|
|
May 19 12:50:56 PM PDT 24 |
May 19 12:50:59 PM PDT 24 |
187327245 ps |
T56 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.3814141134 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:54 PM PDT 24 |
577184036 ps |
T136 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.3650990728 |
|
|
May 19 12:50:37 PM PDT 24 |
May 19 12:50:44 PM PDT 24 |
351148919 ps |
T111 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.3443445685 |
|
|
May 19 12:50:26 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
91592410 ps |
T137 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.2524654554 |
|
|
May 19 12:50:32 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
764392501 ps |
T57 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.424112530 |
|
|
May 19 12:50:30 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
655531669 ps |
T89 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.2032033366 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:50:44 PM PDT 24 |
143469315 ps |
T112 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.1634558090 |
|
|
May 19 12:50:27 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
27240820 ps |
T90 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3541013197 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:41 PM PDT 24 |
142699522 ps |
T91 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.2774005543 |
|
|
May 19 12:50:37 PM PDT 24 |
May 19 12:50:44 PM PDT 24 |
57871623 ps |
T94 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2583644166 |
|
|
May 19 12:50:40 PM PDT 24 |
May 19 12:50:45 PM PDT 24 |
92955957 ps |
T105 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.2453336095 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:51:02 PM PDT 24 |
4315013257 ps |
T108 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2742319844 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
743946476 ps |
T106 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.1810837562 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:50:41 PM PDT 24 |
24602511 ps |
T138 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.4145808712 |
|
|
May 19 12:50:31 PM PDT 24 |
May 19 12:50:36 PM PDT 24 |
132791834 ps |
T107 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.927765654 |
|
|
May 19 12:50:40 PM PDT 24 |
May 19 12:50:49 PM PDT 24 |
614817624 ps |
T95 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.1293456219 |
|
|
May 19 12:50:28 PM PDT 24 |
May 19 12:50:34 PM PDT 24 |
331409580 ps |
T962 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.3213286523 |
|
|
May 19 12:50:42 PM PDT 24 |
May 19 12:50:44 PM PDT 24 |
234115136 ps |
T96 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2564385331 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:43 PM PDT 24 |
416652996 ps |
T963 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.3943684078 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:50:41 PM PDT 24 |
66162345 ps |
T964 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.360025120 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:42 PM PDT 24 |
208228115 ps |
T109 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.1734021112 |
|
|
May 19 12:50:37 PM PDT 24 |
May 19 12:50:42 PM PDT 24 |
104140266 ps |
T965 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2360692909 |
|
|
May 19 12:50:29 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
51103499 ps |
T966 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.851060077 |
|
|
May 19 12:50:33 PM PDT 24 |
May 19 12:50:37 PM PDT 24 |
33539955 ps |
T113 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.1765171019 |
|
|
May 19 12:50:32 PM PDT 24 |
May 19 12:50:37 PM PDT 24 |
40145231 ps |
T99 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.3002314322 |
|
|
May 19 12:50:46 PM PDT 24 |
May 19 12:50:51 PM PDT 24 |
228544245 ps |
T967 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.1884870863 |
|
|
May 19 12:50:43 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
57989014 ps |
T968 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.1495634856 |
|
|
May 19 12:50:45 PM PDT 24 |
May 19 12:50:49 PM PDT 24 |
34734967 ps |
T97 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.413017615 |
|
|
May 19 12:50:34 PM PDT 24 |
May 19 12:50:43 PM PDT 24 |
382782177 ps |
T969 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.2024413768 |
|
|
May 19 12:50:34 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
18114075 ps |
T970 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2750602907 |
|
|
May 19 12:50:41 PM PDT 24 |
May 19 12:50:46 PM PDT 24 |
289920262 ps |
T971 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.1792689945 |
|
|
May 19 12:50:29 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
18457294 ps |
T114 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.1487959745 |
|
|
May 19 12:50:41 PM PDT 24 |
May 19 12:50:44 PM PDT 24 |
35122916 ps |
T145 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2158391481 |
|
|
May 19 12:50:24 PM PDT 24 |
May 19 12:50:28 PM PDT 24 |
211798456 ps |
T104 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2786759012 |
|
|
May 19 12:50:33 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
143678243 ps |
T100 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.3258127805 |
|
|
May 19 12:50:27 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
94285474 ps |
T972 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.794933306 |
|
|
May 19 12:50:45 PM PDT 24 |
May 19 12:50:49 PM PDT 24 |
134665377 ps |
T115 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.632196090 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:41 PM PDT 24 |
96944582 ps |
T146 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.3027717418 |
|
|
May 19 12:50:30 PM PDT 24 |
May 19 12:50:34 PM PDT 24 |
53990162 ps |
T973 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.145401910 |
|
|
May 19 12:50:33 PM PDT 24 |
May 19 12:50:38 PM PDT 24 |
27962560 ps |
T974 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.219577351 |
|
|
May 19 12:50:43 PM PDT 24 |
May 19 12:50:46 PM PDT 24 |
12404155 ps |
T975 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.3199036326 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:40 PM PDT 24 |
167002242 ps |
T976 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.2910573002 |
|
|
May 19 12:50:29 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
18662950 ps |
T147 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.541431052 |
|
|
May 19 12:50:39 PM PDT 24 |
May 19 12:50:44 PM PDT 24 |
581583957 ps |
T75 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.2333334770 |
|
|
May 19 12:50:22 PM PDT 24 |
May 19 12:50:26 PM PDT 24 |
44860201 ps |
T148 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.1401635238 |
|
|
May 19 12:50:26 PM PDT 24 |
May 19 12:50:36 PM PDT 24 |
685588749 ps |
T116 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3770632517 |
|
|
May 19 12:50:43 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
132290650 ps |
T117 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3507805123 |
|
|
May 19 12:50:40 PM PDT 24 |
May 19 12:50:45 PM PDT 24 |
395921765 ps |
T977 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3461843833 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:50:46 PM PDT 24 |
395452199 ps |
T118 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.683624886 |
|
|
May 19 12:50:44 PM PDT 24 |
May 19 12:50:47 PM PDT 24 |
27245377 ps |
T978 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.2381041854 |
|
|
May 19 12:50:40 PM PDT 24 |
May 19 12:50:46 PM PDT 24 |
988101781 ps |
T979 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.4010313359 |
|
|
May 19 12:50:45 PM PDT 24 |
May 19 12:50:49 PM PDT 24 |
27400462 ps |
T980 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.3054763409 |
|
|
May 19 12:50:47 PM PDT 24 |
May 19 12:50:51 PM PDT 24 |
43234308 ps |
T184 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.97870027 |
|
|
May 19 12:50:36 PM PDT 24 |
May 19 12:50:55 PM PDT 24 |
3643034981 ps |
T981 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2013861004 |
|
|
May 19 12:50:39 PM PDT 24 |
May 19 12:50:42 PM PDT 24 |
23094046 ps |
T982 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.3578357598 |
|
|
May 19 12:50:29 PM PDT 24 |
May 19 12:50:32 PM PDT 24 |
15876013 ps |
T185 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.1960791917 |
|
|
May 19 12:50:32 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
214076190 ps |
T983 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.145651804 |
|
|
May 19 12:50:26 PM PDT 24 |
May 19 12:50:30 PM PDT 24 |
25549273 ps |
T984 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.2029366171 |
|
|
May 19 12:50:42 PM PDT 24 |
May 19 12:50:44 PM PDT 24 |
45632934 ps |
T985 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.3127446753 |
|
|
May 19 12:50:55 PM PDT 24 |
May 19 12:50:59 PM PDT 24 |
14775695 ps |
T119 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.3324422046 |
|
|
May 19 12:50:34 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
28806571 ps |
T986 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.3863394246 |
|
|
May 19 12:50:56 PM PDT 24 |
May 19 12:51:00 PM PDT 24 |
38304349 ps |
T987 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.2892466929 |
|
|
May 19 12:50:34 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
36693275 ps |
T988 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.763018916 |
|
|
May 19 12:50:39 PM PDT 24 |
May 19 12:50:45 PM PDT 24 |
107129330 ps |
T120 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.2942375255 |
|
|
May 19 12:50:34 PM PDT 24 |
May 19 12:50:40 PM PDT 24 |
26253551 ps |
T989 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.4261329937 |
|
|
May 19 12:50:32 PM PDT 24 |
May 19 12:50:35 PM PDT 24 |
47332851 ps |
T990 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.3908503324 |
|
|
May 19 12:50:44 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
13239691 ps |
T121 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2988681652 |
|
|
May 19 12:50:30 PM PDT 24 |
May 19 12:50:35 PM PDT 24 |
70390230 ps |
T991 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.3269567493 |
|
|
May 19 12:50:28 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
583690742 ps |
T992 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.2583738964 |
|
|
May 19 12:50:46 PM PDT 24 |
May 19 12:50:51 PM PDT 24 |
58482461 ps |
T76 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.3857734705 |
|
|
May 19 12:50:34 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
51488462 ps |
T993 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.4251670997 |
|
|
May 19 12:50:26 PM PDT 24 |
May 19 12:50:30 PM PDT 24 |
53557015 ps |
T994 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.2604645025 |
|
|
May 19 12:50:39 PM PDT 24 |
May 19 12:50:42 PM PDT 24 |
66825817 ps |
T995 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.983434977 |
|
|
May 19 12:50:43 PM PDT 24 |
May 19 12:50:46 PM PDT 24 |
94036277 ps |
T996 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.2918917839 |
|
|
May 19 12:50:30 PM PDT 24 |
May 19 12:50:35 PM PDT 24 |
712355996 ps |
T997 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.3348398685 |
|
|
May 19 12:50:33 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
221344531 ps |
T998 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.207688221 |
|
|
May 19 12:50:46 PM PDT 24 |
May 19 12:50:50 PM PDT 24 |
11500512 ps |
T999 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.433012014 |
|
|
May 19 12:50:40 PM PDT 24 |
May 19 12:50:43 PM PDT 24 |
127589813 ps |
T1000 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.2706404909 |
|
|
May 19 12:50:31 PM PDT 24 |
May 19 12:50:35 PM PDT 24 |
42938081 ps |
T1001 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.2479901659 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:42 PM PDT 24 |
253846215 ps |
T1002 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2972937053 |
|
|
May 19 12:50:33 PM PDT 24 |
May 19 12:50:41 PM PDT 24 |
474411804 ps |
T1003 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3775863502 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:50:40 PM PDT 24 |
244367291 ps |
T1004 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.725935160 |
|
|
May 19 12:50:23 PM PDT 24 |
May 19 12:50:36 PM PDT 24 |
360937501 ps |
T1005 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.4252062584 |
|
|
May 19 12:50:24 PM PDT 24 |
May 19 12:50:49 PM PDT 24 |
353861553 ps |
T1006 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.1293329980 |
|
|
May 19 12:50:34 PM PDT 24 |
May 19 12:50:39 PM PDT 24 |
32130865 ps |
T98 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.2871121924 |
|
|
May 19 12:50:35 PM PDT 24 |
May 19 12:51:01 PM PDT 24 |
935080339 ps |
T77 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3890694059 |
|
|
May 19 12:50:27 PM PDT 24 |
May 19 12:50:31 PM PDT 24 |
41246071 ps |
T1007 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.4134765546 |
|
|
May 19 12:50:33 PM PDT 24 |
May 19 12:50:41 PM PDT 24 |
211852860 ps |
T1008 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.4017009929 |
|
|
May 19 12:50:40 PM PDT 24 |
May 19 12:50:43 PM PDT 24 |
12179486 ps |
T1009 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2707587836 |
|
|
May 19 12:50:31 PM PDT 24 |
May 19 12:50:48 PM PDT 24 |
206546894 ps |
T1010 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2515155039 |
|
|
May 19 12:50:48 PM PDT 24 |
May 19 12:50:51 PM PDT 24 |
35774068 ps |
T1011 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.4049280386 |
|
|
May 19 12:50:32 PM PDT 24 |
May 19 12:50:37 PM PDT 24 |
691637624 ps |