Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
3632 |
0 |
0 |
T69 |
5373 |
12 |
0 |
0 |
T70 |
22371 |
291 |
0 |
0 |
T71 |
12215 |
6 |
0 |
0 |
T110 |
18881 |
367 |
0 |
0 |
T111 |
4434 |
145 |
0 |
0 |
T112 |
13672 |
3 |
0 |
0 |
T113 |
3766 |
167 |
0 |
0 |
T114 |
10077 |
3 |
0 |
0 |
T117 |
4754 |
205 |
0 |
0 |
T124 |
4783 |
13 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1554 |
0 |
0 |
T112 |
13672 |
9 |
0 |
0 |
T116 |
71828 |
80 |
0 |
0 |
T125 |
10911 |
4 |
0 |
0 |
T137 |
4055 |
6 |
0 |
0 |
T139 |
10237 |
8 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
29 |
0 |
0 |
T163 |
21929 |
63 |
0 |
0 |
T164 |
6567 |
19 |
0 |
0 |
T165 |
68092 |
73 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1396 |
0 |
0 |
T112 |
13672 |
9 |
0 |
0 |
T116 |
71828 |
63 |
0 |
0 |
T125 |
10911 |
14 |
0 |
0 |
T137 |
4055 |
3 |
0 |
0 |
T139 |
10237 |
13 |
0 |
0 |
T161 |
4464 |
2 |
0 |
0 |
T162 |
14431 |
32 |
0 |
0 |
T163 |
21929 |
70 |
0 |
0 |
T164 |
6567 |
8 |
0 |
0 |
T165 |
68092 |
86 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
2152 |
0 |
0 |
T112 |
13672 |
13 |
0 |
0 |
T116 |
71828 |
177 |
0 |
0 |
T125 |
10911 |
21 |
0 |
0 |
T137 |
4055 |
14 |
0 |
0 |
T139 |
10237 |
6 |
0 |
0 |
T161 |
4464 |
23 |
0 |
0 |
T162 |
14431 |
72 |
0 |
0 |
T163 |
21929 |
79 |
0 |
0 |
T164 |
6567 |
29 |
0 |
0 |
T165 |
68092 |
119 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
12118 |
0 |
0 |
T70 |
22371 |
5 |
0 |
0 |
T112 |
13672 |
6 |
0 |
0 |
T116 |
71828 |
944 |
0 |
0 |
T125 |
10911 |
144 |
0 |
0 |
T137 |
4055 |
86 |
0 |
0 |
T161 |
4464 |
103 |
0 |
0 |
T162 |
14431 |
37 |
0 |
0 |
T163 |
21929 |
58 |
0 |
0 |
T164 |
6567 |
30 |
0 |
0 |
T165 |
68092 |
1547 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
11170 |
0 |
0 |
T112 |
13672 |
36 |
0 |
0 |
T116 |
71828 |
932 |
0 |
0 |
T125 |
10911 |
245 |
0 |
0 |
T137 |
4055 |
4 |
0 |
0 |
T139 |
10237 |
219 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
58 |
0 |
0 |
T163 |
21929 |
51 |
0 |
0 |
T164 |
6567 |
5 |
0 |
0 |
T165 |
68092 |
1251 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
11654 |
0 |
0 |
T112 |
13672 |
94 |
0 |
0 |
T116 |
71828 |
1082 |
0 |
0 |
T125 |
10911 |
229 |
0 |
0 |
T137 |
4055 |
137 |
0 |
0 |
T139 |
10237 |
136 |
0 |
0 |
T161 |
4464 |
170 |
0 |
0 |
T162 |
14431 |
65 |
0 |
0 |
T163 |
21929 |
92 |
0 |
0 |
T164 |
6567 |
10 |
0 |
0 |
T165 |
68092 |
787 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
13368 |
0 |
0 |
T112 |
13672 |
95 |
0 |
0 |
T116 |
71828 |
1999 |
0 |
0 |
T125 |
10911 |
133 |
0 |
0 |
T137 |
4055 |
2 |
0 |
0 |
T139 |
10237 |
266 |
0 |
0 |
T161 |
4464 |
102 |
0 |
0 |
T162 |
14431 |
61 |
0 |
0 |
T163 |
21929 |
60 |
0 |
0 |
T164 |
6567 |
5 |
0 |
0 |
T165 |
68092 |
1580 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
12030 |
0 |
0 |
T112 |
13672 |
60 |
0 |
0 |
T116 |
71828 |
1681 |
0 |
0 |
T125 |
10911 |
292 |
0 |
0 |
T137 |
4055 |
1 |
0 |
0 |
T139 |
10237 |
249 |
0 |
0 |
T161 |
4464 |
2 |
0 |
0 |
T162 |
14431 |
21 |
0 |
0 |
T163 |
21929 |
77 |
0 |
0 |
T164 |
6567 |
14 |
0 |
0 |
T165 |
68092 |
1254 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
11831 |
0 |
0 |
T112 |
13672 |
116 |
0 |
0 |
T116 |
71828 |
1477 |
0 |
0 |
T125 |
10911 |
9 |
0 |
0 |
T137 |
4055 |
134 |
0 |
0 |
T139 |
10237 |
244 |
0 |
0 |
T161 |
4464 |
136 |
0 |
0 |
T162 |
14431 |
34 |
0 |
0 |
T163 |
21929 |
44 |
0 |
0 |
T164 |
6567 |
10 |
0 |
0 |
T165 |
68092 |
1296 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
11033 |
0 |
0 |
T70 |
22371 |
10 |
0 |
0 |
T112 |
13672 |
106 |
0 |
0 |
T116 |
71828 |
1001 |
0 |
0 |
T125 |
10911 |
20 |
0 |
0 |
T137 |
4055 |
127 |
0 |
0 |
T161 |
4464 |
6 |
0 |
0 |
T162 |
14431 |
85 |
0 |
0 |
T163 |
21929 |
44 |
0 |
0 |
T164 |
6567 |
18 |
0 |
0 |
T165 |
68092 |
1515 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
11411 |
0 |
0 |
T112 |
13672 |
113 |
0 |
0 |
T116 |
71828 |
935 |
0 |
0 |
T125 |
10911 |
115 |
0 |
0 |
T137 |
4055 |
6 |
0 |
0 |
T139 |
10237 |
116 |
0 |
0 |
T161 |
4464 |
132 |
0 |
0 |
T162 |
14431 |
53 |
0 |
0 |
T163 |
21929 |
41 |
0 |
0 |
T164 |
6567 |
11 |
0 |
0 |
T165 |
68092 |
1176 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5446 |
0 |
0 |
T112 |
13672 |
67 |
0 |
0 |
T116 |
71828 |
631 |
0 |
0 |
T125 |
10911 |
57 |
0 |
0 |
T137 |
4055 |
8 |
0 |
0 |
T139 |
10237 |
52 |
0 |
0 |
T161 |
4464 |
79 |
0 |
0 |
T162 |
14431 |
55 |
0 |
0 |
T163 |
21929 |
46 |
0 |
0 |
T165 |
68092 |
577 |
0 |
0 |
T166 |
103631 |
435 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
4961 |
0 |
0 |
T112 |
13672 |
38 |
0 |
0 |
T116 |
71828 |
601 |
0 |
0 |
T125 |
10911 |
62 |
0 |
0 |
T137 |
4055 |
44 |
0 |
0 |
T139 |
10237 |
88 |
0 |
0 |
T161 |
4464 |
7 |
0 |
0 |
T162 |
14431 |
65 |
0 |
0 |
T163 |
21929 |
94 |
0 |
0 |
T164 |
6567 |
13 |
0 |
0 |
T165 |
68092 |
575 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5528 |
0 |
0 |
T112 |
13672 |
33 |
0 |
0 |
T116 |
71828 |
520 |
0 |
0 |
T125 |
10911 |
70 |
0 |
0 |
T137 |
4055 |
51 |
0 |
0 |
T139 |
10237 |
2 |
0 |
0 |
T161 |
4464 |
2 |
0 |
0 |
T162 |
14431 |
77 |
0 |
0 |
T163 |
21929 |
69 |
0 |
0 |
T164 |
6567 |
21 |
0 |
0 |
T165 |
68092 |
569 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5541 |
0 |
0 |
T112 |
13672 |
20 |
0 |
0 |
T116 |
71828 |
498 |
0 |
0 |
T125 |
10911 |
19 |
0 |
0 |
T137 |
4055 |
52 |
0 |
0 |
T139 |
10237 |
61 |
0 |
0 |
T161 |
4464 |
2 |
0 |
0 |
T162 |
14431 |
10 |
0 |
0 |
T163 |
21929 |
52 |
0 |
0 |
T164 |
6567 |
15 |
0 |
0 |
T165 |
68092 |
576 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5189 |
0 |
0 |
T112 |
13672 |
21 |
0 |
0 |
T116 |
71828 |
649 |
0 |
0 |
T125 |
10911 |
75 |
0 |
0 |
T137 |
4055 |
65 |
0 |
0 |
T139 |
10237 |
66 |
0 |
0 |
T161 |
4464 |
5 |
0 |
0 |
T162 |
14431 |
47 |
0 |
0 |
T163 |
21929 |
74 |
0 |
0 |
T164 |
6567 |
9 |
0 |
0 |
T165 |
68092 |
631 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5651 |
0 |
0 |
T112 |
13672 |
57 |
0 |
0 |
T116 |
71828 |
530 |
0 |
0 |
T125 |
10911 |
13 |
0 |
0 |
T137 |
4055 |
48 |
0 |
0 |
T139 |
10237 |
73 |
0 |
0 |
T161 |
4464 |
35 |
0 |
0 |
T162 |
14431 |
37 |
0 |
0 |
T163 |
21929 |
72 |
0 |
0 |
T164 |
6567 |
37 |
0 |
0 |
T165 |
68092 |
462 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5244 |
0 |
0 |
T112 |
13672 |
50 |
0 |
0 |
T116 |
71828 |
344 |
0 |
0 |
T125 |
10911 |
58 |
0 |
0 |
T137 |
4055 |
2 |
0 |
0 |
T139 |
10237 |
45 |
0 |
0 |
T161 |
4464 |
50 |
0 |
0 |
T162 |
14431 |
26 |
0 |
0 |
T163 |
21929 |
80 |
0 |
0 |
T164 |
6567 |
15 |
0 |
0 |
T165 |
68092 |
477 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5236 |
0 |
0 |
T112 |
13672 |
50 |
0 |
0 |
T116 |
71828 |
491 |
0 |
0 |
T125 |
10911 |
15 |
0 |
0 |
T139 |
10237 |
51 |
0 |
0 |
T161 |
4464 |
62 |
0 |
0 |
T162 |
14431 |
42 |
0 |
0 |
T163 |
21929 |
106 |
0 |
0 |
T164 |
6567 |
6 |
0 |
0 |
T165 |
68092 |
411 |
0 |
0 |
T166 |
103631 |
451 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5366 |
0 |
0 |
T112 |
13672 |
26 |
0 |
0 |
T116 |
71828 |
500 |
0 |
0 |
T125 |
10911 |
53 |
0 |
0 |
T137 |
4055 |
5 |
0 |
0 |
T139 |
10237 |
68 |
0 |
0 |
T161 |
4464 |
7 |
0 |
0 |
T162 |
14431 |
20 |
0 |
0 |
T163 |
21929 |
52 |
0 |
0 |
T165 |
68092 |
581 |
0 |
0 |
T166 |
103631 |
426 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5371 |
0 |
0 |
T112 |
13672 |
39 |
0 |
0 |
T116 |
71828 |
628 |
0 |
0 |
T125 |
10911 |
52 |
0 |
0 |
T137 |
4055 |
46 |
0 |
0 |
T139 |
10237 |
99 |
0 |
0 |
T161 |
4464 |
47 |
0 |
0 |
T162 |
14431 |
50 |
0 |
0 |
T163 |
21929 |
42 |
0 |
0 |
T164 |
6567 |
19 |
0 |
0 |
T165 |
68092 |
622 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5415 |
0 |
0 |
T112 |
13672 |
31 |
0 |
0 |
T116 |
71828 |
374 |
0 |
0 |
T125 |
10911 |
50 |
0 |
0 |
T137 |
4055 |
6 |
0 |
0 |
T139 |
10237 |
69 |
0 |
0 |
T162 |
14431 |
55 |
0 |
0 |
T163 |
21929 |
54 |
0 |
0 |
T164 |
6567 |
9 |
0 |
0 |
T165 |
68092 |
706 |
0 |
0 |
T166 |
103631 |
446 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5702 |
0 |
0 |
T112 |
13672 |
55 |
0 |
0 |
T116 |
71828 |
631 |
0 |
0 |
T125 |
10911 |
18 |
0 |
0 |
T139 |
10237 |
77 |
0 |
0 |
T161 |
4464 |
48 |
0 |
0 |
T162 |
14431 |
26 |
0 |
0 |
T163 |
21929 |
73 |
0 |
0 |
T165 |
68092 |
619 |
0 |
0 |
T166 |
103631 |
523 |
0 |
0 |
T167 |
29180 |
138 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5362 |
0 |
0 |
T70 |
22371 |
3 |
0 |
0 |
T112 |
13672 |
40 |
0 |
0 |
T116 |
71828 |
665 |
0 |
0 |
T125 |
10911 |
71 |
0 |
0 |
T137 |
4055 |
43 |
0 |
0 |
T161 |
4464 |
6 |
0 |
0 |
T162 |
14431 |
42 |
0 |
0 |
T163 |
21929 |
75 |
0 |
0 |
T164 |
6567 |
19 |
0 |
0 |
T165 |
68092 |
508 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5281 |
0 |
0 |
T112 |
13672 |
49 |
0 |
0 |
T116 |
71828 |
456 |
0 |
0 |
T125 |
10911 |
101 |
0 |
0 |
T137 |
4055 |
1 |
0 |
0 |
T139 |
10237 |
38 |
0 |
0 |
T161 |
4464 |
62 |
0 |
0 |
T162 |
14431 |
16 |
0 |
0 |
T163 |
21929 |
60 |
0 |
0 |
T164 |
6567 |
14 |
0 |
0 |
T165 |
68092 |
481 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5235 |
0 |
0 |
T112 |
13672 |
54 |
0 |
0 |
T116 |
71828 |
599 |
0 |
0 |
T125 |
10911 |
28 |
0 |
0 |
T137 |
4055 |
7 |
0 |
0 |
T139 |
10237 |
51 |
0 |
0 |
T161 |
4464 |
48 |
0 |
0 |
T162 |
14431 |
31 |
0 |
0 |
T163 |
21929 |
88 |
0 |
0 |
T164 |
6567 |
49 |
0 |
0 |
T165 |
68092 |
404 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5333 |
0 |
0 |
T112 |
13672 |
31 |
0 |
0 |
T116 |
71828 |
411 |
0 |
0 |
T125 |
10911 |
117 |
0 |
0 |
T139 |
10237 |
40 |
0 |
0 |
T161 |
4464 |
58 |
0 |
0 |
T162 |
14431 |
43 |
0 |
0 |
T163 |
21929 |
100 |
0 |
0 |
T164 |
6567 |
13 |
0 |
0 |
T165 |
68092 |
468 |
0 |
0 |
T166 |
103631 |
379 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5151 |
0 |
0 |
T112 |
13672 |
45 |
0 |
0 |
T116 |
71828 |
533 |
0 |
0 |
T125 |
10911 |
91 |
0 |
0 |
T139 |
10237 |
41 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
39 |
0 |
0 |
T163 |
21929 |
98 |
0 |
0 |
T165 |
68092 |
448 |
0 |
0 |
T166 |
103631 |
426 |
0 |
0 |
T167 |
29180 |
84 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5512 |
0 |
0 |
T112 |
13672 |
73 |
0 |
0 |
T116 |
71828 |
719 |
0 |
0 |
T125 |
10911 |
5 |
0 |
0 |
T137 |
4055 |
63 |
0 |
0 |
T139 |
10237 |
87 |
0 |
0 |
T161 |
4464 |
1 |
0 |
0 |
T162 |
14431 |
41 |
0 |
0 |
T163 |
21929 |
79 |
0 |
0 |
T164 |
6567 |
13 |
0 |
0 |
T165 |
68092 |
533 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5194 |
0 |
0 |
T112 |
13672 |
8 |
0 |
0 |
T116 |
71828 |
444 |
0 |
0 |
T125 |
10911 |
60 |
0 |
0 |
T137 |
4055 |
1 |
0 |
0 |
T139 |
10237 |
9 |
0 |
0 |
T161 |
4464 |
51 |
0 |
0 |
T162 |
14431 |
47 |
0 |
0 |
T163 |
21929 |
73 |
0 |
0 |
T164 |
6567 |
30 |
0 |
0 |
T165 |
68092 |
433 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5187 |
0 |
0 |
T112 |
13672 |
41 |
0 |
0 |
T116 |
71828 |
465 |
0 |
0 |
T125 |
10911 |
82 |
0 |
0 |
T137 |
4055 |
59 |
0 |
0 |
T139 |
10237 |
113 |
0 |
0 |
T161 |
4464 |
52 |
0 |
0 |
T162 |
14431 |
23 |
0 |
0 |
T163 |
21929 |
26 |
0 |
0 |
T164 |
6567 |
3 |
0 |
0 |
T165 |
68092 |
555 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5275 |
0 |
0 |
T112 |
13672 |
10 |
0 |
0 |
T116 |
71828 |
552 |
0 |
0 |
T125 |
10911 |
15 |
0 |
0 |
T137 |
4055 |
1 |
0 |
0 |
T139 |
10237 |
53 |
0 |
0 |
T161 |
4464 |
50 |
0 |
0 |
T162 |
14431 |
90 |
0 |
0 |
T163 |
21929 |
113 |
0 |
0 |
T164 |
6567 |
10 |
0 |
0 |
T165 |
68092 |
570 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5521 |
0 |
0 |
T112 |
13672 |
89 |
0 |
0 |
T116 |
71828 |
496 |
0 |
0 |
T125 |
10911 |
57 |
0 |
0 |
T137 |
4055 |
8 |
0 |
0 |
T139 |
10237 |
76 |
0 |
0 |
T161 |
4464 |
1 |
0 |
0 |
T162 |
14431 |
108 |
0 |
0 |
T163 |
21929 |
102 |
0 |
0 |
T164 |
6567 |
6 |
0 |
0 |
T165 |
68092 |
602 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5473 |
0 |
0 |
T112 |
13672 |
32 |
0 |
0 |
T116 |
71828 |
454 |
0 |
0 |
T125 |
10911 |
18 |
0 |
0 |
T139 |
10237 |
122 |
0 |
0 |
T161 |
4464 |
40 |
0 |
0 |
T162 |
14431 |
54 |
0 |
0 |
T163 |
21929 |
52 |
0 |
0 |
T164 |
6567 |
10 |
0 |
0 |
T165 |
68092 |
468 |
0 |
0 |
T166 |
103631 |
473 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5634 |
0 |
0 |
T112 |
13672 |
81 |
0 |
0 |
T116 |
71828 |
608 |
0 |
0 |
T125 |
10911 |
22 |
0 |
0 |
T137 |
4055 |
4 |
0 |
0 |
T139 |
10237 |
121 |
0 |
0 |
T161 |
4464 |
2 |
0 |
0 |
T162 |
14431 |
60 |
0 |
0 |
T163 |
21929 |
56 |
0 |
0 |
T164 |
6567 |
10 |
0 |
0 |
T165 |
68092 |
608 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1747 |
0 |
0 |
T112 |
13672 |
25 |
0 |
0 |
T116 |
71828 |
72 |
0 |
0 |
T125 |
10911 |
21 |
0 |
0 |
T137 |
4055 |
8 |
0 |
0 |
T139 |
10237 |
14 |
0 |
0 |
T161 |
4464 |
5 |
0 |
0 |
T162 |
14431 |
66 |
0 |
0 |
T163 |
21929 |
26 |
0 |
0 |
T164 |
6567 |
5 |
0 |
0 |
T165 |
68092 |
130 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1723 |
0 |
0 |
T112 |
13672 |
13 |
0 |
0 |
T116 |
71828 |
117 |
0 |
0 |
T125 |
10911 |
25 |
0 |
0 |
T137 |
4055 |
4 |
0 |
0 |
T139 |
10237 |
19 |
0 |
0 |
T161 |
4464 |
8 |
0 |
0 |
T162 |
14431 |
52 |
0 |
0 |
T163 |
21929 |
91 |
0 |
0 |
T164 |
6567 |
8 |
0 |
0 |
T165 |
68092 |
102 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1928 |
0 |
0 |
T112 |
13672 |
20 |
0 |
0 |
T116 |
71828 |
81 |
0 |
0 |
T125 |
10911 |
25 |
0 |
0 |
T137 |
4055 |
6 |
0 |
0 |
T139 |
10237 |
3 |
0 |
0 |
T161 |
4464 |
13 |
0 |
0 |
T162 |
14431 |
48 |
0 |
0 |
T163 |
21929 |
75 |
0 |
0 |
T164 |
6567 |
20 |
0 |
0 |
T165 |
68092 |
128 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1840 |
0 |
0 |
T112 |
13672 |
14 |
0 |
0 |
T116 |
71828 |
156 |
0 |
0 |
T125 |
10911 |
18 |
0 |
0 |
T137 |
4055 |
3 |
0 |
0 |
T139 |
10237 |
15 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
62 |
0 |
0 |
T163 |
21929 |
85 |
0 |
0 |
T164 |
6567 |
20 |
0 |
0 |
T165 |
68092 |
112 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
2270 |
0 |
0 |
T112 |
13672 |
21 |
0 |
0 |
T116 |
71828 |
142 |
0 |
0 |
T125 |
10911 |
30 |
0 |
0 |
T137 |
4055 |
9 |
0 |
0 |
T139 |
10237 |
20 |
0 |
0 |
T161 |
4464 |
16 |
0 |
0 |
T162 |
14431 |
43 |
0 |
0 |
T163 |
21929 |
26 |
0 |
0 |
T164 |
6567 |
28 |
0 |
0 |
T165 |
68092 |
158 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
5284 |
0 |
0 |
T33 |
104528 |
0 |
0 |
0 |
T35 |
0 |
35 |
0 |
0 |
T46 |
0 |
70 |
0 |
0 |
T47 |
0 |
43 |
0 |
0 |
T60 |
0 |
23 |
0 |
0 |
T68 |
729843 |
41 |
0 |
0 |
T72 |
0 |
32 |
0 |
0 |
T97 |
116875 |
0 |
0 |
0 |
T168 |
0 |
23 |
0 |
0 |
T169 |
0 |
27 |
0 |
0 |
T170 |
0 |
21 |
0 |
0 |
T171 |
0 |
68 |
0 |
0 |
T172 |
23799 |
0 |
0 |
0 |
T173 |
1059 |
0 |
0 |
0 |
T174 |
34987 |
0 |
0 |
0 |
T175 |
341503 |
0 |
0 |
0 |
T176 |
1068 |
0 |
0 |
0 |
T177 |
61953 |
0 |
0 |
0 |
T178 |
630649 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1780 |
0 |
0 |
T112 |
13672 |
12 |
0 |
0 |
T116 |
71828 |
119 |
0 |
0 |
T125 |
10911 |
13 |
0 |
0 |
T139 |
10237 |
3 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
21 |
0 |
0 |
T163 |
21929 |
49 |
0 |
0 |
T164 |
6567 |
4 |
0 |
0 |
T165 |
68092 |
105 |
0 |
0 |
T166 |
103631 |
420 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1693 |
0 |
0 |
T112 |
13672 |
17 |
0 |
0 |
T116 |
71828 |
92 |
0 |
0 |
T125 |
10911 |
28 |
0 |
0 |
T137 |
4055 |
10 |
0 |
0 |
T139 |
10237 |
9 |
0 |
0 |
T161 |
4464 |
4 |
0 |
0 |
T162 |
14431 |
62 |
0 |
0 |
T163 |
21929 |
68 |
0 |
0 |
T164 |
6567 |
10 |
0 |
0 |
T165 |
68092 |
121 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1543 |
0 |
0 |
T112 |
13672 |
20 |
0 |
0 |
T116 |
71828 |
80 |
0 |
0 |
T125 |
10911 |
11 |
0 |
0 |
T137 |
4055 |
7 |
0 |
0 |
T139 |
10237 |
7 |
0 |
0 |
T161 |
4464 |
8 |
0 |
0 |
T162 |
14431 |
48 |
0 |
0 |
T163 |
21929 |
81 |
0 |
0 |
T164 |
6567 |
11 |
0 |
0 |
T165 |
68092 |
87 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1431 |
0 |
0 |
T112 |
13672 |
4 |
0 |
0 |
T116 |
71828 |
64 |
0 |
0 |
T125 |
10911 |
16 |
0 |
0 |
T137 |
4055 |
2 |
0 |
0 |
T139 |
10237 |
10 |
0 |
0 |
T162 |
14431 |
73 |
0 |
0 |
T163 |
21929 |
54 |
0 |
0 |
T164 |
6567 |
13 |
0 |
0 |
T165 |
68092 |
69 |
0 |
0 |
T166 |
103631 |
416 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1334 |
0 |
0 |
T112 |
13672 |
12 |
0 |
0 |
T116 |
71828 |
73 |
0 |
0 |
T125 |
10911 |
11 |
0 |
0 |
T137 |
4055 |
4 |
0 |
0 |
T139 |
10237 |
3 |
0 |
0 |
T161 |
4464 |
1 |
0 |
0 |
T162 |
14431 |
19 |
0 |
0 |
T163 |
21929 |
7 |
0 |
0 |
T165 |
68092 |
87 |
0 |
0 |
T166 |
103631 |
429 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1413 |
0 |
0 |
T70 |
22371 |
2 |
0 |
0 |
T112 |
13672 |
6 |
0 |
0 |
T116 |
71828 |
75 |
0 |
0 |
T125 |
10911 |
19 |
0 |
0 |
T137 |
4055 |
3 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
41 |
0 |
0 |
T163 |
21929 |
59 |
0 |
0 |
T164 |
6567 |
22 |
0 |
0 |
T165 |
68092 |
93 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
2487 |
0 |
0 |
T112 |
13672 |
30 |
0 |
0 |
T116 |
71828 |
209 |
0 |
0 |
T125 |
10911 |
24 |
0 |
0 |
T137 |
4055 |
15 |
0 |
0 |
T139 |
10237 |
3 |
0 |
0 |
T161 |
4464 |
11 |
0 |
0 |
T162 |
14431 |
65 |
0 |
0 |
T163 |
21929 |
104 |
0 |
0 |
T164 |
6567 |
15 |
0 |
0 |
T165 |
68092 |
193 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1545 |
0 |
0 |
T112 |
13672 |
14 |
0 |
0 |
T116 |
71828 |
75 |
0 |
0 |
T125 |
10911 |
8 |
0 |
0 |
T137 |
4055 |
1 |
0 |
0 |
T139 |
10237 |
11 |
0 |
0 |
T161 |
4464 |
7 |
0 |
0 |
T162 |
14431 |
101 |
0 |
0 |
T163 |
21929 |
63 |
0 |
0 |
T164 |
6567 |
14 |
0 |
0 |
T165 |
68092 |
77 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
2838 |
0 |
0 |
T112 |
13672 |
15 |
0 |
0 |
T116 |
71828 |
175 |
0 |
0 |
T125 |
10911 |
30 |
0 |
0 |
T139 |
10237 |
20 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
52 |
0 |
0 |
T163 |
21929 |
60 |
0 |
0 |
T164 |
6567 |
3 |
0 |
0 |
T165 |
68092 |
188 |
0 |
0 |
T166 |
103631 |
391 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1832 |
0 |
0 |
T112 |
13672 |
29 |
0 |
0 |
T116 |
71828 |
137 |
0 |
0 |
T125 |
10911 |
28 |
0 |
0 |
T137 |
4055 |
7 |
0 |
0 |
T139 |
10237 |
6 |
0 |
0 |
T161 |
4464 |
5 |
0 |
0 |
T162 |
14431 |
77 |
0 |
0 |
T163 |
21929 |
29 |
0 |
0 |
T164 |
6567 |
21 |
0 |
0 |
T165 |
68092 |
134 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1467 |
0 |
0 |
T112 |
13672 |
6 |
0 |
0 |
T116 |
71828 |
86 |
0 |
0 |
T125 |
10911 |
8 |
0 |
0 |
T137 |
4055 |
1 |
0 |
0 |
T139 |
10237 |
9 |
0 |
0 |
T161 |
4464 |
2 |
0 |
0 |
T162 |
14431 |
55 |
0 |
0 |
T163 |
21929 |
47 |
0 |
0 |
T164 |
6567 |
14 |
0 |
0 |
T165 |
68092 |
70 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1446 |
0 |
0 |
T112 |
13672 |
13 |
0 |
0 |
T116 |
71828 |
84 |
0 |
0 |
T125 |
10911 |
29 |
0 |
0 |
T137 |
4055 |
2 |
0 |
0 |
T139 |
10237 |
8 |
0 |
0 |
T161 |
4464 |
1 |
0 |
0 |
T162 |
14431 |
24 |
0 |
0 |
T163 |
21929 |
51 |
0 |
0 |
T164 |
6567 |
9 |
0 |
0 |
T165 |
68092 |
49 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1452 |
0 |
0 |
T112 |
13672 |
15 |
0 |
0 |
T116 |
71828 |
67 |
0 |
0 |
T125 |
10911 |
31 |
0 |
0 |
T137 |
4055 |
4 |
0 |
0 |
T139 |
10237 |
8 |
0 |
0 |
T161 |
4464 |
3 |
0 |
0 |
T162 |
14431 |
46 |
0 |
0 |
T163 |
21929 |
72 |
0 |
0 |
T164 |
6567 |
9 |
0 |
0 |
T165 |
68092 |
66 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1393 |
0 |
0 |
T116 |
71828 |
78 |
0 |
0 |
T125 |
10911 |
23 |
0 |
0 |
T139 |
10237 |
6 |
0 |
0 |
T161 |
4464 |
2 |
0 |
0 |
T162 |
14431 |
42 |
0 |
0 |
T163 |
21929 |
73 |
0 |
0 |
T164 |
6567 |
26 |
0 |
0 |
T165 |
68092 |
80 |
0 |
0 |
T166 |
103631 |
387 |
0 |
0 |
T167 |
29180 |
3 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1489 |
0 |
0 |
T112 |
13672 |
20 |
0 |
0 |
T116 |
71828 |
67 |
0 |
0 |
T125 |
10911 |
14 |
0 |
0 |
T137 |
4055 |
5 |
0 |
0 |
T139 |
10237 |
1 |
0 |
0 |
T161 |
4464 |
8 |
0 |
0 |
T162 |
14431 |
60 |
0 |
0 |
T163 |
21929 |
56 |
0 |
0 |
T164 |
6567 |
15 |
0 |
0 |
T165 |
68092 |
75 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
396430989 |
1577 |
0 |
0 |
T112 |
13672 |
15 |
0 |
0 |
T116 |
71828 |
65 |
0 |
0 |
T125 |
10911 |
18 |
0 |
0 |
T137 |
4055 |
5 |
0 |
0 |
T139 |
10237 |
6 |
0 |
0 |
T161 |
4464 |
6 |
0 |
0 |
T162 |
14431 |
21 |
0 |
0 |
T163 |
21929 |
110 |
0 |
0 |
T164 |
6567 |
12 |
0 |
0 |
T165 |
68092 |
91 |
0 |
0 |