Group : spi_device_env_pkg::spi_device_env_cov::passthrough_mailbox_cg
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Group : spi_device_env_pkg::spi_device_env_cov::passthrough_mailbox_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv



Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_mailbox_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 13 0 13 100.00
Crosses 60 0 60 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_mailbox_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_addr_type 5 0 5 100.00 100 1 1 0
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 6 0 6 100.00 100 1 1 0


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_mailbox_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 60 0 60 100.00 100 1 1 0


Summary for Variable cp_addr_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 5 0 5 100.00


Automatically Generated Bins for cp_addr_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[ReadAddrWithinMailbox] 351 1 T12 1 T17 2 T24 1
auto[ReadAddrCrossIntoMailbox] 210 1 T23 1 T24 4 T27 2
auto[ReadAddrCrossOutOfMailbox] 233 1 T17 2 T23 1 T24 2
auto[ReadAddrCrossAllMailbox] 167 1 T24 1 T27 2 T25 1
auto[ReadAddrOutsideMailbox] 2784 1 T3 2 T7 6 T12 25



Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1852 1 T3 1 T7 3 T12 18
auto[1] 1893 1 T3 1 T7 3 T12 8



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
read_ops[0x03] 649 1 T7 2 T12 5 T17 4
read_ops[0x0b] 622 1 T12 3 T17 1 T23 3
read_ops[0x3b] 638 1 T7 4 T12 5 T17 2
read_ops[0x6b] 584 1 T12 6 T17 2 T23 6
read_ops[0xbb] 653 1 T3 2 T12 4 T17 4
read_ops[0xeb] 599 1 T12 3 T17 1 T23 2



Summary for Cross cr_all

Samples crossed: cp_opcode cp_addr_type cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 60 0 60 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_addr_typecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
read_ops[0x03] auto[ReadAddrWithinMailbox] auto[0] 22 1 T35 1 T174 1 T155 1
read_ops[0x03] auto[ReadAddrWithinMailbox] auto[1] 29 1 T25 1 T174 1 T29 2
read_ops[0x03] auto[ReadAddrCrossIntoMailbox] auto[0] 12 1 T32 1 T185 1 T176 1
read_ops[0x03] auto[ReadAddrCrossIntoMailbox] auto[1] 16 1 T29 1 T32 1 T155 1
read_ops[0x03] auto[ReadAddrCrossOutOfMailbox] auto[0] 24 1 T27 1 T25 2 T28 1
read_ops[0x03] auto[ReadAddrCrossOutOfMailbox] auto[1] 15 1 T17 1 T32 1 T191 1
read_ops[0x03] auto[ReadAddrCrossAllMailbox] auto[0] 18 1 T35 1 T187 1 T264 1
read_ops[0x03] auto[ReadAddrCrossAllMailbox] auto[1] 8 1 T32 1 T154 1 T241 1
read_ops[0x03] auto[ReadAddrOutsideMailbox] auto[0] 244 1 T7 1 T12 5 T42 2
read_ops[0x03] auto[ReadAddrOutsideMailbox] auto[1] 261 1 T7 1 T17 3 T42 2
read_ops[0x0b] auto[ReadAddrWithinMailbox] auto[0] 36 1 T35 1 T28 2 T29 3
read_ops[0x0b] auto[ReadAddrWithinMailbox] auto[1] 31 1 T25 1 T28 1 T29 1
read_ops[0x0b] auto[ReadAddrCrossIntoMailbox] auto[0] 18 1 T28 1 T155 2 T250 1
read_ops[0x0b] auto[ReadAddrCrossIntoMailbox] auto[1] 22 1 T25 1 T29 1 T32 2
read_ops[0x0b] auto[ReadAddrCrossOutOfMailbox] auto[0] 19 1 T35 1 T176 1 T250 1
read_ops[0x0b] auto[ReadAddrCrossOutOfMailbox] auto[1] 24 1 T23 1 T25 2 T35 1
read_ops[0x0b] auto[ReadAddrCrossAllMailbox] auto[0] 12 1 T176 2 T191 2 T152 2
read_ops[0x0b] auto[ReadAddrCrossAllMailbox] auto[1] 13 1 T35 1 T29 1 T32 1
read_ops[0x0b] auto[ReadAddrOutsideMailbox] auto[0] 209 1 T12 1 T17 1 T92 2
read_ops[0x0b] auto[ReadAddrOutsideMailbox] auto[1] 238 1 T12 2 T23 2 T92 2
read_ops[0x3b] auto[ReadAddrWithinMailbox] auto[0] 31 1 T24 1 T91 2 T25 1
read_ops[0x3b] auto[ReadAddrWithinMailbox] auto[1] 36 1 T91 2 T25 1 T35 1
read_ops[0x3b] auto[ReadAddrCrossIntoMailbox] auto[0] 20 1 T192 1 T176 1 T201 1
read_ops[0x3b] auto[ReadAddrCrossIntoMailbox] auto[1] 14 1 T185 1 T152 1 T202 3
read_ops[0x3b] auto[ReadAddrCrossOutOfMailbox] auto[0] 19 1 T25 1 T35 1 T29 1
read_ops[0x3b] auto[ReadAddrCrossOutOfMailbox] auto[1] 21 1 T29 1 T155 1 T176 1
read_ops[0x3b] auto[ReadAddrCrossAllMailbox] auto[0] 14 1 T27 1 T25 1 T35 2
read_ops[0x3b] auto[ReadAddrCrossAllMailbox] auto[1] 15 1 T204 1 T191 1 T202 1
read_ops[0x3b] auto[ReadAddrOutsideMailbox] auto[0] 228 1 T7 2 T12 1 T42 1
read_ops[0x3b] auto[ReadAddrOutsideMailbox] auto[1] 240 1 T7 2 T12 4 T17 2
read_ops[0x6b] auto[ReadAddrWithinMailbox] auto[0] 29 1 T25 1 T32 2 T176 1
read_ops[0x6b] auto[ReadAddrWithinMailbox] auto[1] 22 1 T17 1 T25 2 T155 1
read_ops[0x6b] auto[ReadAddrCrossIntoMailbox] auto[0] 16 1 T24 1 T27 2 T35 1
read_ops[0x6b] auto[ReadAddrCrossIntoMailbox] auto[1] 22 1 T29 2 T155 2 T201 1
read_ops[0x6b] auto[ReadAddrCrossOutOfMailbox] auto[0] 15 1 T29 1 T318 1 T191 1
read_ops[0x6b] auto[ReadAddrCrossOutOfMailbox] auto[1] 28 1 T17 1 T29 2 T158 1
read_ops[0x6b] auto[ReadAddrCrossAllMailbox] auto[0] 7 1 T174 1 T250 1 T180 1
read_ops[0x6b] auto[ReadAddrCrossAllMailbox] auto[1] 10 1 T174 1 T205 1 T187 1
read_ops[0x6b] auto[ReadAddrOutsideMailbox] auto[0] 229 1 T12 6 T23 3 T98 2
read_ops[0x6b] auto[ReadAddrOutsideMailbox] auto[1] 206 1 T23 3 T98 2 T172 1
read_ops[0xbb] auto[ReadAddrWithinMailbox] auto[0] 29 1 T17 1 T35 1 T28 2
read_ops[0xbb] auto[ReadAddrWithinMailbox] auto[1] 27 1 T27 1 T25 1 T174 1
read_ops[0xbb] auto[ReadAddrCrossIntoMailbox] auto[0] 20 1 T24 2 T28 1 T29 2
read_ops[0xbb] auto[ReadAddrCrossIntoMailbox] auto[1] 21 1 T23 1 T35 1 T201 2
read_ops[0xbb] auto[ReadAddrCrossOutOfMailbox] auto[0] 26 1 T174 1 T29 1 T32 1
read_ops[0xbb] auto[ReadAddrCrossOutOfMailbox] auto[1] 19 1 T24 1 T174 1 T29 1
read_ops[0xbb] auto[ReadAddrCrossAllMailbox] auto[0] 17 1 T35 1 T29 1 T32 1
read_ops[0xbb] auto[ReadAddrCrossAllMailbox] auto[1] 15 1 T27 1 T35 1 T29 1
read_ops[0xbb] auto[ReadAddrOutsideMailbox] auto[0] 237 1 T3 1 T12 3 T17 3
read_ops[0xbb] auto[ReadAddrOutsideMailbox] auto[1] 242 1 T3 1 T12 1 T23 2
read_ops[0xeb] auto[ReadAddrWithinMailbox] auto[0] 35 1 T12 1 T25 3 T29 2
read_ops[0xeb] auto[ReadAddrWithinMailbox] auto[1] 24 1 T209 1 T176 2 T187 1
read_ops[0xeb] auto[ReadAddrCrossIntoMailbox] auto[0] 15 1 T25 2 T35 1 T28 2
read_ops[0xeb] auto[ReadAddrCrossIntoMailbox] auto[1] 14 1 T24 1 T32 1 T158 1
read_ops[0xeb] auto[ReadAddrCrossOutOfMailbox] auto[0] 13 1 T29 1 T32 1 T260 1
read_ops[0xeb] auto[ReadAddrCrossOutOfMailbox] auto[1] 10 1 T24 1 T155 1 T185 1
read_ops[0xeb] auto[ReadAddrCrossAllMailbox] auto[0] 24 1 T35 1 T31 1 T201 2
read_ops[0xeb] auto[ReadAddrCrossAllMailbox] auto[1] 14 1 T24 1 T158 1 T228 1
read_ops[0xeb] auto[ReadAddrOutsideMailbox] auto[0] 214 1 T12 1 T23 2 T24 1
read_ops[0xeb] auto[ReadAddrOutsideMailbox] auto[1] 236 1 T12 1 T17 1 T24 2

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