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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.08 98.31 94.11 98.61 89.36 97.16 95.84 99.20


Total test records in report: 1081
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T821 /workspace/coverage/default/1.spi_device_tpm_rw.1226757411 Jun 02 03:15:16 PM PDT 24 Jun 02 03:15:18 PM PDT 24 56336392 ps
T822 /workspace/coverage/default/7.spi_device_intercept.1984078041 Jun 02 03:15:45 PM PDT 24 Jun 02 03:15:48 PM PDT 24 119479903 ps
T823 /workspace/coverage/default/20.spi_device_flash_all.1647338897 Jun 02 03:16:46 PM PDT 24 Jun 02 03:16:59 PM PDT 24 4961022587 ps
T824 /workspace/coverage/default/38.spi_device_pass_cmd_filtering.376477335 Jun 02 03:17:45 PM PDT 24 Jun 02 03:18:06 PM PDT 24 6529871517 ps
T825 /workspace/coverage/default/3.spi_device_tpm_sts_read.3695888513 Jun 02 03:15:26 PM PDT 24 Jun 02 03:15:28 PM PDT 24 183801646 ps
T826 /workspace/coverage/default/9.spi_device_pass_addr_payload_swap.1832376324 Jun 02 03:15:52 PM PDT 24 Jun 02 03:15:58 PM PDT 24 789797256 ps
T827 /workspace/coverage/default/29.spi_device_tpm_read_hw_reg.1424823680 Jun 02 03:17:18 PM PDT 24 Jun 02 03:17:34 PM PDT 24 5565710379 ps
T828 /workspace/coverage/default/16.spi_device_flash_mode.2996382961 Jun 02 03:16:19 PM PDT 24 Jun 02 03:16:24 PM PDT 24 106673033 ps
T68 /workspace/coverage/default/3.spi_device_sec_cm.2500394344 Jun 02 03:15:28 PM PDT 24 Jun 02 03:15:30 PM PDT 24 116525757 ps
T829 /workspace/coverage/default/40.spi_device_alert_test.1524262424 Jun 02 03:18:06 PM PDT 24 Jun 02 03:18:08 PM PDT 24 171829471 ps
T830 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.147580563 Jun 02 03:16:19 PM PDT 24 Jun 02 03:16:24 PM PDT 24 1289338499 ps
T831 /workspace/coverage/default/3.spi_device_flash_all.1145615317 Jun 02 03:15:30 PM PDT 24 Jun 02 03:16:03 PM PDT 24 5510573800 ps
T832 /workspace/coverage/default/42.spi_device_cfg_cmd.2943558559 Jun 02 03:18:10 PM PDT 24 Jun 02 03:18:24 PM PDT 24 3923634102 ps
T833 /workspace/coverage/default/8.spi_device_mailbox.138152878 Jun 02 03:15:47 PM PDT 24 Jun 02 03:16:29 PM PDT 24 11031543273 ps
T297 /workspace/coverage/default/46.spi_device_flash_and_tpm.2376572750 Jun 02 03:18:21 PM PDT 24 Jun 02 03:19:11 PM PDT 24 9682701636 ps
T834 /workspace/coverage/default/15.spi_device_upload.2833885444 Jun 02 03:16:14 PM PDT 24 Jun 02 03:16:23 PM PDT 24 4743271707 ps
T835 /workspace/coverage/default/12.spi_device_flash_all.3256897319 Jun 02 03:16:04 PM PDT 24 Jun 02 03:18:14 PM PDT 24 47369641415 ps
T836 /workspace/coverage/default/0.spi_device_read_buffer_direct.598627606 Jun 02 03:15:15 PM PDT 24 Jun 02 03:15:22 PM PDT 24 353725311 ps
T837 /workspace/coverage/default/20.spi_device_tpm_all.3165931241 Jun 02 03:16:37 PM PDT 24 Jun 02 03:16:44 PM PDT 24 441553954 ps
T838 /workspace/coverage/default/35.spi_device_tpm_read_hw_reg.3669269332 Jun 02 03:17:32 PM PDT 24 Jun 02 03:17:40 PM PDT 24 2919789595 ps
T281 /workspace/coverage/default/7.spi_device_flash_and_tpm_min_idle.1201980356 Jun 02 03:15:47 PM PDT 24 Jun 02 03:16:17 PM PDT 24 4375391234 ps
T839 /workspace/coverage/default/30.spi_device_csb_read.2118184761 Jun 02 03:17:17 PM PDT 24 Jun 02 03:17:19 PM PDT 24 36271576 ps
T840 /workspace/coverage/default/1.spi_device_flash_and_tpm.1057301681 Jun 02 03:15:16 PM PDT 24 Jun 02 03:17:14 PM PDT 24 8990352870 ps
T841 /workspace/coverage/default/23.spi_device_tpm_read_hw_reg.3651721595 Jun 02 03:16:44 PM PDT 24 Jun 02 03:16:50 PM PDT 24 679632440 ps
T842 /workspace/coverage/default/38.spi_device_upload.2846782110 Jun 02 03:17:50 PM PDT 24 Jun 02 03:17:53 PM PDT 24 796450576 ps
T843 /workspace/coverage/default/20.spi_device_pass_addr_payload_swap.1005714029 Jun 02 03:16:38 PM PDT 24 Jun 02 03:16:45 PM PDT 24 1079115344 ps
T844 /workspace/coverage/default/30.spi_device_read_buffer_direct.1270538375 Jun 02 03:17:19 PM PDT 24 Jun 02 03:17:25 PM PDT 24 608123212 ps
T845 /workspace/coverage/default/27.spi_device_tpm_rw.3692959519 Jun 02 03:17:05 PM PDT 24 Jun 02 03:17:07 PM PDT 24 170681517 ps
T846 /workspace/coverage/default/42.spi_device_tpm_all.2627279206 Jun 02 03:18:02 PM PDT 24 Jun 02 03:18:06 PM PDT 24 281303228 ps
T847 /workspace/coverage/default/46.spi_device_csb_read.229231353 Jun 02 03:18:18 PM PDT 24 Jun 02 03:18:20 PM PDT 24 14898525 ps
T848 /workspace/coverage/default/36.spi_device_upload.2411445926 Jun 02 03:17:38 PM PDT 24 Jun 02 03:17:42 PM PDT 24 231905025 ps
T849 /workspace/coverage/default/45.spi_device_csb_read.4259863622 Jun 02 03:18:16 PM PDT 24 Jun 02 03:18:17 PM PDT 24 40830173 ps
T850 /workspace/coverage/default/3.spi_device_flash_mode.2758834763 Jun 02 03:15:27 PM PDT 24 Jun 02 03:15:34 PM PDT 24 209440225 ps
T851 /workspace/coverage/default/5.spi_device_upload.2748486746 Jun 02 03:15:35 PM PDT 24 Jun 02 03:15:55 PM PDT 24 18835151592 ps
T852 /workspace/coverage/default/37.spi_device_tpm_all.1443576038 Jun 02 03:17:45 PM PDT 24 Jun 02 03:17:50 PM PDT 24 2160771797 ps
T853 /workspace/coverage/default/3.spi_device_upload.4019134938 Jun 02 03:15:26 PM PDT 24 Jun 02 03:15:38 PM PDT 24 9535322037 ps
T854 /workspace/coverage/default/10.spi_device_read_buffer_direct.42559386 Jun 02 03:15:54 PM PDT 24 Jun 02 03:16:04 PM PDT 24 2774096022 ps
T855 /workspace/coverage/default/34.spi_device_read_buffer_direct.3147236798 Jun 02 03:17:31 PM PDT 24 Jun 02 03:17:43 PM PDT 24 4623143925 ps
T856 /workspace/coverage/default/4.spi_device_mailbox.3952542261 Jun 02 03:15:28 PM PDT 24 Jun 02 03:15:38 PM PDT 24 418758897 ps
T857 /workspace/coverage/default/28.spi_device_alert_test.2241176373 Jun 02 03:17:11 PM PDT 24 Jun 02 03:17:12 PM PDT 24 37487456 ps
T858 /workspace/coverage/default/31.spi_device_pass_addr_payload_swap.371102320 Jun 02 03:17:18 PM PDT 24 Jun 02 03:17:30 PM PDT 24 14357267658 ps
T859 /workspace/coverage/default/29.spi_device_tpm_rw.2601029656 Jun 02 03:17:13 PM PDT 24 Jun 02 03:17:16 PM PDT 24 81703301 ps
T860 /workspace/coverage/default/0.spi_device_flash_and_tpm_min_idle.3956563048 Jun 02 03:15:15 PM PDT 24 Jun 02 03:15:47 PM PDT 24 8142255071 ps
T861 /workspace/coverage/default/45.spi_device_pass_addr_payload_swap.3226768080 Jun 02 03:18:18 PM PDT 24 Jun 02 03:18:41 PM PDT 24 33270168238 ps
T862 /workspace/coverage/default/28.spi_device_flash_and_tpm.1863781020 Jun 02 03:17:20 PM PDT 24 Jun 02 03:18:27 PM PDT 24 3144772055 ps
T863 /workspace/coverage/default/9.spi_device_csb_read.1257308173 Jun 02 03:15:45 PM PDT 24 Jun 02 03:15:46 PM PDT 24 82101888 ps
T864 /workspace/coverage/default/46.spi_device_alert_test.1349203441 Jun 02 03:18:21 PM PDT 24 Jun 02 03:18:23 PM PDT 24 23168086 ps
T865 /workspace/coverage/default/46.spi_device_intercept.1736342282 Jun 02 03:18:33 PM PDT 24 Jun 02 03:18:40 PM PDT 24 460127689 ps
T866 /workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.2621941798 Jun 02 03:17:34 PM PDT 24 Jun 02 03:22:16 PM PDT 24 57094755547 ps
T867 /workspace/coverage/default/30.spi_device_upload.545355841 Jun 02 03:17:18 PM PDT 24 Jun 02 03:17:22 PM PDT 24 185592326 ps
T868 /workspace/coverage/default/38.spi_device_read_buffer_direct.4221745041 Jun 02 03:17:51 PM PDT 24 Jun 02 03:18:01 PM PDT 24 1988056424 ps
T869 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.3430609058 Jun 02 03:15:58 PM PDT 24 Jun 02 03:16:01 PM PDT 24 1344230715 ps
T870 /workspace/coverage/default/14.spi_device_csb_read.1724686081 Jun 02 03:16:10 PM PDT 24 Jun 02 03:16:11 PM PDT 24 66848554 ps
T871 /workspace/coverage/default/31.spi_device_read_buffer_direct.3733325752 Jun 02 03:17:26 PM PDT 24 Jun 02 03:17:31 PM PDT 24 191543764 ps
T872 /workspace/coverage/default/20.spi_device_csb_read.3982850193 Jun 02 03:16:33 PM PDT 24 Jun 02 03:16:34 PM PDT 24 61432740 ps
T873 /workspace/coverage/default/24.spi_device_tpm_all.1549568698 Jun 02 03:16:52 PM PDT 24 Jun 02 03:17:11 PM PDT 24 1087800330 ps
T874 /workspace/coverage/default/16.spi_device_read_buffer_direct.2481540690 Jun 02 03:16:27 PM PDT 24 Jun 02 03:16:31 PM PDT 24 324385551 ps
T282 /workspace/coverage/default/9.spi_device_stress_all.2057590608 Jun 02 03:15:59 PM PDT 24 Jun 02 03:25:03 PM PDT 24 299225661734 ps
T875 /workspace/coverage/default/26.spi_device_tpm_rw.1854635738 Jun 02 03:17:00 PM PDT 24 Jun 02 03:17:02 PM PDT 24 227796214 ps
T876 /workspace/coverage/default/42.spi_device_pass_addr_payload_swap.2371975144 Jun 02 03:18:02 PM PDT 24 Jun 02 03:18:05 PM PDT 24 118706861 ps
T877 /workspace/coverage/default/8.spi_device_pass_cmd_filtering.2883762810 Jun 02 03:15:47 PM PDT 24 Jun 02 03:15:50 PM PDT 24 159125095 ps
T878 /workspace/coverage/default/16.spi_device_tpm_rw.2585498689 Jun 02 03:16:23 PM PDT 24 Jun 02 03:16:24 PM PDT 24 17161146 ps
T879 /workspace/coverage/default/42.spi_device_read_buffer_direct.1619948977 Jun 02 03:18:10 PM PDT 24 Jun 02 03:18:25 PM PDT 24 1832967447 ps
T880 /workspace/coverage/default/17.spi_device_pass_addr_payload_swap.1242126200 Jun 02 03:16:26 PM PDT 24 Jun 02 03:16:31 PM PDT 24 1306834658 ps
T881 /workspace/coverage/default/4.spi_device_tpm_rw.1101842636 Jun 02 03:15:27 PM PDT 24 Jun 02 03:15:30 PM PDT 24 242929886 ps
T882 /workspace/coverage/default/30.spi_device_tpm_rw.146275309 Jun 02 03:17:11 PM PDT 24 Jun 02 03:17:18 PM PDT 24 290199194 ps
T883 /workspace/coverage/default/37.spi_device_tpm_read_hw_reg.891615002 Jun 02 03:17:44 PM PDT 24 Jun 02 03:17:52 PM PDT 24 2519486961 ps
T884 /workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.1422697430 Jun 02 03:18:21 PM PDT 24 Jun 02 03:20:34 PM PDT 24 16166802494 ps
T885 /workspace/coverage/default/48.spi_device_flash_mode.3395547703 Jun 02 03:18:29 PM PDT 24 Jun 02 03:18:36 PM PDT 24 538703923 ps
T886 /workspace/coverage/default/26.spi_device_intercept.4203799539 Jun 02 03:17:00 PM PDT 24 Jun 02 03:17:03 PM PDT 24 112908262 ps
T887 /workspace/coverage/default/34.spi_device_flash_and_tpm.4077204151 Jun 02 03:17:29 PM PDT 24 Jun 02 03:18:34 PM PDT 24 10819684815 ps
T888 /workspace/coverage/default/16.spi_device_pass_addr_payload_swap.3746462414 Jun 02 03:16:19 PM PDT 24 Jun 02 03:16:47 PM PDT 24 48483055732 ps
T889 /workspace/coverage/default/43.spi_device_intercept.805200217 Jun 02 03:18:08 PM PDT 24 Jun 02 03:18:13 PM PDT 24 257639213 ps
T890 /workspace/coverage/default/32.spi_device_flash_mode.3146442837 Jun 02 03:17:27 PM PDT 24 Jun 02 03:17:47 PM PDT 24 1493419265 ps
T891 /workspace/coverage/default/32.spi_device_pass_addr_payload_swap.1739200775 Jun 02 03:17:23 PM PDT 24 Jun 02 03:17:27 PM PDT 24 2285413025 ps
T892 /workspace/coverage/default/40.spi_device_flash_mode.2926054064 Jun 02 03:17:55 PM PDT 24 Jun 02 03:17:59 PM PDT 24 53665922 ps
T893 /workspace/coverage/default/33.spi_device_tpm_sts_read.400954669 Jun 02 03:17:25 PM PDT 24 Jun 02 03:17:27 PM PDT 24 32064217 ps
T289 /workspace/coverage/default/48.spi_device_flash_and_tpm.963803223 Jun 02 03:18:29 PM PDT 24 Jun 02 03:20:27 PM PDT 24 13509291196 ps
T894 /workspace/coverage/default/31.spi_device_upload.2871266018 Jun 02 03:17:19 PM PDT 24 Jun 02 03:17:22 PM PDT 24 841018059 ps
T895 /workspace/coverage/default/38.spi_device_cfg_cmd.2850085800 Jun 02 03:17:48 PM PDT 24 Jun 02 03:17:51 PM PDT 24 30382631 ps
T896 /workspace/coverage/default/42.spi_device_upload.3599392985 Jun 02 03:18:10 PM PDT 24 Jun 02 03:18:19 PM PDT 24 1312495666 ps
T897 /workspace/coverage/default/8.spi_device_tpm_all.3969309533 Jun 02 03:15:48 PM PDT 24 Jun 02 03:16:20 PM PDT 24 8542542855 ps
T898 /workspace/coverage/default/45.spi_device_mailbox.1458007698 Jun 02 03:18:18 PM PDT 24 Jun 02 03:18:31 PM PDT 24 1158233121 ps
T899 /workspace/coverage/default/19.spi_device_upload.1554576087 Jun 02 03:16:33 PM PDT 24 Jun 02 03:16:44 PM PDT 24 2370822642 ps
T900 /workspace/coverage/default/27.spi_device_alert_test.2559837741 Jun 02 03:17:05 PM PDT 24 Jun 02 03:17:07 PM PDT 24 13433614 ps
T901 /workspace/coverage/default/30.spi_device_alert_test.4269546487 Jun 02 03:17:23 PM PDT 24 Jun 02 03:17:24 PM PDT 24 28530361 ps
T902 /workspace/coverage/default/34.spi_device_alert_test.2898138079 Jun 02 03:17:31 PM PDT 24 Jun 02 03:17:32 PM PDT 24 17176096 ps
T903 /workspace/coverage/default/32.spi_device_csb_read.2843899748 Jun 02 03:17:25 PM PDT 24 Jun 02 03:17:27 PM PDT 24 61120807 ps
T904 /workspace/coverage/default/40.spi_device_tpm_all.3373125376 Jun 02 03:17:55 PM PDT 24 Jun 02 03:18:07 PM PDT 24 1823227454 ps
T905 /workspace/coverage/default/20.spi_device_read_buffer_direct.2522106158 Jun 02 03:16:37 PM PDT 24 Jun 02 03:16:47 PM PDT 24 1125760091 ps
T906 /workspace/coverage/default/37.spi_device_tpm_rw.2071444589 Jun 02 03:17:43 PM PDT 24 Jun 02 03:17:44 PM PDT 24 33400596 ps
T907 /workspace/coverage/default/2.spi_device_csb_read.741318076 Jun 02 03:15:23 PM PDT 24 Jun 02 03:15:25 PM PDT 24 215958255 ps
T908 /workspace/coverage/default/0.spi_device_pass_cmd_filtering.520436159 Jun 02 03:15:14 PM PDT 24 Jun 02 03:15:20 PM PDT 24 6428850902 ps
T909 /workspace/coverage/default/16.spi_device_intercept.640935339 Jun 02 03:16:19 PM PDT 24 Jun 02 03:16:31 PM PDT 24 1428123963 ps
T910 /workspace/coverage/default/12.spi_device_upload.2863702524 Jun 02 03:16:01 PM PDT 24 Jun 02 03:16:12 PM PDT 24 1204048911 ps
T911 /workspace/coverage/default/38.spi_device_mailbox.1521086143 Jun 02 03:17:49 PM PDT 24 Jun 02 03:17:52 PM PDT 24 77592856 ps
T139 /workspace/coverage/default/1.spi_device_stress_all.2007343146 Jun 02 03:15:22 PM PDT 24 Jun 02 03:24:50 PM PDT 24 89317659705 ps
T912 /workspace/coverage/default/8.spi_device_read_buffer_direct.952591888 Jun 02 03:15:50 PM PDT 24 Jun 02 03:15:54 PM PDT 24 618539122 ps
T913 /workspace/coverage/default/30.spi_device_cfg_cmd.872070943 Jun 02 03:17:22 PM PDT 24 Jun 02 03:17:28 PM PDT 24 596831868 ps
T914 /workspace/coverage/default/23.spi_device_cfg_cmd.3136120921 Jun 02 03:16:43 PM PDT 24 Jun 02 03:16:49 PM PDT 24 1054960120 ps
T915 /workspace/coverage/default/15.spi_device_flash_and_tpm_min_idle.866227050 Jun 02 03:16:15 PM PDT 24 Jun 02 03:17:53 PM PDT 24 11194675161 ps
T916 /workspace/coverage/default/44.spi_device_tpm_all.3831755264 Jun 02 03:18:09 PM PDT 24 Jun 02 03:18:23 PM PDT 24 3086313569 ps
T234 /workspace/coverage/default/35.spi_device_flash_and_tpm_min_idle.2881860454 Jun 02 03:17:37 PM PDT 24 Jun 02 03:20:54 PM PDT 24 27213734204 ps
T917 /workspace/coverage/default/7.spi_device_stress_all.934403989 Jun 02 03:15:49 PM PDT 24 Jun 02 03:17:22 PM PDT 24 24189240764 ps
T918 /workspace/coverage/default/32.spi_device_tpm_all.3106268810 Jun 02 03:17:29 PM PDT 24 Jun 02 03:18:07 PM PDT 24 11985118724 ps
T919 /workspace/coverage/default/17.spi_device_pass_cmd_filtering.3354606618 Jun 02 03:16:25 PM PDT 24 Jun 02 03:16:38 PM PDT 24 2615883334 ps
T920 /workspace/coverage/default/27.spi_device_flash_and_tpm.2635554284 Jun 02 03:17:04 PM PDT 24 Jun 02 03:18:56 PM PDT 24 62598794302 ps
T921 /workspace/coverage/default/37.spi_device_mailbox.1295454555 Jun 02 03:17:43 PM PDT 24 Jun 02 03:18:20 PM PDT 24 4360205983 ps
T922 /workspace/coverage/default/7.spi_device_flash_mode.4098837005 Jun 02 03:15:38 PM PDT 24 Jun 02 03:16:18 PM PDT 24 4455611077 ps
T293 /workspace/coverage/default/11.spi_device_flash_and_tpm.1081793704 Jun 02 03:15:59 PM PDT 24 Jun 02 03:24:10 PM PDT 24 198562086981 ps
T923 /workspace/coverage/default/19.spi_device_cfg_cmd.387635332 Jun 02 03:16:31 PM PDT 24 Jun 02 03:16:35 PM PDT 24 934040198 ps
T235 /workspace/coverage/default/45.spi_device_flash_all.3751987603 Jun 02 03:18:19 PM PDT 24 Jun 02 03:19:25 PM PDT 24 15480627726 ps
T924 /workspace/coverage/default/40.spi_device_upload.2035592074 Jun 02 03:17:58 PM PDT 24 Jun 02 03:18:09 PM PDT 24 2061040518 ps
T925 /workspace/coverage/default/18.spi_device_tpm_all.1077289603 Jun 02 03:16:32 PM PDT 24 Jun 02 03:16:33 PM PDT 24 15788614 ps
T926 /workspace/coverage/default/19.spi_device_read_buffer_direct.3654359752 Jun 02 03:16:37 PM PDT 24 Jun 02 03:16:41 PM PDT 24 2520773930 ps
T927 /workspace/coverage/default/3.spi_device_tpm_read_hw_reg.2812394339 Jun 02 03:15:33 PM PDT 24 Jun 02 03:15:52 PM PDT 24 13352104229 ps
T928 /workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.1809126473 Jun 02 03:16:51 PM PDT 24 Jun 02 03:18:34 PM PDT 24 8883187734 ps
T929 /workspace/coverage/default/18.spi_device_mailbox.2660659611 Jun 02 03:16:26 PM PDT 24 Jun 02 03:16:34 PM PDT 24 917374505 ps
T930 /workspace/coverage/default/46.spi_device_tpm_rw.595548825 Jun 02 03:18:15 PM PDT 24 Jun 02 03:18:16 PM PDT 24 138758151 ps
T931 /workspace/coverage/default/29.spi_device_flash_mode.564400359 Jun 02 03:17:13 PM PDT 24 Jun 02 03:17:18 PM PDT 24 298462048 ps
T932 /workspace/coverage/default/1.spi_device_flash_all.1301118771 Jun 02 03:15:16 PM PDT 24 Jun 02 03:16:28 PM PDT 24 5590053738 ps
T933 /workspace/coverage/default/47.spi_device_alert_test.2292397228 Jun 02 03:18:23 PM PDT 24 Jun 02 03:18:24 PM PDT 24 30002607 ps
T934 /workspace/coverage/default/12.spi_device_flash_and_tpm_min_idle.3545503647 Jun 02 03:16:00 PM PDT 24 Jun 02 03:17:16 PM PDT 24 69475524211 ps
T935 /workspace/coverage/default/40.spi_device_tpm_rw.2420958997 Jun 02 03:17:54 PM PDT 24 Jun 02 03:17:56 PM PDT 24 103016681 ps
T936 /workspace/coverage/default/16.spi_device_tpm_sts_read.3089521417 Jun 02 03:16:25 PM PDT 24 Jun 02 03:16:26 PM PDT 24 122388440 ps
T274 /workspace/coverage/default/45.spi_device_stress_all.2835107196 Jun 02 03:18:15 PM PDT 24 Jun 02 03:28:10 PM PDT 24 245789800986 ps
T937 /workspace/coverage/default/39.spi_device_flash_all.1672055514 Jun 02 03:17:58 PM PDT 24 Jun 02 03:18:53 PM PDT 24 9883494285 ps
T938 /workspace/coverage/default/1.spi_device_flash_mode.1314484397 Jun 02 03:15:18 PM PDT 24 Jun 02 03:15:22 PM PDT 24 459217399 ps
T939 /workspace/coverage/default/7.spi_device_pass_addr_payload_swap.1291251820 Jun 02 03:15:41 PM PDT 24 Jun 02 03:15:50 PM PDT 24 1022736971 ps
T940 /workspace/coverage/default/35.spi_device_upload.1422417240 Jun 02 03:17:38 PM PDT 24 Jun 02 03:17:42 PM PDT 24 397640814 ps
T294 /workspace/coverage/default/29.spi_device_flash_and_tpm.1285127368 Jun 02 03:17:18 PM PDT 24 Jun 02 03:18:42 PM PDT 24 4429660729 ps
T941 /workspace/coverage/default/26.spi_device_tpm_sts_read.3505463981 Jun 02 03:16:58 PM PDT 24 Jun 02 03:16:59 PM PDT 24 135386036 ps
T942 /workspace/coverage/default/30.spi_device_intercept.3229595578 Jun 02 03:17:19 PM PDT 24 Jun 02 03:17:49 PM PDT 24 3545008429 ps
T943 /workspace/coverage/default/19.spi_device_flash_and_tpm.4167890164 Jun 02 03:16:32 PM PDT 24 Jun 02 03:17:49 PM PDT 24 5909223396 ps
T944 /workspace/coverage/default/32.spi_device_cfg_cmd.1842876595 Jun 02 03:17:23 PM PDT 24 Jun 02 03:17:29 PM PDT 24 583417993 ps
T945 /workspace/coverage/default/33.spi_device_tpm_all.1605174948 Jun 02 03:17:24 PM PDT 24 Jun 02 03:17:54 PM PDT 24 3100673182 ps
T946 /workspace/coverage/default/27.spi_device_cfg_cmd.3208489938 Jun 02 03:17:08 PM PDT 24 Jun 02 03:17:11 PM PDT 24 148348775 ps
T947 /workspace/coverage/default/31.spi_device_cfg_cmd.616869697 Jun 02 03:17:19 PM PDT 24 Jun 02 03:17:29 PM PDT 24 578711529 ps
T948 /workspace/coverage/default/36.spi_device_read_buffer_direct.3136467775 Jun 02 03:17:39 PM PDT 24 Jun 02 03:17:44 PM PDT 24 143365247 ps
T949 /workspace/coverage/default/9.spi_device_tpm_rw.1380839270 Jun 02 03:15:53 PM PDT 24 Jun 02 03:15:59 PM PDT 24 346494884 ps
T950 /workspace/coverage/default/16.spi_device_alert_test.2006883533 Jun 02 03:16:18 PM PDT 24 Jun 02 03:16:19 PM PDT 24 21797168 ps
T951 /workspace/coverage/default/48.spi_device_intercept.3640538501 Jun 02 03:18:27 PM PDT 24 Jun 02 03:18:32 PM PDT 24 1384234359 ps
T952 /workspace/coverage/default/38.spi_device_alert_test.2140448762 Jun 02 03:17:50 PM PDT 24 Jun 02 03:17:51 PM PDT 24 46789982 ps
T953 /workspace/coverage/default/3.spi_device_stress_all.3459532282 Jun 02 03:15:25 PM PDT 24 Jun 02 03:17:03 PM PDT 24 40054237467 ps
T954 /workspace/coverage/default/23.spi_device_mailbox.2564720736 Jun 02 03:16:51 PM PDT 24 Jun 02 03:17:01 PM PDT 24 1084270886 ps
T955 /workspace/coverage/default/43.spi_device_stress_all.3577284716 Jun 02 03:18:16 PM PDT 24 Jun 02 03:20:28 PM PDT 24 51142153408 ps
T956 /workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.2903590039 Jun 02 03:16:50 PM PDT 24 Jun 02 03:17:40 PM PDT 24 3192421494 ps
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T958 /workspace/coverage/default/13.spi_device_flash_and_tpm.1987793086 Jun 02 03:16:07 PM PDT 24 Jun 02 03:17:29 PM PDT 24 3901171416 ps
T959 /workspace/coverage/default/6.spi_device_read_buffer_direct.99685440 Jun 02 03:15:45 PM PDT 24 Jun 02 03:15:58 PM PDT 24 6168520368 ps
T960 /workspace/coverage/default/39.spi_device_flash_mode.139964957 Jun 02 03:17:55 PM PDT 24 Jun 02 03:18:10 PM PDT 24 3384772684 ps
T961 /workspace/coverage/default/32.spi_device_stress_all.3280772318 Jun 02 03:17:25 PM PDT 24 Jun 02 03:18:19 PM PDT 24 2201452620 ps
T962 /workspace/coverage/default/42.spi_device_stress_all.1702767213 Jun 02 03:18:09 PM PDT 24 Jun 02 03:18:11 PM PDT 24 233218215 ps
T963 /workspace/coverage/default/33.spi_device_stress_all.3403208156 Jun 02 03:17:34 PM PDT 24 Jun 02 03:18:43 PM PDT 24 3124105734 ps
T964 /workspace/coverage/default/32.spi_device_flash_all.3180114986 Jun 02 03:17:27 PM PDT 24 Jun 02 03:19:57 PM PDT 24 89012942991 ps
T965 /workspace/coverage/default/48.spi_device_mailbox.934360576 Jun 02 03:18:29 PM PDT 24 Jun 02 03:18:57 PM PDT 24 10569949209 ps
T60 /workspace/coverage/cover_reg_top/6.spi_device_tl_errors.2843454448 Jun 02 03:06:20 PM PDT 24 Jun 02 03:06:23 PM PDT 24 106236099 ps
T61 /workspace/coverage/cover_reg_top/0.spi_device_tl_errors.2728079083 Jun 02 03:06:08 PM PDT 24 Jun 02 03:06:10 PM PDT 24 73108524 ps
T113 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2085994729 Jun 02 03:06:12 PM PDT 24 Jun 02 03:06:28 PM PDT 24 2963359433 ps
T966 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.3632999979 Jun 02 03:06:43 PM PDT 24 Jun 02 03:06:45 PM PDT 24 30050432 ps
T62 /workspace/coverage/cover_reg_top/18.spi_device_tl_errors.340169577 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:37 PM PDT 24 252794482 ps
T140 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2878868220 Jun 02 03:06:42 PM PDT 24 Jun 02 03:06:47 PM PDT 24 1157722418 ps
T94 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.3348312841 Jun 02 03:06:21 PM PDT 24 Jun 02 03:06:29 PM PDT 24 102516944 ps
T141 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.2928003837 Jun 02 03:06:32 PM PDT 24 Jun 02 03:06:34 PM PDT 24 147299043 ps
T110 /workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.387030432 Jun 02 03:06:22 PM PDT 24 Jun 02 03:06:25 PM PDT 24 90742716 ps
T114 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.118179916 Jun 02 03:06:24 PM PDT 24 Jun 02 03:06:28 PM PDT 24 230752398 ps
T95 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.1716797853 Jun 02 03:06:29 PM PDT 24 Jun 02 03:06:50 PM PDT 24 3931264497 ps
T111 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.4048956281 Jun 02 03:06:42 PM PDT 24 Jun 02 03:06:47 PM PDT 24 139743804 ps
T97 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2230862957 Jun 02 03:06:34 PM PDT 24 Jun 02 03:06:38 PM PDT 24 538784721 ps
T967 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.1113542144 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:36 PM PDT 24 17232853 ps
T142 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.148119831 Jun 02 03:06:14 PM PDT 24 Jun 02 03:06:16 PM PDT 24 214461013 ps
T968 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.2766716317 Jun 02 03:06:30 PM PDT 24 Jun 02 03:06:32 PM PDT 24 18653618 ps
T112 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.1545951639 Jun 02 03:06:19 PM PDT 24 Jun 02 03:06:22 PM PDT 24 28589163 ps
T152 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1449595614 Jun 02 03:06:13 PM PDT 24 Jun 02 03:06:39 PM PDT 24 3109359365 ps
T108 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3544010819 Jun 02 03:06:33 PM PDT 24 Jun 02 03:06:36 PM PDT 24 140541112 ps
T109 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2799323204 Jun 02 03:06:31 PM PDT 24 Jun 02 03:06:35 PM PDT 24 55805340 ps
T143 /workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2232678833 Jun 02 03:06:25 PM PDT 24 Jun 02 03:06:29 PM PDT 24 482649380 ps
T969 /workspace/coverage/cover_reg_top/12.spi_device_intr_test.1019540964 Jun 02 03:06:23 PM PDT 24 Jun 02 03:06:24 PM PDT 24 27470345 ps
T970 /workspace/coverage/cover_reg_top/36.spi_device_intr_test.2359703954 Jun 02 03:06:40 PM PDT 24 Jun 02 03:06:41 PM PDT 24 14131720 ps
T971 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.3171130484 Jun 02 03:06:22 PM PDT 24 Jun 02 03:06:23 PM PDT 24 13874688 ps
T144 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.2638351625 Jun 02 03:06:18 PM PDT 24 Jun 02 03:06:21 PM PDT 24 567159476 ps
T81 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.1865151040 Jun 02 03:06:07 PM PDT 24 Jun 02 03:06:09 PM PDT 24 198432163 ps
T96 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1188178777 Jun 02 03:06:06 PM PDT 24 Jun 02 03:06:22 PM PDT 24 1635815614 ps
T145 /workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.1349599337 Jun 02 03:06:29 PM PDT 24 Jun 02 03:06:32 PM PDT 24 292027292 ps
T972 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.1030493189 Jun 02 03:06:34 PM PDT 24 Jun 02 03:06:38 PM PDT 24 56220462 ps
T973 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.549549137 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:36 PM PDT 24 13089100 ps
T974 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.608043029 Jun 02 03:06:40 PM PDT 24 Jun 02 03:06:41 PM PDT 24 18347643 ps
T101 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.1601847936 Jun 02 03:06:13 PM PDT 24 Jun 02 03:06:19 PM PDT 24 824553937 ps
T975 /workspace/coverage/cover_reg_top/11.spi_device_csr_rw.2371456390 Jun 02 03:06:24 PM PDT 24 Jun 02 03:06:27 PM PDT 24 62602523 ps
T153 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1471204110 Jun 02 03:06:31 PM PDT 24 Jun 02 03:06:46 PM PDT 24 631898346 ps
T115 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.155931127 Jun 02 03:06:30 PM PDT 24 Jun 02 03:06:33 PM PDT 24 401009716 ps
T976 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.269604665 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:37 PM PDT 24 15750702 ps
T977 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.1751612368 Jun 02 03:06:12 PM PDT 24 Jun 02 03:06:13 PM PDT 24 23176039 ps
T102 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.1060905637 Jun 02 03:06:19 PM PDT 24 Jun 02 03:06:23 PM PDT 24 177707581 ps
T116 /workspace/coverage/cover_reg_top/13.spi_device_csr_rw.276028490 Jun 02 03:06:29 PM PDT 24 Jun 02 03:06:32 PM PDT 24 140628144 ps
T978 /workspace/coverage/cover_reg_top/0.spi_device_mem_walk.2362262257 Jun 02 03:06:06 PM PDT 24 Jun 02 03:06:07 PM PDT 24 42416882 ps
T979 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.1311494382 Jun 02 03:06:07 PM PDT 24 Jun 02 03:06:09 PM PDT 24 34543446 ps
T980 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.3034482862 Jun 02 03:06:12 PM PDT 24 Jun 02 03:06:15 PM PDT 24 77889758 ps
T981 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.2249708817 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:38 PM PDT 24 36754013 ps
T117 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.4066184586 Jun 02 03:06:09 PM PDT 24 Jun 02 03:06:10 PM PDT 24 19973855 ps
T982 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.2033677042 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:37 PM PDT 24 18523150 ps
T154 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.3648510098 Jun 02 03:06:14 PM PDT 24 Jun 02 03:06:39 PM PDT 24 5502769687 ps
T983 /workspace/coverage/cover_reg_top/33.spi_device_intr_test.3378720986 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:37 PM PDT 24 14678513 ps
T118 /workspace/coverage/cover_reg_top/5.spi_device_csr_rw.619936919 Jun 02 03:06:18 PM PDT 24 Jun 02 03:06:21 PM PDT 24 36602207 ps
T984 /workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1000303369 Jun 02 03:06:22 PM PDT 24 Jun 02 03:06:24 PM PDT 24 44903867 ps
T105 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.2660680518 Jun 02 03:06:24 PM PDT 24 Jun 02 03:06:26 PM PDT 24 93490032 ps
T985 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.635116886 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:39 PM PDT 24 41305208 ps
T155 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2249495061 Jun 02 03:06:30 PM PDT 24 Jun 02 03:06:32 PM PDT 24 295528315 ps
T82 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.1493907706 Jun 02 03:06:08 PM PDT 24 Jun 02 03:06:10 PM PDT 24 67436381 ps
T119 /workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3650534417 Jun 02 03:06:14 PM PDT 24 Jun 02 03:06:15 PM PDT 24 32471941 ps
T156 /workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.3318702514 Jun 02 03:06:07 PM PDT 24 Jun 02 03:06:15 PM PDT 24 607917493 ps
T986 /workspace/coverage/cover_reg_top/44.spi_device_intr_test.2505822864 Jun 02 03:06:41 PM PDT 24 Jun 02 03:06:43 PM PDT 24 39039078 ps
T987 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.1839399412 Jun 02 03:06:42 PM PDT 24 Jun 02 03:06:43 PM PDT 24 11933004 ps
T988 /workspace/coverage/cover_reg_top/30.spi_device_intr_test.3362833949 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:38 PM PDT 24 15560630 ps
T989 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.3606083469 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:38 PM PDT 24 12010173 ps
T990 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.3848436406 Jun 02 03:06:23 PM PDT 24 Jun 02 03:06:26 PM PDT 24 42051378 ps
T83 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.2716064702 Jun 02 03:06:11 PM PDT 24 Jun 02 03:06:12 PM PDT 24 25233745 ps
T120 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.711325004 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:38 PM PDT 24 105668574 ps
T991 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.87825225 Jun 02 03:06:42 PM PDT 24 Jun 02 03:06:47 PM PDT 24 66409000 ps
T992 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.1426122325 Jun 02 03:06:16 PM PDT 24 Jun 02 03:06:19 PM PDT 24 90075622 ps
T993 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.837774592 Jun 02 03:06:09 PM PDT 24 Jun 02 03:06:11 PM PDT 24 32916407 ps
T994 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.478242379 Jun 02 03:06:31 PM PDT 24 Jun 02 03:06:33 PM PDT 24 95718997 ps
T995 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.4139780666 Jun 02 03:06:17 PM PDT 24 Jun 02 03:06:20 PM PDT 24 107711279 ps
T121 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.326553924 Jun 02 03:06:11 PM PDT 24 Jun 02 03:06:14 PM PDT 24 28800664 ps
T996 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3318339271 Jun 02 03:06:25 PM PDT 24 Jun 02 03:06:29 PM PDT 24 151912371 ps
T997 /workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.2674298639 Jun 02 03:06:34 PM PDT 24 Jun 02 03:06:36 PM PDT 24 202607014 ps
T177 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.76758202 Jun 02 03:06:24 PM PDT 24 Jun 02 03:06:45 PM PDT 24 3467207330 ps
T124 /workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.1973301216 Jun 02 03:06:13 PM PDT 24 Jun 02 03:06:16 PM PDT 24 337971532 ps
T180 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.3026797403 Jun 02 03:06:24 PM PDT 24 Jun 02 03:06:39 PM PDT 24 2308873265 ps
T998 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.1097600993 Jun 02 03:06:12 PM PDT 24 Jun 02 03:06:13 PM PDT 24 33237472 ps
T999 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.463420802 Jun 02 03:06:08 PM PDT 24 Jun 02 03:06:10 PM PDT 24 52853494 ps
T1000 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.3050432410 Jun 02 03:06:19 PM PDT 24 Jun 02 03:06:21 PM PDT 24 57181383 ps
T1001 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.3451375075 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:37 PM PDT 24 18073359 ps
T1002 /workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.3016261251 Jun 02 03:06:22 PM PDT 24 Jun 02 03:06:27 PM PDT 24 208315397 ps
T106 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.1192562222 Jun 02 03:06:13 PM PDT 24 Jun 02 03:06:17 PM PDT 24 64159548 ps
T1003 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.1650980958 Jun 02 03:06:08 PM PDT 24 Jun 02 03:06:10 PM PDT 24 46187018 ps
T1004 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.3015632999 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:37 PM PDT 24 56003151 ps
T181 /workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.2831840705 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:44 PM PDT 24 287064662 ps
T104 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.2937754690 Jun 02 03:06:41 PM PDT 24 Jun 02 03:06:46 PM PDT 24 133205719 ps
T178 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.2617777287 Jun 02 03:06:19 PM PDT 24 Jun 02 03:06:33 PM PDT 24 204566181 ps
T1005 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.3368166030 Jun 02 03:06:40 PM PDT 24 Jun 02 03:06:42 PM PDT 24 28533878 ps
T1006 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.2047344388 Jun 02 03:06:35 PM PDT 24 Jun 02 03:06:37 PM PDT 24 14486254 ps
T185 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.913250062 Jun 02 03:06:10 PM PDT 24 Jun 02 03:06:26 PM PDT 24 682085127 ps
T1007 /workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3160045539 Jun 02 03:06:32 PM PDT 24 Jun 02 03:06:34 PM PDT 24 234447538 ps
T103 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2780723383 Jun 02 03:06:23 PM PDT 24 Jun 02 03:06:27 PM PDT 24 384336293 ps
T1008 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3945554471 Jun 02 03:06:31 PM PDT 24 Jun 02 03:06:33 PM PDT 24 382270068 ps
T122 /workspace/coverage/cover_reg_top/14.spi_device_csr_rw.3837567622 Jun 02 03:06:30 PM PDT 24 Jun 02 03:06:33 PM PDT 24 97855851 ps
T123 /workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.699051645 Jun 02 03:06:16 PM PDT 24 Jun 02 03:06:30 PM PDT 24 2256792988 ps
T1009 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.1948613060 Jun 02 03:06:08 PM PDT 24 Jun 02 03:06:22 PM PDT 24 1114571903 ps
T1010 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.3598143380 Jun 02 03:06:36 PM PDT 24 Jun 02 03:06:38 PM PDT 24 29724474 ps
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