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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.07 98.30 94.11 98.61 89.36 97.14 95.84 99.10


Total test records in report: 1081
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T827 /workspace/coverage/default/5.spi_device_tpm_all.2438455412 Jun 04 02:01:25 PM PDT 24 Jun 04 02:01:52 PM PDT 24 34930249534 ps
T244 /workspace/coverage/default/5.spi_device_stress_all.1515940893 Jun 04 02:01:33 PM PDT 24 Jun 04 02:06:53 PM PDT 24 142736124791 ps
T828 /workspace/coverage/default/29.spi_device_pass_addr_payload_swap.1397765135 Jun 04 02:02:49 PM PDT 24 Jun 04 02:03:07 PM PDT 24 20503163273 ps
T829 /workspace/coverage/default/30.spi_device_mailbox.1689688694 Jun 04 02:02:55 PM PDT 24 Jun 04 02:03:50 PM PDT 24 5723290655 ps
T830 /workspace/coverage/default/49.spi_device_tpm_sts_read.3951193818 Jun 04 02:04:19 PM PDT 24 Jun 04 02:04:21 PM PDT 24 108352330 ps
T248 /workspace/coverage/default/27.spi_device_flash_all.3618580243 Jun 04 02:02:44 PM PDT 24 Jun 04 02:07:38 PM PDT 24 36965096634 ps
T831 /workspace/coverage/default/21.spi_device_intercept.2894576539 Jun 04 02:02:37 PM PDT 24 Jun 04 02:02:43 PM PDT 24 2571671706 ps
T832 /workspace/coverage/default/34.spi_device_mailbox.833024194 Jun 04 02:03:06 PM PDT 24 Jun 04 02:03:29 PM PDT 24 11309127570 ps
T833 /workspace/coverage/default/43.spi_device_csb_read.440448335 Jun 04 02:03:38 PM PDT 24 Jun 04 02:03:40 PM PDT 24 19926876 ps
T834 /workspace/coverage/default/48.spi_device_flash_mode.2140363414 Jun 04 02:04:15 PM PDT 24 Jun 04 02:04:34 PM PDT 24 1908426218 ps
T835 /workspace/coverage/default/12.spi_device_flash_mode.1444406304 Jun 04 02:01:54 PM PDT 24 Jun 04 02:02:26 PM PDT 24 2113413897 ps
T163 /workspace/coverage/default/17.spi_device_stress_all.3464476559 Jun 04 02:02:09 PM PDT 24 Jun 04 02:18:14 PM PDT 24 1082369043816 ps
T836 /workspace/coverage/default/5.spi_device_alert_test.3298007515 Jun 04 02:01:33 PM PDT 24 Jun 04 02:01:34 PM PDT 24 14496735 ps
T837 /workspace/coverage/default/42.spi_device_flash_and_tpm.4068043371 Jun 04 02:03:33 PM PDT 24 Jun 04 02:04:38 PM PDT 24 38024894117 ps
T838 /workspace/coverage/default/20.spi_device_upload.3521018881 Jun 04 02:02:17 PM PDT 24 Jun 04 02:02:26 PM PDT 24 4416250951 ps
T263 /workspace/coverage/default/21.spi_device_flash_and_tpm.1337380251 Jun 04 02:02:30 PM PDT 24 Jun 04 02:04:29 PM PDT 24 29147390436 ps
T839 /workspace/coverage/default/48.spi_device_stress_all.175815324 Jun 04 02:04:15 PM PDT 24 Jun 04 02:09:46 PM PDT 24 53459728527 ps
T840 /workspace/coverage/default/11.spi_device_flash_and_tpm.118458006 Jun 04 02:01:53 PM PDT 24 Jun 04 02:03:13 PM PDT 24 33407084301 ps
T841 /workspace/coverage/default/12.spi_device_mailbox.1430632673 Jun 04 02:01:54 PM PDT 24 Jun 04 02:02:03 PM PDT 24 490631999 ps
T842 /workspace/coverage/default/17.spi_device_upload.303093610 Jun 04 02:02:07 PM PDT 24 Jun 04 02:02:39 PM PDT 24 35229158377 ps
T843 /workspace/coverage/default/45.spi_device_cfg_cmd.2918327629 Jun 04 02:03:37 PM PDT 24 Jun 04 02:03:41 PM PDT 24 555671140 ps
T844 /workspace/coverage/default/14.spi_device_csb_read.1256317041 Jun 04 02:02:06 PM PDT 24 Jun 04 02:02:08 PM PDT 24 19051007 ps
T845 /workspace/coverage/default/44.spi_device_mailbox.3842069443 Jun 04 02:03:37 PM PDT 24 Jun 04 02:04:14 PM PDT 24 4450908998 ps
T846 /workspace/coverage/default/40.spi_device_stress_all.3519236046 Jun 04 02:03:31 PM PDT 24 Jun 04 02:13:36 PM PDT 24 60841441840 ps
T847 /workspace/coverage/default/43.spi_device_intercept.3314521553 Jun 04 02:03:37 PM PDT 24 Jun 04 02:03:45 PM PDT 24 585622323 ps
T848 /workspace/coverage/default/24.spi_device_intercept.2825570738 Jun 04 02:02:36 PM PDT 24 Jun 04 02:02:43 PM PDT 24 527056756 ps
T849 /workspace/coverage/default/3.spi_device_mailbox.3880973041 Jun 04 02:01:24 PM PDT 24 Jun 04 02:01:55 PM PDT 24 3464202326 ps
T850 /workspace/coverage/default/43.spi_device_upload.3390349779 Jun 04 02:03:36 PM PDT 24 Jun 04 02:03:47 PM PDT 24 7487548393 ps
T273 /workspace/coverage/default/41.spi_device_flash_all.3441198711 Jun 04 02:03:28 PM PDT 24 Jun 04 02:06:49 PM PDT 24 30522244256 ps
T851 /workspace/coverage/default/0.spi_device_pass_cmd_filtering.3631113854 Jun 04 02:01:19 PM PDT 24 Jun 04 02:01:32 PM PDT 24 1536851089 ps
T852 /workspace/coverage/default/44.spi_device_pass_addr_payload_swap.3552322633 Jun 04 02:03:37 PM PDT 24 Jun 04 02:03:45 PM PDT 24 2509833388 ps
T853 /workspace/coverage/default/26.spi_device_pass_addr_payload_swap.1111486276 Jun 04 02:02:53 PM PDT 24 Jun 04 02:03:19 PM PDT 24 31385818974 ps
T854 /workspace/coverage/default/9.spi_device_pass_cmd_filtering.3736333003 Jun 04 02:01:39 PM PDT 24 Jun 04 02:01:44 PM PDT 24 2044022216 ps
T855 /workspace/coverage/default/25.spi_device_pass_cmd_filtering.3578156346 Jun 04 02:02:41 PM PDT 24 Jun 04 02:02:44 PM PDT 24 233958803 ps
T856 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.928645472 Jun 04 02:03:38 PM PDT 24 Jun 04 02:03:44 PM PDT 24 1085157977 ps
T857 /workspace/coverage/default/45.spi_device_tpm_rw.3510373081 Jun 04 02:03:36 PM PDT 24 Jun 04 02:03:38 PM PDT 24 74788761 ps
T858 /workspace/coverage/default/5.spi_device_cfg_cmd.1243310581 Jun 04 02:01:38 PM PDT 24 Jun 04 02:01:41 PM PDT 24 153582097 ps
T859 /workspace/coverage/default/4.spi_device_pass_addr_payload_swap.3415985147 Jun 04 02:01:27 PM PDT 24 Jun 04 02:01:40 PM PDT 24 3341739834 ps
T860 /workspace/coverage/default/18.spi_device_intercept.1483987934 Jun 04 02:02:20 PM PDT 24 Jun 04 02:02:35 PM PDT 24 2393836187 ps
T861 /workspace/coverage/default/11.spi_device_tpm_sts_read.3504968561 Jun 04 02:01:46 PM PDT 24 Jun 04 02:01:47 PM PDT 24 46455055 ps
T862 /workspace/coverage/default/27.spi_device_flash_mode.73080411 Jun 04 02:02:44 PM PDT 24 Jun 04 02:02:51 PM PDT 24 339953584 ps
T863 /workspace/coverage/default/32.spi_device_read_buffer_direct.716746391 Jun 04 02:03:03 PM PDT 24 Jun 04 02:03:07 PM PDT 24 72974882 ps
T864 /workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.1373124533 Jun 04 02:04:17 PM PDT 24 Jun 04 02:05:38 PM PDT 24 33386595854 ps
T865 /workspace/coverage/default/33.spi_device_tpm_sts_read.2313886851 Jun 04 02:03:01 PM PDT 24 Jun 04 02:03:03 PM PDT 24 20402847 ps
T866 /workspace/coverage/default/13.spi_device_flash_mode.3515256265 Jun 04 02:02:02 PM PDT 24 Jun 04 02:02:30 PM PDT 24 4793303243 ps
T867 /workspace/coverage/default/34.spi_device_tpm_all.4162236231 Jun 04 02:03:02 PM PDT 24 Jun 04 02:03:32 PM PDT 24 11726263582 ps
T868 /workspace/coverage/default/13.spi_device_mailbox.1783746242 Jun 04 02:02:01 PM PDT 24 Jun 04 02:02:06 PM PDT 24 712808591 ps
T869 /workspace/coverage/default/7.spi_device_tpm_read_hw_reg.3565324609 Jun 04 02:01:35 PM PDT 24 Jun 04 02:01:42 PM PDT 24 2843050062 ps
T870 /workspace/coverage/default/2.spi_device_tpm_rw.2036929157 Jun 04 02:01:20 PM PDT 24 Jun 04 02:01:28 PM PDT 24 192718795 ps
T871 /workspace/coverage/default/37.spi_device_flash_and_tpm.3419162316 Jun 04 02:03:26 PM PDT 24 Jun 04 02:08:26 PM PDT 24 59650904980 ps
T872 /workspace/coverage/default/48.spi_device_tpm_sts_read.2688459743 Jun 04 02:04:14 PM PDT 24 Jun 04 02:04:16 PM PDT 24 18858353 ps
T873 /workspace/coverage/default/21.spi_device_alert_test.2195782273 Jun 04 02:02:32 PM PDT 24 Jun 04 02:02:33 PM PDT 24 13147544 ps
T874 /workspace/coverage/default/32.spi_device_flash_mode.2687243416 Jun 04 02:03:01 PM PDT 24 Jun 04 02:03:45 PM PDT 24 11828247784 ps
T875 /workspace/coverage/default/39.spi_device_read_buffer_direct.792387903 Jun 04 02:03:23 PM PDT 24 Jun 04 02:03:27 PM PDT 24 334432654 ps
T876 /workspace/coverage/default/39.spi_device_tpm_read_hw_reg.746696235 Jun 04 02:03:22 PM PDT 24 Jun 04 02:03:28 PM PDT 24 2220929691 ps
T877 /workspace/coverage/default/41.spi_device_read_buffer_direct.395686192 Jun 04 02:03:33 PM PDT 24 Jun 04 02:03:38 PM PDT 24 457413171 ps
T878 /workspace/coverage/default/28.spi_device_mailbox.1541255443 Jun 04 02:02:49 PM PDT 24 Jun 04 02:02:56 PM PDT 24 669955289 ps
T879 /workspace/coverage/default/22.spi_device_stress_all.180442653 Jun 04 02:02:33 PM PDT 24 Jun 04 02:03:20 PM PDT 24 18873232168 ps
T880 /workspace/coverage/default/49.spi_device_flash_mode.3299278185 Jun 04 02:04:17 PM PDT 24 Jun 04 02:04:44 PM PDT 24 8346842489 ps
T262 /workspace/coverage/default/43.spi_device_flash_all.1050379472 Jun 04 02:03:36 PM PDT 24 Jun 04 02:05:20 PM PDT 24 5489721301 ps
T881 /workspace/coverage/default/6.spi_device_tpm_sts_read.1161707396 Jun 04 02:01:36 PM PDT 24 Jun 04 02:01:38 PM PDT 24 72372880 ps
T882 /workspace/coverage/default/20.spi_device_alert_test.3342478461 Jun 04 02:02:34 PM PDT 24 Jun 04 02:02:36 PM PDT 24 19640960 ps
T883 /workspace/coverage/default/47.spi_device_flash_mode.3271295050 Jun 04 02:04:12 PM PDT 24 Jun 04 02:04:21 PM PDT 24 752035869 ps
T884 /workspace/coverage/default/10.spi_device_flash_all.2632096364 Jun 04 02:01:52 PM PDT 24 Jun 04 02:07:26 PM PDT 24 51546746801 ps
T258 /workspace/coverage/default/13.spi_device_stress_all.2413247838 Jun 04 02:01:59 PM PDT 24 Jun 04 02:04:56 PM PDT 24 28135957382 ps
T885 /workspace/coverage/default/11.spi_device_read_buffer_direct.1154139498 Jun 04 02:01:47 PM PDT 24 Jun 04 02:01:53 PM PDT 24 241195186 ps
T886 /workspace/coverage/default/45.spi_device_csb_read.2995020723 Jun 04 02:03:38 PM PDT 24 Jun 04 02:03:40 PM PDT 24 54549295 ps
T887 /workspace/coverage/default/40.spi_device_tpm_all.1990574240 Jun 04 02:03:25 PM PDT 24 Jun 04 02:03:43 PM PDT 24 1340448777 ps
T888 /workspace/coverage/default/44.spi_device_pass_cmd_filtering.3050285388 Jun 04 02:03:37 PM PDT 24 Jun 04 02:03:47 PM PDT 24 1179862739 ps
T889 /workspace/coverage/default/47.spi_device_alert_test.4154776829 Jun 04 02:04:14 PM PDT 24 Jun 04 02:04:16 PM PDT 24 24633258 ps
T890 /workspace/coverage/default/7.spi_device_pass_addr_payload_swap.2107807069 Jun 04 02:01:37 PM PDT 24 Jun 04 02:01:42 PM PDT 24 509017395 ps
T891 /workspace/coverage/default/27.spi_device_cfg_cmd.1202088588 Jun 04 02:02:47 PM PDT 24 Jun 04 02:02:50 PM PDT 24 79484535 ps
T23 /workspace/coverage/default/21.spi_device_stress_all.4145813394 Jun 04 02:02:32 PM PDT 24 Jun 04 02:05:43 PM PDT 24 81785655768 ps
T892 /workspace/coverage/default/14.spi_device_tpm_rw.1392638352 Jun 04 02:02:03 PM PDT 24 Jun 04 02:02:10 PM PDT 24 186495472 ps
T893 /workspace/coverage/default/19.spi_device_cfg_cmd.2493586155 Jun 04 02:02:18 PM PDT 24 Jun 04 02:02:27 PM PDT 24 656257785 ps
T894 /workspace/coverage/default/19.spi_device_stress_all.1191251964 Jun 04 02:02:19 PM PDT 24 Jun 04 02:06:13 PM PDT 24 34148413003 ps
T895 /workspace/coverage/default/42.spi_device_cfg_cmd.1429663220 Jun 04 02:03:31 PM PDT 24 Jun 04 02:03:34 PM PDT 24 420344205 ps
T896 /workspace/coverage/default/25.spi_device_alert_test.3430343279 Jun 04 02:02:39 PM PDT 24 Jun 04 02:02:41 PM PDT 24 53297091 ps
T897 /workspace/coverage/default/1.spi_device_flash_and_tpm.1427399853 Jun 04 02:01:19 PM PDT 24 Jun 04 02:03:40 PM PDT 24 16733847009 ps
T898 /workspace/coverage/default/22.spi_device_alert_test.3639958335 Jun 04 02:02:31 PM PDT 24 Jun 04 02:02:32 PM PDT 24 11776024 ps
T899 /workspace/coverage/default/5.spi_device_upload.2791132824 Jun 04 02:01:38 PM PDT 24 Jun 04 02:02:00 PM PDT 24 52195675311 ps
T268 /workspace/coverage/default/31.spi_device_stress_all.949244581 Jun 04 02:02:57 PM PDT 24 Jun 04 02:04:03 PM PDT 24 5334315063 ps
T900 /workspace/coverage/default/19.spi_device_mailbox.60137820 Jun 04 02:02:20 PM PDT 24 Jun 04 02:03:17 PM PDT 24 24877875587 ps
T901 /workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.4146083899 Jun 04 02:01:46 PM PDT 24 Jun 04 02:02:10 PM PDT 24 5888582204 ps
T902 /workspace/coverage/default/23.spi_device_pass_cmd_filtering.401721935 Jun 04 02:02:36 PM PDT 24 Jun 04 02:02:40 PM PDT 24 30900641 ps
T903 /workspace/coverage/default/7.spi_device_upload.3603437598 Jun 04 02:01:40 PM PDT 24 Jun 04 02:01:49 PM PDT 24 609863473 ps
T904 /workspace/coverage/default/6.spi_device_tpm_all.68257876 Jun 04 02:01:36 PM PDT 24 Jun 04 02:01:55 PM PDT 24 2467271802 ps
T905 /workspace/coverage/default/46.spi_device_cfg_cmd.3675646187 Jun 04 02:04:14 PM PDT 24 Jun 04 02:04:20 PM PDT 24 3314567581 ps
T906 /workspace/coverage/default/23.spi_device_pass_addr_payload_swap.2690229568 Jun 04 02:02:32 PM PDT 24 Jun 04 02:02:36 PM PDT 24 175156574 ps
T907 /workspace/coverage/default/32.spi_device_pass_cmd_filtering.1797397940 Jun 04 02:02:53 PM PDT 24 Jun 04 02:03:07 PM PDT 24 9270227498 ps
T261 /workspace/coverage/default/23.spi_device_flash_and_tpm.1179543090 Jun 04 02:02:39 PM PDT 24 Jun 04 02:05:07 PM PDT 24 88196796723 ps
T141 /workspace/coverage/default/16.spi_device_flash_and_tpm.2688629017 Jun 04 02:02:12 PM PDT 24 Jun 04 02:03:48 PM PDT 24 16653966852 ps
T908 /workspace/coverage/default/2.spi_device_csb_read.319173449 Jun 04 02:01:34 PM PDT 24 Jun 04 02:01:36 PM PDT 24 13246686 ps
T909 /workspace/coverage/default/5.spi_device_tpm_sts_read.635606410 Jun 04 02:01:30 PM PDT 24 Jun 04 02:01:31 PM PDT 24 106941965 ps
T910 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.3902738600 Jun 04 02:04:12 PM PDT 24 Jun 04 02:04:35 PM PDT 24 35175947253 ps
T911 /workspace/coverage/default/24.spi_device_tpm_rw.602476584 Jun 04 02:02:36 PM PDT 24 Jun 04 02:02:47 PM PDT 24 548162779 ps
T912 /workspace/coverage/default/36.spi_device_alert_test.351803181 Jun 04 02:03:17 PM PDT 24 Jun 04 02:03:19 PM PDT 24 27005123 ps
T913 /workspace/coverage/default/15.spi_device_flash_mode.3668247250 Jun 04 02:02:02 PM PDT 24 Jun 04 02:02:13 PM PDT 24 491761601 ps
T914 /workspace/coverage/default/20.spi_device_tpm_rw.233321634 Jun 04 02:02:20 PM PDT 24 Jun 04 02:02:22 PM PDT 24 108222380 ps
T915 /workspace/coverage/default/49.spi_device_tpm_all.430750661 Jun 04 02:04:19 PM PDT 24 Jun 04 02:04:38 PM PDT 24 3258001272 ps
T916 /workspace/coverage/default/11.spi_device_mailbox.4018074204 Jun 04 02:01:45 PM PDT 24 Jun 04 02:01:59 PM PDT 24 3115014945 ps
T917 /workspace/coverage/default/24.spi_device_csb_read.2053693489 Jun 04 02:02:34 PM PDT 24 Jun 04 02:02:36 PM PDT 24 19057797 ps
T918 /workspace/coverage/default/34.spi_device_flash_mode.3945022842 Jun 04 02:03:11 PM PDT 24 Jun 04 02:03:42 PM PDT 24 7327304566 ps
T919 /workspace/coverage/default/37.spi_device_intercept.1427722091 Jun 04 02:03:23 PM PDT 24 Jun 04 02:03:28 PM PDT 24 83936979 ps
T920 /workspace/coverage/default/32.spi_device_intercept.3028871743 Jun 04 02:03:02 PM PDT 24 Jun 04 02:03:19 PM PDT 24 3502698217 ps
T921 /workspace/coverage/default/41.spi_device_csb_read.3502002596 Jun 04 02:03:32 PM PDT 24 Jun 04 02:03:34 PM PDT 24 25925523 ps
T922 /workspace/coverage/default/29.spi_device_stress_all.37110723 Jun 04 02:02:49 PM PDT 24 Jun 04 02:04:35 PM PDT 24 15195572314 ps
T923 /workspace/coverage/default/32.spi_device_alert_test.2889628 Jun 04 02:03:01 PM PDT 24 Jun 04 02:03:03 PM PDT 24 14744092 ps
T924 /workspace/coverage/default/12.spi_device_tpm_sts_read.1296882709 Jun 04 02:01:53 PM PDT 24 Jun 04 02:01:55 PM PDT 24 56631764 ps
T70 /workspace/coverage/default/4.spi_device_sec_cm.434403815 Jun 04 02:01:28 PM PDT 24 Jun 04 02:01:31 PM PDT 24 343751292 ps
T925 /workspace/coverage/default/49.spi_device_mailbox.741512515 Jun 04 02:04:16 PM PDT 24 Jun 04 02:04:25 PM PDT 24 1661264223 ps
T926 /workspace/coverage/default/7.spi_device_read_buffer_direct.4202813539 Jun 04 02:01:33 PM PDT 24 Jun 04 02:01:44 PM PDT 24 7650809825 ps
T927 /workspace/coverage/default/41.spi_device_alert_test.1122384342 Jun 04 02:03:30 PM PDT 24 Jun 04 02:03:31 PM PDT 24 17857857 ps
T928 /workspace/coverage/default/17.spi_device_tpm_rw.883169741 Jun 04 02:02:06 PM PDT 24 Jun 04 02:02:09 PM PDT 24 120577540 ps
T929 /workspace/coverage/default/3.spi_device_alert_test.3965124994 Jun 04 02:01:25 PM PDT 24 Jun 04 02:01:27 PM PDT 24 11600354 ps
T930 /workspace/coverage/default/39.spi_device_pass_cmd_filtering.3001212443 Jun 04 02:03:22 PM PDT 24 Jun 04 02:03:26 PM PDT 24 201317505 ps
T931 /workspace/coverage/default/45.spi_device_pass_cmd_filtering.3219941802 Jun 04 02:03:37 PM PDT 24 Jun 04 02:03:41 PM PDT 24 32444218 ps
T280 /workspace/coverage/default/33.spi_device_stress_all.593649810 Jun 04 02:03:02 PM PDT 24 Jun 04 02:03:38 PM PDT 24 10460184636 ps
T932 /workspace/coverage/default/48.spi_device_mailbox.1411384475 Jun 04 02:04:12 PM PDT 24 Jun 04 02:05:40 PM PDT 24 36763427390 ps
T933 /workspace/coverage/default/18.spi_device_flash_and_tpm.1424972940 Jun 04 02:02:19 PM PDT 24 Jun 04 02:02:59 PM PDT 24 8159178976 ps
T934 /workspace/coverage/default/3.spi_device_tpm_rw.4291334921 Jun 04 02:01:26 PM PDT 24 Jun 04 02:01:29 PM PDT 24 40883625 ps
T935 /workspace/coverage/default/42.spi_device_alert_test.1213424547 Jun 04 02:03:32 PM PDT 24 Jun 04 02:03:34 PM PDT 24 39661159 ps
T936 /workspace/coverage/default/30.spi_device_cfg_cmd.2395119785 Jun 04 02:02:55 PM PDT 24 Jun 04 02:03:01 PM PDT 24 827782360 ps
T937 /workspace/coverage/default/28.spi_device_read_buffer_direct.955123709 Jun 04 02:02:46 PM PDT 24 Jun 04 02:02:53 PM PDT 24 4005484970 ps
T938 /workspace/coverage/default/13.spi_device_csb_read.3009279511 Jun 04 02:01:56 PM PDT 24 Jun 04 02:01:58 PM PDT 24 20561861 ps
T939 /workspace/coverage/default/15.spi_device_pass_cmd_filtering.2276113980 Jun 04 02:02:03 PM PDT 24 Jun 04 02:02:20 PM PDT 24 5012452523 ps
T940 /workspace/coverage/default/3.spi_device_flash_all.1304762552 Jun 04 02:01:25 PM PDT 24 Jun 04 02:02:48 PM PDT 24 18744589822 ps
T941 /workspace/coverage/default/15.spi_device_cfg_cmd.9393807 Jun 04 02:02:04 PM PDT 24 Jun 04 02:02:11 PM PDT 24 341990822 ps
T942 /workspace/coverage/default/28.spi_device_flash_mode.601773181 Jun 04 02:02:47 PM PDT 24 Jun 04 02:03:09 PM PDT 24 1257033714 ps
T270 /workspace/coverage/default/9.spi_device_pass_addr_payload_swap.794697975 Jun 04 02:01:43 PM PDT 24 Jun 04 02:02:40 PM PDT 24 19192572886 ps
T943 /workspace/coverage/default/3.spi_device_flash_and_tpm.1990220284 Jun 04 02:01:28 PM PDT 24 Jun 04 02:02:32 PM PDT 24 3704445721 ps
T944 /workspace/coverage/default/29.spi_device_tpm_all.2573501726 Jun 04 02:02:49 PM PDT 24 Jun 04 02:03:32 PM PDT 24 8403479073 ps
T47 /workspace/coverage/default/1.spi_device_stress_all.1930832738 Jun 04 02:01:19 PM PDT 24 Jun 04 02:13:30 PM PDT 24 157647390644 ps
T142 /workspace/coverage/default/34.spi_device_flash_and_tpm.914042235 Jun 04 02:03:10 PM PDT 24 Jun 04 02:10:51 PM PDT 24 42144648517 ps
T945 /workspace/coverage/default/30.spi_device_flash_and_tpm_min_idle.1910157662 Jun 04 02:02:54 PM PDT 24 Jun 04 02:05:51 PM PDT 24 82136344517 ps
T946 /workspace/coverage/default/14.spi_device_tpm_all.1870707747 Jun 04 02:02:02 PM PDT 24 Jun 04 02:02:42 PM PDT 24 23463524240 ps
T947 /workspace/coverage/default/12.spi_device_pass_cmd_filtering.2923571258 Jun 04 02:01:53 PM PDT 24 Jun 04 02:02:03 PM PDT 24 10135159923 ps
T948 /workspace/coverage/default/9.spi_device_flash_all.3651652344 Jun 04 02:01:40 PM PDT 24 Jun 04 02:01:56 PM PDT 24 8167635653 ps
T949 /workspace/coverage/default/41.spi_device_stress_all.2387913345 Jun 04 02:03:32 PM PDT 24 Jun 04 02:04:46 PM PDT 24 7401631824 ps
T950 /workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.3565067729 Jun 04 02:02:00 PM PDT 24 Jun 04 02:02:41 PM PDT 24 6433556015 ps
T951 /workspace/coverage/default/6.spi_device_tpm_read_hw_reg.1685237498 Jun 04 02:01:37 PM PDT 24 Jun 04 02:01:55 PM PDT 24 33902519541 ps
T952 /workspace/coverage/default/39.spi_device_alert_test.804848320 Jun 04 02:03:23 PM PDT 24 Jun 04 02:03:26 PM PDT 24 11403460 ps
T953 /workspace/coverage/default/37.spi_device_alert_test.2613643350 Jun 04 02:03:20 PM PDT 24 Jun 04 02:03:21 PM PDT 24 13162941 ps
T954 /workspace/coverage/default/35.spi_device_flash_and_tpm.574960699 Jun 04 02:03:13 PM PDT 24 Jun 04 02:06:01 PM PDT 24 14427144142 ps
T955 /workspace/coverage/default/14.spi_device_flash_and_tpm.1560496370 Jun 04 02:02:03 PM PDT 24 Jun 04 02:05:12 PM PDT 24 16594550546 ps
T956 /workspace/coverage/default/46.spi_device_read_buffer_direct.3631532124 Jun 04 02:04:11 PM PDT 24 Jun 04 02:04:16 PM PDT 24 96205866 ps
T957 /workspace/coverage/default/39.spi_device_tpm_all.358148799 Jun 04 02:03:23 PM PDT 24 Jun 04 02:03:44 PM PDT 24 3120309486 ps
T958 /workspace/coverage/default/30.spi_device_stress_all.2035950210 Jun 04 02:02:53 PM PDT 24 Jun 04 02:02:56 PM PDT 24 42680935 ps
T143 /workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.1653949959 Jun 04 02:04:11 PM PDT 24 Jun 04 02:05:24 PM PDT 24 7968412374 ps
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T250 /workspace/coverage/default/13.spi_device_flash_and_tpm.2131578396 Jun 04 02:02:06 PM PDT 24 Jun 04 02:04:45 PM PDT 24 14015223577 ps
T962 /workspace/coverage/default/32.spi_device_tpm_read_hw_reg.3254543471 Jun 04 02:02:56 PM PDT 24 Jun 04 02:03:12 PM PDT 24 19984901021 ps
T963 /workspace/coverage/default/32.spi_device_tpm_all.1421842101 Jun 04 02:02:52 PM PDT 24 Jun 04 02:03:07 PM PDT 24 9371470993 ps
T964 /workspace/coverage/default/29.spi_device_upload.617316686 Jun 04 02:02:49 PM PDT 24 Jun 04 02:02:53 PM PDT 24 81143339 ps
T965 /workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1494901208 Jun 04 12:45:29 PM PDT 24 Jun 04 12:45:31 PM PDT 24 11575593 ps
T62 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.670915857 Jun 04 12:45:25 PM PDT 24 Jun 04 12:45:41 PM PDT 24 3275693213 ps
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T144 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.1932241416 Jun 04 12:45:42 PM PDT 24 Jun 04 12:45:48 PM PDT 24 244662355 ps
T966 /workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.362393124 Jun 04 12:45:25 PM PDT 24 Jun 04 12:45:37 PM PDT 24 316389384 ps
T64 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2594320098 Jun 04 12:45:33 PM PDT 24 Jun 04 12:45:37 PM PDT 24 371184689 ps
T95 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.93664298 Jun 04 12:45:30 PM PDT 24 Jun 04 12:45:48 PM PDT 24 1232682862 ps
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T145 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.877065420 Jun 04 12:45:41 PM PDT 24 Jun 04 12:45:45 PM PDT 24 89358644 ps
T968 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.2077605671 Jun 04 12:45:29 PM PDT 24 Jun 04 12:45:33 PM PDT 24 459340988 ps
T120 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2954175742 Jun 04 12:45:25 PM PDT 24 Jun 04 12:45:30 PM PDT 24 254653179 ps
T121 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3376404072 Jun 04 12:45:33 PM PDT 24 Jun 04 12:45:35 PM PDT 24 155425936 ps
T969 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.545242033 Jun 04 12:45:32 PM PDT 24 Jun 04 12:45:36 PM PDT 24 218981389 ps
T96 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.4161243171 Jun 04 12:45:22 PM PDT 24 Jun 04 12:45:47 PM PDT 24 829328614 ps
T117 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.1000042569 Jun 04 12:45:39 PM PDT 24 Jun 04 12:45:56 PM PDT 24 4760137317 ps
T94 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.1190229309 Jun 04 12:45:22 PM PDT 24 Jun 04 12:45:27 PM PDT 24 125638608 ps
T122 /workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2324971213 Jun 04 12:45:24 PM PDT 24 Jun 04 12:46:05 PM PDT 24 2706786160 ps
T970 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3721180185 Jun 04 12:45:45 PM PDT 24 Jun 04 12:45:47 PM PDT 24 36040967 ps
T151 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2569430802 Jun 04 12:45:23 PM PDT 24 Jun 04 12:45:33 PM PDT 24 420904676 ps
T971 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.1825845105 Jun 04 12:45:44 PM PDT 24 Jun 04 12:45:47 PM PDT 24 53635337 ps
T97 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.3706833409 Jun 04 12:45:32 PM PDT 24 Jun 04 12:45:35 PM PDT 24 56072479 ps
T972 /workspace/coverage/cover_reg_top/43.spi_device_intr_test.4135360525 Jun 04 12:45:39 PM PDT 24 Jun 04 12:45:41 PM PDT 24 37120676 ps
T973 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.3711572885 Jun 04 12:45:36 PM PDT 24 Jun 04 12:45:39 PM PDT 24 50373293 ps
T116 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.332935080 Jun 04 12:45:48 PM PDT 24 Jun 04 12:46:09 PM PDT 24 3768212929 ps
T974 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.3336821212 Jun 04 12:45:34 PM PDT 24 Jun 04 12:45:36 PM PDT 24 11484742 ps
T123 /workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.840826514 Jun 04 12:45:22 PM PDT 24 Jun 04 12:45:25 PM PDT 24 140836786 ps
T124 /workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.2943077939 Jun 04 12:45:24 PM PDT 24 Jun 04 12:45:50 PM PDT 24 4638599276 ps
T975 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.3495729772 Jun 04 12:45:40 PM PDT 24 Jun 04 12:45:44 PM PDT 24 47996250 ps
T113 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.222718475 Jun 04 12:45:41 PM PDT 24 Jun 04 12:45:44 PM PDT 24 25479943 ps
T152 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1803312295 Jun 04 12:45:26 PM PDT 24 Jun 04 12:45:31 PM PDT 24 79333926 ps
T976 /workspace/coverage/cover_reg_top/7.spi_device_intr_test.2442714429 Jun 04 12:45:33 PM PDT 24 Jun 04 12:45:35 PM PDT 24 18258911 ps
T977 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.1329641349 Jun 04 12:45:38 PM PDT 24 Jun 04 12:45:40 PM PDT 24 34823871 ps
T978 /workspace/coverage/cover_reg_top/26.spi_device_intr_test.403081618 Jun 04 12:45:40 PM PDT 24 Jun 04 12:45:43 PM PDT 24 77952995 ps
T101 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.678749198 Jun 04 12:45:27 PM PDT 24 Jun 04 12:45:32 PM PDT 24 117925757 ps
T979 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2044222842 Jun 04 12:45:30 PM PDT 24 Jun 04 12:45:32 PM PDT 24 82270232 ps
T980 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.4087603711 Jun 04 12:45:32 PM PDT 24 Jun 04 12:45:35 PM PDT 24 118902161 ps
T118 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.1702637947 Jun 04 12:45:39 PM PDT 24 Jun 04 12:45:42 PM PDT 24 60658147 ps
T112 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3642691259 Jun 04 12:45:24 PM PDT 24 Jun 04 12:45:29 PM PDT 24 53179755 ps
T125 /workspace/coverage/cover_reg_top/14.spi_device_csr_rw.1302295184 Jun 04 12:45:36 PM PDT 24 Jun 04 12:45:39 PM PDT 24 81702684 ps
T126 /workspace/coverage/cover_reg_top/9.spi_device_csr_rw.3507307534 Jun 04 12:45:32 PM PDT 24 Jun 04 12:45:34 PM PDT 24 176112275 ps
T981 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.1593095214 Jun 04 12:45:22 PM PDT 24 Jun 04 12:45:47 PM PDT 24 1276328073 ps
T100 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.146215762 Jun 04 12:45:26 PM PDT 24 Jun 04 12:45:33 PM PDT 24 54104726 ps
T982 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.4074068731 Jun 04 12:45:44 PM PDT 24 Jun 04 12:45:47 PM PDT 24 29734306 ps
T84 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.2958682087 Jun 04 12:45:25 PM PDT 24 Jun 04 12:45:29 PM PDT 24 16882586 ps
T983 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.1751321137 Jun 04 12:45:32 PM PDT 24 Jun 04 12:45:37 PM PDT 24 150794161 ps
T984 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.27877361 Jun 04 12:45:41 PM PDT 24 Jun 04 12:45:43 PM PDT 24 14909704 ps
T283 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3204995958 Jun 04 12:45:23 PM PDT 24 Jun 04 12:45:38 PM PDT 24 557859047 ps
T985 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.946898394 Jun 04 12:45:40 PM PDT 24 Jun 04 12:45:43 PM PDT 24 59614505 ps
T986 /workspace/coverage/cover_reg_top/0.spi_device_mem_walk.3778696790 Jun 04 12:45:12 PM PDT 24 Jun 04 12:45:14 PM PDT 24 34444119 ps
T987 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.296879415 Jun 04 12:45:29 PM PDT 24 Jun 04 12:45:31 PM PDT 24 56956621 ps
T127 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.451005983 Jun 04 12:45:24 PM PDT 24 Jun 04 12:45:27 PM PDT 24 57492811 ps
T988 /workspace/coverage/cover_reg_top/19.spi_device_csr_rw.1963824016 Jun 04 12:45:41 PM PDT 24 Jun 04 12:45:44 PM PDT 24 124300828 ps
T989 /workspace/coverage/cover_reg_top/38.spi_device_intr_test.4272101266 Jun 04 12:45:41 PM PDT 24 Jun 04 12:45:44 PM PDT 24 39864217 ps
T990 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.733893865 Jun 04 12:45:34 PM PDT 24 Jun 04 12:45:42 PM PDT 24 106915938 ps
T153 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.3003341739 Jun 04 12:45:23 PM PDT 24 Jun 04 12:45:51 PM PDT 24 1880055606 ps
T991 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.3844336515 Jun 04 12:45:40 PM PDT 24 Jun 04 12:45:43 PM PDT 24 29166075 ps
T992 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.3139293838 Jun 04 12:45:41 PM PDT 24 Jun 04 12:45:44 PM PDT 24 146121217 ps
T993 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.2515113292 Jun 04 12:45:23 PM PDT 24 Jun 04 12:45:25 PM PDT 24 34148527 ps
T994 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.3260823296 Jun 04 12:45:24 PM PDT 24 Jun 04 12:45:27 PM PDT 24 11550097 ps
T995 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.3357087893 Jun 04 12:45:24 PM PDT 24 Jun 04 12:45:28 PM PDT 24 26825744 ps
T128 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.2301817899 Jun 04 12:45:43 PM PDT 24 Jun 04 12:45:46 PM PDT 24 409209595 ps
T996 /workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.4178223042 Jun 04 12:45:23 PM PDT 24 Jun 04 12:45:29 PM PDT 24 410573919 ps
T129 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.795245210 Jun 04 12:45:38 PM PDT 24 Jun 04 12:45:42 PM PDT 24 149442611 ps
T997 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.3543051413 Jun 04 12:45:33 PM PDT 24 Jun 04 12:45:36 PM PDT 24 58430000 ps
T998 /workspace/coverage/cover_reg_top/2.spi_device_mem_walk.2187132517 Jun 04 12:45:25 PM PDT 24 Jun 04 12:45:29 PM PDT 24 15386648 ps
T130 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.583353214 Jun 04 12:45:23 PM PDT 24 Jun 04 12:45:44 PM PDT 24 1943404149 ps
T999 /workspace/coverage/cover_reg_top/5.spi_device_intr_test.3266913523 Jun 04 12:45:24 PM PDT 24 Jun 04 12:45:28 PM PDT 24 19666306 ps
T108 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.3714342532 Jun 04 12:45:35 PM PDT 24 Jun 04 12:45:38 PM PDT 24 132724935 ps
T115 /workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.1129811444 Jun 04 12:45:42 PM PDT 24 Jun 04 12:45:46 PM PDT 24 251132840 ps
T131 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.2203754550 Jun 04 12:45:25 PM PDT 24 Jun 04 12:45:41 PM PDT 24 8229166772 ps
T1000 /workspace/coverage/cover_reg_top/44.spi_device_intr_test.1734176202 Jun 04 12:45:42 PM PDT 24 Jun 04 12:45:45 PM PDT 24 12408944 ps
T1001 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.1673999614 Jun 04 12:45:38 PM PDT 24 Jun 04 12:45:40 PM PDT 24 24281303 ps
T85 /workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2783852118 Jun 04 12:45:21 PM PDT 24 Jun 04 12:45:23 PM PDT 24 75387645 ps
T86 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.801046949 Jun 04 12:45:25 PM PDT 24 Jun 04 12:45:30 PM PDT 24 31247765 ps
T1002 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.732853967 Jun 04 12:46:06 PM PDT 24 Jun 04 12:46:09 PM PDT 24 158184231 ps
T111 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2851715066 Jun 04 12:45:35 PM PDT 24 Jun 04 12:45:38 PM PDT 24 24285316 ps
T1003 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.3180594646 Jun 04 12:45:16 PM PDT 24 Jun 04 12:45:18 PM PDT 24 21173618 ps
T1004 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.1624298312 Jun 04 12:45:15 PM PDT 24 Jun 04 12:45:17 PM PDT 24 14861517 ps
T1005 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.2128042014 Jun 04 12:45:48 PM PDT 24 Jun 04 12:45:50 PM PDT 24 13395272 ps
T102 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.161029498 Jun 04 12:45:39 PM PDT 24 Jun 04 12:45:43 PM PDT 24 551147384 ps
T1006 /workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.2275335308 Jun 04 12:45:24 PM PDT 24 Jun 04 12:45:29 PM PDT 24 280422338 ps
T1007 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.3971533430 Jun 04 12:45:44 PM PDT 24 Jun 04 12:45:46 PM PDT 24 16375195 ps
T1008 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.326356038 Jun 04 12:45:44 PM PDT 24 Jun 04 12:45:46 PM PDT 24 31510339 ps
T289 /workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.4049020832 Jun 04 12:45:31 PM PDT 24 Jun 04 12:45:49 PM PDT 24 4133814059 ps
T1009 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.270551783 Jun 04 12:45:27 PM PDT 24 Jun 04 12:45:32 PM PDT 24 1083246777 ps
T114 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.2352741711 Jun 04 12:45:22 PM PDT 24 Jun 04 12:45:27 PM PDT 24 157692361 ps
T1010 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.1326556519 Jun 04 12:45:38 PM PDT 24 Jun 04 12:45:40 PM PDT 24 23404927 ps
T281 /workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.3899365366 Jun 04 12:45:33 PM PDT 24 Jun 04 12:45:42 PM PDT 24 405867728 ps
T104 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.4289777150 Jun 04 12:45:42 PM PDT 24 Jun 04 12:45:47 PM PDT 24 145432016 ps
T1011 /workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3198726763 Jun 04 12:45:33 PM PDT 24 Jun 04 12:45:38 PM PDT 24 971479985 ps
T1012 /workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.2189939450 Jun 04 12:45:33 PM PDT 24 Jun 04 12:45:36 PM PDT 24 162650079 ps
T1013 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.3309128854 Jun 04 12:45:36 PM PDT 24 Jun 04 12:45:38 PM PDT 24 13296579 ps
T103 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.603578306 Jun 04 12:45:35 PM PDT 24 Jun 04 12:45:40 PM PDT 24 112243994 ps
T1014 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.1786061476 Jun 04 12:45:43 PM PDT 24 Jun 04 12:45:46 PM PDT 24 33272454 ps
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