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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.07 98.30 94.11 98.61 89.36 97.14 95.84 99.10


Total test records in report: 1079
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T815 /workspace/coverage/default/14.spi_device_tpm_sts_read.2446893332 Jun 05 05:36:21 PM PDT 24 Jun 05 05:36:23 PM PDT 24 141473367 ps
T816 /workspace/coverage/default/0.spi_device_cfg_cmd.2367088518 Jun 05 05:34:38 PM PDT 24 Jun 05 05:34:43 PM PDT 24 1023913839 ps
T127 /workspace/coverage/default/0.spi_device_flash_and_tpm_min_idle.206677987 Jun 05 05:34:45 PM PDT 24 Jun 05 05:39:59 PM PDT 24 31489742327 ps
T817 /workspace/coverage/default/23.spi_device_tpm_sts_read.4209298413 Jun 05 05:37:13 PM PDT 24 Jun 05 05:37:14 PM PDT 24 75440029 ps
T818 /workspace/coverage/default/15.spi_device_read_buffer_direct.347378282 Jun 05 05:36:58 PM PDT 24 Jun 05 05:37:14 PM PDT 24 5485475298 ps
T819 /workspace/coverage/default/43.spi_device_tpm_read_hw_reg.1889424335 Jun 05 05:38:42 PM PDT 24 Jun 05 05:38:44 PM PDT 24 274991679 ps
T820 /workspace/coverage/default/20.spi_device_flash_mode.66220538 Jun 05 05:36:57 PM PDT 24 Jun 05 05:37:02 PM PDT 24 237823086 ps
T821 /workspace/coverage/default/23.spi_device_upload.1665266274 Jun 05 05:37:12 PM PDT 24 Jun 05 05:37:15 PM PDT 24 182190476 ps
T212 /workspace/coverage/default/13.spi_device_pass_addr_payload_swap.456163027 Jun 05 05:36:23 PM PDT 24 Jun 05 05:36:26 PM PDT 24 1006352747 ps
T822 /workspace/coverage/default/13.spi_device_upload.1522019665 Jun 05 05:36:22 PM PDT 24 Jun 05 05:36:28 PM PDT 24 1729105760 ps
T823 /workspace/coverage/default/41.spi_device_mailbox.2960434647 Jun 05 05:38:33 PM PDT 24 Jun 05 05:38:48 PM PDT 24 955442793 ps
T213 /workspace/coverage/default/16.spi_device_flash_and_tpm.2019262462 Jun 05 05:36:36 PM PDT 24 Jun 05 05:38:06 PM PDT 24 6152285256 ps
T824 /workspace/coverage/default/41.spi_device_tpm_all.2442515022 Jun 05 05:38:35 PM PDT 24 Jun 05 05:39:05 PM PDT 24 9912576625 ps
T128 /workspace/coverage/default/3.spi_device_stress_all.883685946 Jun 05 05:35:15 PM PDT 24 Jun 05 05:39:29 PM PDT 24 12570306420 ps
T825 /workspace/coverage/default/35.spi_device_intercept.160582532 Jun 05 05:38:06 PM PDT 24 Jun 05 05:38:11 PM PDT 24 1347797102 ps
T826 /workspace/coverage/default/22.spi_device_read_buffer_direct.20692725 Jun 05 05:37:05 PM PDT 24 Jun 05 05:37:13 PM PDT 24 1106728677 ps
T827 /workspace/coverage/default/14.spi_device_stress_all.1197897776 Jun 05 05:36:52 PM PDT 24 Jun 05 05:39:59 PM PDT 24 9098125950 ps
T828 /workspace/coverage/default/17.spi_device_alert_test.3730522707 Jun 05 05:36:37 PM PDT 24 Jun 05 05:36:39 PM PDT 24 45160772 ps
T829 /workspace/coverage/default/49.spi_device_flash_mode.2846775713 Jun 05 05:39:11 PM PDT 24 Jun 05 05:39:45 PM PDT 24 5482334491 ps
T830 /workspace/coverage/default/21.spi_device_mailbox.1115852078 Jun 05 05:37:02 PM PDT 24 Jun 05 05:37:23 PM PDT 24 1538767420 ps
T831 /workspace/coverage/default/38.spi_device_cfg_cmd.3071840120 Jun 05 05:38:18 PM PDT 24 Jun 05 05:38:25 PM PDT 24 465183179 ps
T832 /workspace/coverage/default/10.spi_device_read_buffer_direct.2092564425 Jun 05 05:35:57 PM PDT 24 Jun 05 05:36:03 PM PDT 24 1698622339 ps
T833 /workspace/coverage/default/36.spi_device_tpm_sts_read.3892150972 Jun 05 05:38:11 PM PDT 24 Jun 05 05:38:13 PM PDT 24 15657912 ps
T834 /workspace/coverage/default/18.spi_device_flash_all.674959730 Jun 05 05:36:45 PM PDT 24 Jun 05 05:37:30 PM PDT 24 6164650416 ps
T835 /workspace/coverage/default/14.spi_device_upload.4181408767 Jun 05 05:36:24 PM PDT 24 Jun 05 05:36:32 PM PDT 24 837667650 ps
T836 /workspace/coverage/default/33.spi_device_flash_all.1347104494 Jun 05 05:37:58 PM PDT 24 Jun 05 05:39:54 PM PDT 24 14562162671 ps
T837 /workspace/coverage/default/3.spi_device_tpm_read_hw_reg.122178647 Jun 05 05:35:04 PM PDT 24 Jun 05 05:35:13 PM PDT 24 1612784498 ps
T838 /workspace/coverage/default/18.spi_device_flash_and_tpm.107894411 Jun 05 05:36:49 PM PDT 24 Jun 05 05:39:46 PM PDT 24 52853540456 ps
T839 /workspace/coverage/default/23.spi_device_tpm_all.2628517973 Jun 05 05:37:14 PM PDT 24 Jun 05 05:37:40 PM PDT 24 4987441512 ps
T840 /workspace/coverage/default/16.spi_device_alert_test.2913898923 Jun 05 05:36:36 PM PDT 24 Jun 05 05:36:38 PM PDT 24 35218327 ps
T841 /workspace/coverage/default/23.spi_device_flash_all.287289627 Jun 05 05:37:21 PM PDT 24 Jun 05 05:40:15 PM PDT 24 45982843934 ps
T842 /workspace/coverage/default/21.spi_device_pass_addr_payload_swap.463422306 Jun 05 05:36:59 PM PDT 24 Jun 05 05:37:10 PM PDT 24 2901094638 ps
T843 /workspace/coverage/default/28.spi_device_pass_addr_payload_swap.3723303633 Jun 05 05:37:35 PM PDT 24 Jun 05 05:37:52 PM PDT 24 38216439769 ps
T214 /workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.1029381773 Jun 05 05:38:34 PM PDT 24 Jun 05 05:39:33 PM PDT 24 6024238074 ps
T844 /workspace/coverage/default/38.spi_device_read_buffer_direct.3740434652 Jun 05 05:38:20 PM PDT 24 Jun 05 05:38:28 PM PDT 24 3105061543 ps
T845 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.1578312493 Jun 05 05:38:50 PM PDT 24 Jun 05 05:38:51 PM PDT 24 36158532 ps
T846 /workspace/coverage/default/5.spi_device_mailbox.3763435659 Jun 05 05:35:36 PM PDT 24 Jun 05 05:35:46 PM PDT 24 444306074 ps
T195 /workspace/coverage/default/4.spi_device_flash_all.2772011702 Jun 05 05:35:20 PM PDT 24 Jun 05 05:36:19 PM PDT 24 10437464715 ps
T847 /workspace/coverage/default/24.spi_device_tpm_all.3809795556 Jun 05 05:37:20 PM PDT 24 Jun 05 05:37:24 PM PDT 24 543224594 ps
T848 /workspace/coverage/default/41.spi_device_upload.3050714486 Jun 05 05:38:31 PM PDT 24 Jun 05 05:38:47 PM PDT 24 15224649667 ps
T849 /workspace/coverage/default/41.spi_device_csb_read.1354664936 Jun 05 05:38:33 PM PDT 24 Jun 05 05:38:35 PM PDT 24 15160626 ps
T850 /workspace/coverage/default/16.spi_device_pass_addr_payload_swap.2182600154 Jun 05 05:36:35 PM PDT 24 Jun 05 05:36:44 PM PDT 24 794824149 ps
T851 /workspace/coverage/default/37.spi_device_flash_all.869200235 Jun 05 05:38:17 PM PDT 24 Jun 05 05:45:05 PM PDT 24 186951427284 ps
T852 /workspace/coverage/default/7.spi_device_tpm_sts_read.2880576446 Jun 05 05:35:36 PM PDT 24 Jun 05 05:35:37 PM PDT 24 76961900 ps
T853 /workspace/coverage/default/42.spi_device_flash_mode.2749648782 Jun 05 05:38:41 PM PDT 24 Jun 05 05:38:57 PM PDT 24 1001453776 ps
T854 /workspace/coverage/default/45.spi_device_alert_test.2121876182 Jun 05 05:38:53 PM PDT 24 Jun 05 05:38:55 PM PDT 24 14857820 ps
T855 /workspace/coverage/default/48.spi_device_stress_all.1924079373 Jun 05 05:39:09 PM PDT 24 Jun 05 05:40:26 PM PDT 24 9284990443 ps
T856 /workspace/coverage/default/36.spi_device_read_buffer_direct.2533654012 Jun 05 05:38:10 PM PDT 24 Jun 05 05:38:17 PM PDT 24 2175619902 ps
T857 /workspace/coverage/default/17.spi_device_tpm_sts_read.3923105260 Jun 05 05:36:35 PM PDT 24 Jun 05 05:36:36 PM PDT 24 64087115 ps
T858 /workspace/coverage/default/44.spi_device_pass_cmd_filtering.1994272018 Jun 05 05:38:50 PM PDT 24 Jun 05 05:39:00 PM PDT 24 4355473777 ps
T859 /workspace/coverage/default/34.spi_device_flash_mode.1268436218 Jun 05 05:38:06 PM PDT 24 Jun 05 05:38:12 PM PDT 24 110216219 ps
T52 /workspace/coverage/default/3.spi_device_sec_cm.4174454549 Jun 05 05:35:11 PM PDT 24 Jun 05 05:35:13 PM PDT 24 641229133 ps
T860 /workspace/coverage/default/20.spi_device_intercept.1352854612 Jun 05 05:37:01 PM PDT 24 Jun 05 05:37:24 PM PDT 24 4707959228 ps
T861 /workspace/coverage/default/32.spi_device_tpm_rw.3454134515 Jun 05 05:37:54 PM PDT 24 Jun 05 05:37:57 PM PDT 24 693016246 ps
T862 /workspace/coverage/default/28.spi_device_flash_and_tpm_min_idle.3321706659 Jun 05 05:37:37 PM PDT 24 Jun 05 05:38:09 PM PDT 24 5390263628 ps
T863 /workspace/coverage/default/42.spi_device_tpm_read_hw_reg.451983543 Jun 05 05:38:32 PM PDT 24 Jun 05 05:38:36 PM PDT 24 1543847383 ps
T864 /workspace/coverage/default/3.spi_device_alert_test.166851525 Jun 05 05:35:11 PM PDT 24 Jun 05 05:35:13 PM PDT 24 14325547 ps
T865 /workspace/coverage/default/22.spi_device_tpm_read_hw_reg.4142625421 Jun 05 05:37:05 PM PDT 24 Jun 05 05:37:06 PM PDT 24 22860493 ps
T866 /workspace/coverage/default/27.spi_device_flash_all.624309466 Jun 05 05:37:36 PM PDT 24 Jun 05 05:38:55 PM PDT 24 46963515506 ps
T867 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.28012626 Jun 05 05:35:35 PM PDT 24 Jun 05 05:35:54 PM PDT 24 7085071719 ps
T868 /workspace/coverage/default/22.spi_device_pass_cmd_filtering.597562317 Jun 05 05:37:04 PM PDT 24 Jun 05 05:37:16 PM PDT 24 2868282957 ps
T869 /workspace/coverage/default/27.spi_device_pass_addr_payload_swap.1603378057 Jun 05 05:37:36 PM PDT 24 Jun 05 05:37:43 PM PDT 24 3480503671 ps
T870 /workspace/coverage/default/36.spi_device_intercept.2376905380 Jun 05 05:38:11 PM PDT 24 Jun 05 05:38:22 PM PDT 24 1301877401 ps
T871 /workspace/coverage/default/29.spi_device_pass_addr_payload_swap.1186301003 Jun 05 05:37:46 PM PDT 24 Jun 05 05:38:03 PM PDT 24 60091168513 ps
T872 /workspace/coverage/default/10.spi_device_pass_cmd_filtering.2835151075 Jun 05 05:35:56 PM PDT 24 Jun 05 05:36:05 PM PDT 24 10545650594 ps
T873 /workspace/coverage/default/39.spi_device_csb_read.2384246863 Jun 05 05:38:31 PM PDT 24 Jun 05 05:38:33 PM PDT 24 41169186 ps
T874 /workspace/coverage/default/46.spi_device_read_buffer_direct.2898114529 Jun 05 05:38:56 PM PDT 24 Jun 05 05:39:12 PM PDT 24 5681222449 ps
T875 /workspace/coverage/default/19.spi_device_stress_all.4007823790 Jun 05 05:36:58 PM PDT 24 Jun 05 05:38:30 PM PDT 24 78084266169 ps
T876 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.2918066952 Jun 05 05:36:06 PM PDT 24 Jun 05 05:36:11 PM PDT 24 996152790 ps
T877 /workspace/coverage/default/42.spi_device_intercept.873378451 Jun 05 05:38:46 PM PDT 24 Jun 05 05:38:50 PM PDT 24 273362894 ps
T878 /workspace/coverage/default/21.spi_device_alert_test.3699387440 Jun 05 05:37:04 PM PDT 24 Jun 05 05:37:06 PM PDT 24 17011349 ps
T879 /workspace/coverage/default/49.spi_device_cfg_cmd.2781659062 Jun 05 05:39:15 PM PDT 24 Jun 05 05:39:25 PM PDT 24 3942651781 ps
T880 /workspace/coverage/default/46.spi_device_mailbox.3640026827 Jun 05 05:38:51 PM PDT 24 Jun 05 05:39:03 PM PDT 24 1501298709 ps
T881 /workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.3813831432 Jun 05 05:35:51 PM PDT 24 Jun 05 05:38:15 PM PDT 24 68207100715 ps
T882 /workspace/coverage/default/2.spi_device_tpm_all.87577948 Jun 05 05:34:56 PM PDT 24 Jun 05 05:35:23 PM PDT 24 6553407022 ps
T883 /workspace/coverage/default/30.spi_device_mailbox.1755688815 Jun 05 05:37:44 PM PDT 24 Jun 05 05:39:49 PM PDT 24 24333014798 ps
T884 /workspace/coverage/default/37.spi_device_tpm_sts_read.866305963 Jun 05 05:38:21 PM PDT 24 Jun 05 05:38:22 PM PDT 24 492543221 ps
T885 /workspace/coverage/default/44.spi_device_tpm_all.2556853614 Jun 05 05:38:48 PM PDT 24 Jun 05 05:39:23 PM PDT 24 5378592289 ps
T886 /workspace/coverage/default/26.spi_device_csb_read.1336179576 Jun 05 05:37:29 PM PDT 24 Jun 05 05:37:31 PM PDT 24 37924349 ps
T887 /workspace/coverage/default/42.spi_device_cfg_cmd.3205301342 Jun 05 05:38:46 PM PDT 24 Jun 05 05:38:49 PM PDT 24 73937442 ps
T201 /workspace/coverage/default/48.spi_device_flash_all.1514272510 Jun 05 05:39:02 PM PDT 24 Jun 05 05:43:34 PM PDT 24 34149361997 ps
T888 /workspace/coverage/default/48.spi_device_tpm_rw.291499500 Jun 05 05:39:00 PM PDT 24 Jun 05 05:39:03 PM PDT 24 189808929 ps
T889 /workspace/coverage/default/46.spi_device_tpm_all.349932431 Jun 05 05:38:53 PM PDT 24 Jun 05 05:39:02 PM PDT 24 3507172085 ps
T890 /workspace/coverage/default/48.spi_device_flash_and_tpm_min_idle.2992878729 Jun 05 05:39:12 PM PDT 24 Jun 05 05:41:58 PM PDT 24 366273280015 ps
T36 /workspace/coverage/default/38.spi_device_flash_and_tpm.1130426516 Jun 05 05:38:18 PM PDT 24 Jun 05 05:39:14 PM PDT 24 4140474099 ps
T891 /workspace/coverage/default/48.spi_device_tpm_read_hw_reg.839398533 Jun 05 05:39:07 PM PDT 24 Jun 05 05:39:15 PM PDT 24 6216692578 ps
T892 /workspace/coverage/default/22.spi_device_stress_all.2308058667 Jun 05 05:37:13 PM PDT 24 Jun 05 05:43:42 PM PDT 24 96034475439 ps
T893 /workspace/coverage/default/20.spi_device_upload.1576223445 Jun 05 05:37:01 PM PDT 24 Jun 05 05:37:11 PM PDT 24 1032523592 ps
T894 /workspace/coverage/default/21.spi_device_tpm_read_hw_reg.2581327614 Jun 05 05:37:00 PM PDT 24 Jun 05 05:37:02 PM PDT 24 107401702 ps
T895 /workspace/coverage/default/31.spi_device_tpm_all.2178627583 Jun 05 05:37:48 PM PDT 24 Jun 05 05:38:12 PM PDT 24 2934296992 ps
T896 /workspace/coverage/default/14.spi_device_read_buffer_direct.2497800570 Jun 05 05:36:26 PM PDT 24 Jun 05 05:36:30 PM PDT 24 495184635 ps
T897 /workspace/coverage/default/16.spi_device_mailbox.2031375863 Jun 05 05:36:36 PM PDT 24 Jun 05 05:36:41 PM PDT 24 297709931 ps
T217 /workspace/coverage/default/46.spi_device_stress_all.2962886696 Jun 05 05:38:54 PM PDT 24 Jun 05 05:47:07 PM PDT 24 53407143335 ps
T898 /workspace/coverage/default/3.spi_device_flash_mode.3302865511 Jun 05 05:35:11 PM PDT 24 Jun 05 05:35:20 PM PDT 24 430712340 ps
T899 /workspace/coverage/default/46.spi_device_upload.4183355501 Jun 05 05:38:53 PM PDT 24 Jun 05 05:39:01 PM PDT 24 6541437709 ps
T900 /workspace/coverage/default/29.spi_device_tpm_all.3111696682 Jun 05 05:37:42 PM PDT 24 Jun 05 05:38:15 PM PDT 24 65125157698 ps
T901 /workspace/coverage/default/23.spi_device_tpm_read_hw_reg.2794526389 Jun 05 05:37:12 PM PDT 24 Jun 05 05:37:19 PM PDT 24 5442609959 ps
T902 /workspace/coverage/default/13.spi_device_flash_and_tpm.1375662031 Jun 05 05:36:23 PM PDT 24 Jun 05 05:37:26 PM PDT 24 17067311797 ps
T903 /workspace/coverage/default/9.spi_device_stress_all.2029772911 Jun 05 05:35:59 PM PDT 24 Jun 05 05:51:52 PM PDT 24 97292501779 ps
T904 /workspace/coverage/default/22.spi_device_tpm_all.1674577281 Jun 05 05:37:03 PM PDT 24 Jun 05 05:37:55 PM PDT 24 9656941747 ps
T202 /workspace/coverage/default/5.spi_device_flash_and_tpm.4130210471 Jun 05 05:35:29 PM PDT 24 Jun 05 05:38:34 PM PDT 24 61098244036 ps
T905 /workspace/coverage/default/25.spi_device_tpm_rw.2538492903 Jun 05 05:37:22 PM PDT 24 Jun 05 05:37:26 PM PDT 24 20417776 ps
T906 /workspace/coverage/default/26.spi_device_mailbox.3979658814 Jun 05 05:37:28 PM PDT 24 Jun 05 05:37:44 PM PDT 24 2861219440 ps
T907 /workspace/coverage/default/31.spi_device_pass_addr_payload_swap.1620565825 Jun 05 05:37:48 PM PDT 24 Jun 05 05:37:52 PM PDT 24 135610456 ps
T908 /workspace/coverage/default/6.spi_device_pass_addr_payload_swap.4169169186 Jun 05 05:35:36 PM PDT 24 Jun 05 05:35:40 PM PDT 24 116984392 ps
T909 /workspace/coverage/default/27.spi_device_read_buffer_direct.3901512638 Jun 05 05:37:36 PM PDT 24 Jun 05 05:37:45 PM PDT 24 2098724678 ps
T910 /workspace/coverage/default/8.spi_device_tpm_rw.632756701 Jun 05 05:35:42 PM PDT 24 Jun 05 05:35:44 PM PDT 24 54780083 ps
T911 /workspace/coverage/default/9.spi_device_flash_and_tpm.3500349203 Jun 05 05:35:51 PM PDT 24 Jun 05 05:37:11 PM PDT 24 7805308127 ps
T912 /workspace/coverage/default/1.spi_device_mailbox.451974333 Jun 05 05:34:49 PM PDT 24 Jun 05 05:35:35 PM PDT 24 4419571631 ps
T913 /workspace/coverage/default/26.spi_device_stress_all.2805683166 Jun 05 05:37:28 PM PDT 24 Jun 05 05:47:08 PM PDT 24 115060046958 ps
T914 /workspace/coverage/default/12.spi_device_tpm_sts_read.3374762856 Jun 05 05:36:12 PM PDT 24 Jun 05 05:36:13 PM PDT 24 206179358 ps
T915 /workspace/coverage/default/23.spi_device_pass_addr_payload_swap.3656592144 Jun 05 05:37:15 PM PDT 24 Jun 05 05:37:22 PM PDT 24 2307497018 ps
T197 /workspace/coverage/default/33.spi_device_stress_all.2354460318 Jun 05 05:38:08 PM PDT 24 Jun 05 05:45:58 PM PDT 24 36909546750 ps
T916 /workspace/coverage/default/45.spi_device_csb_read.3761437672 Jun 05 05:38:51 PM PDT 24 Jun 05 05:38:52 PM PDT 24 56518250 ps
T917 /workspace/coverage/default/9.spi_device_tpm_all.808551261 Jun 05 05:35:53 PM PDT 24 Jun 05 05:36:11 PM PDT 24 6789383028 ps
T918 /workspace/coverage/default/21.spi_device_stress_all.3482790689 Jun 05 05:37:03 PM PDT 24 Jun 05 05:39:34 PM PDT 24 13755290569 ps
T919 /workspace/coverage/default/36.spi_device_tpm_rw.765809311 Jun 05 05:38:12 PM PDT 24 Jun 05 05:38:14 PM PDT 24 41906739 ps
T920 /workspace/coverage/default/47.spi_device_tpm_read_hw_reg.1633365956 Jun 05 05:38:56 PM PDT 24 Jun 05 05:39:02 PM PDT 24 602010996 ps
T921 /workspace/coverage/default/41.spi_device_intercept.133810302 Jun 05 05:38:33 PM PDT 24 Jun 05 05:38:39 PM PDT 24 2605314813 ps
T922 /workspace/coverage/default/3.spi_device_flash_all.3883739628 Jun 05 05:35:12 PM PDT 24 Jun 05 05:35:53 PM PDT 24 7402135281 ps
T923 /workspace/coverage/default/47.spi_device_upload.852456973 Jun 05 05:39:03 PM PDT 24 Jun 05 05:39:35 PM PDT 24 34587725720 ps
T924 /workspace/coverage/default/25.spi_device_tpm_all.3419636576 Jun 05 05:37:20 PM PDT 24 Jun 05 05:37:32 PM PDT 24 1007331232 ps
T925 /workspace/coverage/default/48.spi_device_intercept.3216286787 Jun 05 05:39:02 PM PDT 24 Jun 05 05:39:07 PM PDT 24 1380836383 ps
T926 /workspace/coverage/default/33.spi_device_tpm_all.102667821 Jun 05 05:38:00 PM PDT 24 Jun 05 05:38:09 PM PDT 24 1786380930 ps
T927 /workspace/coverage/default/44.spi_device_upload.803753114 Jun 05 05:38:48 PM PDT 24 Jun 05 05:38:51 PM PDT 24 95134856 ps
T928 /workspace/coverage/default/18.spi_device_cfg_cmd.1511649823 Jun 05 05:36:44 PM PDT 24 Jun 05 05:36:47 PM PDT 24 113682999 ps
T929 /workspace/coverage/default/37.spi_device_alert_test.20459545 Jun 05 05:38:20 PM PDT 24 Jun 05 05:38:21 PM PDT 24 53888512 ps
T250 /workspace/coverage/default/35.spi_device_flash_and_tpm_min_idle.3040041612 Jun 05 05:38:11 PM PDT 24 Jun 05 05:50:26 PM PDT 24 304373877598 ps
T198 /workspace/coverage/default/8.spi_device_flash_and_tpm.1942300337 Jun 05 05:35:45 PM PDT 24 Jun 05 05:36:58 PM PDT 24 6755452258 ps
T930 /workspace/coverage/default/47.spi_device_flash_all.635082705 Jun 05 05:39:01 PM PDT 24 Jun 05 05:39:12 PM PDT 24 1440467476 ps
T931 /workspace/coverage/default/38.spi_device_csb_read.2636483473 Jun 05 05:38:20 PM PDT 24 Jun 05 05:38:21 PM PDT 24 20520037 ps
T932 /workspace/coverage/default/13.spi_device_flash_all.2997625895 Jun 05 05:36:23 PM PDT 24 Jun 05 05:37:26 PM PDT 24 13222834079 ps
T933 /workspace/coverage/default/18.spi_device_pass_addr_payload_swap.2016356177 Jun 05 05:36:45 PM PDT 24 Jun 05 05:36:51 PM PDT 24 10471850814 ps
T934 /workspace/coverage/default/6.spi_device_read_buffer_direct.2798803334 Jun 05 05:35:37 PM PDT 24 Jun 05 05:35:45 PM PDT 24 5292306917 ps
T935 /workspace/coverage/default/31.spi_device_stress_all.3002415890 Jun 05 05:37:49 PM PDT 24 Jun 05 05:39:21 PM PDT 24 13348835811 ps
T936 /workspace/coverage/default/30.spi_device_tpm_rw.2471265913 Jun 05 05:37:44 PM PDT 24 Jun 05 05:37:46 PM PDT 24 104201137 ps
T937 /workspace/coverage/default/35.spi_device_pass_cmd_filtering.2635367700 Jun 05 05:38:04 PM PDT 24 Jun 05 05:38:43 PM PDT 24 14362277171 ps
T938 /workspace/coverage/default/28.spi_device_pass_cmd_filtering.3966089480 Jun 05 05:37:36 PM PDT 24 Jun 05 05:37:39 PM PDT 24 121986514 ps
T939 /workspace/coverage/default/1.spi_device_csb_read.1215005891 Jun 05 05:34:46 PM PDT 24 Jun 05 05:34:48 PM PDT 24 20238294 ps
T940 /workspace/coverage/default/28.spi_device_tpm_sts_read.4051829103 Jun 05 05:37:36 PM PDT 24 Jun 05 05:37:37 PM PDT 24 13027802 ps
T941 /workspace/coverage/default/46.spi_device_pass_addr_payload_swap.1245633706 Jun 05 05:38:54 PM PDT 24 Jun 05 05:38:57 PM PDT 24 481395699 ps
T942 /workspace/coverage/default/27.spi_device_intercept.1459005112 Jun 05 05:37:37 PM PDT 24 Jun 05 05:37:41 PM PDT 24 398704887 ps
T943 /workspace/coverage/default/38.spi_device_mailbox.3431921667 Jun 05 05:38:18 PM PDT 24 Jun 05 05:38:36 PM PDT 24 26782654792 ps
T944 /workspace/coverage/default/45.spi_device_intercept.4122335347 Jun 05 05:38:47 PM PDT 24 Jun 05 05:38:52 PM PDT 24 351783911 ps
T945 /workspace/coverage/default/40.spi_device_pass_addr_payload_swap.3075759404 Jun 05 05:38:28 PM PDT 24 Jun 05 05:38:32 PM PDT 24 553904565 ps
T946 /workspace/coverage/default/7.spi_device_pass_addr_payload_swap.3807146973 Jun 05 05:35:36 PM PDT 24 Jun 05 05:35:42 PM PDT 24 276457348 ps
T947 /workspace/coverage/default/38.spi_device_tpm_all.3653766010 Jun 05 05:38:19 PM PDT 24 Jun 05 05:39:11 PM PDT 24 10951565951 ps
T948 /workspace/coverage/default/11.spi_device_pass_cmd_filtering.1368868130 Jun 05 05:36:06 PM PDT 24 Jun 05 05:36:29 PM PDT 24 33015087977 ps
T949 /workspace/coverage/default/4.spi_device_alert_test.3654096277 Jun 05 05:35:28 PM PDT 24 Jun 05 05:35:30 PM PDT 24 51725566 ps
T950 /workspace/coverage/default/33.spi_device_alert_test.1926137347 Jun 05 05:38:05 PM PDT 24 Jun 05 05:38:06 PM PDT 24 13500119 ps
T951 /workspace/coverage/default/10.spi_device_flash_mode.3707362337 Jun 05 05:35:58 PM PDT 24 Jun 05 05:36:05 PM PDT 24 156993028 ps
T952 /workspace/coverage/default/36.spi_device_pass_addr_payload_swap.3314063763 Jun 05 05:38:12 PM PDT 24 Jun 05 05:38:15 PM PDT 24 345415924 ps
T953 /workspace/coverage/default/24.spi_device_flash_mode.3912803511 Jun 05 05:37:23 PM PDT 24 Jun 05 05:37:34 PM PDT 24 1304971795 ps
T954 /workspace/coverage/default/32.spi_device_read_buffer_direct.2748511494 Jun 05 05:37:51 PM PDT 24 Jun 05 05:37:58 PM PDT 24 952770202 ps
T43 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.634950270 Jun 05 04:33:05 PM PDT 24 Jun 05 04:33:10 PM PDT 24 509121760 ps
T44 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.301669817 Jun 05 04:33:09 PM PDT 24 Jun 05 04:33:13 PM PDT 24 528394486 ps
T955 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.3702063575 Jun 05 04:33:08 PM PDT 24 Jun 05 04:33:09 PM PDT 24 36991597 ps
T45 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.932246035 Jun 05 04:33:06 PM PDT 24 Jun 05 04:33:21 PM PDT 24 5434536059 ps
T100 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3468043082 Jun 05 04:33:10 PM PDT 24 Jun 05 04:33:12 PM PDT 24 63350523 ps
T78 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.3525468142 Jun 05 04:33:14 PM PDT 24 Jun 05 04:33:19 PM PDT 24 118110187 ps
T79 /workspace/coverage/cover_reg_top/16.spi_device_tl_errors.3651371237 Jun 05 04:33:07 PM PDT 24 Jun 05 04:33:13 PM PDT 24 438638213 ps
T956 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.353251221 Jun 05 04:33:10 PM PDT 24 Jun 05 04:33:14 PM PDT 24 433058239 ps
T957 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3639501582 Jun 05 04:32:53 PM PDT 24 Jun 05 04:33:05 PM PDT 24 380352300 ps
T87 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3489848643 Jun 05 04:33:10 PM PDT 24 Jun 05 04:33:15 PM PDT 24 166241991 ps
T958 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.2903962494 Jun 05 04:33:09 PM PDT 24 Jun 05 04:33:20 PM PDT 24 310106444 ps
T959 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.1589266261 Jun 05 04:32:58 PM PDT 24 Jun 05 04:32:59 PM PDT 24 11361600 ps
T101 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.671266131 Jun 05 04:32:53 PM PDT 24 Jun 05 04:33:09 PM PDT 24 205946774 ps
T80 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.1702199744 Jun 05 04:33:17 PM PDT 24 Jun 05 04:33:39 PM PDT 24 3526697668 ps
T81 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.349950428 Jun 05 04:33:00 PM PDT 24 Jun 05 04:33:14 PM PDT 24 400494067 ps
T102 /workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.1459333409 Jun 05 04:33:09 PM PDT 24 Jun 05 04:33:11 PM PDT 24 17802279 ps
T92 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.225143266 Jun 05 04:33:04 PM PDT 24 Jun 05 04:33:07 PM PDT 24 298927803 ps
T96 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.3308781830 Jun 05 04:33:12 PM PDT 24 Jun 05 04:33:32 PM PDT 24 1495811367 ps
T98 /workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1838102204 Jun 05 04:33:07 PM PDT 24 Jun 05 04:33:16 PM PDT 24 1430037962 ps
T91 /workspace/coverage/cover_reg_top/9.spi_device_tl_errors.3494456235 Jun 05 04:32:57 PM PDT 24 Jun 05 04:32:59 PM PDT 24 100747043 ps
T960 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.1500274891 Jun 05 04:33:06 PM PDT 24 Jun 05 04:33:08 PM PDT 24 71911856 ps
T961 /workspace/coverage/cover_reg_top/31.spi_device_intr_test.1311679639 Jun 05 04:33:13 PM PDT 24 Jun 05 04:33:15 PM PDT 24 90428267 ps
T136 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.1369694666 Jun 05 04:33:15 PM PDT 24 Jun 05 04:33:20 PM PDT 24 199504195 ps
T962 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.931250810 Jun 05 04:33:09 PM PDT 24 Jun 05 04:33:12 PM PDT 24 119581824 ps
T103 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.1858206395 Jun 05 04:33:13 PM PDT 24 Jun 05 04:33:16 PM PDT 24 53825366 ps
T963 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.4213027467 Jun 05 04:33:13 PM PDT 24 Jun 05 04:33:15 PM PDT 24 12286066 ps
T964 /workspace/coverage/cover_reg_top/45.spi_device_intr_test.1132320059 Jun 05 04:33:29 PM PDT 24 Jun 05 04:33:31 PM PDT 24 41017829 ps
T965 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.3262052740 Jun 05 04:32:54 PM PDT 24 Jun 05 04:33:09 PM PDT 24 3597477021 ps
T97 /workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.1183037289 Jun 05 04:33:14 PM PDT 24 Jun 05 04:33:18 PM PDT 24 105379647 ps
T966 /workspace/coverage/cover_reg_top/5.spi_device_intr_test.570404661 Jun 05 04:33:08 PM PDT 24 Jun 05 04:33:09 PM PDT 24 46728346 ps
T62 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.3972275760 Jun 05 04:32:58 PM PDT 24 Jun 05 04:32:59 PM PDT 24 46173480 ps
T967 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.2041849886 Jun 05 04:32:53 PM PDT 24 Jun 05 04:32:55 PM PDT 24 62910462 ps
T968 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.2946992294 Jun 05 04:33:31 PM PDT 24 Jun 05 04:33:33 PM PDT 24 17271388 ps
T969 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.1916806129 Jun 05 04:33:13 PM PDT 24 Jun 05 04:33:15 PM PDT 24 12581266 ps
T970 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.3819533160 Jun 05 04:33:03 PM PDT 24 Jun 05 04:33:04 PM PDT 24 21830384 ps
T104 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.1444605354 Jun 05 04:32:53 PM PDT 24 Jun 05 04:32:55 PM PDT 24 249196792 ps
T88 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.3388096585 Jun 05 04:33:10 PM PDT 24 Jun 05 04:33:15 PM PDT 24 190103313 ps
T971 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.2133248258 Jun 05 04:33:15 PM PDT 24 Jun 05 04:33:17 PM PDT 24 16745149 ps
T63 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2233021906 Jun 05 04:32:48 PM PDT 24 Jun 05 04:32:50 PM PDT 24 36762539 ps
T972 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.3590137477 Jun 05 04:33:06 PM PDT 24 Jun 05 04:33:07 PM PDT 24 57489436 ps
T89 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2154243293 Jun 05 04:33:02 PM PDT 24 Jun 05 04:33:07 PM PDT 24 622229266 ps
T973 /workspace/coverage/cover_reg_top/42.spi_device_intr_test.3395051023 Jun 05 04:33:14 PM PDT 24 Jun 05 04:33:16 PM PDT 24 18042229 ps
T974 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.3376929093 Jun 05 04:33:20 PM PDT 24 Jun 05 04:33:21 PM PDT 24 23233250 ps
T137 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.959628825 Jun 05 04:33:03 PM PDT 24 Jun 05 04:33:07 PM PDT 24 749066614 ps
T140 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.755984675 Jun 05 04:33:24 PM PDT 24 Jun 05 04:33:27 PM PDT 24 181790851 ps
T975 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1433453603 Jun 05 04:32:50 PM PDT 24 Jun 05 04:32:54 PM PDT 24 602635190 ps
T976 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.3932341665 Jun 05 04:33:12 PM PDT 24 Jun 05 04:33:14 PM PDT 24 46144903 ps
T977 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2413366723 Jun 05 04:33:07 PM PDT 24 Jun 05 04:33:11 PM PDT 24 213539826 ps
T978 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.368487953 Jun 05 04:33:16 PM PDT 24 Jun 05 04:33:18 PM PDT 24 29735204 ps
T86 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.4279773255 Jun 05 04:33:01 PM PDT 24 Jun 05 04:33:07 PM PDT 24 210605047 ps
T105 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.4225533528 Jun 05 04:33:02 PM PDT 24 Jun 05 04:33:06 PM PDT 24 361617702 ps
T979 /workspace/coverage/cover_reg_top/4.spi_device_mem_walk.1677281492 Jun 05 04:32:59 PM PDT 24 Jun 05 04:33:00 PM PDT 24 13330394 ps
T980 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.360927227 Jun 05 04:32:54 PM PDT 24 Jun 05 04:32:55 PM PDT 24 12041776 ps
T90 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.2047389125 Jun 05 04:33:03 PM PDT 24 Jun 05 04:33:09 PM PDT 24 1885127240 ps
T106 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2996876908 Jun 05 04:33:01 PM PDT 24 Jun 05 04:33:04 PM PDT 24 190264985 ps
T981 /workspace/coverage/cover_reg_top/36.spi_device_intr_test.1853121555 Jun 05 04:33:15 PM PDT 24 Jun 05 04:33:17 PM PDT 24 41991022 ps
T138 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3937178284 Jun 05 04:32:50 PM PDT 24 Jun 05 04:33:07 PM PDT 24 1447521010 ps
T93 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.3518953885 Jun 05 04:33:15 PM PDT 24 Jun 05 04:33:21 PM PDT 24 1772997681 ps
T982 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.822331520 Jun 05 04:32:53 PM PDT 24 Jun 05 04:32:55 PM PDT 24 80065033 ps
T983 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.3664355919 Jun 05 04:33:09 PM PDT 24 Jun 05 04:33:14 PM PDT 24 54489543 ps
T984 /workspace/coverage/cover_reg_top/12.spi_device_intr_test.3640829245 Jun 05 04:33:05 PM PDT 24 Jun 05 04:33:07 PM PDT 24 22221305 ps
T985 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.2853799835 Jun 05 04:33:04 PM PDT 24 Jun 05 04:33:08 PM PDT 24 87514260 ps
T986 /workspace/coverage/cover_reg_top/26.spi_device_intr_test.3670952194 Jun 05 04:33:04 PM PDT 24 Jun 05 04:33:05 PM PDT 24 43713652 ps
T139 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1592192117 Jun 05 04:33:07 PM PDT 24 Jun 05 04:33:28 PM PDT 24 1826413715 ps
T987 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.2019618592 Jun 05 04:33:12 PM PDT 24 Jun 05 04:33:13 PM PDT 24 34784905 ps
T988 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2606909250 Jun 05 04:32:51 PM PDT 24 Jun 05 04:32:53 PM PDT 24 25075619 ps
T989 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.178421701 Jun 05 04:32:53 PM PDT 24 Jun 05 04:32:55 PM PDT 24 114661059 ps
T107 /workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3855551877 Jun 05 04:32:55 PM PDT 24 Jun 05 04:32:57 PM PDT 24 76037593 ps
T232 /workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.1844208793 Jun 05 04:32:58 PM PDT 24 Jun 05 04:33:06 PM PDT 24 720777296 ps
T108 /workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.2889368623 Jun 05 04:32:52 PM PDT 24 Jun 05 04:32:54 PM PDT 24 39334303 ps
T990 /workspace/coverage/cover_reg_top/44.spi_device_intr_test.3608958356 Jun 05 04:33:13 PM PDT 24 Jun 05 04:33:15 PM PDT 24 14281457 ps
T94 /workspace/coverage/cover_reg_top/18.spi_device_tl_errors.4007663984 Jun 05 04:33:05 PM PDT 24 Jun 05 04:33:09 PM PDT 24 60763090 ps
T991 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.2114043101 Jun 05 04:33:13 PM PDT 24 Jun 05 04:33:15 PM PDT 24 17088199 ps
T992 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.1177671748 Jun 05 04:32:53 PM PDT 24 Jun 05 04:32:55 PM PDT 24 11310115 ps
T993 /workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.1690426813 Jun 05 04:33:28 PM PDT 24 Jun 05 04:33:32 PM PDT 24 116818091 ps
T109 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2233004809 Jun 05 04:32:51 PM PDT 24 Jun 05 04:32:53 PM PDT 24 149156600 ps
T994 /workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3590524063 Jun 05 04:33:14 PM PDT 24 Jun 05 04:33:18 PM PDT 24 176279873 ps
T995 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.85599392 Jun 05 04:33:03 PM PDT 24 Jun 05 04:33:07 PM PDT 24 216575782 ps
T996 /workspace/coverage/cover_reg_top/7.spi_device_intr_test.62159536 Jun 05 04:33:10 PM PDT 24 Jun 05 04:33:11 PM PDT 24 14179418 ps
T997 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.2062327862 Jun 05 04:33:10 PM PDT 24 Jun 05 04:33:11 PM PDT 24 24861515 ps
T998 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.2397828337 Jun 05 04:33:00 PM PDT 24 Jun 05 04:33:07 PM PDT 24 145985759 ps
T999 /workspace/coverage/cover_reg_top/2.spi_device_mem_walk.1285872345 Jun 05 04:32:55 PM PDT 24 Jun 05 04:32:56 PM PDT 24 12660902 ps
T1000 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.3695420899 Jun 05 04:33:14 PM PDT 24 Jun 05 04:33:18 PM PDT 24 593918321 ps
T1001 /workspace/coverage/cover_reg_top/15.spi_device_tl_errors.1016257637 Jun 05 04:33:05 PM PDT 24 Jun 05 04:33:09 PM PDT 24 92492128 ps
T1002 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.1633359575 Jun 05 04:33:06 PM PDT 24 Jun 05 04:33:07 PM PDT 24 56237633 ps
T1003 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.2441450821 Jun 05 04:32:59 PM PDT 24 Jun 05 04:33:04 PM PDT 24 161261544 ps
T1004 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.361938010 Jun 05 04:33:00 PM PDT 24 Jun 05 04:33:09 PM PDT 24 369090878 ps
T1005 /workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.98278354 Jun 05 04:33:01 PM PDT 24 Jun 05 04:33:05 PM PDT 24 147783909 ps
T1006 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.2923275913 Jun 05 04:33:14 PM PDT 24 Jun 05 04:33:19 PM PDT 24 265534998 ps
T110 /workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1758748610 Jun 05 04:33:01 PM PDT 24 Jun 05 04:33:04 PM PDT 24 121431761 ps
T1007 /workspace/coverage/cover_reg_top/38.spi_device_intr_test.2244128028 Jun 05 04:33:19 PM PDT 24 Jun 05 04:33:21 PM PDT 24 15057394 ps
T95 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.4035891051 Jun 05 04:33:09 PM PDT 24 Jun 05 04:33:13 PM PDT 24 51137313 ps
T1008 /workspace/coverage/cover_reg_top/3.spi_device_tl_errors.583625662 Jun 05 04:32:50 PM PDT 24 Jun 05 04:32:52 PM PDT 24 99987132 ps
T1009 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3759682842 Jun 05 04:33:05 PM PDT 24 Jun 05 04:33:13 PM PDT 24 109085458 ps
T1010 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2245284656 Jun 05 04:33:05 PM PDT 24 Jun 05 04:33:09 PM PDT 24 191495266 ps
T1011 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.3848513115 Jun 05 04:32:49 PM PDT 24 Jun 05 04:33:03 PM PDT 24 2426948721 ps
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