T818 |
/workspace/coverage/default/49.spi_device_mailbox.3708169500 |
|
|
Jun 06 01:59:26 PM PDT 24 |
Jun 06 01:59:31 PM PDT 24 |
147424302 ps |
T67 |
/workspace/coverage/default/3.spi_device_sec_cm.2269435150 |
|
|
Jun 06 01:57:16 PM PDT 24 |
Jun 06 01:57:19 PM PDT 24 |
553841918 ps |
T819 |
/workspace/coverage/default/15.spi_device_csb_read.2263981733 |
|
|
Jun 06 01:57:48 PM PDT 24 |
Jun 06 01:57:50 PM PDT 24 |
17005582 ps |
T820 |
/workspace/coverage/default/18.spi_device_flash_and_tpm_min_idle.684968414 |
|
|
Jun 06 01:58:06 PM PDT 24 |
Jun 06 01:59:42 PM PDT 24 |
23603839932 ps |
T821 |
/workspace/coverage/default/21.spi_device_flash_and_tpm.2457251247 |
|
|
Jun 06 01:58:10 PM PDT 24 |
Jun 06 02:02:31 PM PDT 24 |
29941816008 ps |
T822 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.1093095237 |
|
|
Jun 06 01:57:20 PM PDT 24 |
Jun 06 01:57:45 PM PDT 24 |
8363047108 ps |
T823 |
/workspace/coverage/default/22.spi_device_alert_test.2024621940 |
|
|
Jun 06 01:58:10 PM PDT 24 |
Jun 06 01:58:11 PM PDT 24 |
11831916 ps |
T824 |
/workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.660001167 |
|
|
Jun 06 01:57:14 PM PDT 24 |
Jun 06 02:00:16 PM PDT 24 |
21490472042 ps |
T825 |
/workspace/coverage/default/1.spi_device_mailbox.1918685723 |
|
|
Jun 06 01:57:05 PM PDT 24 |
Jun 06 01:57:38 PM PDT 24 |
38782549539 ps |
T826 |
/workspace/coverage/default/13.spi_device_read_buffer_direct.2171252245 |
|
|
Jun 06 01:57:38 PM PDT 24 |
Jun 06 01:57:46 PM PDT 24 |
482264737 ps |
T827 |
/workspace/coverage/default/37.spi_device_flash_and_tpm_min_idle.2637550503 |
|
|
Jun 06 01:58:44 PM PDT 24 |
Jun 06 01:59:35 PM PDT 24 |
9028418175 ps |
T828 |
/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.129994851 |
|
|
Jun 06 01:59:28 PM PDT 24 |
Jun 06 01:59:41 PM PDT 24 |
9546652081 ps |
T829 |
/workspace/coverage/default/12.spi_device_csb_read.3882210542 |
|
|
Jun 06 01:57:38 PM PDT 24 |
Jun 06 01:57:40 PM PDT 24 |
50685362 ps |
T830 |
/workspace/coverage/default/2.spi_device_tpm_all.965367079 |
|
|
Jun 06 01:57:10 PM PDT 24 |
Jun 06 01:57:39 PM PDT 24 |
2173952924 ps |
T831 |
/workspace/coverage/default/39.spi_device_mailbox.2814278933 |
|
|
Jun 06 01:59:07 PM PDT 24 |
Jun 06 01:59:39 PM PDT 24 |
2272323424 ps |
T832 |
/workspace/coverage/default/3.spi_device_tpm_sts_read.2308189214 |
|
|
Jun 06 01:57:02 PM PDT 24 |
Jun 06 01:57:04 PM PDT 24 |
10567780 ps |
T833 |
/workspace/coverage/default/31.spi_device_intercept.3843704834 |
|
|
Jun 06 01:58:24 PM PDT 24 |
Jun 06 01:58:40 PM PDT 24 |
30048104521 ps |
T834 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.532553934 |
|
|
Jun 06 01:57:18 PM PDT 24 |
Jun 06 01:57:36 PM PDT 24 |
5314892688 ps |
T835 |
/workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.774496857 |
|
|
Jun 06 01:58:37 PM PDT 24 |
Jun 06 01:59:42 PM PDT 24 |
4191801347 ps |
T247 |
/workspace/coverage/default/8.spi_device_flash_and_tpm.2071650811 |
|
|
Jun 06 01:57:20 PM PDT 24 |
Jun 06 02:00:05 PM PDT 24 |
14745253847 ps |
T836 |
/workspace/coverage/default/42.spi_device_mailbox.859021619 |
|
|
Jun 06 01:59:07 PM PDT 24 |
Jun 06 02:00:19 PM PDT 24 |
7744374646 ps |
T837 |
/workspace/coverage/default/4.spi_device_flash_mode.860599317 |
|
|
Jun 06 01:57:09 PM PDT 24 |
Jun 06 01:57:29 PM PDT 24 |
1517229719 ps |
T838 |
/workspace/coverage/default/46.spi_device_pass_cmd_filtering.2296026260 |
|
|
Jun 06 01:59:04 PM PDT 24 |
Jun 06 01:59:19 PM PDT 24 |
4881443753 ps |
T839 |
/workspace/coverage/default/5.spi_device_tpm_all.2018331044 |
|
|
Jun 06 01:57:14 PM PDT 24 |
Jun 06 01:57:59 PM PDT 24 |
10900375008 ps |
T840 |
/workspace/coverage/default/11.spi_device_mailbox.2447504583 |
|
|
Jun 06 01:57:25 PM PDT 24 |
Jun 06 01:59:41 PM PDT 24 |
49968902031 ps |
T841 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.4229486012 |
|
|
Jun 06 01:59:26 PM PDT 24 |
Jun 06 01:59:27 PM PDT 24 |
40623105 ps |
T842 |
/workspace/coverage/default/3.spi_device_flash_and_tpm_min_idle.134256905 |
|
|
Jun 06 01:57:21 PM PDT 24 |
Jun 06 01:58:43 PM PDT 24 |
81937517657 ps |
T843 |
/workspace/coverage/default/5.spi_device_csb_read.3998837391 |
|
|
Jun 06 01:57:10 PM PDT 24 |
Jun 06 01:57:12 PM PDT 24 |
54560455 ps |
T86 |
/workspace/coverage/default/47.spi_device_cfg_cmd.3780791008 |
|
|
Jun 06 01:59:14 PM PDT 24 |
Jun 06 01:59:19 PM PDT 24 |
1245203759 ps |
T844 |
/workspace/coverage/default/24.spi_device_csb_read.1013794053 |
|
|
Jun 06 01:58:08 PM PDT 24 |
Jun 06 01:58:10 PM PDT 24 |
37569725 ps |
T845 |
/workspace/coverage/default/36.spi_device_intercept.888886384 |
|
|
Jun 06 01:58:58 PM PDT 24 |
Jun 06 01:59:14 PM PDT 24 |
4257294975 ps |
T241 |
/workspace/coverage/default/13.spi_device_stress_all.3517759852 |
|
|
Jun 06 01:57:48 PM PDT 24 |
Jun 06 02:04:37 PM PDT 24 |
109616665770 ps |
T846 |
/workspace/coverage/default/27.spi_device_flash_mode.3896948901 |
|
|
Jun 06 01:58:22 PM PDT 24 |
Jun 06 01:58:28 PM PDT 24 |
460122878 ps |
T847 |
/workspace/coverage/default/33.spi_device_csb_read.3545524102 |
|
|
Jun 06 01:58:39 PM PDT 24 |
Jun 06 01:58:42 PM PDT 24 |
58118271 ps |
T848 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.1102293373 |
|
|
Jun 06 01:58:37 PM PDT 24 |
Jun 06 01:58:54 PM PDT 24 |
4012008202 ps |
T849 |
/workspace/coverage/default/17.spi_device_csb_read.2688130306 |
|
|
Jun 06 01:57:51 PM PDT 24 |
Jun 06 01:57:54 PM PDT 24 |
15395885 ps |
T850 |
/workspace/coverage/default/3.spi_device_intercept.1696910318 |
|
|
Jun 06 01:57:22 PM PDT 24 |
Jun 06 01:57:34 PM PDT 24 |
907936158 ps |
T851 |
/workspace/coverage/default/24.spi_device_tpm_all.3082191502 |
|
|
Jun 06 01:58:05 PM PDT 24 |
Jun 06 01:58:44 PM PDT 24 |
10604867286 ps |
T852 |
/workspace/coverage/default/49.spi_device_intercept.518667051 |
|
|
Jun 06 01:59:31 PM PDT 24 |
Jun 06 01:59:35 PM PDT 24 |
167459729 ps |
T853 |
/workspace/coverage/default/43.spi_device_mailbox.1365815471 |
|
|
Jun 06 01:59:04 PM PDT 24 |
Jun 06 01:59:30 PM PDT 24 |
4979428142 ps |
T854 |
/workspace/coverage/default/13.spi_device_flash_mode.172742281 |
|
|
Jun 06 01:57:43 PM PDT 24 |
Jun 06 01:58:52 PM PDT 24 |
9470481277 ps |
T855 |
/workspace/coverage/default/24.spi_device_mailbox.2327847883 |
|
|
Jun 06 01:58:08 PM PDT 24 |
Jun 06 01:58:28 PM PDT 24 |
15317403635 ps |
T856 |
/workspace/coverage/default/45.spi_device_tpm_rw.3240678441 |
|
|
Jun 06 01:59:05 PM PDT 24 |
Jun 06 01:59:07 PM PDT 24 |
134882839 ps |
T857 |
/workspace/coverage/default/37.spi_device_flash_mode.3026102961 |
|
|
Jun 06 01:59:01 PM PDT 24 |
Jun 06 01:59:05 PM PDT 24 |
210942817 ps |
T858 |
/workspace/coverage/default/29.spi_device_upload.4163469705 |
|
|
Jun 06 01:58:39 PM PDT 24 |
Jun 06 01:58:43 PM PDT 24 |
734428521 ps |
T859 |
/workspace/coverage/default/19.spi_device_flash_all.2654488129 |
|
|
Jun 06 01:57:56 PM PDT 24 |
Jun 06 01:58:55 PM PDT 24 |
2415552977 ps |
T860 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.2262104947 |
|
|
Jun 06 01:59:25 PM PDT 24 |
Jun 06 01:59:42 PM PDT 24 |
8184988800 ps |
T269 |
/workspace/coverage/default/31.spi_device_stress_all.1616393933 |
|
|
Jun 06 01:58:38 PM PDT 24 |
Jun 06 02:05:14 PM PDT 24 |
35275110371 ps |
T861 |
/workspace/coverage/default/33.spi_device_cfg_cmd.1062041984 |
|
|
Jun 06 01:58:39 PM PDT 24 |
Jun 06 01:58:47 PM PDT 24 |
409194516 ps |
T862 |
/workspace/coverage/default/2.spi_device_tpm_sts_read.1141673721 |
|
|
Jun 06 01:57:08 PM PDT 24 |
Jun 06 01:57:09 PM PDT 24 |
52056302 ps |
T863 |
/workspace/coverage/default/46.spi_device_intercept.1829755126 |
|
|
Jun 06 01:59:15 PM PDT 24 |
Jun 06 01:59:26 PM PDT 24 |
3156222618 ps |
T864 |
/workspace/coverage/default/49.spi_device_tpm_rw.1349811911 |
|
|
Jun 06 01:59:27 PM PDT 24 |
Jun 06 01:59:29 PM PDT 24 |
213072742 ps |
T865 |
/workspace/coverage/default/45.spi_device_intercept.1186090821 |
|
|
Jun 06 01:59:04 PM PDT 24 |
Jun 06 01:59:20 PM PDT 24 |
2218192107 ps |
T866 |
/workspace/coverage/default/5.spi_device_upload.4093725282 |
|
|
Jun 06 01:57:15 PM PDT 24 |
Jun 06 01:57:22 PM PDT 24 |
456037854 ps |
T867 |
/workspace/coverage/default/19.spi_device_flash_and_tpm_min_idle.2714379607 |
|
|
Jun 06 01:58:08 PM PDT 24 |
Jun 06 02:02:45 PM PDT 24 |
26518098192 ps |
T248 |
/workspace/coverage/default/12.spi_device_flash_and_tpm_min_idle.3453051782 |
|
|
Jun 06 01:57:41 PM PDT 24 |
Jun 06 02:00:34 PM PDT 24 |
10569599968 ps |
T868 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.120099368 |
|
|
Jun 06 01:59:07 PM PDT 24 |
Jun 06 01:59:15 PM PDT 24 |
5162796448 ps |
T869 |
/workspace/coverage/default/42.spi_device_tpm_sts_read.2333719072 |
|
|
Jun 06 01:59:00 PM PDT 24 |
Jun 06 01:59:01 PM PDT 24 |
153114972 ps |
T870 |
/workspace/coverage/default/11.spi_device_read_buffer_direct.445330350 |
|
|
Jun 06 01:57:38 PM PDT 24 |
Jun 06 01:57:45 PM PDT 24 |
781616945 ps |
T871 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.3490856051 |
|
|
Jun 06 01:58:40 PM PDT 24 |
Jun 06 01:58:42 PM PDT 24 |
434454157 ps |
T872 |
/workspace/coverage/default/25.spi_device_csb_read.1650936173 |
|
|
Jun 06 01:58:06 PM PDT 24 |
Jun 06 01:58:08 PM PDT 24 |
40595490 ps |
T873 |
/workspace/coverage/default/12.spi_device_alert_test.2894076251 |
|
|
Jun 06 01:57:40 PM PDT 24 |
Jun 06 01:57:44 PM PDT 24 |
39474595 ps |
T874 |
/workspace/coverage/default/26.spi_device_flash_and_tpm.3570137826 |
|
|
Jun 06 01:58:20 PM PDT 24 |
Jun 06 01:59:27 PM PDT 24 |
6384939656 ps |
T875 |
/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.2641232807 |
|
|
Jun 06 01:58:13 PM PDT 24 |
Jun 06 01:58:34 PM PDT 24 |
5471416132 ps |
T876 |
/workspace/coverage/default/46.spi_device_alert_test.4085683134 |
|
|
Jun 06 01:59:14 PM PDT 24 |
Jun 06 01:59:16 PM PDT 24 |
24917087 ps |
T877 |
/workspace/coverage/default/49.spi_device_cfg_cmd.3520202663 |
|
|
Jun 06 01:59:30 PM PDT 24 |
Jun 06 01:59:33 PM PDT 24 |
85079161 ps |
T87 |
/workspace/coverage/default/30.spi_device_cfg_cmd.3827131653 |
|
|
Jun 06 01:58:34 PM PDT 24 |
Jun 06 01:58:41 PM PDT 24 |
635112353 ps |
T878 |
/workspace/coverage/default/38.spi_device_alert_test.248747736 |
|
|
Jun 06 01:58:55 PM PDT 24 |
Jun 06 01:58:56 PM PDT 24 |
55253349 ps |
T879 |
/workspace/coverage/default/13.spi_device_intercept.3104985435 |
|
|
Jun 06 01:57:40 PM PDT 24 |
Jun 06 01:57:48 PM PDT 24 |
584126847 ps |
T880 |
/workspace/coverage/default/19.spi_device_pass_addr_payload_swap.1513578491 |
|
|
Jun 06 01:58:03 PM PDT 24 |
Jun 06 01:58:07 PM PDT 24 |
1004400699 ps |
T881 |
/workspace/coverage/default/46.spi_device_tpm_rw.4226242869 |
|
|
Jun 06 01:59:05 PM PDT 24 |
Jun 06 01:59:11 PM PDT 24 |
213471090 ps |
T882 |
/workspace/coverage/default/34.spi_device_alert_test.1182482570 |
|
|
Jun 06 01:58:38 PM PDT 24 |
Jun 06 01:58:41 PM PDT 24 |
153670408 ps |
T287 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.3311490459 |
|
|
Jun 06 01:59:06 PM PDT 24 |
Jun 06 02:00:38 PM PDT 24 |
6315115453 ps |
T883 |
/workspace/coverage/default/22.spi_device_intercept.2974290703 |
|
|
Jun 06 01:58:09 PM PDT 24 |
Jun 06 01:58:13 PM PDT 24 |
123190339 ps |
T884 |
/workspace/coverage/default/14.spi_device_upload.2075990538 |
|
|
Jun 06 01:57:51 PM PDT 24 |
Jun 06 01:58:00 PM PDT 24 |
5755967626 ps |
T885 |
/workspace/coverage/default/15.spi_device_flash_and_tpm_min_idle.3272565590 |
|
|
Jun 06 01:57:51 PM PDT 24 |
Jun 06 01:58:14 PM PDT 24 |
2885886949 ps |
T886 |
/workspace/coverage/default/35.spi_device_cfg_cmd.1822950963 |
|
|
Jun 06 01:58:41 PM PDT 24 |
Jun 06 01:58:45 PM PDT 24 |
71949839 ps |
T887 |
/workspace/coverage/default/23.spi_device_stress_all.823023236 |
|
|
Jun 06 01:58:12 PM PDT 24 |
Jun 06 01:59:14 PM PDT 24 |
9342589266 ps |
T888 |
/workspace/coverage/default/14.spi_device_tpm_sts_read.2837432809 |
|
|
Jun 06 01:57:49 PM PDT 24 |
Jun 06 01:57:52 PM PDT 24 |
108764597 ps |
T889 |
/workspace/coverage/default/49.spi_device_alert_test.2291902845 |
|
|
Jun 06 01:59:27 PM PDT 24 |
Jun 06 01:59:28 PM PDT 24 |
22246801 ps |
T890 |
/workspace/coverage/default/43.spi_device_intercept.469046052 |
|
|
Jun 06 01:59:13 PM PDT 24 |
Jun 06 01:59:26 PM PDT 24 |
1090999803 ps |
T891 |
/workspace/coverage/default/17.spi_device_tpm_read_hw_reg.2204867203 |
|
|
Jun 06 01:57:51 PM PDT 24 |
Jun 06 01:57:57 PM PDT 24 |
2887775858 ps |
T892 |
/workspace/coverage/default/34.spi_device_stress_all.3162042704 |
|
|
Jun 06 01:58:55 PM PDT 24 |
Jun 06 01:58:56 PM PDT 24 |
61034180 ps |
T893 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.2124080907 |
|
|
Jun 06 01:57:28 PM PDT 24 |
Jun 06 01:57:29 PM PDT 24 |
33373888 ps |
T894 |
/workspace/coverage/default/28.spi_device_read_buffer_direct.2286581852 |
|
|
Jun 06 01:58:18 PM PDT 24 |
Jun 06 01:58:27 PM PDT 24 |
563849944 ps |
T895 |
/workspace/coverage/default/45.spi_device_mailbox.1756097971 |
|
|
Jun 06 01:59:06 PM PDT 24 |
Jun 06 01:59:37 PM PDT 24 |
2910229133 ps |
T896 |
/workspace/coverage/default/41.spi_device_stress_all.4055095733 |
|
|
Jun 06 01:58:55 PM PDT 24 |
Jun 06 02:01:19 PM PDT 24 |
66789113934 ps |
T897 |
/workspace/coverage/default/10.spi_device_tpm_all.1458240362 |
|
|
Jun 06 01:57:39 PM PDT 24 |
Jun 06 01:58:07 PM PDT 24 |
2849405574 ps |
T898 |
/workspace/coverage/default/16.spi_device_upload.1740108702 |
|
|
Jun 06 01:57:53 PM PDT 24 |
Jun 06 01:57:59 PM PDT 24 |
1173897269 ps |
T899 |
/workspace/coverage/default/34.spi_device_upload.427567573 |
|
|
Jun 06 01:58:42 PM PDT 24 |
Jun 06 01:58:57 PM PDT 24 |
3498602926 ps |
T900 |
/workspace/coverage/default/39.spi_device_read_buffer_direct.1532663122 |
|
|
Jun 06 01:59:01 PM PDT 24 |
Jun 06 01:59:07 PM PDT 24 |
1354693030 ps |
T254 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.2816875393 |
|
|
Jun 06 01:58:12 PM PDT 24 |
Jun 06 01:58:19 PM PDT 24 |
1814918271 ps |
T901 |
/workspace/coverage/default/23.spi_device_flash_mode.1571949132 |
|
|
Jun 06 01:58:08 PM PDT 24 |
Jun 06 01:58:12 PM PDT 24 |
72316774 ps |
T902 |
/workspace/coverage/default/6.spi_device_tpm_all.1239295836 |
|
|
Jun 06 01:57:38 PM PDT 24 |
Jun 06 01:58:00 PM PDT 24 |
4145368984 ps |
T903 |
/workspace/coverage/default/29.spi_device_mailbox.1048099560 |
|
|
Jun 06 01:58:38 PM PDT 24 |
Jun 06 01:58:43 PM PDT 24 |
198474967 ps |
T904 |
/workspace/coverage/default/18.spi_device_upload.3582748962 |
|
|
Jun 06 01:57:57 PM PDT 24 |
Jun 06 01:58:23 PM PDT 24 |
13040621988 ps |
T905 |
/workspace/coverage/default/16.spi_device_intercept.2247689823 |
|
|
Jun 06 01:57:53 PM PDT 24 |
Jun 06 01:57:58 PM PDT 24 |
644702285 ps |
T906 |
/workspace/coverage/default/48.spi_device_intercept.3443786268 |
|
|
Jun 06 01:59:19 PM PDT 24 |
Jun 06 01:59:25 PM PDT 24 |
666757526 ps |
T907 |
/workspace/coverage/default/31.spi_device_tpm_sts_read.1253809992 |
|
|
Jun 06 01:58:27 PM PDT 24 |
Jun 06 01:58:28 PM PDT 24 |
52359172 ps |
T908 |
/workspace/coverage/default/27.spi_device_csb_read.717139657 |
|
|
Jun 06 01:58:21 PM PDT 24 |
Jun 06 01:58:23 PM PDT 24 |
14207275 ps |
T909 |
/workspace/coverage/default/16.spi_device_tpm_all.3190334002 |
|
|
Jun 06 01:57:39 PM PDT 24 |
Jun 06 01:57:52 PM PDT 24 |
5051199573 ps |
T910 |
/workspace/coverage/default/0.spi_device_intercept.2354160175 |
|
|
Jun 06 01:57:05 PM PDT 24 |
Jun 06 01:57:09 PM PDT 24 |
186353998 ps |
T911 |
/workspace/coverage/default/15.spi_device_stress_all.2334394175 |
|
|
Jun 06 01:57:49 PM PDT 24 |
Jun 06 02:08:52 PM PDT 24 |
74797253851 ps |
T912 |
/workspace/coverage/default/0.spi_device_csb_read.3426244978 |
|
|
Jun 06 01:57:05 PM PDT 24 |
Jun 06 01:57:07 PM PDT 24 |
53643498 ps |
T913 |
/workspace/coverage/default/30.spi_device_stress_all.3131690406 |
|
|
Jun 06 01:58:26 PM PDT 24 |
Jun 06 01:58:27 PM PDT 24 |
70561416 ps |
T914 |
/workspace/coverage/default/39.spi_device_tpm_rw.1550801406 |
|
|
Jun 06 01:58:57 PM PDT 24 |
Jun 06 01:58:59 PM PDT 24 |
96213105 ps |
T915 |
/workspace/coverage/default/17.spi_device_intercept.3989319483 |
|
|
Jun 06 01:57:57 PM PDT 24 |
Jun 06 01:58:02 PM PDT 24 |
135984028 ps |
T916 |
/workspace/coverage/default/9.spi_device_tpm_sts_read.1688365441 |
|
|
Jun 06 01:57:20 PM PDT 24 |
Jun 06 01:57:23 PM PDT 24 |
35548322 ps |
T917 |
/workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.1919039769 |
|
|
Jun 06 01:59:04 PM PDT 24 |
Jun 06 02:00:50 PM PDT 24 |
4424041306 ps |
T918 |
/workspace/coverage/default/5.spi_device_mailbox.4094121165 |
|
|
Jun 06 01:57:14 PM PDT 24 |
Jun 06 01:57:24 PM PDT 24 |
1098706411 ps |
T919 |
/workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.1951310639 |
|
|
Jun 06 01:58:38 PM PDT 24 |
Jun 06 01:58:52 PM PDT 24 |
2592849828 ps |
T920 |
/workspace/coverage/default/7.spi_device_intercept.1579096795 |
|
|
Jun 06 01:57:11 PM PDT 24 |
Jun 06 01:57:23 PM PDT 24 |
1849704880 ps |
T921 |
/workspace/coverage/default/3.spi_device_mailbox.97979616 |
|
|
Jun 06 01:57:11 PM PDT 24 |
Jun 06 01:58:05 PM PDT 24 |
49067548447 ps |
T922 |
/workspace/coverage/default/17.spi_device_upload.1842603875 |
|
|
Jun 06 01:57:52 PM PDT 24 |
Jun 06 01:58:06 PM PDT 24 |
11134639460 ps |
T923 |
/workspace/coverage/default/35.spi_device_pass_cmd_filtering.434623438 |
|
|
Jun 06 01:58:37 PM PDT 24 |
Jun 06 01:58:52 PM PDT 24 |
21695934536 ps |
T924 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.735127769 |
|
|
Jun 06 01:59:08 PM PDT 24 |
Jun 06 01:59:20 PM PDT 24 |
2846199892 ps |
T925 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.3546688047 |
|
|
Jun 06 01:57:52 PM PDT 24 |
Jun 06 01:57:56 PM PDT 24 |
32235027 ps |
T926 |
/workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.1084105388 |
|
|
Jun 06 01:57:47 PM PDT 24 |
Jun 06 01:58:17 PM PDT 24 |
6301593508 ps |
T927 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.99585877 |
|
|
Jun 06 01:56:59 PM PDT 24 |
Jun 06 01:57:14 PM PDT 24 |
25454620278 ps |
T928 |
/workspace/coverage/default/36.spi_device_stress_all.2015509877 |
|
|
Jun 06 01:58:50 PM PDT 24 |
Jun 06 01:58:52 PM PDT 24 |
229960539 ps |
T929 |
/workspace/coverage/default/15.spi_device_cfg_cmd.2970905866 |
|
|
Jun 06 01:57:54 PM PDT 24 |
Jun 06 01:58:00 PM PDT 24 |
309131557 ps |
T930 |
/workspace/coverage/default/26.spi_device_alert_test.3663271732 |
|
|
Jun 06 01:58:20 PM PDT 24 |
Jun 06 01:58:21 PM PDT 24 |
32403427 ps |
T931 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.602642081 |
|
|
Jun 06 01:57:21 PM PDT 24 |
Jun 06 01:57:43 PM PDT 24 |
25913702564 ps |
T932 |
/workspace/coverage/default/35.spi_device_flash_mode.3291965355 |
|
|
Jun 06 01:58:47 PM PDT 24 |
Jun 06 01:58:51 PM PDT 24 |
178560003 ps |
T933 |
/workspace/coverage/default/31.spi_device_pass_addr_payload_swap.3214896786 |
|
|
Jun 06 01:58:31 PM PDT 24 |
Jun 06 01:58:42 PM PDT 24 |
3414807662 ps |
T934 |
/workspace/coverage/default/15.spi_device_mailbox.2137148665 |
|
|
Jun 06 01:57:48 PM PDT 24 |
Jun 06 01:57:59 PM PDT 24 |
1098490115 ps |
T935 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.460129515 |
|
|
Jun 06 01:58:04 PM PDT 24 |
Jun 06 01:58:09 PM PDT 24 |
1271277822 ps |
T936 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.2909223888 |
|
|
Jun 06 01:57:19 PM PDT 24 |
Jun 06 01:57:22 PM PDT 24 |
31649871 ps |
T937 |
/workspace/coverage/default/15.spi_device_flash_mode.512522183 |
|
|
Jun 06 01:57:47 PM PDT 24 |
Jun 06 01:58:09 PM PDT 24 |
5208991653 ps |
T938 |
/workspace/coverage/default/41.spi_device_upload.3075972929 |
|
|
Jun 06 01:58:55 PM PDT 24 |
Jun 06 01:58:58 PM PDT 24 |
134701666 ps |
T44 |
/workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.1140470512 |
|
|
Jun 06 01:59:29 PM PDT 24 |
Jun 06 02:02:29 PM PDT 24 |
16791777929 ps |
T939 |
/workspace/coverage/default/31.spi_device_tpm_all.847673716 |
|
|
Jun 06 01:58:31 PM PDT 24 |
Jun 06 01:58:36 PM PDT 24 |
2283152147 ps |
T940 |
/workspace/coverage/default/13.spi_device_flash_all.3400883763 |
|
|
Jun 06 01:57:45 PM PDT 24 |
Jun 06 02:01:31 PM PDT 24 |
283851775293 ps |
T941 |
/workspace/coverage/default/44.spi_device_alert_test.3212940131 |
|
|
Jun 06 01:59:12 PM PDT 24 |
Jun 06 01:59:14 PM PDT 24 |
14420321 ps |
T942 |
/workspace/coverage/default/44.spi_device_tpm_rw.515494607 |
|
|
Jun 06 01:59:11 PM PDT 24 |
Jun 06 01:59:13 PM PDT 24 |
333296539 ps |
T943 |
/workspace/coverage/default/13.spi_device_cfg_cmd.1108189165 |
|
|
Jun 06 01:57:47 PM PDT 24 |
Jun 06 01:57:51 PM PDT 24 |
137436237 ps |
T944 |
/workspace/coverage/default/29.spi_device_tpm_read_hw_reg.1902520173 |
|
|
Jun 06 01:58:27 PM PDT 24 |
Jun 06 01:58:39 PM PDT 24 |
2430789871 ps |
T945 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.1107442588 |
|
|
Jun 06 01:59:29 PM PDT 24 |
Jun 06 01:59:38 PM PDT 24 |
834472343 ps |
T946 |
/workspace/coverage/default/39.spi_device_upload.1927257371 |
|
|
Jun 06 01:59:08 PM PDT 24 |
Jun 06 01:59:11 PM PDT 24 |
852772562 ps |
T947 |
/workspace/coverage/default/44.spi_device_csb_read.854895567 |
|
|
Jun 06 01:59:02 PM PDT 24 |
Jun 06 01:59:03 PM PDT 24 |
52621852 ps |
T948 |
/workspace/coverage/default/41.spi_device_tpm_all.3004988752 |
|
|
Jun 06 01:59:00 PM PDT 24 |
Jun 06 01:59:33 PM PDT 24 |
5465678533 ps |
T949 |
/workspace/coverage/default/11.spi_device_alert_test.1320166439 |
|
|
Jun 06 01:57:34 PM PDT 24 |
Jun 06 01:57:35 PM PDT 24 |
16381733 ps |
T950 |
/workspace/coverage/default/46.spi_device_upload.3208034108 |
|
|
Jun 06 01:59:14 PM PDT 24 |
Jun 06 01:59:17 PM PDT 24 |
145290122 ps |
T951 |
/workspace/coverage/default/6.spi_device_flash_mode.395919422 |
|
|
Jun 06 01:57:11 PM PDT 24 |
Jun 06 01:57:26 PM PDT 24 |
3139530226 ps |
T952 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.3550872083 |
|
|
Jun 06 01:58:59 PM PDT 24 |
Jun 06 01:59:01 PM PDT 24 |
29302076 ps |
T953 |
/workspace/coverage/default/7.spi_device_pass_cmd_filtering.2070134050 |
|
|
Jun 06 01:57:15 PM PDT 24 |
Jun 06 01:57:28 PM PDT 24 |
39431883135 ps |
T954 |
/workspace/coverage/default/3.spi_device_pass_addr_payload_swap.1790297065 |
|
|
Jun 06 01:57:08 PM PDT 24 |
Jun 06 01:57:17 PM PDT 24 |
3337673936 ps |
T955 |
/workspace/coverage/default/28.spi_device_cfg_cmd.3464576065 |
|
|
Jun 06 01:58:15 PM PDT 24 |
Jun 06 01:58:20 PM PDT 24 |
809887602 ps |
T956 |
/workspace/coverage/default/41.spi_device_intercept.132444031 |
|
|
Jun 06 01:59:00 PM PDT 24 |
Jun 06 01:59:16 PM PDT 24 |
9246148453 ps |
T957 |
/workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.810430754 |
|
|
Jun 06 01:59:16 PM PDT 24 |
Jun 06 02:00:53 PM PDT 24 |
6230505110 ps |
T45 |
/workspace/coverage/default/2.spi_device_flash_and_tpm.1695659196 |
|
|
Jun 06 01:57:09 PM PDT 24 |
Jun 06 01:59:32 PM PDT 24 |
14685265659 ps |
T328 |
/workspace/coverage/default/18.spi_device_flash_mode.3963796434 |
|
|
Jun 06 01:57:56 PM PDT 24 |
Jun 06 01:58:09 PM PDT 24 |
1851267115 ps |
T958 |
/workspace/coverage/default/13.spi_device_upload.3708262675 |
|
|
Jun 06 01:57:40 PM PDT 24 |
Jun 06 01:57:47 PM PDT 24 |
1032022457 ps |
T959 |
/workspace/coverage/default/46.spi_device_cfg_cmd.1257683788 |
|
|
Jun 06 01:59:16 PM PDT 24 |
Jun 06 01:59:21 PM PDT 24 |
164333821 ps |
T960 |
/workspace/coverage/default/49.spi_device_upload.2474594193 |
|
|
Jun 06 01:59:30 PM PDT 24 |
Jun 06 01:59:35 PM PDT 24 |
600693708 ps |
T235 |
/workspace/coverage/default/6.spi_device_flash_all.1322506693 |
|
|
Jun 06 01:57:17 PM PDT 24 |
Jun 06 01:58:10 PM PDT 24 |
5672705122 ps |
T59 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.50338270 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:43 PM PDT 24 |
194844741 ps |
T135 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.382108436 |
|
|
Jun 06 01:53:49 PM PDT 24 |
Jun 06 01:53:52 PM PDT 24 |
92656956 ps |
T961 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2978843565 |
|
|
Jun 06 01:53:18 PM PDT 24 |
Jun 06 01:53:32 PM PDT 24 |
823678379 ps |
T60 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2172652762 |
|
|
Jun 06 01:53:40 PM PDT 24 |
Jun 06 01:53:42 PM PDT 24 |
80854957 ps |
T962 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.4274388721 |
|
|
Jun 06 01:53:58 PM PDT 24 |
Jun 06 01:54:01 PM PDT 24 |
11693706 ps |
T963 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.1508817133 |
|
|
Jun 06 01:53:55 PM PDT 24 |
Jun 06 01:53:56 PM PDT 24 |
18767004 ps |
T112 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.3485857067 |
|
|
Jun 06 01:53:24 PM PDT 24 |
Jun 06 01:53:28 PM PDT 24 |
149546196 ps |
T964 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.2200779654 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:53:52 PM PDT 24 |
16311863 ps |
T61 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.2171356834 |
|
|
Jun 06 01:53:31 PM PDT 24 |
Jun 06 01:53:35 PM PDT 24 |
153068823 ps |
T107 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.802394773 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:40 PM PDT 24 |
55161262 ps |
T113 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3547198447 |
|
|
Jun 06 01:53:48 PM PDT 24 |
Jun 06 01:53:51 PM PDT 24 |
26849853 ps |
T965 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.2872058177 |
|
|
Jun 06 01:53:17 PM PDT 24 |
Jun 06 01:53:20 PM PDT 24 |
53669590 ps |
T114 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.1930477594 |
|
|
Jun 06 01:53:26 PM PDT 24 |
Jun 06 01:53:29 PM PDT 24 |
96275823 ps |
T115 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3678271385 |
|
|
Jun 06 01:53:47 PM PDT 24 |
Jun 06 01:53:51 PM PDT 24 |
437215202 ps |
T116 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3476075564 |
|
|
Jun 06 01:53:11 PM PDT 24 |
Jun 06 01:53:14 PM PDT 24 |
213570838 ps |
T75 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3022978090 |
|
|
Jun 06 01:53:20 PM PDT 24 |
Jun 06 01:53:22 PM PDT 24 |
32127201 ps |
T966 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.2486943599 |
|
|
Jun 06 01:53:57 PM PDT 24 |
Jun 06 01:53:59 PM PDT 24 |
20850715 ps |
T90 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.2408884021 |
|
|
Jun 06 01:53:12 PM PDT 24 |
Jun 06 01:53:21 PM PDT 24 |
297195361 ps |
T108 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.1567803217 |
|
|
Jun 06 01:53:25 PM PDT 24 |
Jun 06 01:53:29 PM PDT 24 |
339312352 ps |
T967 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1630726423 |
|
|
Jun 06 01:53:40 PM PDT 24 |
Jun 06 01:53:43 PM PDT 24 |
52754792 ps |
T91 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1647089494 |
|
|
Jun 06 01:53:46 PM PDT 24 |
Jun 06 01:53:50 PM PDT 24 |
104236373 ps |
T968 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.1620346176 |
|
|
Jun 06 01:53:56 PM PDT 24 |
Jun 06 01:53:58 PM PDT 24 |
45853575 ps |
T105 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.576279562 |
|
|
Jun 06 01:53:47 PM PDT 24 |
Jun 06 01:53:51 PM PDT 24 |
116414260 ps |
T969 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.2934116165 |
|
|
Jun 06 01:53:30 PM PDT 24 |
Jun 06 01:53:31 PM PDT 24 |
43198449 ps |
T92 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.3019913618 |
|
|
Jun 06 01:53:39 PM PDT 24 |
Jun 06 01:54:00 PM PDT 24 |
849881437 ps |
T93 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.2609878045 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:53:57 PM PDT 24 |
825230277 ps |
T970 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.3593462042 |
|
|
Jun 06 01:53:36 PM PDT 24 |
Jun 06 01:53:38 PM PDT 24 |
82324600 ps |
T94 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.3630456139 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:54:06 PM PDT 24 |
568603353 ps |
T971 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.1957293501 |
|
|
Jun 06 01:53:52 PM PDT 24 |
Jun 06 01:53:54 PM PDT 24 |
37912064 ps |
T972 |
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.698255770 |
|
|
Jun 06 01:53:56 PM PDT 24 |
Jun 06 01:53:57 PM PDT 24 |
198343516 ps |
T144 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.99271474 |
|
|
Jun 06 01:53:48 PM PDT 24 |
Jun 06 01:53:53 PM PDT 24 |
609168807 ps |
T973 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.61888229 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:40 PM PDT 24 |
113033658 ps |
T974 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.1989643506 |
|
|
Jun 06 01:53:41 PM PDT 24 |
Jun 06 01:53:42 PM PDT 24 |
13082524 ps |
T117 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.1664357594 |
|
|
Jun 06 01:53:17 PM PDT 24 |
Jun 06 01:53:32 PM PDT 24 |
4742150565 ps |
T109 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3655031122 |
|
|
Jun 06 01:53:41 PM PDT 24 |
Jun 06 01:53:57 PM PDT 24 |
535178463 ps |
T76 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.4011202199 |
|
|
Jun 06 01:53:25 PM PDT 24 |
Jun 06 01:53:27 PM PDT 24 |
23855351 ps |
T975 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.1403741148 |
|
|
Jun 06 01:53:47 PM PDT 24 |
Jun 06 01:53:49 PM PDT 24 |
12915576 ps |
T98 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.1711931561 |
|
|
Jun 06 01:53:23 PM PDT 24 |
Jun 06 01:53:29 PM PDT 24 |
88887218 ps |
T976 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2302447933 |
|
|
Jun 06 01:53:36 PM PDT 24 |
Jun 06 01:53:39 PM PDT 24 |
28536380 ps |
T279 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1231383521 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:53 PM PDT 24 |
547188003 ps |
T977 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.2803821691 |
|
|
Jun 06 01:53:51 PM PDT 24 |
Jun 06 01:53:53 PM PDT 24 |
28802691 ps |
T104 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.103594936 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:40 PM PDT 24 |
142778433 ps |
T978 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.2254237495 |
|
|
Jun 06 01:53:20 PM PDT 24 |
Jun 06 01:53:23 PM PDT 24 |
44947812 ps |
T118 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.4048543951 |
|
|
Jun 06 01:53:20 PM PDT 24 |
Jun 06 01:53:23 PM PDT 24 |
236537520 ps |
T979 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.4187025186 |
|
|
Jun 06 01:53:48 PM PDT 24 |
Jun 06 01:53:52 PM PDT 24 |
378804970 ps |
T145 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2765115121 |
|
|
Jun 06 01:53:28 PM PDT 24 |
Jun 06 01:53:31 PM PDT 24 |
768776257 ps |
T106 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.667433618 |
|
|
Jun 06 01:53:28 PM PDT 24 |
Jun 06 01:53:32 PM PDT 24 |
106139260 ps |
T980 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.2567561399 |
|
|
Jun 06 01:54:02 PM PDT 24 |
Jun 06 01:54:04 PM PDT 24 |
21597272 ps |
T275 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.4114427947 |
|
|
Jun 06 01:53:12 PM PDT 24 |
Jun 06 01:53:35 PM PDT 24 |
1628915118 ps |
T146 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.116780950 |
|
|
Jun 06 01:53:31 PM PDT 24 |
Jun 06 01:53:35 PM PDT 24 |
146219693 ps |
T147 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2692998520 |
|
|
Jun 06 01:53:14 PM PDT 24 |
Jun 06 01:53:17 PM PDT 24 |
60215151 ps |
T981 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.2070683372 |
|
|
Jun 06 01:53:54 PM PDT 24 |
Jun 06 01:53:55 PM PDT 24 |
23794043 ps |
T982 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.2456029518 |
|
|
Jun 06 01:53:51 PM PDT 24 |
Jun 06 01:53:53 PM PDT 24 |
12479072 ps |
T148 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.782094157 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:53:52 PM PDT 24 |
77237737 ps |
T77 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.1189803186 |
|
|
Jun 06 01:53:21 PM PDT 24 |
Jun 06 01:53:23 PM PDT 24 |
51688842 ps |
T983 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.576422521 |
|
|
Jun 06 01:53:48 PM PDT 24 |
Jun 06 01:53:50 PM PDT 24 |
51185807 ps |
T984 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.2942092692 |
|
|
Jun 06 01:53:48 PM PDT 24 |
Jun 06 01:54:02 PM PDT 24 |
212706502 ps |
T985 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3206483262 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:41 PM PDT 24 |
279151546 ps |
T119 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.2782205909 |
|
|
Jun 06 01:53:38 PM PDT 24 |
Jun 06 01:53:41 PM PDT 24 |
72265199 ps |
T120 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.3899953888 |
|
|
Jun 06 01:53:20 PM PDT 24 |
Jun 06 01:53:23 PM PDT 24 |
42925998 ps |
T121 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.922779903 |
|
|
Jun 06 01:53:39 PM PDT 24 |
Jun 06 01:53:42 PM PDT 24 |
56111947 ps |
T986 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.3738689049 |
|
|
Jun 06 01:53:39 PM PDT 24 |
Jun 06 01:53:43 PM PDT 24 |
231697308 ps |
T987 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.3260582742 |
|
|
Jun 06 01:53:18 PM PDT 24 |
Jun 06 01:53:24 PM PDT 24 |
439206668 ps |
T988 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.1021802763 |
|
|
Jun 06 01:53:12 PM PDT 24 |
Jun 06 01:53:13 PM PDT 24 |
34014522 ps |
T99 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.629791231 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:41 PM PDT 24 |
166594238 ps |
T989 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.2738545011 |
|
|
Jun 06 01:53:56 PM PDT 24 |
Jun 06 01:53:58 PM PDT 24 |
30183556 ps |
T990 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.2169400188 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:53:54 PM PDT 24 |
62223507 ps |
T122 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.2486630063 |
|
|
Jun 06 01:53:35 PM PDT 24 |
Jun 06 01:53:37 PM PDT 24 |
102331952 ps |
T276 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.3159404968 |
|
|
Jun 06 01:53:24 PM PDT 24 |
Jun 06 01:53:41 PM PDT 24 |
767404828 ps |
T991 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2477461924 |
|
|
Jun 06 01:53:56 PM PDT 24 |
Jun 06 01:53:58 PM PDT 24 |
12996379 ps |
T278 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.619732746 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:54:03 PM PDT 24 |
761249625 ps |
T992 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.258048842 |
|
|
Jun 06 01:53:56 PM PDT 24 |
Jun 06 01:53:58 PM PDT 24 |
24459127 ps |
T993 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.1645129669 |
|
|
Jun 06 01:53:49 PM PDT 24 |
Jun 06 01:53:50 PM PDT 24 |
37706196 ps |
T100 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.462920257 |
|
|
Jun 06 01:53:15 PM PDT 24 |
Jun 06 01:53:21 PM PDT 24 |
178649471 ps |
T994 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.3230504894 |
|
|
Jun 06 01:53:58 PM PDT 24 |
Jun 06 01:54:01 PM PDT 24 |
35220243 ps |
T995 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3720798776 |
|
|
Jun 06 01:53:21 PM PDT 24 |
Jun 06 01:53:31 PM PDT 24 |
727784124 ps |
T996 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.412916150 |
|
|
Jun 06 01:53:38 PM PDT 24 |
Jun 06 01:53:39 PM PDT 24 |
194395119 ps |
T997 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3834595679 |
|
|
Jun 06 01:53:24 PM PDT 24 |
Jun 06 01:53:25 PM PDT 24 |
40137088 ps |
T998 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2602913869 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:53:52 PM PDT 24 |
10840241 ps |
T999 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.3613928250 |
|
|
Jun 06 01:53:48 PM PDT 24 |
Jun 06 01:53:51 PM PDT 24 |
68221981 ps |
T1000 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3634452594 |
|
|
Jun 06 01:53:49 PM PDT 24 |
Jun 06 01:53:52 PM PDT 24 |
400748980 ps |
T1001 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.2469699685 |
|
|
Jun 06 01:53:24 PM PDT 24 |
Jun 06 01:53:32 PM PDT 24 |
109846315 ps |
T1002 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3071820763 |
|
|
Jun 06 01:53:36 PM PDT 24 |
Jun 06 01:53:40 PM PDT 24 |
1661111696 ps |
T101 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.2929412168 |
|
|
Jun 06 01:53:37 PM PDT 24 |
Jun 06 01:53:43 PM PDT 24 |
995687674 ps |
T1003 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_errors.255910329 |
|
|
Jun 06 01:53:36 PM PDT 24 |
Jun 06 01:53:39 PM PDT 24 |
102729468 ps |
T102 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.504523073 |
|
|
Jun 06 01:53:14 PM PDT 24 |
Jun 06 01:53:18 PM PDT 24 |
281735237 ps |
T1004 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2858458917 |
|
|
Jun 06 01:53:24 PM PDT 24 |
Jun 06 01:53:28 PM PDT 24 |
402170825 ps |
T1005 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.3226540790 |
|
|
Jun 06 01:53:17 PM PDT 24 |
Jun 06 01:53:20 PM PDT 24 |
59758358 ps |
T1006 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.4091611058 |
|
|
Jun 06 01:53:22 PM PDT 24 |
Jun 06 01:53:24 PM PDT 24 |
12923799 ps |
T1007 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.192080990 |
|
|
Jun 06 01:53:50 PM PDT 24 |
Jun 06 01:53:56 PM PDT 24 |
60907975 ps |
T1008 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.3685226312 |
|
|
Jun 06 01:53:46 PM PDT 24 |
Jun 06 01:53:52 PM PDT 24 |
1644583553 ps |
T1009 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.1579805304 |
|
|
Jun 06 01:53:54 PM PDT 24 |
Jun 06 01:53:55 PM PDT 24 |
15177936 ps |
T123 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.1721608744 |
|
|
Jun 06 01:53:16 PM PDT 24 |
Jun 06 01:53:34 PM PDT 24 |
1513951351 ps |
T103 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1576537347 |
|
|
Jun 06 01:53:47 PM PDT 24 |
Jun 06 01:54:01 PM PDT 24 |
819928162 ps |