Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
4254 |
0 |
0 |
T67 |
17269 |
333 |
0 |
0 |
T68 |
16618 |
191 |
0 |
0 |
T98 |
2769 |
6 |
0 |
0 |
T99 |
98370 |
4 |
0 |
0 |
T100 |
74196 |
4 |
0 |
0 |
T101 |
5383 |
279 |
0 |
0 |
T104 |
4539 |
148 |
0 |
0 |
T105 |
15655 |
198 |
0 |
0 |
T108 |
97119 |
2 |
0 |
0 |
T109 |
2197 |
6 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2362 |
0 |
0 |
T99 |
98370 |
78 |
0 |
0 |
T100 |
74196 |
89 |
0 |
0 |
T108 |
97119 |
65 |
0 |
0 |
T110 |
87972 |
76 |
0 |
0 |
T111 |
9706 |
20 |
0 |
0 |
T114 |
9510 |
5 |
0 |
0 |
T117 |
11360 |
15 |
0 |
0 |
T134 |
18600 |
66 |
0 |
0 |
T135 |
7823 |
24 |
0 |
0 |
T149 |
6036 |
12 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2413 |
0 |
0 |
T99 |
98370 |
87 |
0 |
0 |
T100 |
74196 |
66 |
0 |
0 |
T108 |
97119 |
57 |
0 |
0 |
T110 |
87972 |
100 |
0 |
0 |
T111 |
9706 |
15 |
0 |
0 |
T117 |
11360 |
16 |
0 |
0 |
T134 |
18600 |
7 |
0 |
0 |
T135 |
7823 |
24 |
0 |
0 |
T149 |
6036 |
2 |
0 |
0 |
T150 |
10027 |
17 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
3118 |
0 |
0 |
T99 |
98370 |
123 |
0 |
0 |
T100 |
74196 |
184 |
0 |
0 |
T108 |
97119 |
105 |
0 |
0 |
T110 |
87972 |
108 |
0 |
0 |
T111 |
9706 |
20 |
0 |
0 |
T114 |
9510 |
11 |
0 |
0 |
T117 |
11360 |
16 |
0 |
0 |
T134 |
18600 |
19 |
0 |
0 |
T149 |
6036 |
14 |
0 |
0 |
T151 |
10114 |
4 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
14602 |
0 |
0 |
T99 |
98370 |
1630 |
0 |
0 |
T100 |
74196 |
1424 |
0 |
0 |
T108 |
97119 |
717 |
0 |
0 |
T110 |
87972 |
1180 |
0 |
0 |
T111 |
9706 |
110 |
0 |
0 |
T114 |
9510 |
130 |
0 |
0 |
T117 |
11360 |
241 |
0 |
0 |
T134 |
18600 |
22 |
0 |
0 |
T135 |
7823 |
35 |
0 |
0 |
T149 |
6036 |
7 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
14844 |
0 |
0 |
T99 |
98370 |
863 |
0 |
0 |
T100 |
74196 |
1538 |
0 |
0 |
T108 |
97119 |
1108 |
0 |
0 |
T110 |
87972 |
1038 |
0 |
0 |
T111 |
9706 |
114 |
0 |
0 |
T114 |
9510 |
148 |
0 |
0 |
T117 |
11360 |
133 |
0 |
0 |
T134 |
18600 |
41 |
0 |
0 |
T135 |
7823 |
30 |
0 |
0 |
T151 |
10114 |
53 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
14096 |
0 |
0 |
T99 |
98370 |
1062 |
0 |
0 |
T100 |
74196 |
1152 |
0 |
0 |
T108 |
97119 |
1017 |
0 |
0 |
T110 |
87972 |
680 |
0 |
0 |
T111 |
9706 |
13 |
0 |
0 |
T114 |
9510 |
80 |
0 |
0 |
T117 |
11360 |
144 |
0 |
0 |
T134 |
18600 |
35 |
0 |
0 |
T135 |
7823 |
63 |
0 |
0 |
T149 |
6036 |
18 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
13121 |
0 |
0 |
T99 |
98370 |
1145 |
0 |
0 |
T100 |
74196 |
1062 |
0 |
0 |
T108 |
97119 |
982 |
0 |
0 |
T110 |
87972 |
803 |
0 |
0 |
T111 |
9706 |
141 |
0 |
0 |
T114 |
9510 |
87 |
0 |
0 |
T117 |
11360 |
8 |
0 |
0 |
T134 |
18600 |
29 |
0 |
0 |
T135 |
7823 |
4 |
0 |
0 |
T149 |
6036 |
6 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
14105 |
0 |
0 |
T99 |
98370 |
605 |
0 |
0 |
T100 |
74196 |
1353 |
0 |
0 |
T108 |
97119 |
1165 |
0 |
0 |
T110 |
87972 |
973 |
0 |
0 |
T111 |
9706 |
14 |
0 |
0 |
T114 |
9510 |
144 |
0 |
0 |
T117 |
11360 |
242 |
0 |
0 |
T134 |
18600 |
43 |
0 |
0 |
T149 |
6036 |
20 |
0 |
0 |
T151 |
10114 |
175 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
12959 |
0 |
0 |
T99 |
98370 |
897 |
0 |
0 |
T100 |
74196 |
1273 |
0 |
0 |
T108 |
97119 |
1062 |
0 |
0 |
T110 |
87972 |
815 |
0 |
0 |
T111 |
9706 |
148 |
0 |
0 |
T114 |
9510 |
106 |
0 |
0 |
T117 |
11360 |
322 |
0 |
0 |
T134 |
18600 |
29 |
0 |
0 |
T135 |
7823 |
5 |
0 |
0 |
T149 |
6036 |
2 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
14390 |
0 |
0 |
T99 |
98370 |
740 |
0 |
0 |
T100 |
74196 |
1494 |
0 |
0 |
T108 |
97119 |
1182 |
0 |
0 |
T110 |
87972 |
1144 |
0 |
0 |
T111 |
9706 |
143 |
0 |
0 |
T114 |
9510 |
13 |
0 |
0 |
T117 |
11360 |
4 |
0 |
0 |
T134 |
18600 |
46 |
0 |
0 |
T135 |
7823 |
44 |
0 |
0 |
T151 |
10114 |
16 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
14408 |
0 |
0 |
T99 |
98370 |
1042 |
0 |
0 |
T100 |
74196 |
1316 |
0 |
0 |
T108 |
97119 |
1179 |
0 |
0 |
T110 |
87972 |
881 |
0 |
0 |
T111 |
9706 |
17 |
0 |
0 |
T114 |
9510 |
129 |
0 |
0 |
T117 |
11360 |
352 |
0 |
0 |
T134 |
18600 |
21 |
0 |
0 |
T135 |
7823 |
26 |
0 |
0 |
T149 |
6036 |
13 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6846 |
0 |
0 |
T99 |
98370 |
500 |
0 |
0 |
T100 |
74196 |
478 |
0 |
0 |
T108 |
97119 |
409 |
0 |
0 |
T110 |
87972 |
451 |
0 |
0 |
T111 |
9706 |
17 |
0 |
0 |
T114 |
9510 |
29 |
0 |
0 |
T117 |
11360 |
53 |
0 |
0 |
T134 |
18600 |
76 |
0 |
0 |
T135 |
7823 |
17 |
0 |
0 |
T149 |
6036 |
24 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7178 |
0 |
0 |
T99 |
98370 |
608 |
0 |
0 |
T100 |
74196 |
573 |
0 |
0 |
T108 |
97119 |
368 |
0 |
0 |
T110 |
87972 |
473 |
0 |
0 |
T111 |
9706 |
69 |
0 |
0 |
T114 |
9510 |
57 |
0 |
0 |
T117 |
11360 |
93 |
0 |
0 |
T134 |
18600 |
32 |
0 |
0 |
T135 |
7823 |
43 |
0 |
0 |
T149 |
6036 |
15 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7826 |
0 |
0 |
T99 |
98370 |
531 |
0 |
0 |
T100 |
74196 |
574 |
0 |
0 |
T108 |
97119 |
400 |
0 |
0 |
T110 |
87972 |
431 |
0 |
0 |
T111 |
9706 |
126 |
0 |
0 |
T114 |
9510 |
33 |
0 |
0 |
T117 |
11360 |
109 |
0 |
0 |
T134 |
18600 |
15 |
0 |
0 |
T135 |
7823 |
19 |
0 |
0 |
T149 |
6036 |
10 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6693 |
0 |
0 |
T99 |
98370 |
351 |
0 |
0 |
T100 |
74196 |
531 |
0 |
0 |
T108 |
97119 |
481 |
0 |
0 |
T110 |
87972 |
408 |
0 |
0 |
T111 |
9706 |
14 |
0 |
0 |
T114 |
9510 |
38 |
0 |
0 |
T117 |
11360 |
61 |
0 |
0 |
T134 |
18600 |
48 |
0 |
0 |
T135 |
7823 |
37 |
0 |
0 |
T151 |
10114 |
9 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6769 |
0 |
0 |
T99 |
98370 |
440 |
0 |
0 |
T100 |
74196 |
752 |
0 |
0 |
T108 |
97119 |
344 |
0 |
0 |
T110 |
87972 |
415 |
0 |
0 |
T111 |
9706 |
80 |
0 |
0 |
T114 |
9510 |
18 |
0 |
0 |
T117 |
11360 |
17 |
0 |
0 |
T134 |
18600 |
43 |
0 |
0 |
T135 |
7823 |
25 |
0 |
0 |
T149 |
6036 |
18 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6840 |
0 |
0 |
T99 |
98370 |
420 |
0 |
0 |
T100 |
74196 |
512 |
0 |
0 |
T108 |
97119 |
456 |
0 |
0 |
T110 |
87972 |
419 |
0 |
0 |
T111 |
9706 |
15 |
0 |
0 |
T114 |
9510 |
6 |
0 |
0 |
T117 |
11360 |
95 |
0 |
0 |
T134 |
18600 |
44 |
0 |
0 |
T135 |
7823 |
17 |
0 |
0 |
T151 |
10114 |
30 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6674 |
0 |
0 |
T99 |
98370 |
393 |
0 |
0 |
T100 |
74196 |
682 |
0 |
0 |
T108 |
97119 |
476 |
0 |
0 |
T110 |
87972 |
467 |
0 |
0 |
T111 |
9706 |
9 |
0 |
0 |
T114 |
9510 |
66 |
0 |
0 |
T117 |
11360 |
58 |
0 |
0 |
T134 |
18600 |
9 |
0 |
0 |
T135 |
7823 |
20 |
0 |
0 |
T149 |
6036 |
16 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6854 |
0 |
0 |
T99 |
98370 |
554 |
0 |
0 |
T100 |
74196 |
637 |
0 |
0 |
T108 |
97119 |
451 |
0 |
0 |
T110 |
87972 |
444 |
0 |
0 |
T111 |
9706 |
68 |
0 |
0 |
T114 |
9510 |
4 |
0 |
0 |
T117 |
11360 |
101 |
0 |
0 |
T134 |
18600 |
28 |
0 |
0 |
T135 |
7823 |
6 |
0 |
0 |
T149 |
6036 |
11 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7291 |
0 |
0 |
T99 |
98370 |
357 |
0 |
0 |
T100 |
74196 |
570 |
0 |
0 |
T108 |
97119 |
644 |
0 |
0 |
T110 |
87972 |
338 |
0 |
0 |
T111 |
9706 |
124 |
0 |
0 |
T114 |
9510 |
11 |
0 |
0 |
T117 |
11360 |
141 |
0 |
0 |
T134 |
18600 |
40 |
0 |
0 |
T135 |
7823 |
20 |
0 |
0 |
T149 |
6036 |
6 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7258 |
0 |
0 |
T99 |
98370 |
569 |
0 |
0 |
T100 |
74196 |
719 |
0 |
0 |
T108 |
97119 |
439 |
0 |
0 |
T110 |
87972 |
443 |
0 |
0 |
T111 |
9706 |
70 |
0 |
0 |
T114 |
9510 |
35 |
0 |
0 |
T117 |
11360 |
90 |
0 |
0 |
T134 |
18600 |
30 |
0 |
0 |
T135 |
7823 |
23 |
0 |
0 |
T149 |
6036 |
19 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6924 |
0 |
0 |
T99 |
98370 |
418 |
0 |
0 |
T100 |
74196 |
421 |
0 |
0 |
T108 |
97119 |
453 |
0 |
0 |
T110 |
87972 |
441 |
0 |
0 |
T111 |
9706 |
16 |
0 |
0 |
T114 |
9510 |
41 |
0 |
0 |
T117 |
11360 |
69 |
0 |
0 |
T134 |
18600 |
27 |
0 |
0 |
T135 |
7823 |
14 |
0 |
0 |
T149 |
6036 |
36 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6565 |
0 |
0 |
T99 |
98370 |
433 |
0 |
0 |
T100 |
74196 |
502 |
0 |
0 |
T105 |
15655 |
6 |
0 |
0 |
T108 |
97119 |
479 |
0 |
0 |
T110 |
87972 |
382 |
0 |
0 |
T111 |
9706 |
79 |
0 |
0 |
T114 |
9510 |
62 |
0 |
0 |
T134 |
18600 |
24 |
0 |
0 |
T135 |
7823 |
38 |
0 |
0 |
T149 |
6036 |
21 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7139 |
0 |
0 |
T99 |
98370 |
598 |
0 |
0 |
T100 |
74196 |
552 |
0 |
0 |
T108 |
97119 |
460 |
0 |
0 |
T110 |
87972 |
362 |
0 |
0 |
T111 |
9706 |
115 |
0 |
0 |
T114 |
9510 |
83 |
0 |
0 |
T117 |
11360 |
72 |
0 |
0 |
T134 |
18600 |
40 |
0 |
0 |
T135 |
7823 |
4 |
0 |
0 |
T149 |
6036 |
17 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6593 |
0 |
0 |
T99 |
98370 |
471 |
0 |
0 |
T100 |
74196 |
515 |
0 |
0 |
T108 |
97119 |
391 |
0 |
0 |
T110 |
87972 |
433 |
0 |
0 |
T111 |
9706 |
135 |
0 |
0 |
T114 |
9510 |
40 |
0 |
0 |
T117 |
11360 |
67 |
0 |
0 |
T134 |
18600 |
27 |
0 |
0 |
T135 |
7823 |
11 |
0 |
0 |
T149 |
6036 |
32 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7473 |
0 |
0 |
T99 |
98370 |
377 |
0 |
0 |
T100 |
74196 |
578 |
0 |
0 |
T108 |
97119 |
482 |
0 |
0 |
T110 |
87972 |
530 |
0 |
0 |
T111 |
9706 |
118 |
0 |
0 |
T114 |
9510 |
77 |
0 |
0 |
T117 |
11360 |
110 |
0 |
0 |
T134 |
18600 |
65 |
0 |
0 |
T135 |
7823 |
24 |
0 |
0 |
T151 |
10114 |
38 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6967 |
0 |
0 |
T99 |
98370 |
424 |
0 |
0 |
T100 |
74196 |
679 |
0 |
0 |
T105 |
15655 |
1 |
0 |
0 |
T108 |
97119 |
394 |
0 |
0 |
T110 |
87972 |
448 |
0 |
0 |
T111 |
9706 |
72 |
0 |
0 |
T114 |
9510 |
26 |
0 |
0 |
T134 |
18600 |
50 |
0 |
0 |
T135 |
7823 |
45 |
0 |
0 |
T149 |
6036 |
4 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6533 |
0 |
0 |
T99 |
98370 |
488 |
0 |
0 |
T100 |
74196 |
329 |
0 |
0 |
T108 |
97119 |
466 |
0 |
0 |
T110 |
87972 |
392 |
0 |
0 |
T111 |
9706 |
23 |
0 |
0 |
T114 |
9510 |
6 |
0 |
0 |
T117 |
11360 |
80 |
0 |
0 |
T134 |
18600 |
39 |
0 |
0 |
T135 |
7823 |
25 |
0 |
0 |
T151 |
10114 |
20 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6741 |
0 |
0 |
T99 |
98370 |
365 |
0 |
0 |
T100 |
74196 |
640 |
0 |
0 |
T108 |
97119 |
545 |
0 |
0 |
T110 |
87972 |
443 |
0 |
0 |
T111 |
9706 |
127 |
0 |
0 |
T114 |
9510 |
1 |
0 |
0 |
T117 |
11360 |
17 |
0 |
0 |
T134 |
18600 |
27 |
0 |
0 |
T135 |
7823 |
21 |
0 |
0 |
T149 |
6036 |
8 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7201 |
0 |
0 |
T99 |
98370 |
512 |
0 |
0 |
T100 |
74196 |
366 |
0 |
0 |
T108 |
97119 |
460 |
0 |
0 |
T110 |
87972 |
462 |
0 |
0 |
T111 |
9706 |
71 |
0 |
0 |
T114 |
9510 |
84 |
0 |
0 |
T117 |
11360 |
121 |
0 |
0 |
T134 |
18600 |
20 |
0 |
0 |
T135 |
7823 |
23 |
0 |
0 |
T149 |
6036 |
5 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7321 |
0 |
0 |
T99 |
98370 |
414 |
0 |
0 |
T100 |
74196 |
693 |
0 |
0 |
T108 |
97119 |
438 |
0 |
0 |
T110 |
87972 |
487 |
0 |
0 |
T111 |
9706 |
77 |
0 |
0 |
T114 |
9510 |
95 |
0 |
0 |
T117 |
11360 |
101 |
0 |
0 |
T134 |
18600 |
49 |
0 |
0 |
T135 |
7823 |
21 |
0 |
0 |
T149 |
6036 |
15 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6953 |
0 |
0 |
T99 |
98370 |
452 |
0 |
0 |
T100 |
74196 |
502 |
0 |
0 |
T108 |
97119 |
511 |
0 |
0 |
T110 |
87972 |
506 |
0 |
0 |
T111 |
9706 |
9 |
0 |
0 |
T114 |
9510 |
44 |
0 |
0 |
T117 |
11360 |
95 |
0 |
0 |
T134 |
18600 |
22 |
0 |
0 |
T135 |
7823 |
2 |
0 |
0 |
T149 |
6036 |
9 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6871 |
0 |
0 |
T99 |
98370 |
486 |
0 |
0 |
T100 |
74196 |
510 |
0 |
0 |
T108 |
97119 |
502 |
0 |
0 |
T110 |
87972 |
456 |
0 |
0 |
T111 |
9706 |
88 |
0 |
0 |
T114 |
9510 |
9 |
0 |
0 |
T117 |
11360 |
7 |
0 |
0 |
T134 |
18600 |
12 |
0 |
0 |
T135 |
7823 |
35 |
0 |
0 |
T151 |
10114 |
25 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
7182 |
0 |
0 |
T99 |
98370 |
420 |
0 |
0 |
T100 |
74196 |
366 |
0 |
0 |
T108 |
97119 |
476 |
0 |
0 |
T110 |
87972 |
534 |
0 |
0 |
T111 |
9706 |
14 |
0 |
0 |
T114 |
9510 |
11 |
0 |
0 |
T117 |
11360 |
117 |
0 |
0 |
T134 |
18600 |
13 |
0 |
0 |
T135 |
7823 |
18 |
0 |
0 |
T151 |
10114 |
5 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
6856 |
0 |
0 |
T99 |
98370 |
413 |
0 |
0 |
T100 |
74196 |
456 |
0 |
0 |
T108 |
97119 |
376 |
0 |
0 |
T110 |
87972 |
453 |
0 |
0 |
T111 |
9706 |
131 |
0 |
0 |
T114 |
9510 |
49 |
0 |
0 |
T117 |
11360 |
141 |
0 |
0 |
T134 |
18600 |
50 |
0 |
0 |
T135 |
7823 |
24 |
0 |
0 |
T149 |
6036 |
35 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2649 |
0 |
0 |
T99 |
98370 |
96 |
0 |
0 |
T100 |
74196 |
114 |
0 |
0 |
T108 |
97119 |
96 |
0 |
0 |
T110 |
87972 |
105 |
0 |
0 |
T111 |
9706 |
18 |
0 |
0 |
T114 |
9510 |
12 |
0 |
0 |
T117 |
11360 |
7 |
0 |
0 |
T134 |
18600 |
24 |
0 |
0 |
T135 |
7823 |
16 |
0 |
0 |
T149 |
6036 |
3 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2773 |
0 |
0 |
T99 |
98370 |
76 |
0 |
0 |
T100 |
74196 |
120 |
0 |
0 |
T105 |
15655 |
5 |
0 |
0 |
T108 |
97119 |
85 |
0 |
0 |
T110 |
87972 |
80 |
0 |
0 |
T111 |
9706 |
16 |
0 |
0 |
T114 |
9510 |
10 |
0 |
0 |
T134 |
18600 |
35 |
0 |
0 |
T135 |
7823 |
12 |
0 |
0 |
T149 |
6036 |
14 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2796 |
0 |
0 |
T99 |
98370 |
101 |
0 |
0 |
T100 |
74196 |
141 |
0 |
0 |
T108 |
97119 |
67 |
0 |
0 |
T110 |
87972 |
71 |
0 |
0 |
T111 |
9706 |
18 |
0 |
0 |
T114 |
9510 |
7 |
0 |
0 |
T117 |
11360 |
14 |
0 |
0 |
T134 |
18600 |
25 |
0 |
0 |
T135 |
7823 |
47 |
0 |
0 |
T149 |
6036 |
1 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2600 |
0 |
0 |
T99 |
98370 |
104 |
0 |
0 |
T100 |
74196 |
114 |
0 |
0 |
T108 |
97119 |
113 |
0 |
0 |
T110 |
87972 |
74 |
0 |
0 |
T111 |
9706 |
7 |
0 |
0 |
T114 |
9510 |
4 |
0 |
0 |
T117 |
11360 |
20 |
0 |
0 |
T134 |
18600 |
31 |
0 |
0 |
T135 |
7823 |
27 |
0 |
0 |
T151 |
10114 |
24 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
3564 |
0 |
0 |
T99 |
98370 |
151 |
0 |
0 |
T100 |
74196 |
180 |
0 |
0 |
T108 |
97119 |
169 |
0 |
0 |
T110 |
87972 |
146 |
0 |
0 |
T111 |
9706 |
18 |
0 |
0 |
T114 |
9510 |
9 |
0 |
0 |
T117 |
11360 |
18 |
0 |
0 |
T134 |
18600 |
46 |
0 |
0 |
T135 |
7823 |
25 |
0 |
0 |
T149 |
6036 |
4 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
5691 |
0 |
0 |
T30 |
429013 |
46 |
0 |
0 |
T31 |
20264 |
0 |
0 |
0 |
T48 |
279031 |
0 |
0 |
0 |
T60 |
0 |
6 |
0 |
0 |
T69 |
0 |
28 |
0 |
0 |
T70 |
0 |
21 |
0 |
0 |
T94 |
39883 |
0 |
0 |
0 |
T152 |
0 |
81 |
0 |
0 |
T153 |
0 |
10 |
0 |
0 |
T154 |
0 |
45 |
0 |
0 |
T155 |
0 |
28 |
0 |
0 |
T156 |
0 |
41 |
0 |
0 |
T157 |
0 |
20 |
0 |
0 |
T158 |
75321 |
0 |
0 |
0 |
T159 |
413449 |
0 |
0 |
0 |
T160 |
28122 |
0 |
0 |
0 |
T161 |
20342 |
0 |
0 |
0 |
T162 |
191631 |
0 |
0 |
0 |
T163 |
9524 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2738 |
0 |
0 |
T99 |
98370 |
105 |
0 |
0 |
T100 |
74196 |
86 |
0 |
0 |
T108 |
97119 |
94 |
0 |
0 |
T110 |
87972 |
97 |
0 |
0 |
T111 |
9706 |
17 |
0 |
0 |
T114 |
9510 |
4 |
0 |
0 |
T117 |
11360 |
21 |
0 |
0 |
T134 |
18600 |
56 |
0 |
0 |
T135 |
7823 |
26 |
0 |
0 |
T149 |
6036 |
8 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2732 |
0 |
0 |
T99 |
98370 |
107 |
0 |
0 |
T100 |
74196 |
88 |
0 |
0 |
T108 |
97119 |
100 |
0 |
0 |
T110 |
87972 |
101 |
0 |
0 |
T111 |
9706 |
26 |
0 |
0 |
T114 |
9510 |
10 |
0 |
0 |
T117 |
11360 |
11 |
0 |
0 |
T134 |
18600 |
35 |
0 |
0 |
T135 |
7823 |
25 |
0 |
0 |
T149 |
6036 |
11 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2343 |
0 |
0 |
T99 |
98370 |
57 |
0 |
0 |
T100 |
74196 |
73 |
0 |
0 |
T108 |
97119 |
50 |
0 |
0 |
T110 |
87972 |
39 |
0 |
0 |
T111 |
9706 |
25 |
0 |
0 |
T114 |
9510 |
3 |
0 |
0 |
T117 |
11360 |
3 |
0 |
0 |
T134 |
18600 |
33 |
0 |
0 |
T135 |
7823 |
21 |
0 |
0 |
T149 |
6036 |
8 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2483 |
0 |
0 |
T99 |
98370 |
97 |
0 |
0 |
T100 |
74196 |
74 |
0 |
0 |
T108 |
97119 |
87 |
0 |
0 |
T110 |
87972 |
71 |
0 |
0 |
T111 |
9706 |
6 |
0 |
0 |
T114 |
9510 |
9 |
0 |
0 |
T117 |
11360 |
4 |
0 |
0 |
T134 |
18600 |
63 |
0 |
0 |
T135 |
7823 |
20 |
0 |
0 |
T149 |
6036 |
34 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2323 |
0 |
0 |
T99 |
98370 |
38 |
0 |
0 |
T100 |
74196 |
69 |
0 |
0 |
T108 |
97119 |
65 |
0 |
0 |
T110 |
87972 |
85 |
0 |
0 |
T111 |
9706 |
21 |
0 |
0 |
T114 |
9510 |
11 |
0 |
0 |
T117 |
11360 |
5 |
0 |
0 |
T134 |
18600 |
53 |
0 |
0 |
T135 |
7823 |
47 |
0 |
0 |
T149 |
6036 |
24 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2279 |
0 |
0 |
T99 |
98370 |
40 |
0 |
0 |
T100 |
74196 |
75 |
0 |
0 |
T108 |
97119 |
69 |
0 |
0 |
T110 |
87972 |
49 |
0 |
0 |
T111 |
9706 |
20 |
0 |
0 |
T117 |
11360 |
12 |
0 |
0 |
T134 |
18600 |
35 |
0 |
0 |
T135 |
7823 |
40 |
0 |
0 |
T149 |
6036 |
20 |
0 |
0 |
T151 |
10114 |
7 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
3390 |
0 |
0 |
T99 |
98370 |
147 |
0 |
0 |
T100 |
74196 |
191 |
0 |
0 |
T108 |
97119 |
154 |
0 |
0 |
T110 |
87972 |
187 |
0 |
0 |
T111 |
9706 |
32 |
0 |
0 |
T114 |
9510 |
24 |
0 |
0 |
T117 |
11360 |
27 |
0 |
0 |
T134 |
18600 |
40 |
0 |
0 |
T135 |
7823 |
25 |
0 |
0 |
T149 |
6036 |
5 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2373 |
0 |
0 |
T99 |
98370 |
83 |
0 |
0 |
T100 |
74196 |
78 |
0 |
0 |
T108 |
97119 |
51 |
0 |
0 |
T110 |
87972 |
89 |
0 |
0 |
T111 |
9706 |
15 |
0 |
0 |
T114 |
9510 |
6 |
0 |
0 |
T117 |
11360 |
14 |
0 |
0 |
T134 |
18600 |
32 |
0 |
0 |
T135 |
7823 |
10 |
0 |
0 |
T149 |
6036 |
26 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
4012 |
0 |
0 |
T99 |
98370 |
185 |
0 |
0 |
T100 |
74196 |
278 |
0 |
0 |
T108 |
97119 |
189 |
0 |
0 |
T110 |
87972 |
184 |
0 |
0 |
T111 |
9706 |
39 |
0 |
0 |
T114 |
9510 |
22 |
0 |
0 |
T117 |
11360 |
53 |
0 |
0 |
T134 |
18600 |
29 |
0 |
0 |
T135 |
7823 |
20 |
0 |
0 |
T149 |
6036 |
1 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2802 |
0 |
0 |
T99 |
98370 |
127 |
0 |
0 |
T100 |
74196 |
97 |
0 |
0 |
T108 |
97119 |
115 |
0 |
0 |
T110 |
87972 |
84 |
0 |
0 |
T111 |
9706 |
21 |
0 |
0 |
T117 |
11360 |
6 |
0 |
0 |
T134 |
18600 |
34 |
0 |
0 |
T135 |
7823 |
47 |
0 |
0 |
T149 |
6036 |
3 |
0 |
0 |
T151 |
10114 |
3 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2369 |
0 |
0 |
T99 |
98370 |
70 |
0 |
0 |
T100 |
74196 |
96 |
0 |
0 |
T108 |
97119 |
42 |
0 |
0 |
T110 |
87972 |
60 |
0 |
0 |
T111 |
9706 |
25 |
0 |
0 |
T114 |
9510 |
5 |
0 |
0 |
T117 |
11360 |
7 |
0 |
0 |
T134 |
18600 |
12 |
0 |
0 |
T135 |
7823 |
47 |
0 |
0 |
T149 |
6036 |
9 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2450 |
0 |
0 |
T99 |
98370 |
67 |
0 |
0 |
T100 |
74196 |
82 |
0 |
0 |
T108 |
97119 |
55 |
0 |
0 |
T110 |
87972 |
75 |
0 |
0 |
T111 |
9706 |
17 |
0 |
0 |
T114 |
9510 |
17 |
0 |
0 |
T117 |
11360 |
15 |
0 |
0 |
T134 |
18600 |
18 |
0 |
0 |
T135 |
7823 |
24 |
0 |
0 |
T149 |
6036 |
17 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2427 |
0 |
0 |
T99 |
98370 |
87 |
0 |
0 |
T100 |
74196 |
67 |
0 |
0 |
T108 |
97119 |
59 |
0 |
0 |
T110 |
87972 |
69 |
0 |
0 |
T111 |
9706 |
18 |
0 |
0 |
T114 |
9510 |
9 |
0 |
0 |
T117 |
11360 |
8 |
0 |
0 |
T134 |
18600 |
45 |
0 |
0 |
T135 |
7823 |
12 |
0 |
0 |
T149 |
6036 |
7 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2303 |
0 |
0 |
T99 |
98370 |
29 |
0 |
0 |
T100 |
74196 |
85 |
0 |
0 |
T108 |
97119 |
51 |
0 |
0 |
T110 |
87972 |
57 |
0 |
0 |
T111 |
9706 |
6 |
0 |
0 |
T114 |
9510 |
2 |
0 |
0 |
T117 |
11360 |
11 |
0 |
0 |
T134 |
18600 |
21 |
0 |
0 |
T135 |
7823 |
13 |
0 |
0 |
T149 |
6036 |
14 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2245 |
0 |
0 |
T99 |
98370 |
74 |
0 |
0 |
T100 |
74196 |
70 |
0 |
0 |
T108 |
97119 |
38 |
0 |
0 |
T110 |
87972 |
52 |
0 |
0 |
T111 |
9706 |
20 |
0 |
0 |
T114 |
9510 |
8 |
0 |
0 |
T117 |
11360 |
10 |
0 |
0 |
T134 |
18600 |
22 |
0 |
0 |
T149 |
6036 |
16 |
0 |
0 |
T150 |
10027 |
10 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
423465160 |
2391 |
0 |
0 |
T99 |
98370 |
66 |
0 |
0 |
T100 |
74196 |
87 |
0 |
0 |
T108 |
97119 |
71 |
0 |
0 |
T110 |
87972 |
44 |
0 |
0 |
T111 |
9706 |
13 |
0 |
0 |
T114 |
9510 |
11 |
0 |
0 |
T117 |
11360 |
1 |
0 |
0 |
T134 |
18600 |
48 |
0 |
0 |
T135 |
7823 |
21 |
0 |
0 |
T149 |
6036 |
4 |
0 |
0 |