Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
91.63	93.89	84.31	97.00		87.50	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	396465795	3626	0	0
addr_swap_data_rd_A	396465795	2526	0	0
addr_swap_mask_rd_A	396465795	2513	0	0
cfg_rd_A	396465795	2935	0	0
cmd_filter_0_rd_A	396465795	9010	0	0
cmd_filter_1_rd_A	396465795	7591	0	0
cmd_filter_2_rd_A	396465795	8055	0	0
cmd_filter_3_rd_A	396465795	8531	0	0
cmd_filter_4_rd_A	396465795	8042	0	0
cmd_filter_5_rd_A	396465795	9330	0	0
cmd_filter_6_rd_A	396465795	8331	0	0
cmd_filter_7_rd_A	396465795	9436	0	0
cmd_info_0_rd_A	396465795	5035	0	0
cmd_info_10_rd_A	396465795	4814	0	0
cmd_info_11_rd_A	396465795	4930	0	0
cmd_info_12_rd_A	396465795	4999	0	0
cmd_info_13_rd_A	396465795	5272	0	0
cmd_info_14_rd_A	396465795	4960	0	0
cmd_info_15_rd_A	396465795	4529	0	0
cmd_info_16_rd_A	396465795	4691	0	0
cmd_info_17_rd_A	396465795	4513	0	0
cmd_info_18_rd_A	396465795	4262	0	0
cmd_info_19_rd_A	396465795	5178	0	0
cmd_info_1_rd_A	396465795	5342	0	0
cmd_info_20_rd_A	396465795	4696	0	0
cmd_info_21_rd_A	396465795	4981	0	0
cmd_info_22_rd_A	396465795	5037	0	0
cmd_info_23_rd_A	396465795	5033	0	0
cmd_info_2_rd_A	396465795	5019	0	0
cmd_info_3_rd_A	396465795	4471	0	0
cmd_info_4_rd_A	396465795	4859	0	0
cmd_info_5_rd_A	396465795	4636	0	0
cmd_info_6_rd_A	396465795	5295	0	0
cmd_info_7_rd_A	396465795	4952	0	0
cmd_info_8_rd_A	396465795	4917	0	0
cmd_info_9_rd_A	396465795	4774	0	0
cmd_info_en4b_rd_A	396465795	2839	0	0
cmd_info_ex4b_rd_A	396465795	2821	0	0
cmd_info_wrdi_rd_A	396465795	2737	0	0
cmd_info_wren_rd_A	396465795	2507	0	0
intercept_en_rd_A	396465795	3118	0	0
intr_enable_rd_A	396465795	4784	0	0
jedec_cc_rd_A	396465795	2711	0	0
jedec_id_rd_A	396465795	2785	0	0
mailbox_addr_rd_A	396465795	2564	0	0
payload_swap_data_rd_A	396465795	2492	0	0
payload_swap_mask_rd_A	396465795	2502	0	0
read_threshold_rd_A	396465795	2527	0	0
tpm_access_0_rd_A	396465795	3408	0	0
tpm_access_1_rd_A	396465795	2537	0	0
tpm_cfg_rd_A	396465795	3339	0	0
tpm_did_vid_rd_A	396465795	2826	0	0
tpm_int_enable_rd_A	396465795	2527	0	0
tpm_int_status_rd_A	396465795	2663	0	0
tpm_int_vector_rd_A	396465795	2519	0	0
tpm_intf_capability_rd_A	396465795	2732	0	0
tpm_rid_rd_A	396465795	2487	0	0
tpm_sts_rd_A	396465795	2672	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	3626	0	0
T61	7299	97	0	0
T62	13982	10	0	0
T63	8536	107	0	0
T88	18921	2	0	0
T89	29365	3	0	0
T90	14666	200	0	0
T91	104550	3	0	0
T98	15859	188	0	0
T99	15368	104	0	0
T104	4278	15	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2526	0	0
T62	13982	22	0	0
T79	4191	4	0	0
T91	104550	101	0	0
T105	14000	28	0	0
T116	115673	748	0	0
T117	3590	7	0	0
T120	10377	10	0	0
T128	19348	58	0	0
T131	7533	43	0	0
T141	63050	54	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2513	0	0
T62	13982	27	0	0
T79	4191	4	0	0
T91	104550	99	0	0
T105	14000	8	0	0
T116	115673	894	0	0
T117	3590	3	0	0
T120	10377	4	0	0
T128	19348	33	0	0
T131	7533	45	0	0
T141	63050	42	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2935	0	0
T62	13982	57	0	0
T79	4191	6	0	0
T91	104550	248	0	0
T105	14000	42	0	0
T116	115673	806	0	0
T117	3590	2	0	0
T120	10377	11	0	0
T128	19348	46	0	0
T131	7533	9	0	0
T141	63050	89	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	9010	0	0
T62	13982	128	0	0
T79	4191	3	0	0
T91	104550	1624	0	0
T99	15368	7	0	0
T105	14000	277	0	0
T116	115673	860	0	0
T117	3590	5	0	0
T128	19348	52	0	0
T131	7533	18	0	0
T141	63050	617	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	7591	0	0
T62	13982	23	0	0
T79	4191	1	0	0
T91	104550	1962	0	0
T105	14000	129	0	0
T116	115673	797	0	0
T117	3590	119	0	0
T120	10377	43	0	0
T128	19348	54	0	0
T131	7533	6	0	0
T141	63050	424	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	8055	0	0
T62	13982	23	0	0
T79	4191	9	0	0
T91	104550	1776	0	0
T105	14000	222	0	0
T116	115673	833	0	0
T117	3590	108	0	0
T120	10377	66	0	0
T128	19348	36	0	0
T131	7533	23	0	0
T141	63050	921	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	8531	0	0
T62	13982	134	0	0
T79	4191	9	0	0
T91	104550	1636	0	0
T105	14000	146	0	0
T116	115673	853	0	0
T117	3590	125	0	0
T120	10377	58	0	0
T128	19348	64	0	0
T141	63050	521	0	0
T142	107434	1729	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	8042	0	0
T62	13982	21	0	0
T79	4191	1	0	0
T91	104550	1535	0	0
T105	14000	256	0	0
T116	115673	867	0	0
T117	3590	5	0	0
T120	10377	100	0	0
T128	19348	115	0	0
T141	63050	629	0	0
T142	107434	1853	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	9330	0	0
T62	13982	14	0	0
T79	4191	8	0	0
T91	104550	1699	0	0
T105	14000	240	0	0
T116	115673	819	0	0
T117	3590	5	0	0
T120	10377	119	0	0
T128	19348	85	0	0
T131	7533	33	0	0
T141	63050	913	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	8331	0	0
T62	13982	146	0	0
T79	4191	1	0	0
T91	104550	2006	0	0
T99	15368	3	0	0
T105	14000	155	0	0
T116	115673	801	0	0
T117	3590	4	0	0
T128	19348	62	0	0
T131	7533	39	0	0
T141	63050	506	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	9436	0	0
T62	13982	384	0	0
T79	4191	7	0	0
T91	104550	2290	0	0
T105	14000	135	0	0
T116	115673	756	0	0
T120	10377	140	0	0
T128	19348	44	0	0
T131	7533	21	0	0
T141	63050	728	0	0
T142	107434	2382	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5035	0	0
T62	13982	72	0	0
T63	8536	2	0	0
T79	4191	9	0	0
T91	104550	896	0	0
T105	14000	88	0	0
T116	115673	742	0	0
T117	3590	50	0	0
T128	19348	109	0	0
T131	7533	44	0	0
T141	63050	375	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4814	0	0
T62	13982	96	0	0
T79	4191	14	0	0
T91	104550	593	0	0
T105	14000	19	0	0
T116	115673	874	0	0
T117	3590	10	0	0
T120	10377	46	0	0
T128	19348	41	0	0
T131	7533	47	0	0
T141	63050	296	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4930	0	0
T62	13982	119	0	0
T79	4191	12	0	0
T91	104550	864	0	0
T105	14000	31	0	0
T116	115673	807	0	0
T117	3590	53	0	0
T120	10377	53	0	0
T128	19348	32	0	0
T131	7533	28	0	0
T141	63050	260	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4999	0	0
T62	13982	65	0	0
T79	4191	9	0	0
T91	104550	687	0	0
T105	14000	173	0	0
T116	115673	846	0	0
T117	3590	6	0	0
T120	10377	67	0	0
T128	19348	59	0	0
T131	7533	29	0	0
T141	63050	301	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5272	0	0
T62	13982	89	0	0
T79	4191	9	0	0
T91	104550	1038	0	0
T105	14000	108	0	0
T116	115673	789	0	0
T117	3590	40	0	0
T120	10377	104	0	0
T128	19348	79	0	0
T131	7533	26	0	0
T141	63050	281	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4960	0	0
T62	13982	121	0	0
T79	4191	7	0	0
T91	104550	928	0	0
T105	14000	69	0	0
T116	115673	848	0	0
T117	3590	39	0	0
T120	10377	71	0	0
T128	19348	58	0	0
T131	7533	6	0	0
T141	63050	416	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4529	0	0
T62	13982	83	0	0
T91	104550	568	0	0
T105	14000	64	0	0
T116	115673	815	0	0
T120	10377	60	0	0
T128	19348	33	0	0
T131	7533	7	0	0
T141	63050	201	0	0
T142	107434	908	0	0
T143	34034	151	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4691	0	0
T62	13982	63	0	0
T79	4191	10	0	0
T91	104550	701	0	0
T105	14000	119	0	0
T116	115673	817	0	0
T117	3590	42	0	0
T120	10377	93	0	0
T128	19348	42	0	0
T131	7533	3	0	0
T141	63050	253	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4513	0	0
T62	13982	61	0	0
T63	8536	8	0	0
T79	4191	7	0	0
T91	104550	801	0	0
T105	14000	64	0	0
T116	115673	822	0	0
T117	3590	3	0	0
T128	19348	74	0	0
T131	7533	2	0	0
T141	63050	254	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4262	0	0
T62	13982	24	0	0
T79	4191	3	0	0
T91	104550	638	0	0
T105	14000	25	0	0
T116	115673	832	0	0
T117	3590	6	0	0
T120	10377	65	0	0
T128	19348	41	0	0
T131	7533	30	0	0
T141	63050	203	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5178	0	0
T62	13982	113	0	0
T79	4191	3	0	0
T91	104550	755	0	0
T105	14000	146	0	0
T116	115673	833	0	0
T120	10377	52	0	0
T128	19348	95	0	0
T131	7533	39	0	0
T141	63050	238	0	0
T142	107434	1090	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5342	0	0
T62	13982	129	0	0
T79	4191	2	0	0
T91	104550	859	0	0
T105	14000	112	0	0
T116	115673	849	0	0
T117	3590	47	0	0
T120	10377	69	0	0
T128	19348	49	0	0
T131	7533	28	0	0
T141	63050	275	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4696	0	0
T62	13982	70	0	0
T79	4191	12	0	0
T91	104550	845	0	0
T105	14000	101	0	0
T116	115673	843	0	0
T117	3590	37	0	0
T120	10377	27	0	0
T128	19348	57	0	0
T131	7533	20	0	0
T141	63050	192	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4981	0	0
T62	13982	89	0	0
T91	104550	801	0	0
T105	14000	147	0	0
T116	115673	771	0	0
T117	3590	49	0	0
T120	10377	64	0	0
T128	19348	60	0	0
T131	7533	18	0	0
T141	63050	251	0	0
T142	107434	809	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5037	0	0
T62	13982	30	0	0
T79	4191	10	0	0
T91	104550	791	0	0
T105	14000	71	0	0
T116	115673	748	0	0
T117	3590	59	0	0
T120	10377	113	0	0
T128	19348	24	0	0
T131	7533	1	0	0
T141	63050	277	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5033	0	0
T62	13982	120	0	0
T79	4191	3	0	0
T91	104550	864	0	0
T105	14000	106	0	0
T116	115673	837	0	0
T117	3590	36	0	0
T120	10377	33	0	0
T128	19348	77	0	0
T131	7533	31	0	0
T141	63050	391	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5019	0	0
T62	13982	58	0	0
T79	4191	13	0	0
T91	104550	682	0	0
T105	14000	101	0	0
T116	115673	819	0	0
T117	3590	6	0	0
T120	10377	10	0	0
T128	19348	68	0	0
T131	7533	25	0	0
T141	63050	416	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4471	0	0
T62	13982	57	0	0
T79	4191	18	0	0
T91	104550	523	0	0
T105	14000	93	0	0
T116	115673	815	0	0
T117	3590	50	0	0
T120	10377	54	0	0
T128	19348	10	0	0
T131	7533	5	0	0
T141	63050	259	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4859	0	0
T62	13982	88	0	0
T79	4191	7	0	0
T91	104550	790	0	0
T105	14000	51	0	0
T116	115673	768	0	0
T117	3590	67	0	0
T120	10377	5	0	0
T128	19348	74	0	0
T131	7533	21	0	0
T141	63050	322	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4636	0	0
T62	13982	63	0	0
T79	4191	4	0	0
T90	14666	11	0	0
T91	104550	879	0	0
T105	14000	30	0	0
T116	115673	794	0	0
T120	10377	75	0	0
T128	19348	104	0	0
T131	7533	28	0	0
T141	63050	262	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	5295	0	0
T62	13982	64	0	0
T79	4191	4	0	0
T91	104550	1085	0	0
T98	15859	8	0	0
T105	14000	66	0	0
T116	115673	843	0	0
T117	3590	28	0	0
T128	19348	56	0	0
T131	7533	21	0	0
T141	63050	191	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4952	0	0
T62	13982	77	0	0
T79	4191	7	0	0
T91	104550	839	0	0
T105	14000	97	0	0
T116	115673	763	0	0
T120	10377	25	0	0
T128	19348	70	0	0
T131	7533	16	0	0
T141	63050	306	0	0
T142	107434	778	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4917	0	0
T62	13982	157	0	0
T79	4191	8	0	0
T90	14666	5	0	0
T91	104550	865	0	0
T105	14000	33	0	0
T116	115673	777	0	0
T117	3590	1	0	0
T128	19348	94	0	0
T131	7533	40	0	0
T141	63050	270	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4774	0	0
T62	13982	102	0	0
T79	4191	3	0	0
T91	104550	611	0	0
T105	14000	74	0	0
T116	115673	811	0	0
T117	3590	36	0	0
T120	10377	2	0	0
T128	19348	30	0	0
T131	7533	24	0	0
T141	63050	321	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2839	0	0
T62	13982	30	0	0
T63	8536	3	0	0
T79	4191	8	0	0
T91	104550	140	0	0
T105	14000	26	0	0
T116	115673	839	0	0
T120	10377	10	0	0
T128	19348	84	0	0
T131	7533	24	0	0
T141	63050	100	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2821	0	0
T62	13982	32	0	0
T79	4191	4	0	0
T91	104550	179	0	0
T105	14000	21	0	0
T116	115673	852	0	0
T117	3590	3	0	0
T120	10377	21	0	0
T128	19348	82	0	0
T131	7533	36	0	0
T141	63050	55	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2737	0	0
T62	13982	17	0	0
T79	4191	15	0	0
T91	104550	191	0	0
T105	14000	36	0	0
T116	115673	757	0	0
T120	10377	5	0	0
T128	19348	68	0	0
T131	7533	39	0	0
T141	63050	56	0	0
T142	107434	128	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2507	0	0
T62	13982	27	0	0
T91	104550	187	0	0
T98	15859	5	0	0
T105	14000	24	0	0
T116	115673	800	0	0
T117	3590	8	0	0
T128	19348	61	0	0
T131	7533	12	0	0
T141	63050	41	0	0
T142	107434	135	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	3118	0	0
T62	13982	65	0	0
T79	4191	3	0	0
T91	104550	259	0	0
T105	14000	22	0	0
T116	115673	815	0	0
T117	3590	6	0	0
T120	10377	23	0	0
T128	19348	43	0	0
T131	7533	51	0	0
T141	63050	95	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	4784	0	0
T19	5499	34	0	0
T29	0	39	0	0
T47	0	6	0	0
T55	0	14	0	0
T57	0	7	0	0
T83	138624	0	0	0
T93	108983	0	0	0
T144	0	30	0	0
T145	0	34	0	0
T146	0	17	0	0
T147	0	38	0	0
T148	0	20	0	0
T149	1511	0	0	0
T150	177451	0	0	0
T151	13148	0	0	0
T152	285172	0	0	0
T153	106942	0	0	0
T154	2478	0	0	0
T155	2298	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2711	0	0
T62	13982	23	0	0
T79	4191	4	0	0
T91	104550	173	0	0
T105	14000	39	0	0
T116	115673	834	0	0
T117	3590	1	0	0
T120	10377	14	0	0
T128	19348	18	0	0
T131	7533	26	0	0
T141	63050	64	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2785	0	0
T62	13982	27	0	0
T79	4191	8	0	0
T91	104550	135	0	0
T105	14000	28	0	0
T116	115673	815	0	0
T117	3590	6	0	0
T120	10377	16	0	0
T128	19348	48	0	0
T131	7533	47	0	0
T141	63050	76	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2564	0	0
T62	13982	17	0	0
T79	4191	5	0	0
T91	104550	102	0	0
T98	15859	2	0	0
T105	14000	23	0	0
T116	115673	849	0	0
T117	3590	7	0	0
T128	19348	60	0	0
T131	7533	13	0	0
T141	63050	25	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2492	0	0
T62	13982	23	0	0
T91	104550	115	0	0
T105	14000	20	0	0
T116	115673	782	0	0
T117	3590	5	0	0
T128	19348	74	0	0
T131	7533	36	0	0
T141	63050	35	0	0
T142	107434	96	0	0
T143	34034	51	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2502	0	0
T62	13982	21	0	0
T79	4191	16	0	0
T91	104550	111	0	0
T105	14000	22	0	0
T116	115673	832	0	0
T117	3590	2	0	0
T128	19348	49	0	0
T131	7533	2	0	0
T141	63050	44	0	0
T142	107434	106	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2527	0	0
T62	13982	21	0	0
T79	4191	7	0	0
T91	104550	107	0	0
T105	14000	15	0	0
T116	115673	831	0	0
T117	3590	5	0	0
T120	10377	14	0	0
T128	19348	44	0	0
T131	7533	30	0	0
T141	63050	36	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	3408	0	0
T62	13982	51	0	0
T79	4191	8	0	0
T91	104550	332	0	0
T105	14000	45	0	0
T116	115673	786	0	0
T117	3590	5	0	0
T120	10377	11	0	0
T128	19348	94	0	0
T131	7533	17	0	0
T141	63050	183	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2537	0	0
T62	13982	11	0	0
T79	4191	2	0	0
T91	104550	110	0	0
T105	14000	12	0	0
T116	115673	757	0	0
T117	3590	8	0	0
T120	10377	5	0	0
T128	19348	61	0	0
T131	7533	28	0	0
T141	63050	78	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	3339	0	0
T62	13982	42	0	0
T79	4191	9	0	0
T91	104550	325	0	0
T105	14000	49	0	0
T116	115673	787	0	0
T117	3590	8	0	0
T120	10377	35	0	0
T128	19348	90	0	0
T131	7533	48	0	0
T141	63050	90	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2826	0	0
T62	13982	14	0	0
T63	8536	2	0	0
T79	4191	1	0	0
T91	104550	124	0	0
T105	14000	41	0	0
T116	115673	814	0	0
T117	3590	7	0	0
T128	19348	80	0	0
T131	7533	52	0	0
T141	63050	46	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2527	0	0
T62	13982	11	0	0
T79	4191	19	0	0
T90	14666	8	0	0
T91	104550	108	0	0
T105	14000	26	0	0
T116	115673	794	0	0
T117	3590	8	0	0
T128	19348	43	0	0
T131	7533	15	0	0
T141	63050	28	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2663	0	0
T62	13982	31	0	0
T79	4191	11	0	0
T90	14666	1	0	0
T91	104550	142	0	0
T105	14000	16	0	0
T116	115673	793	0	0
T117	3590	6	0	0
T128	19348	69	0	0
T131	7533	49	0	0
T141	63050	49	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2519	0	0
T62	13982	12	0	0
T79	4191	12	0	0
T91	104550	138	0	0
T105	14000	16	0	0
T116	115673	771	0	0
T117	3590	3	0	0
T128	19348	91	0	0
T131	7533	35	0	0
T141	63050	51	0	0
T142	107434	131	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2732	0	0
T62	13982	24	0	0
T79	4191	5	0	0
T91	104550	103	0	0
T105	14000	13	0	0
T116	115673	882	0	0
T117	3590	9	0	0
T120	10377	7	0	0
T128	19348	48	0	0
T131	7533	5	0	0
T141	63050	63	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2487	0	0
T62	13982	22	0	0
T91	104550	106	0	0
T105	14000	27	0	0
T116	115673	828	0	0
T117	3590	1	0	0
T128	19348	69	0	0
T131	7533	23	0	0
T141	63050	50	0	0
T142	107434	93	0	0
T143	34034	41	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396465795	2672	0	0
T62	13982	26	0	0
T79	4191	10	0	0
T91	104550	131	0	0
T105	14000	17	0	0
T116	115673	865	0	0
T117	3590	8	0	0
T120	10377	8	0	0
T128	19348	59	0	0
T131	7533	34	0	0
T141	63050	51	0	0