Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.99 98.30 93.93 98.62 89.36 97.14 95.45 99.15


Total test records in report: 1081
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T808 /workspace/coverage/default/45.spi_device_alert_test.232828019 Jun 13 01:56:07 PM PDT 24 Jun 13 01:56:10 PM PDT 24 92534390 ps
T809 /workspace/coverage/default/6.spi_device_csb_read.3098876148 Jun 13 12:32:31 PM PDT 24 Jun 13 12:32:34 PM PDT 24 15945327 ps
T810 /workspace/coverage/default/20.spi_device_tpm_read_hw_reg.1569686140 Jun 13 12:33:00 PM PDT 24 Jun 13 12:33:10 PM PDT 24 10525613118 ps
T811 /workspace/coverage/default/29.spi_device_alert_test.3361418852 Jun 13 12:33:30 PM PDT 24 Jun 13 12:33:32 PM PDT 24 62683351 ps
T812 /workspace/coverage/default/45.spi_device_flash_and_tpm.3730332851 Jun 13 01:55:45 PM PDT 24 Jun 13 01:56:50 PM PDT 24 2387984880 ps
T813 /workspace/coverage/default/35.spi_device_tpm_rw.418206771 Jun 13 01:09:25 PM PDT 24 Jun 13 01:09:28 PM PDT 24 34950938 ps
T814 /workspace/coverage/default/11.spi_device_upload.3858247818 Jun 13 12:32:58 PM PDT 24 Jun 13 12:33:08 PM PDT 24 8454610435 ps
T815 /workspace/coverage/default/23.spi_device_intercept.3657942135 Jun 13 12:33:19 PM PDT 24 Jun 13 12:33:31 PM PDT 24 725432515 ps
T816 /workspace/coverage/default/44.spi_device_pass_addr_payload_swap.2761161536 Jun 13 01:14:23 PM PDT 24 Jun 13 01:14:31 PM PDT 24 676585721 ps
T817 /workspace/coverage/default/35.spi_device_tpm_read_hw_reg.4190208699 Jun 13 01:36:24 PM PDT 24 Jun 13 01:36:26 PM PDT 24 46213303 ps
T818 /workspace/coverage/default/20.spi_device_pass_addr_payload_swap.3260413809 Jun 13 12:33:02 PM PDT 24 Jun 13 12:33:05 PM PDT 24 56473334 ps
T819 /workspace/coverage/default/34.spi_device_cfg_cmd.588112481 Jun 13 01:25:44 PM PDT 24 Jun 13 01:25:48 PM PDT 24 152545710 ps
T820 /workspace/coverage/default/21.spi_device_tpm_rw.2837249816 Jun 13 12:33:08 PM PDT 24 Jun 13 12:33:20 PM PDT 24 906684512 ps
T821 /workspace/coverage/default/6.spi_device_tpm_read_hw_reg.198041771 Jun 13 12:32:29 PM PDT 24 Jun 13 12:32:35 PM PDT 24 2563591539 ps
T822 /workspace/coverage/default/9.spi_device_stress_all.2470728647 Jun 13 12:32:39 PM PDT 24 Jun 13 12:32:56 PM PDT 24 4530925726 ps
T823 /workspace/coverage/default/22.spi_device_pass_cmd_filtering.3503752594 Jun 13 12:33:18 PM PDT 24 Jun 13 12:33:34 PM PDT 24 6300375307 ps
T824 /workspace/coverage/default/42.spi_device_tpm_sts_read.4211836237 Jun 13 12:42:01 PM PDT 24 Jun 13 12:42:03 PM PDT 24 121976567 ps
T825 /workspace/coverage/default/21.spi_device_upload.3565156658 Jun 13 12:33:16 PM PDT 24 Jun 13 12:33:41 PM PDT 24 6223628385 ps
T826 /workspace/coverage/default/36.spi_device_upload.3670991675 Jun 13 01:36:11 PM PDT 24 Jun 13 01:36:14 PM PDT 24 959181209 ps
T827 /workspace/coverage/default/23.spi_device_csb_read.44682136 Jun 13 12:33:16 PM PDT 24 Jun 13 12:33:22 PM PDT 24 24563512 ps
T828 /workspace/coverage/default/0.spi_device_tpm_read_hw_reg.3294266121 Jun 13 12:32:20 PM PDT 24 Jun 13 12:32:48 PM PDT 24 38630646379 ps
T829 /workspace/coverage/default/20.spi_device_cfg_cmd.4225220639 Jun 13 12:33:16 PM PDT 24 Jun 13 12:33:24 PM PDT 24 168891899 ps
T830 /workspace/coverage/default/39.spi_device_cfg_cmd.1953215595 Jun 13 01:36:17 PM PDT 24 Jun 13 01:36:21 PM PDT 24 364746634 ps
T831 /workspace/coverage/default/1.spi_device_upload.541039906 Jun 13 12:32:09 PM PDT 24 Jun 13 12:32:19 PM PDT 24 1196205413 ps
T832 /workspace/coverage/default/48.spi_device_tpm_sts_read.772305700 Jun 13 02:24:10 PM PDT 24 Jun 13 02:24:11 PM PDT 24 80884238 ps
T833 /workspace/coverage/default/21.spi_device_tpm_sts_read.1383149575 Jun 13 12:33:06 PM PDT 24 Jun 13 12:33:07 PM PDT 24 73369393 ps
T834 /workspace/coverage/default/36.spi_device_stress_all.2304658284 Jun 13 01:20:50 PM PDT 24 Jun 13 01:20:52 PM PDT 24 44153113 ps
T835 /workspace/coverage/default/0.spi_device_flash_and_tpm_min_idle.412561789 Jun 13 12:32:19 PM PDT 24 Jun 13 12:34:28 PM PDT 24 45858676421 ps
T836 /workspace/coverage/default/44.spi_device_tpm_all.2271150437 Jun 13 12:54:28 PM PDT 24 Jun 13 12:54:51 PM PDT 24 5286093349 ps
T837 /workspace/coverage/default/16.spi_device_pass_addr_payload_swap.1875035950 Jun 13 12:32:43 PM PDT 24 Jun 13 12:32:47 PM PDT 24 130237508 ps
T838 /workspace/coverage/default/25.spi_device_tpm_all.2098593232 Jun 13 12:33:17 PM PDT 24 Jun 13 12:33:34 PM PDT 24 1436904882 ps
T839 /workspace/coverage/default/23.spi_device_tpm_sts_read.2094615196 Jun 13 12:33:11 PM PDT 24 Jun 13 12:33:14 PM PDT 24 59571417 ps
T840 /workspace/coverage/default/15.spi_device_stress_all.455547428 Jun 13 12:32:48 PM PDT 24 Jun 13 12:40:19 PM PDT 24 40260686440 ps
T841 /workspace/coverage/default/32.spi_device_tpm_sts_read.476855751 Jun 13 12:33:30 PM PDT 24 Jun 13 12:33:32 PM PDT 24 88156212 ps
T842 /workspace/coverage/default/24.spi_device_tpm_read_hw_reg.41123135 Jun 13 12:33:00 PM PDT 24 Jun 13 12:33:08 PM PDT 24 892922511 ps
T843 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.1323660969 Jun 13 01:34:06 PM PDT 24 Jun 13 01:34:27 PM PDT 24 7504204221 ps
T844 /workspace/coverage/default/7.spi_device_flash_and_tpm_min_idle.2302965808 Jun 13 12:32:23 PM PDT 24 Jun 13 12:33:36 PM PDT 24 8582994713 ps
T845 /workspace/coverage/default/35.spi_device_read_buffer_direct.2339700918 Jun 13 01:37:05 PM PDT 24 Jun 13 01:37:14 PM PDT 24 1110111539 ps
T846 /workspace/coverage/default/1.spi_device_csb_read.499137767 Jun 13 12:32:05 PM PDT 24 Jun 13 12:32:07 PM PDT 24 28503383 ps
T847 /workspace/coverage/default/32.spi_device_csb_read.514377233 Jun 13 12:33:37 PM PDT 24 Jun 13 12:33:38 PM PDT 24 32864147 ps
T848 /workspace/coverage/default/36.spi_device_flash_and_tpm_min_idle.1342689022 Jun 13 02:31:21 PM PDT 24 Jun 13 02:35:05 PM PDT 24 22024641695 ps
T849 /workspace/coverage/default/25.spi_device_flash_mode.2244166242 Jun 13 12:33:28 PM PDT 24 Jun 13 12:33:37 PM PDT 24 475309661 ps
T850 /workspace/coverage/default/43.spi_device_mailbox.3264314991 Jun 13 01:53:24 PM PDT 24 Jun 13 01:53:44 PM PDT 24 10355483627 ps
T851 /workspace/coverage/default/4.spi_device_flash_all.2063968757 Jun 13 12:32:37 PM PDT 24 Jun 13 12:32:39 PM PDT 24 146717844 ps
T852 /workspace/coverage/default/26.spi_device_pass_addr_payload_swap.2218036132 Jun 13 12:33:09 PM PDT 24 Jun 13 12:33:15 PM PDT 24 411717917 ps
T853 /workspace/coverage/default/10.spi_device_cfg_cmd.1324761394 Jun 13 12:32:57 PM PDT 24 Jun 13 12:33:25 PM PDT 24 3248333010 ps
T854 /workspace/coverage/default/0.spi_device_alert_test.3479606923 Jun 13 12:32:46 PM PDT 24 Jun 13 12:32:48 PM PDT 24 21545130 ps
T855 /workspace/coverage/default/1.spi_device_read_buffer_direct.2801801362 Jun 13 12:32:22 PM PDT 24 Jun 13 12:32:29 PM PDT 24 160999535 ps
T234 /workspace/coverage/default/8.spi_device_flash_and_tpm.3062707102 Jun 13 12:32:54 PM PDT 24 Jun 13 12:34:28 PM PDT 24 9120281624 ps
T856 /workspace/coverage/default/3.spi_device_alert_test.2298234692 Jun 13 12:32:39 PM PDT 24 Jun 13 12:32:42 PM PDT 24 15554939 ps
T208 /workspace/coverage/default/46.spi_device_pass_addr_payload_swap.1644247524 Jun 13 01:11:52 PM PDT 24 Jun 13 01:11:58 PM PDT 24 2500704075 ps
T857 /workspace/coverage/default/14.spi_device_read_buffer_direct.2570619425 Jun 13 12:33:00 PM PDT 24 Jun 13 12:33:08 PM PDT 24 803434190 ps
T858 /workspace/coverage/default/23.spi_device_flash_mode.3449477948 Jun 13 12:33:17 PM PDT 24 Jun 13 12:33:28 PM PDT 24 275404966 ps
T859 /workspace/coverage/default/42.spi_device_pass_addr_payload_swap.4289890435 Jun 13 02:34:10 PM PDT 24 Jun 13 02:34:35 PM PDT 24 9708209053 ps
T860 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.3150639795 Jun 13 12:32:45 PM PDT 24 Jun 13 12:32:52 PM PDT 24 7614521493 ps
T861 /workspace/coverage/default/45.spi_device_tpm_all.3283254890 Jun 13 12:36:26 PM PDT 24 Jun 13 12:36:53 PM PDT 24 4405442460 ps
T862 /workspace/coverage/default/14.spi_device_upload.3194155729 Jun 13 12:32:56 PM PDT 24 Jun 13 12:33:00 PM PDT 24 73128852 ps
T863 /workspace/coverage/default/2.spi_device_upload.3221044508 Jun 13 12:32:18 PM PDT 24 Jun 13 12:32:51 PM PDT 24 9653570636 ps
T864 /workspace/coverage/default/4.spi_device_alert_test.4274938292 Jun 13 12:32:31 PM PDT 24 Jun 13 12:32:34 PM PDT 24 43328331 ps
T865 /workspace/coverage/default/16.spi_device_upload.1751601304 Jun 13 12:33:09 PM PDT 24 Jun 13 12:33:18 PM PDT 24 1736730627 ps
T866 /workspace/coverage/default/21.spi_device_csb_read.3092073483 Jun 13 12:33:07 PM PDT 24 Jun 13 12:33:09 PM PDT 24 20688752 ps
T867 /workspace/coverage/default/36.spi_device_pass_cmd_filtering.306148153 Jun 13 01:34:15 PM PDT 24 Jun 13 01:34:29 PM PDT 24 3974733687 ps
T868 /workspace/coverage/default/36.spi_device_flash_and_tpm.4234494410 Jun 13 01:41:02 PM PDT 24 Jun 13 01:41:31 PM PDT 24 2380551348 ps
T869 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.3632943362 Jun 13 12:32:35 PM PDT 24 Jun 13 12:33:38 PM PDT 24 2996299346 ps
T870 /workspace/coverage/default/35.spi_device_cfg_cmd.2393627714 Jun 13 01:47:17 PM PDT 24 Jun 13 01:47:26 PM PDT 24 1222041665 ps
T871 /workspace/coverage/default/26.spi_device_upload.1806761097 Jun 13 12:33:18 PM PDT 24 Jun 13 12:33:25 PM PDT 24 138545063 ps
T872 /workspace/coverage/default/38.spi_device_pass_cmd_filtering.2282388365 Jun 13 01:40:42 PM PDT 24 Jun 13 01:40:56 PM PDT 24 59312848534 ps
T873 /workspace/coverage/default/30.spi_device_tpm_rw.188966391 Jun 13 12:33:34 PM PDT 24 Jun 13 12:33:36 PM PDT 24 22450032 ps
T874 /workspace/coverage/default/46.spi_device_csb_read.365187885 Jun 13 01:37:26 PM PDT 24 Jun 13 01:37:27 PM PDT 24 36770530 ps
T875 /workspace/coverage/default/29.spi_device_stress_all.3133152902 Jun 13 12:33:26 PM PDT 24 Jun 13 12:37:59 PM PDT 24 134387279028 ps
T876 /workspace/coverage/default/17.spi_device_alert_test.1875090761 Jun 13 12:32:51 PM PDT 24 Jun 13 12:32:53 PM PDT 24 69215474 ps
T877 /workspace/coverage/default/32.spi_device_pass_addr_payload_swap.629118748 Jun 13 12:33:43 PM PDT 24 Jun 13 12:33:47 PM PDT 24 107622384 ps
T878 /workspace/coverage/default/2.spi_device_tpm_sts_read.1415491722 Jun 13 12:32:26 PM PDT 24 Jun 13 12:32:29 PM PDT 24 35551605 ps
T879 /workspace/coverage/default/35.spi_device_upload.202907163 Jun 13 01:59:25 PM PDT 24 Jun 13 01:59:29 PM PDT 24 104163443 ps
T880 /workspace/coverage/default/26.spi_device_mailbox.3119155387 Jun 13 12:33:17 PM PDT 24 Jun 13 12:33:26 PM PDT 24 207798575 ps
T881 /workspace/coverage/default/44.spi_device_tpm_rw.184493044 Jun 13 01:50:57 PM PDT 24 Jun 13 01:51:01 PM PDT 24 33637194 ps
T882 /workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.2255701408 Jun 13 01:29:29 PM PDT 24 Jun 13 01:30:02 PM PDT 24 8066001956 ps
T883 /workspace/coverage/default/31.spi_device_flash_mode.2649897439 Jun 13 12:33:25 PM PDT 24 Jun 13 12:34:14 PM PDT 24 2505241455 ps
T884 /workspace/coverage/default/33.spi_device_tpm_all.3665133503 Jun 13 12:33:35 PM PDT 24 Jun 13 12:33:40 PM PDT 24 1125626094 ps
T885 /workspace/coverage/default/22.spi_device_intercept.3804220885 Jun 13 12:33:06 PM PDT 24 Jun 13 12:33:12 PM PDT 24 264450551 ps
T886 /workspace/coverage/default/30.spi_device_mailbox.3669236931 Jun 13 12:33:31 PM PDT 24 Jun 13 12:34:41 PM PDT 24 46165732245 ps
T887 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.277855058 Jun 13 02:21:12 PM PDT 24 Jun 13 02:21:26 PM PDT 24 2316053196 ps
T888 /workspace/coverage/default/5.spi_device_pass_cmd_filtering.795994264 Jun 13 12:32:33 PM PDT 24 Jun 13 12:32:47 PM PDT 24 8411857830 ps
T889 /workspace/coverage/default/18.spi_device_tpm_rw.2022420123 Jun 13 12:33:10 PM PDT 24 Jun 13 12:33:19 PM PDT 24 16058782 ps
T890 /workspace/coverage/default/39.spi_device_csb_read.3904761331 Jun 13 01:05:01 PM PDT 24 Jun 13 01:05:05 PM PDT 24 67201521 ps
T891 /workspace/coverage/default/36.spi_device_csb_read.2879055487 Jun 13 02:48:45 PM PDT 24 Jun 13 02:49:02 PM PDT 24 40997405 ps
T892 /workspace/coverage/default/4.spi_device_intercept.3154301645 Jun 13 12:32:20 PM PDT 24 Jun 13 12:32:28 PM PDT 24 797741118 ps
T893 /workspace/coverage/default/18.spi_device_tpm_sts_read.269245964 Jun 13 12:32:58 PM PDT 24 Jun 13 12:33:00 PM PDT 24 28493711 ps
T894 /workspace/coverage/default/9.spi_device_tpm_all.1639733522 Jun 13 12:32:35 PM PDT 24 Jun 13 12:32:44 PM PDT 24 3390935702 ps
T895 /workspace/coverage/default/43.spi_device_intercept.2416257092 Jun 13 01:55:42 PM PDT 24 Jun 13 01:55:49 PM PDT 24 799465521 ps
T896 /workspace/coverage/default/30.spi_device_flash_mode.3269991221 Jun 13 12:33:23 PM PDT 24 Jun 13 12:33:33 PM PDT 24 779782052 ps
T897 /workspace/coverage/default/11.spi_device_flash_and_tpm_min_idle.1173744260 Jun 13 12:32:34 PM PDT 24 Jun 13 12:33:58 PM PDT 24 17156585678 ps
T898 /workspace/coverage/default/43.spi_device_read_buffer_direct.1906874380 Jun 13 01:47:03 PM PDT 24 Jun 13 01:47:20 PM PDT 24 6995173610 ps
T899 /workspace/coverage/default/8.spi_device_pass_cmd_filtering.189863905 Jun 13 12:32:38 PM PDT 24 Jun 13 12:32:50 PM PDT 24 2235060979 ps
T900 /workspace/coverage/default/14.spi_device_flash_and_tpm.3414477595 Jun 13 12:32:43 PM PDT 24 Jun 13 12:33:35 PM PDT 24 6054916519 ps
T901 /workspace/coverage/default/9.spi_device_read_buffer_direct.708047339 Jun 13 12:32:39 PM PDT 24 Jun 13 12:32:55 PM PDT 24 1192261818 ps
T902 /workspace/coverage/default/35.spi_device_mailbox.1457187159 Jun 13 02:13:32 PM PDT 24 Jun 13 02:14:01 PM PDT 24 12055511609 ps
T903 /workspace/coverage/default/7.spi_device_read_buffer_direct.3726853227 Jun 13 12:32:22 PM PDT 24 Jun 13 12:32:29 PM PDT 24 353386626 ps
T72 /workspace/coverage/default/3.spi_device_sec_cm.3050825191 Jun 13 12:32:05 PM PDT 24 Jun 13 12:32:07 PM PDT 24 474826469 ps
T904 /workspace/coverage/default/42.spi_device_flash_mode.2849202646 Jun 13 01:27:35 PM PDT 24 Jun 13 01:27:43 PM PDT 24 911823494 ps
T905 /workspace/coverage/default/43.spi_device_csb_read.547185607 Jun 13 02:14:45 PM PDT 24 Jun 13 02:14:47 PM PDT 24 40833070 ps
T906 /workspace/coverage/default/41.spi_device_mailbox.1523727446 Jun 13 01:16:53 PM PDT 24 Jun 13 01:17:28 PM PDT 24 8194795840 ps
T907 /workspace/coverage/default/3.spi_device_tpm_sts_read.285734060 Jun 13 12:32:22 PM PDT 24 Jun 13 12:32:26 PM PDT 24 336411703 ps
T210 /workspace/coverage/default/35.spi_device_flash_and_tpm.779994471 Jun 13 01:34:14 PM PDT 24 Jun 13 01:35:42 PM PDT 24 30175854153 ps
T908 /workspace/coverage/default/48.spi_device_tpm_read_hw_reg.1075857965 Jun 13 01:42:35 PM PDT 24 Jun 13 01:42:39 PM PDT 24 1233345717 ps
T229 /workspace/coverage/default/37.spi_device_flash_and_tpm_min_idle.4047129915 Jun 13 01:31:43 PM PDT 24 Jun 13 01:40:58 PM PDT 24 505898026266 ps
T909 /workspace/coverage/default/3.spi_device_flash_mode.3019489071 Jun 13 12:32:29 PM PDT 24 Jun 13 12:32:38 PM PDT 24 3245909815 ps
T910 /workspace/coverage/default/35.spi_device_tpm_all.3987302777 Jun 13 01:16:54 PM PDT 24 Jun 13 01:17:34 PM PDT 24 15428212930 ps
T911 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.1976453492 Jun 13 12:32:50 PM PDT 24 Jun 13 12:32:54 PM PDT 24 1516890285 ps
T201 /workspace/coverage/default/5.spi_device_flash_and_tpm.143104458 Jun 13 12:32:25 PM PDT 24 Jun 13 12:34:31 PM PDT 24 7910704576 ps
T912 /workspace/coverage/default/15.spi_device_flash_all.295663804 Jun 13 12:32:41 PM PDT 24 Jun 13 12:33:31 PM PDT 24 7089610580 ps
T913 /workspace/coverage/default/34.spi_device_read_buffer_direct.3186361830 Jun 13 12:33:45 PM PDT 24 Jun 13 12:34:01 PM PDT 24 4873317358 ps
T914 /workspace/coverage/default/34.spi_device_tpm_all.4238059771 Jun 13 01:29:32 PM PDT 24 Jun 13 01:29:44 PM PDT 24 8139896879 ps
T915 /workspace/coverage/default/34.spi_device_tpm_rw.2524088957 Jun 13 12:33:48 PM PDT 24 Jun 13 12:33:50 PM PDT 24 50232971 ps
T916 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.3954372670 Jun 13 12:32:49 PM PDT 24 Jun 13 12:32:56 PM PDT 24 777834998 ps
T917 /workspace/coverage/default/26.spi_device_cfg_cmd.1607563935 Jun 13 12:33:28 PM PDT 24 Jun 13 12:33:36 PM PDT 24 2076122377 ps
T918 /workspace/coverage/default/49.spi_device_upload.1675170881 Jun 13 02:06:46 PM PDT 24 Jun 13 02:06:54 PM PDT 24 17181210257 ps
T919 /workspace/coverage/default/5.spi_device_upload.2895301837 Jun 13 12:32:38 PM PDT 24 Jun 13 12:32:43 PM PDT 24 212740817 ps
T920 /workspace/coverage/default/31.spi_device_alert_test.3475432854 Jun 13 12:33:28 PM PDT 24 Jun 13 12:33:35 PM PDT 24 13259611 ps
T921 /workspace/coverage/default/39.spi_device_pass_addr_payload_swap.1235113856 Jun 13 12:41:24 PM PDT 24 Jun 13 12:41:28 PM PDT 24 652904676 ps
T922 /workspace/coverage/default/29.spi_device_tpm_rw.2096636065 Jun 13 12:33:19 PM PDT 24 Jun 13 12:33:31 PM PDT 24 1236467917 ps
T923 /workspace/coverage/default/35.spi_device_pass_addr_payload_swap.3596505703 Jun 13 01:09:30 PM PDT 24 Jun 13 01:09:33 PM PDT 24 121594819 ps
T924 /workspace/coverage/default/15.spi_device_read_buffer_direct.4147407880 Jun 13 12:32:41 PM PDT 24 Jun 13 12:32:47 PM PDT 24 242832795 ps
T925 /workspace/coverage/default/5.spi_device_intercept.3200906825 Jun 13 12:32:50 PM PDT 24 Jun 13 12:33:15 PM PDT 24 9247862412 ps
T926 /workspace/coverage/default/27.spi_device_read_buffer_direct.3342885517 Jun 13 12:33:18 PM PDT 24 Jun 13 12:33:27 PM PDT 24 2728222749 ps
T927 /workspace/coverage/default/28.spi_device_pass_cmd_filtering.361253103 Jun 13 12:33:14 PM PDT 24 Jun 13 12:33:20 PM PDT 24 115463100 ps
T928 /workspace/coverage/default/13.spi_device_upload.1830550655 Jun 13 12:32:49 PM PDT 24 Jun 13 12:33:00 PM PDT 24 9107258764 ps
T929 /workspace/coverage/default/2.spi_device_cfg_cmd.1574639411 Jun 13 12:32:14 PM PDT 24 Jun 13 12:32:20 PM PDT 24 929009058 ps
T930 /workspace/coverage/default/12.spi_device_csb_read.1128582919 Jun 13 12:32:45 PM PDT 24 Jun 13 12:32:48 PM PDT 24 19948955 ps
T931 /workspace/coverage/default/44.spi_device_tpm_sts_read.4175576888 Jun 13 02:04:45 PM PDT 24 Jun 13 02:04:47 PM PDT 24 999024922 ps
T223 /workspace/coverage/default/47.spi_device_flash_all.2744251556 Jun 13 02:14:48 PM PDT 24 Jun 13 02:15:51 PM PDT 24 10584162762 ps
T932 /workspace/coverage/default/36.spi_device_tpm_read_hw_reg.1260329420 Jun 13 12:59:57 PM PDT 24 Jun 13 01:00:04 PM PDT 24 1331753577 ps
T269 /workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.832558768 Jun 13 12:33:35 PM PDT 24 Jun 13 12:40:37 PM PDT 24 183595303043 ps
T933 /workspace/coverage/default/36.spi_device_tpm_sts_read.2435059105 Jun 13 02:23:32 PM PDT 24 Jun 13 02:23:33 PM PDT 24 19164613 ps
T934 /workspace/coverage/default/29.spi_device_upload.4282511536 Jun 13 12:33:20 PM PDT 24 Jun 13 12:33:38 PM PDT 24 2592098741 ps
T935 /workspace/coverage/default/41.spi_device_flash_and_tpm.1595997618 Jun 13 02:23:08 PM PDT 24 Jun 13 02:23:57 PM PDT 24 5025183375 ps
T936 /workspace/coverage/default/2.spi_device_stress_all.4167278110 Jun 13 12:32:39 PM PDT 24 Jun 13 12:35:17 PM PDT 24 13397810629 ps
T937 /workspace/coverage/default/46.spi_device_cfg_cmd.2342109353 Jun 13 01:15:46 PM PDT 24 Jun 13 01:15:54 PM PDT 24 1113375445 ps
T73 /workspace/coverage/default/2.spi_device_sec_cm.810597088 Jun 13 12:32:55 PM PDT 24 Jun 13 12:32:58 PM PDT 24 3162547754 ps
T938 /workspace/coverage/default/0.spi_device_intercept.3427965946 Jun 13 12:32:40 PM PDT 24 Jun 13 12:32:58 PM PDT 24 6154501814 ps
T939 /workspace/coverage/default/10.spi_device_tpm_all.2535854448 Jun 13 12:32:29 PM PDT 24 Jun 13 12:32:51 PM PDT 24 1240000306 ps
T940 /workspace/coverage/default/6.spi_device_cfg_cmd.511895613 Jun 13 12:32:31 PM PDT 24 Jun 13 12:32:36 PM PDT 24 205095095 ps
T941 /workspace/coverage/default/34.spi_device_pass_addr_payload_swap.2531784779 Jun 13 02:49:42 PM PDT 24 Jun 13 02:50:03 PM PDT 24 294565695 ps
T74 /workspace/coverage/default/4.spi_device_sec_cm.492958228 Jun 13 12:32:25 PM PDT 24 Jun 13 12:32:29 PM PDT 24 544235873 ps
T942 /workspace/coverage/default/40.spi_device_tpm_sts_read.4084735127 Jun 13 01:06:49 PM PDT 24 Jun 13 01:06:51 PM PDT 24 121570393 ps
T943 /workspace/coverage/default/16.spi_device_tpm_sts_read.3083760604 Jun 13 12:32:55 PM PDT 24 Jun 13 12:32:57 PM PDT 24 57261842 ps
T944 /workspace/coverage/default/45.spi_device_pass_cmd_filtering.4014618418 Jun 13 12:37:16 PM PDT 24 Jun 13 12:37:24 PM PDT 24 473862407 ps
T945 /workspace/coverage/default/6.spi_device_alert_test.2180377165 Jun 13 12:32:29 PM PDT 24 Jun 13 12:32:31 PM PDT 24 16797163 ps
T946 /workspace/coverage/default/25.spi_device_pass_addr_payload_swap.1172881851 Jun 13 12:33:19 PM PDT 24 Jun 13 12:33:34 PM PDT 24 2420218390 ps
T947 /workspace/coverage/default/26.spi_device_flash_and_tpm.3709304805 Jun 13 12:33:43 PM PDT 24 Jun 13 12:35:11 PM PDT 24 22093186249 ps
T948 /workspace/coverage/default/18.spi_device_intercept.2408323728 Jun 13 12:32:58 PM PDT 24 Jun 13 12:33:06 PM PDT 24 968531149 ps
T949 /workspace/coverage/default/26.spi_device_stress_all.1011339040 Jun 13 12:33:12 PM PDT 24 Jun 13 12:34:13 PM PDT 24 15926887194 ps
T136 /workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.3906103265 Jun 13 12:32:33 PM PDT 24 Jun 13 12:35:51 PM PDT 24 43097486896 ps
T950 /workspace/coverage/default/34.spi_device_flash_and_tpm_min_idle.3009587101 Jun 13 02:20:08 PM PDT 24 Jun 13 02:23:55 PM PDT 24 42937775406 ps
T951 /workspace/coverage/default/15.spi_device_intercept.2648049053 Jun 13 12:33:05 PM PDT 24 Jun 13 12:33:08 PM PDT 24 33206574 ps
T952 /workspace/coverage/default/4.spi_device_mailbox.3837901276 Jun 13 12:32:35 PM PDT 24 Jun 13 12:34:01 PM PDT 24 17399078162 ps
T116 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2893727370 Jun 13 01:47:29 PM PDT 24 Jun 13 01:47:38 PM PDT 24 1829321582 ps
T953 /workspace/coverage/cover_reg_top/13.spi_device_intr_test.385011267 Jun 13 01:47:47 PM PDT 24 Jun 13 01:47:49 PM PDT 24 82213101 ps
T66 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.2266671050 Jun 13 01:47:54 PM PDT 24 Jun 13 01:47:58 PM PDT 24 111582206 ps
T954 /workspace/coverage/cover_reg_top/5.spi_device_intr_test.142416203 Jun 13 01:47:31 PM PDT 24 Jun 13 01:47:33 PM PDT 24 43147673 ps
T117 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.892028087 Jun 13 01:47:19 PM PDT 24 Jun 13 01:47:28 PM PDT 24 108912182 ps
T67 /workspace/coverage/cover_reg_top/15.spi_device_tl_errors.2069385392 Jun 13 01:47:43 PM PDT 24 Jun 13 01:47:49 PM PDT 24 560638923 ps
T137 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.3023981939 Jun 13 01:47:34 PM PDT 24 Jun 13 01:47:39 PM PDT 24 240605062 ps
T955 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.2256256038 Jun 13 01:47:16 PM PDT 24 Jun 13 01:47:17 PM PDT 24 22114729 ps
T68 /workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.3205216696 Jun 13 01:47:38 PM PDT 24 Jun 13 01:47:43 PM PDT 24 38869169 ps
T956 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.3068423032 Jun 13 01:47:54 PM PDT 24 Jun 13 01:47:56 PM PDT 24 12736201 ps
T138 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.4146686002 Jun 13 01:47:46 PM PDT 24 Jun 13 01:47:52 PM PDT 24 714655556 ps
T957 /workspace/coverage/cover_reg_top/28.spi_device_intr_test.4215322557 Jun 13 01:47:52 PM PDT 24 Jun 13 01:47:54 PM PDT 24 76547544 ps
T99 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3593581958 Jun 13 01:47:42 PM PDT 24 Jun 13 01:47:51 PM PDT 24 1293238228 ps
T958 /workspace/coverage/cover_reg_top/12.spi_device_intr_test.2195915894 Jun 13 01:47:44 PM PDT 24 Jun 13 01:47:47 PM PDT 24 19607696 ps
T959 /workspace/coverage/cover_reg_top/7.spi_device_intr_test.1561640872 Jun 13 01:47:36 PM PDT 24 Jun 13 01:47:39 PM PDT 24 11554164 ps
T960 /workspace/coverage/cover_reg_top/10.spi_device_intr_test.2697525183 Jun 13 01:47:37 PM PDT 24 Jun 13 01:47:40 PM PDT 24 50771286 ps
T100 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.1226498963 Jun 13 01:47:37 PM PDT 24 Jun 13 01:47:42 PM PDT 24 237745152 ps
T118 /workspace/coverage/cover_reg_top/5.spi_device_csr_rw.181133960 Jun 13 01:47:33 PM PDT 24 Jun 13 01:47:36 PM PDT 24 39609410 ps
T101 /workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.465369443 Jun 13 01:47:20 PM PDT 24 Jun 13 01:47:44 PM PDT 24 844810055 ps
T103 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.1955966626 Jun 13 01:47:34 PM PDT 24 Jun 13 01:47:38 PM PDT 24 535536801 ps
T106 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2247806229 Jun 13 01:47:23 PM PDT 24 Jun 13 01:47:28 PM PDT 24 1811556963 ps
T108 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.231979641 Jun 13 01:47:54 PM PDT 24 Jun 13 01:47:59 PM PDT 24 49847150 ps
T107 /workspace/coverage/cover_reg_top/6.spi_device_tl_errors.82799163 Jun 13 01:47:31 PM PDT 24 Jun 13 01:47:36 PM PDT 24 328910042 ps
T113 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.1410366871 Jun 13 01:47:19 PM PDT 24 Jun 13 01:47:22 PM PDT 24 173379535 ps
T119 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.1054519592 Jun 13 01:47:48 PM PDT 24 Jun 13 01:47:51 PM PDT 24 141499366 ps
T961 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.2212906946 Jun 13 01:48:00 PM PDT 24 Jun 13 01:48:01 PM PDT 24 30619763 ps
T962 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.946717408 Jun 13 01:47:38 PM PDT 24 Jun 13 01:47:42 PM PDT 24 10747864 ps
T963 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.2657805546 Jun 13 01:47:23 PM PDT 24 Jun 13 01:47:24 PM PDT 24 53888861 ps
T120 /workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.1096386370 Jun 13 01:47:15 PM PDT 24 Jun 13 01:47:18 PM PDT 24 268095339 ps
T964 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3226240430 Jun 13 01:47:37 PM PDT 24 Jun 13 01:47:41 PM PDT 24 613209563 ps
T121 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.978294744 Jun 13 01:47:26 PM PDT 24 Jun 13 01:47:29 PM PDT 24 277607546 ps
T122 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.875650458 Jun 13 01:47:40 PM PDT 24 Jun 13 01:47:44 PM PDT 24 29890068 ps
T965 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.1153009149 Jun 13 01:47:17 PM PDT 24 Jun 13 01:47:19 PM PDT 24 152852519 ps
T966 /workspace/coverage/cover_reg_top/9.spi_device_intr_test.2197355226 Jun 13 01:47:38 PM PDT 24 Jun 13 01:47:42 PM PDT 24 100720959 ps
T123 /workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.2133265819 Jun 13 01:47:17 PM PDT 24 Jun 13 01:47:26 PM PDT 24 203733576 ps
T967 /workspace/coverage/cover_reg_top/43.spi_device_intr_test.857939307 Jun 13 01:48:02 PM PDT 24 Jun 13 01:48:03 PM PDT 24 39602614 ps
T968 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.1827193231 Jun 13 01:47:30 PM PDT 24 Jun 13 01:47:33 PM PDT 24 78710736 ps
T124 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2425166131 Jun 13 01:47:30 PM PDT 24 Jun 13 01:47:34 PM PDT 24 225135878 ps
T969 /workspace/coverage/cover_reg_top/45.spi_device_intr_test.2833757221 Jun 13 01:48:02 PM PDT 24 Jun 13 01:48:04 PM PDT 24 29548379 ps
T970 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2009958942 Jun 13 01:47:44 PM PDT 24 Jun 13 01:47:49 PM PDT 24 119349885 ps
T971 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.1382908594 Jun 13 01:47:53 PM PDT 24 Jun 13 01:47:56 PM PDT 24 14229093 ps
T102 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.2706166160 Jun 13 01:47:44 PM PDT 24 Jun 13 01:47:55 PM PDT 24 601845449 ps
T972 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.4097706266 Jun 13 01:48:01 PM PDT 24 Jun 13 01:48:02 PM PDT 24 47145362 ps
T973 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.2401106623 Jun 13 01:48:01 PM PDT 24 Jun 13 01:48:02 PM PDT 24 46226690 ps
T974 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.3603353970 Jun 13 01:47:53 PM PDT 24 Jun 13 01:47:56 PM PDT 24 30989117 ps
T975 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.4188094876 Jun 13 01:47:51 PM PDT 24 Jun 13 01:47:56 PM PDT 24 53452015 ps
T109 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2245397657 Jun 13 01:47:38 PM PDT 24 Jun 13 01:47:44 PM PDT 24 157633237 ps
T976 /workspace/coverage/cover_reg_top/33.spi_device_intr_test.2804721900 Jun 13 01:47:53 PM PDT 24 Jun 13 01:47:56 PM PDT 24 32234754 ps
T977 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.331939994 Jun 13 01:47:45 PM PDT 24 Jun 13 01:47:48 PM PDT 24 53244957 ps
T978 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.219785975 Jun 13 01:47:46 PM PDT 24 Jun 13 01:47:50 PM PDT 24 102727226 ps
T241 /workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.738797159 Jun 13 01:47:53 PM PDT 24 Jun 13 01:48:14 PM PDT 24 311437329 ps
T979 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2316869457 Jun 13 01:47:23 PM PDT 24 Jun 13 01:47:33 PM PDT 24 114554388 ps
T980 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.2629237483 Jun 13 01:47:51 PM PDT 24 Jun 13 01:47:53 PM PDT 24 45207247 ps
T981 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.2389649061 Jun 13 01:47:54 PM PDT 24 Jun 13 01:47:56 PM PDT 24 17334072 ps
T244 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.120994441 Jun 13 01:47:35 PM PDT 24 Jun 13 01:47:58 PM PDT 24 4128278080 ps
T88 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3009151951 Jun 13 01:47:19 PM PDT 24 Jun 13 01:47:21 PM PDT 24 196563832 ps
T110 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.706622672 Jun 13 01:47:36 PM PDT 24 Jun 13 01:47:43 PM PDT 24 188989364 ps
T146 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.2058204482 Jun 13 01:47:31 PM PDT 24 Jun 13 01:47:49 PM PDT 24 3540035732 ps
T982 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.1578833918 Jun 13 01:47:27 PM PDT 24 Jun 13 01:47:28 PM PDT 24 43113918 ps
T983 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.3275110994 Jun 13 01:47:30 PM PDT 24 Jun 13 01:47:34 PM PDT 24 107467565 ps
T147 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2157413857 Jun 13 01:47:39 PM PDT 24 Jun 13 01:48:08 PM PDT 24 10898282193 ps
T111 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.3514091106 Jun 13 01:47:18 PM PDT 24 Jun 13 01:47:21 PM PDT 24 39013495 ps
T125 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.528543260 Jun 13 01:47:44 PM PDT 24 Jun 13 01:47:48 PM PDT 24 125665302 ps
T984 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.249016826 Jun 13 01:47:44 PM PDT 24 Jun 13 01:47:47 PM PDT 24 24306794 ps
T985 /workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3240709202 Jun 13 01:47:25 PM PDT 24 Jun 13 01:47:59 PM PDT 24 537609839 ps
T986 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.47921908 Jun 13 01:47:54 PM PDT 24 Jun 13 01:47:56 PM PDT 24 12148987 ps
T148 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.25823277 Jun 13 01:47:17 PM PDT 24 Jun 13 01:47:21 PM PDT 24 145323920 ps
T987 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.2881847923 Jun 13 01:48:02 PM PDT 24 Jun 13 01:48:03 PM PDT 24 12930208 ps
T112 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.446283255 Jun 13 01:47:44 PM PDT 24 Jun 13 01:47:51 PM PDT 24 190430738 ps
T149 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1862753700 Jun 13 01:47:33 PM PDT 24 Jun 13 01:47:36 PM PDT 24 198629651 ps
T988 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1714015061 Jun 13 01:47:39 PM PDT 24 Jun 13 01:47:43 PM PDT 24 27520774 ps
T989 /workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.121225801 Jun 13 01:47:39 PM PDT 24 Jun 13 01:47:43 PM PDT 24 99923691 ps
T150 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.235547880 Jun 13 01:47:24 PM PDT 24 Jun 13 01:47:32 PM PDT 24 1282542756 ps
T242 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.47717425 Jun 13 01:47:24 PM PDT 24 Jun 13 01:47:49 PM PDT 24 11009579889 ps
T89 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.4281771609 Jun 13 01:47:24 PM PDT 24 Jun 13 01:47:26 PM PDT 24 20662830 ps
T990 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.786758475 Jun 13 01:47:51 PM PDT 24 Jun 13 01:47:53 PM PDT 24 12727780 ps
T245 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.2301090772 Jun 13 01:47:44 PM PDT 24 Jun 13 01:48:12 PM PDT 24 8575538751 ps
T991 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.1551634528 Jun 13 01:48:00 PM PDT 24 Jun 13 01:48:01 PM PDT 24 53656609 ps
T992 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.341902327 Jun 13 01:47:43 PM PDT 24 Jun 13 01:47:48 PM PDT 24 85539554 ps
T126 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.3159579978 Jun 13 01:47:19 PM PDT 24 Jun 13 01:47:22 PM PDT 24 28351465 ps
T993 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.1846139637 Jun 13 01:47:19 PM PDT 24 Jun 13 01:47:54 PM PDT 24 3741750153 ps
T994 /workspace/coverage/cover_reg_top/19.spi_device_csr_rw.1066974209 Jun 13 01:47:51 PM PDT 24 Jun 13 01:47:55 PM PDT 24 31534754 ps
T127 /workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.2095173785 Jun 13 01:47:23 PM PDT 24 Jun 13 01:47:39 PM PDT 24 13444662551 ps
T995 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.1327695682 Jun 13 01:47:52 PM PDT 24 Jun 13 01:47:55 PM PDT 24 341282458 ps
T243 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.2704921519 Jun 13 01:47:47 PM PDT 24 Jun 13 01:48:11 PM PDT 24 805832190 ps
T996 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.1026845188 Jun 13 01:47:16 PM PDT 24 Jun 13 01:47:21 PM PDT 24 607683153 ps
T997 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.4132030596 Jun 13 01:48:01 PM PDT 24 Jun 13 01:48:02 PM PDT 24 12035822 ps
T998 /workspace/coverage/cover_reg_top/8.spi_device_intr_test.3678692844 Jun 13 01:47:36 PM PDT 24 Jun 13 01:47:38 PM PDT 24 14807061 ps
T999 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.149682935 Jun 13 01:47:50 PM PDT 24 Jun 13 01:47:55 PM PDT 24 234885881 ps
T1000 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.1972890764 Jun 13 01:47:51 PM PDT 24 Jun 13 01:47:54 PM PDT 24 42704947 ps
T1001 /workspace/coverage/cover_reg_top/36.spi_device_intr_test.1302433418 Jun 13 01:47:50 PM PDT 24 Jun 13 01:47:51 PM PDT 24 43955901 ps
T246 /workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.181552309 Jun 13 01:47:38 PM PDT 24 Jun 13 01:47:47 PM PDT 24 116390053 ps
T1002 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.2531404883 Jun 13 01:47:59 PM PDT 24 Jun 13 01:48:00 PM PDT 24 42194552 ps
T1003 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.2564388484 Jun 13 01:47:26 PM PDT 24 Jun 13 01:47:30 PM PDT 24 62798942 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%