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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.03 98.38 93.98 98.62 89.36 97.19 95.45 99.20


Total test records in report: 1080
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T817 /workspace/coverage/default/46.spi_device_intercept.1310645870 Jun 21 07:02:16 PM PDT 24 Jun 21 07:02:32 PM PDT 24 983219468 ps
T261 /workspace/coverage/default/27.spi_device_cfg_cmd.121879561 Jun 21 07:01:13 PM PDT 24 Jun 21 07:01:18 PM PDT 24 198732110 ps
T818 /workspace/coverage/default/19.spi_device_intercept.3082350615 Jun 21 07:00:43 PM PDT 24 Jun 21 07:00:54 PM PDT 24 84928354 ps
T819 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.3943858154 Jun 21 07:00:21 PM PDT 24 Jun 21 07:00:40 PM PDT 24 3825156763 ps
T820 /workspace/coverage/default/10.spi_device_tpm_rw.193406136 Jun 21 07:00:10 PM PDT 24 Jun 21 07:00:19 PM PDT 24 55233779 ps
T218 /workspace/coverage/default/25.spi_device_flash_all.4150184815 Jun 21 07:00:59 PM PDT 24 Jun 21 07:04:08 PM PDT 24 25707705715 ps
T821 /workspace/coverage/default/2.spi_device_flash_and_tpm.2323794689 Jun 21 06:59:44 PM PDT 24 Jun 21 07:00:15 PM PDT 24 8124851605 ps
T822 /workspace/coverage/default/48.spi_device_intercept.2464094208 Jun 21 07:02:20 PM PDT 24 Jun 21 07:02:30 PM PDT 24 2457223593 ps
T823 /workspace/coverage/default/26.spi_device_tpm_all.3780303900 Jun 21 07:00:59 PM PDT 24 Jun 21 07:01:48 PM PDT 24 8130016476 ps
T824 /workspace/coverage/default/41.spi_device_flash_mode.1859731652 Jun 21 07:01:48 PM PDT 24 Jun 21 07:02:04 PM PDT 24 164000717 ps
T207 /workspace/coverage/default/48.spi_device_flash_and_tpm.2517474871 Jun 21 07:02:22 PM PDT 24 Jun 21 07:04:13 PM PDT 24 14542331329 ps
T825 /workspace/coverage/default/30.spi_device_pass_addr_payload_swap.241600071 Jun 21 07:01:20 PM PDT 24 Jun 21 07:01:27 PM PDT 24 4388857523 ps
T826 /workspace/coverage/default/35.spi_device_upload.1152330711 Jun 21 07:01:33 PM PDT 24 Jun 21 07:01:53 PM PDT 24 2134143449 ps
T827 /workspace/coverage/default/3.spi_device_stress_all.3411412178 Jun 21 06:59:51 PM PDT 24 Jun 21 07:10:04 PM PDT 24 75275933533 ps
T231 /workspace/coverage/default/30.spi_device_flash_all.729723559 Jun 21 07:01:21 PM PDT 24 Jun 21 07:02:38 PM PDT 24 18552679003 ps
T828 /workspace/coverage/default/6.spi_device_flash_all.303885493 Jun 21 07:00:01 PM PDT 24 Jun 21 07:01:34 PM PDT 24 22905421003 ps
T829 /workspace/coverage/default/27.spi_device_alert_test.3625350801 Jun 21 07:01:10 PM PDT 24 Jun 21 07:01:13 PM PDT 24 26477482 ps
T830 /workspace/coverage/default/31.spi_device_read_buffer_direct.3990640047 Jun 21 07:01:25 PM PDT 24 Jun 21 07:01:38 PM PDT 24 1307356090 ps
T831 /workspace/coverage/default/36.spi_device_upload.4098374084 Jun 21 07:01:36 PM PDT 24 Jun 21 07:02:30 PM PDT 24 14729596252 ps
T832 /workspace/coverage/default/34.spi_device_csb_read.388150346 Jun 21 07:01:31 PM PDT 24 Jun 21 07:01:40 PM PDT 24 44632701 ps
T833 /workspace/coverage/default/25.spi_device_tpm_sts_read.323390081 Jun 21 07:00:58 PM PDT 24 Jun 21 07:01:05 PM PDT 24 28310505 ps
T834 /workspace/coverage/default/46.spi_device_cfg_cmd.1328152388 Jun 21 07:02:13 PM PDT 24 Jun 21 07:02:19 PM PDT 24 32306552 ps
T835 /workspace/coverage/default/18.spi_device_tpm_all.3260962659 Jun 21 07:00:32 PM PDT 24 Jun 21 07:00:42 PM PDT 24 54050549 ps
T836 /workspace/coverage/default/37.spi_device_flash_all.2221581488 Jun 21 07:01:40 PM PDT 24 Jun 21 07:05:03 PM PDT 24 91847608434 ps
T216 /workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.1535140186 Jun 21 07:01:44 PM PDT 24 Jun 21 07:08:11 PM PDT 24 51607019378 ps
T837 /workspace/coverage/default/28.spi_device_csb_read.4285371049 Jun 21 07:01:12 PM PDT 24 Jun 21 07:01:16 PM PDT 24 47267191 ps
T838 /workspace/coverage/default/39.spi_device_read_buffer_direct.3314647585 Jun 21 07:01:45 PM PDT 24 Jun 21 07:02:02 PM PDT 24 3126796329 ps
T839 /workspace/coverage/default/44.spi_device_flash_and_tpm.1581952444 Jun 21 07:02:02 PM PDT 24 Jun 21 07:02:18 PM PDT 24 1566279416 ps
T840 /workspace/coverage/default/22.spi_device_cfg_cmd.91761690 Jun 21 07:00:48 PM PDT 24 Jun 21 07:00:58 PM PDT 24 1098489490 ps
T841 /workspace/coverage/default/39.spi_device_tpm_read_hw_reg.86189935 Jun 21 07:01:44 PM PDT 24 Jun 21 07:01:53 PM PDT 24 579328764 ps
T842 /workspace/coverage/default/33.spi_device_intercept.689842589 Jun 21 07:01:29 PM PDT 24 Jun 21 07:01:36 PM PDT 24 59366337 ps
T47 /workspace/coverage/default/8.spi_device_flash_and_tpm.493897400 Jun 21 07:00:06 PM PDT 24 Jun 21 07:05:40 PM PDT 24 141349805205 ps
T843 /workspace/coverage/default/6.spi_device_intercept.3186786339 Jun 21 07:00:05 PM PDT 24 Jun 21 07:00:21 PM PDT 24 1608399254 ps
T844 /workspace/coverage/default/34.spi_device_alert_test.620052542 Jun 21 07:01:32 PM PDT 24 Jun 21 07:01:42 PM PDT 24 12634019 ps
T845 /workspace/coverage/default/43.spi_device_cfg_cmd.173174934 Jun 21 07:01:54 PM PDT 24 Jun 21 07:02:10 PM PDT 24 3490622452 ps
T846 /workspace/coverage/default/43.spi_device_upload.734765603 Jun 21 07:01:57 PM PDT 24 Jun 21 07:02:10 PM PDT 24 11011852346 ps
T847 /workspace/coverage/default/8.spi_device_read_buffer_direct.2822496149 Jun 21 07:00:04 PM PDT 24 Jun 21 07:00:19 PM PDT 24 949467090 ps
T848 /workspace/coverage/default/17.spi_device_alert_test.1673452091 Jun 21 07:00:31 PM PDT 24 Jun 21 07:00:41 PM PDT 24 44082362 ps
T849 /workspace/coverage/default/5.spi_device_pass_addr_payload_swap.1961031109 Jun 21 06:59:52 PM PDT 24 Jun 21 07:00:00 PM PDT 24 1928329925 ps
T850 /workspace/coverage/default/20.spi_device_tpm_rw.1091004676 Jun 21 07:00:40 PM PDT 24 Jun 21 07:00:49 PM PDT 24 58105229 ps
T851 /workspace/coverage/default/35.spi_device_pass_cmd_filtering.2512374092 Jun 21 07:01:28 PM PDT 24 Jun 21 07:01:45 PM PDT 24 1143543640 ps
T852 /workspace/coverage/default/44.spi_device_cfg_cmd.3953610900 Jun 21 07:02:21 PM PDT 24 Jun 21 07:02:28 PM PDT 24 1091936247 ps
T853 /workspace/coverage/default/37.spi_device_read_buffer_direct.2242772806 Jun 21 07:01:37 PM PDT 24 Jun 21 07:01:48 PM PDT 24 129181364 ps
T854 /workspace/coverage/default/19.spi_device_stress_all.2989948971 Jun 21 07:00:44 PM PDT 24 Jun 21 07:00:53 PM PDT 24 42950580 ps
T855 /workspace/coverage/default/2.spi_device_read_buffer_direct.2198246602 Jun 21 06:59:45 PM PDT 24 Jun 21 06:59:54 PM PDT 24 337320492 ps
T856 /workspace/coverage/default/11.spi_device_read_buffer_direct.2585855905 Jun 21 07:00:11 PM PDT 24 Jun 21 07:00:29 PM PDT 24 799465608 ps
T857 /workspace/coverage/default/41.spi_device_read_buffer_direct.1748608368 Jun 21 07:01:46 PM PDT 24 Jun 21 07:02:03 PM PDT 24 1386056918 ps
T858 /workspace/coverage/default/46.spi_device_read_buffer_direct.1300214574 Jun 21 07:02:16 PM PDT 24 Jun 21 07:02:24 PM PDT 24 651180501 ps
T859 /workspace/coverage/default/8.spi_device_stress_all.2938882041 Jun 21 07:00:02 PM PDT 24 Jun 21 07:03:02 PM PDT 24 34282418802 ps
T214 /workspace/coverage/default/20.spi_device_flash_and_tpm.4015944638 Jun 21 07:00:44 PM PDT 24 Jun 21 07:07:55 PM PDT 24 41547760982 ps
T860 /workspace/coverage/default/3.spi_device_alert_test.2426289606 Jun 21 06:59:52 PM PDT 24 Jun 21 06:59:56 PM PDT 24 15381956 ps
T861 /workspace/coverage/default/32.spi_device_tpm_rw.3193403362 Jun 21 07:01:26 PM PDT 24 Jun 21 07:01:34 PM PDT 24 652127789 ps
T862 /workspace/coverage/default/37.spi_device_tpm_rw.1486216422 Jun 21 07:01:38 PM PDT 24 Jun 21 07:01:47 PM PDT 24 29474540 ps
T863 /workspace/coverage/default/14.spi_device_read_buffer_direct.2087872606 Jun 21 07:00:23 PM PDT 24 Jun 21 07:00:37 PM PDT 24 466195542 ps
T864 /workspace/coverage/default/8.spi_device_tpm_rw.2632448293 Jun 21 07:00:03 PM PDT 24 Jun 21 07:00:08 PM PDT 24 23035912 ps
T865 /workspace/coverage/default/13.spi_device_upload.3457239868 Jun 21 07:00:22 PM PDT 24 Jun 21 07:00:45 PM PDT 24 7019135423 ps
T866 /workspace/coverage/default/22.spi_device_csb_read.2214930604 Jun 21 07:00:53 PM PDT 24 Jun 21 07:00:59 PM PDT 24 76930187 ps
T867 /workspace/coverage/default/38.spi_device_tpm_read_hw_reg.3988653687 Jun 21 07:01:38 PM PDT 24 Jun 21 07:01:50 PM PDT 24 14421427531 ps
T242 /workspace/coverage/default/7.spi_device_flash_and_tpm.1662843224 Jun 21 06:59:59 PM PDT 24 Jun 21 07:08:41 PM PDT 24 119097706058 ps
T868 /workspace/coverage/default/32.spi_device_flash_and_tpm_min_idle.2828918770 Jun 21 07:01:30 PM PDT 24 Jun 21 07:10:52 PM PDT 24 313958161757 ps
T869 /workspace/coverage/default/43.spi_device_pass_cmd_filtering.344986873 Jun 21 07:01:53 PM PDT 24 Jun 21 07:02:06 PM PDT 24 288726690 ps
T215 /workspace/coverage/default/44.spi_device_flash_and_tpm_min_idle.2029459121 Jun 21 07:02:10 PM PDT 24 Jun 21 07:04:01 PM PDT 24 5111253169 ps
T870 /workspace/coverage/default/30.spi_device_stress_all.2940650577 Jun 21 07:01:22 PM PDT 24 Jun 21 07:05:17 PM PDT 24 67399269462 ps
T871 /workspace/coverage/default/10.spi_device_mailbox.85766172 Jun 21 07:00:16 PM PDT 24 Jun 21 07:02:04 PM PDT 24 168411184268 ps
T872 /workspace/coverage/default/29.spi_device_pass_addr_payload_swap.2334906104 Jun 21 07:01:23 PM PDT 24 Jun 21 07:01:29 PM PDT 24 82192577 ps
T873 /workspace/coverage/default/33.spi_device_read_buffer_direct.3930952361 Jun 21 07:01:31 PM PDT 24 Jun 21 07:01:46 PM PDT 24 478259124 ps
T874 /workspace/coverage/default/6.spi_device_flash_mode.3281910526 Jun 21 07:00:04 PM PDT 24 Jun 21 07:00:14 PM PDT 24 271680836 ps
T875 /workspace/coverage/default/26.spi_device_cfg_cmd.607655429 Jun 21 07:01:11 PM PDT 24 Jun 21 07:01:44 PM PDT 24 2565915800 ps
T876 /workspace/coverage/default/2.spi_device_csb_read.321166951 Jun 21 06:59:41 PM PDT 24 Jun 21 06:59:45 PM PDT 24 134537663 ps
T877 /workspace/coverage/default/35.spi_device_csb_read.3879703630 Jun 21 07:01:29 PM PDT 24 Jun 21 07:01:35 PM PDT 24 66929507 ps
T878 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.4074601374 Jun 21 07:02:11 PM PDT 24 Jun 21 07:02:20 PM PDT 24 1747142022 ps
T879 /workspace/coverage/default/32.spi_device_tpm_read_hw_reg.3637331309 Jun 21 07:01:22 PM PDT 24 Jun 21 07:01:40 PM PDT 24 23074330981 ps
T880 /workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.1762232707 Jun 21 07:00:13 PM PDT 24 Jun 21 07:00:27 PM PDT 24 357447609 ps
T881 /workspace/coverage/default/4.spi_device_tpm_rw.30385266 Jun 21 06:59:50 PM PDT 24 Jun 21 06:59:55 PM PDT 24 43774256 ps
T882 /workspace/coverage/default/13.spi_device_intercept.4275761377 Jun 21 07:00:19 PM PDT 24 Jun 21 07:00:30 PM PDT 24 119717648 ps
T243 /workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.2000740312 Jun 21 07:00:22 PM PDT 24 Jun 21 07:01:58 PM PDT 24 4213920158 ps
T883 /workspace/coverage/default/34.spi_device_tpm_rw.1885112008 Jun 21 07:01:33 PM PDT 24 Jun 21 07:01:43 PM PDT 24 14615332 ps
T884 /workspace/coverage/default/11.spi_device_flash_all.3209924571 Jun 21 07:00:11 PM PDT 24 Jun 21 07:03:28 PM PDT 24 26242034495 ps
T885 /workspace/coverage/default/29.spi_device_tpm_read_hw_reg.2300474762 Jun 21 07:01:26 PM PDT 24 Jun 21 07:01:33 PM PDT 24 1229804893 ps
T886 /workspace/coverage/default/9.spi_device_csb_read.3916833541 Jun 21 07:00:00 PM PDT 24 Jun 21 07:00:04 PM PDT 24 15005779 ps
T887 /workspace/coverage/default/49.spi_device_read_buffer_direct.1360577125 Jun 21 07:02:18 PM PDT 24 Jun 21 07:02:30 PM PDT 24 569730356 ps
T888 /workspace/coverage/default/19.spi_device_cfg_cmd.2181218440 Jun 21 07:00:43 PM PDT 24 Jun 21 07:00:54 PM PDT 24 493127209 ps
T125 /workspace/coverage/default/17.spi_device_flash_and_tpm_min_idle.454399482 Jun 21 07:00:31 PM PDT 24 Jun 21 07:01:35 PM PDT 24 21778999188 ps
T889 /workspace/coverage/default/32.spi_device_alert_test.2388449039 Jun 21 07:01:33 PM PDT 24 Jun 21 07:01:44 PM PDT 24 27911327 ps
T890 /workspace/coverage/default/1.spi_device_tpm_rw.278349226 Jun 21 06:59:43 PM PDT 24 Jun 21 06:59:49 PM PDT 24 225240294 ps
T891 /workspace/coverage/default/24.spi_device_pass_cmd_filtering.2734163606 Jun 21 07:00:58 PM PDT 24 Jun 21 07:01:07 PM PDT 24 103184940 ps
T892 /workspace/coverage/default/24.spi_device_tpm_rw.895139198 Jun 21 07:00:57 PM PDT 24 Jun 21 07:01:04 PM PDT 24 264019740 ps
T893 /workspace/coverage/default/15.spi_device_intercept.1180992330 Jun 21 07:00:22 PM PDT 24 Jun 21 07:00:34 PM PDT 24 312720547 ps
T894 /workspace/coverage/default/26.spi_device_csb_read.2881665888 Jun 21 07:01:00 PM PDT 24 Jun 21 07:01:06 PM PDT 24 52358573 ps
T895 /workspace/coverage/default/47.spi_device_read_buffer_direct.3734850493 Jun 21 07:02:10 PM PDT 24 Jun 21 07:02:18 PM PDT 24 78841804 ps
T896 /workspace/coverage/default/39.spi_device_flash_and_tpm.1217537717 Jun 21 07:01:52 PM PDT 24 Jun 21 07:05:19 PM PDT 24 99811727633 ps
T897 /workspace/coverage/default/34.spi_device_stress_all.1680611759 Jun 21 07:01:30 PM PDT 24 Jun 21 07:01:38 PM PDT 24 72139533 ps
T898 /workspace/coverage/default/42.spi_device_intercept.4282163159 Jun 21 07:01:54 PM PDT 24 Jun 21 07:02:10 PM PDT 24 480018161 ps
T899 /workspace/coverage/default/33.spi_device_flash_mode.1491121954 Jun 21 07:01:31 PM PDT 24 Jun 21 07:02:03 PM PDT 24 1347828605 ps
T900 /workspace/coverage/default/21.spi_device_mailbox.2224616382 Jun 21 07:00:54 PM PDT 24 Jun 21 07:01:10 PM PDT 24 4479608586 ps
T901 /workspace/coverage/default/38.spi_device_read_buffer_direct.1016199201 Jun 21 07:01:47 PM PDT 24 Jun 21 07:02:01 PM PDT 24 272490705 ps
T262 /workspace/coverage/default/16.spi_device_flash_and_tpm.3427248016 Jun 21 07:00:31 PM PDT 24 Jun 21 07:10:35 PM PDT 24 226330610981 ps
T902 /workspace/coverage/default/10.spi_device_pass_addr_payload_swap.4099748194 Jun 21 07:00:13 PM PDT 24 Jun 21 07:00:53 PM PDT 24 41057651548 ps
T903 /workspace/coverage/default/4.spi_device_tpm_all.3671672278 Jun 21 06:59:51 PM PDT 24 Jun 21 07:00:20 PM PDT 24 65670353109 ps
T904 /workspace/coverage/default/21.spi_device_tpm_read_hw_reg.2042461064 Jun 21 07:00:40 PM PDT 24 Jun 21 07:01:11 PM PDT 24 32679049332 ps
T905 /workspace/coverage/default/29.spi_device_tpm_rw.3907893269 Jun 21 07:01:30 PM PDT 24 Jun 21 07:01:38 PM PDT 24 27146627 ps
T906 /workspace/coverage/default/11.spi_device_cfg_cmd.244117123 Jun 21 07:00:08 PM PDT 24 Jun 21 07:00:19 PM PDT 24 206485188 ps
T907 /workspace/coverage/default/12.spi_device_tpm_read_hw_reg.3077636176 Jun 21 07:00:10 PM PDT 24 Jun 21 07:00:23 PM PDT 24 6251243780 ps
T908 /workspace/coverage/default/36.spi_device_tpm_read_hw_reg.1783045984 Jun 21 07:01:38 PM PDT 24 Jun 21 07:01:47 PM PDT 24 84032376 ps
T909 /workspace/coverage/default/31.spi_device_tpm_all.3204155435 Jun 21 07:01:25 PM PDT 24 Jun 21 07:01:39 PM PDT 24 3890596784 ps
T910 /workspace/coverage/default/45.spi_device_mailbox.3332070851 Jun 21 07:02:07 PM PDT 24 Jun 21 07:02:48 PM PDT 24 73452166899 ps
T911 /workspace/coverage/default/22.spi_device_tpm_all.2058890694 Jun 21 07:00:48 PM PDT 24 Jun 21 07:01:24 PM PDT 24 24464440908 ps
T63 /workspace/coverage/default/4.spi_device_sec_cm.1987316457 Jun 21 07:00:02 PM PDT 24 Jun 21 07:00:08 PM PDT 24 121098826 ps
T236 /workspace/coverage/default/16.spi_device_flash_and_tpm_min_idle.1848901889 Jun 21 07:00:32 PM PDT 24 Jun 21 07:10:01 PM PDT 24 124813567971 ps
T912 /workspace/coverage/default/44.spi_device_tpm_sts_read.243869943 Jun 21 07:02:05 PM PDT 24 Jun 21 07:02:08 PM PDT 24 20799735 ps
T913 /workspace/coverage/default/28.spi_device_upload.3624191725 Jun 21 07:01:21 PM PDT 24 Jun 21 07:01:32 PM PDT 24 806621103 ps
T914 /workspace/coverage/default/27.spi_device_flash_and_tpm.3584197395 Jun 21 07:01:12 PM PDT 24 Jun 21 07:04:59 PM PDT 24 20723625467 ps
T915 /workspace/coverage/default/23.spi_device_stress_all.3340430880 Jun 21 07:00:50 PM PDT 24 Jun 21 07:03:02 PM PDT 24 5490690503 ps
T916 /workspace/coverage/default/8.spi_device_tpm_sts_read.676045798 Jun 21 07:00:04 PM PDT 24 Jun 21 07:00:09 PM PDT 24 73835312 ps
T917 /workspace/coverage/default/24.spi_device_flash_and_tpm.3986198599 Jun 21 07:00:59 PM PDT 24 Jun 21 07:01:25 PM PDT 24 9601139891 ps
T918 /workspace/coverage/default/22.spi_device_flash_and_tpm_min_idle.3870959317 Jun 21 07:00:59 PM PDT 24 Jun 21 07:02:08 PM PDT 24 3203137080 ps
T919 /workspace/coverage/default/21.spi_device_pass_addr_payload_swap.873256154 Jun 21 07:00:40 PM PDT 24 Jun 21 07:00:52 PM PDT 24 4265663159 ps
T920 /workspace/coverage/default/41.spi_device_pass_addr_payload_swap.1066300008 Jun 21 07:01:47 PM PDT 24 Jun 21 07:01:59 PM PDT 24 877952771 ps
T921 /workspace/coverage/default/6.spi_device_upload.854081152 Jun 21 07:00:02 PM PDT 24 Jun 21 07:00:09 PM PDT 24 197311330 ps
T922 /workspace/coverage/default/40.spi_device_mailbox.4120292593 Jun 21 07:01:46 PM PDT 24 Jun 21 07:01:57 PM PDT 24 34009847 ps
T923 /workspace/coverage/default/18.spi_device_tpm_rw.2303566124 Jun 21 07:00:33 PM PDT 24 Jun 21 07:00:43 PM PDT 24 12918359 ps
T924 /workspace/coverage/default/15.spi_device_cfg_cmd.3875508365 Jun 21 07:00:25 PM PDT 24 Jun 21 07:00:46 PM PDT 24 3310061901 ps
T263 /workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.764672601 Jun 21 07:02:01 PM PDT 24 Jun 21 07:05:46 PM PDT 24 20219086033 ps
T925 /workspace/coverage/default/36.spi_device_tpm_rw.3530739980 Jun 21 07:01:40 PM PDT 24 Jun 21 07:01:50 PM PDT 24 60921404 ps
T926 /workspace/coverage/default/25.spi_device_flash_and_tpm.2411071474 Jun 21 07:00:59 PM PDT 24 Jun 21 07:01:33 PM PDT 24 7509957055 ps
T927 /workspace/coverage/default/32.spi_device_stress_all.571227268 Jun 21 07:01:29 PM PDT 24 Jun 21 07:03:11 PM PDT 24 12807959275 ps
T928 /workspace/coverage/default/0.spi_device_mailbox.523110197 Jun 21 06:59:45 PM PDT 24 Jun 21 07:00:02 PM PDT 24 2137228383 ps
T929 /workspace/coverage/default/39.spi_device_mailbox.2285214343 Jun 21 07:01:46 PM PDT 24 Jun 21 07:02:53 PM PDT 24 13534909054 ps
T930 /workspace/coverage/default/19.spi_device_tpm_read_hw_reg.2072894740 Jun 21 07:00:49 PM PDT 24 Jun 21 07:00:56 PM PDT 24 36027922 ps
T931 /workspace/coverage/default/12.spi_device_flash_all.1515369382 Jun 21 07:00:21 PM PDT 24 Jun 21 07:00:51 PM PDT 24 2278550364 ps
T932 /workspace/coverage/default/33.spi_device_flash_all.3067988406 Jun 21 07:01:27 PM PDT 24 Jun 21 07:01:50 PM PDT 24 1669449123 ps
T933 /workspace/coverage/default/47.spi_device_csb_read.4051432348 Jun 21 07:02:11 PM PDT 24 Jun 21 07:02:16 PM PDT 24 15562508 ps
T934 /workspace/coverage/default/44.spi_device_mailbox.3508552876 Jun 21 07:02:03 PM PDT 24 Jun 21 07:02:14 PM PDT 24 358787445 ps
T935 /workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.2661530496 Jun 21 07:00:56 PM PDT 24 Jun 21 07:01:34 PM PDT 24 5708968341 ps
T936 /workspace/coverage/default/18.spi_device_pass_addr_payload_swap.3235743568 Jun 21 07:00:34 PM PDT 24 Jun 21 07:00:47 PM PDT 24 4972602668 ps
T937 /workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.2019154716 Jun 21 07:02:18 PM PDT 24 Jun 21 07:06:02 PM PDT 24 30617745627 ps
T938 /workspace/coverage/default/22.spi_device_mailbox.3754395553 Jun 21 07:00:53 PM PDT 24 Jun 21 07:02:07 PM PDT 24 28369040188 ps
T939 /workspace/coverage/default/20.spi_device_upload.1825867640 Jun 21 07:00:48 PM PDT 24 Jun 21 07:01:00 PM PDT 24 627246898 ps
T940 /workspace/coverage/default/15.spi_device_tpm_rw.3877642028 Jun 21 07:00:22 PM PDT 24 Jun 21 07:00:33 PM PDT 24 301136811 ps
T941 /workspace/coverage/default/40.spi_device_stress_all.3121095650 Jun 21 07:01:46 PM PDT 24 Jun 21 07:01:55 PM PDT 24 54922592 ps
T942 /workspace/coverage/default/32.spi_device_csb_read.3561243779 Jun 21 07:01:23 PM PDT 24 Jun 21 07:01:28 PM PDT 24 16699357 ps
T943 /workspace/coverage/default/6.spi_device_tpm_all.1705093004 Jun 21 06:59:54 PM PDT 24 Jun 21 07:00:24 PM PDT 24 3267519712 ps
T944 /workspace/coverage/default/33.spi_device_tpm_rw.1219638836 Jun 21 07:01:30 PM PDT 24 Jun 21 07:01:38 PM PDT 24 214584585 ps
T945 /workspace/coverage/default/15.spi_device_upload.543161280 Jun 21 07:00:23 PM PDT 24 Jun 21 07:00:58 PM PDT 24 17546368256 ps
T946 /workspace/coverage/default/45.spi_device_tpm_all.150836115 Jun 21 07:02:11 PM PDT 24 Jun 21 07:02:19 PM PDT 24 4426923684 ps
T947 /workspace/coverage/default/40.spi_device_tpm_rw.4003954035 Jun 21 07:01:50 PM PDT 24 Jun 21 07:01:59 PM PDT 24 98561677 ps
T948 /workspace/coverage/default/47.spi_device_tpm_rw.1381775415 Jun 21 07:02:12 PM PDT 24 Jun 21 07:02:18 PM PDT 24 109412742 ps
T949 /workspace/coverage/default/9.spi_device_tpm_rw.2899956898 Jun 21 07:00:13 PM PDT 24 Jun 21 07:00:20 PM PDT 24 91427329 ps
T950 /workspace/coverage/default/2.spi_device_pass_addr_payload_swap.1137991344 Jun 21 06:59:39 PM PDT 24 Jun 21 06:59:44 PM PDT 24 122973657 ps
T951 /workspace/coverage/default/18.spi_device_flash_mode.2851084373 Jun 21 07:00:32 PM PDT 24 Jun 21 07:01:03 PM PDT 24 1416923650 ps
T952 /workspace/coverage/default/12.spi_device_tpm_all.3344140023 Jun 21 07:00:12 PM PDT 24 Jun 21 07:00:43 PM PDT 24 8846546656 ps
T953 /workspace/coverage/default/48.spi_device_tpm_rw.2841981710 Jun 21 07:02:19 PM PDT 24 Jun 21 07:02:27 PM PDT 24 114028716 ps
T954 /workspace/coverage/default/46.spi_device_tpm_read_hw_reg.2643422241 Jun 21 07:02:12 PM PDT 24 Jun 21 07:02:17 PM PDT 24 179656734 ps
T223 /workspace/coverage/default/29.spi_device_stress_all.2185485968 Jun 21 07:01:21 PM PDT 24 Jun 21 07:10:50 PM PDT 24 543302122039 ps
T955 /workspace/coverage/default/34.spi_device_flash_mode.3651511156 Jun 21 07:01:35 PM PDT 24 Jun 21 07:02:50 PM PDT 24 21752348423 ps
T126 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.2832948881 Jun 21 06:59:13 PM PDT 24 Jun 21 06:59:21 PM PDT 24 173136882 ps
T57 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.2928573511 Jun 21 06:59:30 PM PDT 24 Jun 21 06:59:38 PM PDT 24 179254870 ps
T98 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3137359016 Jun 21 06:59:30 PM PDT 24 Jun 21 06:59:38 PM PDT 24 42022137 ps
T99 /workspace/coverage/cover_reg_top/5.spi_device_csr_rw.2993711183 Jun 21 06:59:17 PM PDT 24 Jun 21 06:59:24 PM PDT 24 82211570 ps
T58 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2900369653 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:46 PM PDT 24 935134181 ps
T956 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.3037206733 Jun 21 06:59:16 PM PDT 24 Jun 21 06:59:44 PM PDT 24 20138480608 ps
T957 /workspace/coverage/cover_reg_top/13.spi_device_intr_test.3117431250 Jun 21 06:59:19 PM PDT 24 Jun 21 06:59:25 PM PDT 24 49541003 ps
T958 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.1498029865 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:35 PM PDT 24 37087558 ps
T59 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3960394028 Jun 21 06:59:21 PM PDT 24 Jun 21 06:59:30 PM PDT 24 163209529 ps
T85 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3323059778 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:27 PM PDT 24 2982532904 ps
T86 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.1664912812 Jun 21 06:59:08 PM PDT 24 Jun 21 06:59:30 PM PDT 24 301363625 ps
T959 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.594055039 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:38 PM PDT 24 44870379 ps
T96 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.393212699 Jun 21 06:59:19 PM PDT 24 Jun 21 06:59:38 PM PDT 24 2221423337 ps
T84 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.3958766949 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:28 PM PDT 24 202733357 ps
T960 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.1817094508 Jun 21 06:59:13 PM PDT 24 Jun 21 06:59:19 PM PDT 24 102584344 ps
T961 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.1353134853 Jun 21 06:59:40 PM PDT 24 Jun 21 06:59:43 PM PDT 24 47360926 ps
T962 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2853342221 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:35 PM PDT 24 318488391 ps
T100 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.2327327749 Jun 21 06:59:23 PM PDT 24 Jun 21 06:59:31 PM PDT 24 452068528 ps
T87 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.3415633114 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:29 PM PDT 24 499379292 ps
T963 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.640330142 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:36 PM PDT 24 28812276 ps
T101 /workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.199509000 Jun 21 06:59:13 PM PDT 24 Jun 21 06:59:45 PM PDT 24 10617165433 ps
T964 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.3132021558 Jun 21 06:59:28 PM PDT 24 Jun 21 06:59:34 PM PDT 24 54087663 ps
T965 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.2602185577 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:37 PM PDT 24 57076910 ps
T88 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.746638832 Jun 21 06:59:23 PM PDT 24 Jun 21 06:59:31 PM PDT 24 59220412 ps
T966 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.116848310 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:34 PM PDT 24 121882085 ps
T93 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2872507548 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:17 PM PDT 24 167570422 ps
T89 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2412667069 Jun 21 06:59:23 PM PDT 24 Jun 21 06:59:32 PM PDT 24 160699742 ps
T95 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3231805334 Jun 21 06:59:30 PM PDT 24 Jun 21 06:59:37 PM PDT 24 59367767 ps
T102 /workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.2012417840 Jun 21 06:59:10 PM PDT 24 Jun 21 06:59:15 PM PDT 24 220198898 ps
T103 /workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2210500275 Jun 21 06:59:14 PM PDT 24 Jun 21 07:00:00 PM PDT 24 19277797757 ps
T255 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.790608314 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:32 PM PDT 24 213067298 ps
T967 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.2227847297 Jun 21 06:59:30 PM PDT 24 Jun 21 06:59:36 PM PDT 24 43885689 ps
T91 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.138315322 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:22 PM PDT 24 106876223 ps
T968 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.1194535084 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:36 PM PDT 24 35055950 ps
T969 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.1557979613 Jun 21 06:59:30 PM PDT 24 Jun 21 06:59:37 PM PDT 24 12134528 ps
T135 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.3332470630 Jun 21 06:59:15 PM PDT 24 Jun 21 06:59:27 PM PDT 24 1461079317 ps
T104 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.4199660673 Jun 21 06:59:19 PM PDT 24 Jun 21 06:59:26 PM PDT 24 91803950 ps
T94 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.3948217924 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:32 PM PDT 24 362280976 ps
T92 /workspace/coverage/cover_reg_top/16.spi_device_tl_errors.3801307777 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:29 PM PDT 24 178694088 ps
T970 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.1864496947 Jun 21 06:59:28 PM PDT 24 Jun 21 06:59:34 PM PDT 24 41372967 ps
T971 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.195993124 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:37 PM PDT 24 12983115 ps
T972 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1964658177 Jun 21 06:59:30 PM PDT 24 Jun 21 06:59:37 PM PDT 24 33913124 ps
T973 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.2541876890 Jun 21 06:59:21 PM PDT 24 Jun 21 06:59:29 PM PDT 24 133946095 ps
T974 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.491338879 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:28 PM PDT 24 102582073 ps
T975 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.3318217902 Jun 21 06:59:19 PM PDT 24 Jun 21 06:59:26 PM PDT 24 60325438 ps
T976 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.161639648 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:20 PM PDT 24 22059066 ps
T977 /workspace/coverage/cover_reg_top/26.spi_device_intr_test.4253450916 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:38 PM PDT 24 22189683 ps
T978 /workspace/coverage/cover_reg_top/3.spi_device_mem_walk.3584545850 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:19 PM PDT 24 19574908 ps
T76 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.612557739 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:17 PM PDT 24 20637152 ps
T105 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.4135070476 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:17 PM PDT 24 376367236 ps
T979 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.2563057464 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:37 PM PDT 24 12865958 ps
T980 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.3562473114 Jun 21 06:59:15 PM PDT 24 Jun 21 06:59:20 PM PDT 24 39241838 ps
T244 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2425815719 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:21 PM PDT 24 60288322 ps
T981 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.3319807649 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:35 PM PDT 24 43633096 ps
T90 /workspace/coverage/cover_reg_top/3.spi_device_tl_errors.2253258141 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:22 PM PDT 24 218043138 ps
T982 /workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.2499612370 Jun 21 06:59:20 PM PDT 24 Jun 21 06:59:32 PM PDT 24 404360960 ps
T983 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.2441100114 Jun 21 06:59:40 PM PDT 24 Jun 21 06:59:44 PM PDT 24 11401382 ps
T984 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2878019438 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:26 PM PDT 24 985588229 ps
T985 /workspace/coverage/cover_reg_top/8.spi_device_intr_test.312034652 Jun 21 06:59:10 PM PDT 24 Jun 21 06:59:14 PM PDT 24 110997102 ps
T986 /workspace/coverage/cover_reg_top/18.spi_device_intr_test.399660192 Jun 21 06:59:28 PM PDT 24 Jun 21 06:59:34 PM PDT 24 63646173 ps
T987 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.549947272 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:38 PM PDT 24 1461630820 ps
T988 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.3879328720 Jun 21 06:59:22 PM PDT 24 Jun 21 06:59:28 PM PDT 24 18381310 ps
T252 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.2640481429 Jun 21 06:59:16 PM PDT 24 Jun 21 06:59:28 PM PDT 24 101403273 ps
T989 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2406549389 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:39 PM PDT 24 151018225 ps
T106 /workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.424818090 Jun 21 06:59:10 PM PDT 24 Jun 21 06:59:15 PM PDT 24 397518822 ps
T990 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.2165786706 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:35 PM PDT 24 33403940 ps
T991 /workspace/coverage/cover_reg_top/18.spi_device_tl_errors.2544524347 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:41 PM PDT 24 3116680912 ps
T107 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.3294671074 Jun 21 06:59:21 PM PDT 24 Jun 21 06:59:28 PM PDT 24 18782723 ps
T992 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3620870939 Jun 21 06:59:18 PM PDT 24 Jun 21 06:59:26 PM PDT 24 173266076 ps
T993 /workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.3252912377 Jun 21 06:59:08 PM PDT 24 Jun 21 06:59:14 PM PDT 24 42614671 ps
T136 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.3264781205 Jun 21 06:59:30 PM PDT 24 Jun 21 06:59:40 PM PDT 24 1144331353 ps
T110 /workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.2069021530 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:17 PM PDT 24 258482844 ps
T246 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.1238356227 Jun 21 06:59:17 PM PDT 24 Jun 21 06:59:34 PM PDT 24 1233771167 ps
T108 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.506779363 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:24 PM PDT 24 1603118276 ps
T77 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.173487528 Jun 21 06:59:10 PM PDT 24 Jun 21 06:59:14 PM PDT 24 119888451 ps
T994 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.1371747444 Jun 21 06:59:29 PM PDT 24 Jun 21 06:59:39 PM PDT 24 578891384 ps
T995 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.349973493 Jun 21 06:59:10 PM PDT 24 Jun 21 06:59:14 PM PDT 24 462553437 ps
T109 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1438519591 Jun 21 06:59:16 PM PDT 24 Jun 21 06:59:23 PM PDT 24 39185050 ps
T996 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.1762077048 Jun 21 06:59:39 PM PDT 24 Jun 21 06:59:42 PM PDT 24 11785648 ps
T997 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.2851419345 Jun 21 06:59:19 PM PDT 24 Jun 21 06:59:25 PM PDT 24 59706808 ps
T998 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.2973168126 Jun 21 06:59:22 PM PDT 24 Jun 21 06:59:32 PM PDT 24 408856488 ps
T999 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.2786174374 Jun 21 06:59:13 PM PDT 24 Jun 21 06:59:20 PM PDT 24 53070344 ps
T245 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.147474081 Jun 21 06:59:10 PM PDT 24 Jun 21 06:59:18 PM PDT 24 481316467 ps
T1000 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.578979766 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:49 PM PDT 24 202784566 ps
T1001 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.3263342200 Jun 21 06:59:09 PM PDT 24 Jun 21 06:59:16 PM PDT 24 126713788 ps
T1002 /workspace/coverage/cover_reg_top/45.spi_device_intr_test.695308338 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:37 PM PDT 24 14591370 ps
T1003 /workspace/coverage/cover_reg_top/1.spi_device_csr_rw.564651757 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:16 PM PDT 24 139276862 ps
T1004 /workspace/coverage/cover_reg_top/12.spi_device_intr_test.1500405498 Jun 21 06:59:19 PM PDT 24 Jun 21 06:59:25 PM PDT 24 125626690 ps
T1005 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2259102277 Jun 21 06:59:07 PM PDT 24 Jun 21 06:59:12 PM PDT 24 82456888 ps
T111 /workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.4079822956 Jun 21 06:59:14 PM PDT 24 Jun 21 06:59:20 PM PDT 24 245596528 ps
T137 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3832150191 Jun 21 06:59:31 PM PDT 24 Jun 21 06:59:41 PM PDT 24 691323608 ps
T1006 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.2795019351 Jun 21 06:59:09 PM PDT 24 Jun 21 06:59:13 PM PDT 24 25333561 ps
T1007 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.124052245 Jun 21 06:59:17 PM PDT 24 Jun 21 06:59:27 PM PDT 24 162810774 ps
T78 /workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.21245898 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:15 PM PDT 24 223722691 ps
T1008 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.2574867554 Jun 21 06:59:11 PM PDT 24 Jun 21 06:59:37 PM PDT 24 1465551028 ps
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