Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	368840212	3666	0	0
addr_swap_data_rd_A	368840212	869	0	0
addr_swap_mask_rd_A	368840212	1102	0	0
cfg_rd_A	368840212	1662	0	0
cmd_filter_0_rd_A	368840212	9686	0	0
cmd_filter_1_rd_A	368840212	10460	0	0
cmd_filter_2_rd_A	368840212	10136	0	0
cmd_filter_3_rd_A	368840212	9340	0	0
cmd_filter_4_rd_A	368840212	8875	0	0
cmd_filter_5_rd_A	368840212	10377	0	0
cmd_filter_6_rd_A	368840212	8713	0	0
cmd_filter_7_rd_A	368840212	10939	0	0
cmd_info_0_rd_A	368840212	4138	0	0
cmd_info_10_rd_A	368840212	4483	0	0
cmd_info_11_rd_A	368840212	4372	0	0
cmd_info_12_rd_A	368840212	4446	0	0
cmd_info_13_rd_A	368840212	4795	0	0
cmd_info_14_rd_A	368840212	4265	0	0
cmd_info_15_rd_A	368840212	4569	0	0
cmd_info_16_rd_A	368840212	4809	0	0
cmd_info_17_rd_A	368840212	4346	0	0
cmd_info_18_rd_A	368840212	4173	0	0
cmd_info_19_rd_A	368840212	4250	0	0
cmd_info_1_rd_A	368840212	4422	0	0
cmd_info_20_rd_A	368840212	4373	0	0
cmd_info_21_rd_A	368840212	4521	0	0
cmd_info_22_rd_A	368840212	4473	0	0
cmd_info_23_rd_A	368840212	4634	0	0
cmd_info_2_rd_A	368840212	4392	0	0
cmd_info_3_rd_A	368840212	4429	0	0
cmd_info_4_rd_A	368840212	4348	0	0
cmd_info_5_rd_A	368840212	4328	0	0
cmd_info_6_rd_A	368840212	4390	0	0
cmd_info_7_rd_A	368840212	4477	0	0
cmd_info_8_rd_A	368840212	4771	0	0
cmd_info_9_rd_A	368840212	4633	0	0
cmd_info_en4b_rd_A	368840212	1304	0	0
cmd_info_ex4b_rd_A	368840212	1294	0	0
cmd_info_wrdi_rd_A	368840212	1333	0	0
cmd_info_wren_rd_A	368840212	1326	0	0
intercept_en_rd_A	368840212	1989	0	0
intr_enable_rd_A	368840212	4019	0	0
jedec_cc_rd_A	368840212	1306	0	0
jedec_id_rd_A	368840212	1379	0	0
mailbox_addr_rd_A	368840212	1065	0	0
payload_swap_data_rd_A	368840212	1015	0	0
payload_swap_mask_rd_A	368840212	989	0	0
read_threshold_rd_A	368840212	954	0	0
tpm_access_0_rd_A	368840212	1816	0	0
tpm_access_1_rd_A	368840212	1077	0	0
tpm_cfg_rd_A	368840212	2107	0	0
tpm_did_vid_rd_A	368840212	1275	0	0
tpm_int_enable_rd_A	368840212	1035	0	0
tpm_int_status_rd_A	368840212	1037	0	0
tpm_int_vector_rd_A	368840212	943	0	0
tpm_intf_capability_rd_A	368840212	1026	0	0
tpm_rid_rd_A	368840212	867	0	0
tpm_sts_rd_A	368840212	1000	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	3666	0	0
T75	5333	10	0	0
T76	3923	10	0	0
T77	11919	9	0	0
T98	5027	190	0	0
T99	104345	3	0	0
T100	13724	266	0	0
T101	32106	2	0	0
T103	16415	8	0	0
T115	4584	2	0	0
T122	7518	5	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	869	0	0
T77	11919	15	0	0
T89	4301	11	0	0
T99	104345	107	0	0
T103	16415	22	0	0
T126	10170	7	0	0
T151	17584	44	0	0
T157	7386	3	0	0
T158	19932	60	0	0
T159	14319	69	0	0
T160	13696	6	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1102	0	0
T77	11919	10	0	0
T88	2537	7	0	0
T89	4301	9	0	0
T99	104345	111	0	0
T103	16415	29	0	0
T126	10170	5	0	0
T151	17584	12	0	0
T157	7386	35	0	0
T158	19932	100	0	0
T159	14319	38	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1662	0	0
T77	11919	29	0	0
T89	4301	12	0	0
T99	104345	200	0	0
T103	16415	47	0	0
T126	10170	17	0	0
T151	17584	38	0	0
T157	7386	39	0	0
T158	19932	34	0	0
T159	14319	74	0	0
T160	13696	85	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	9686	0	0
T77	11919	95	0	0
T88	2537	7	0	0
T89	4301	13	0	0
T99	104345	1408	0	0
T103	16415	274	0	0
T126	10170	219	0	0
T151	17584	17	0	0
T157	7386	5	0	0
T158	19932	90	0	0
T159	14319	44	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	10460	0	0
T77	11919	76	0	0
T88	2537	5	0	0
T89	4301	16	0	0
T99	104345	1843	0	0
T103	16415	280	0	0
T126	10170	257	0	0
T151	17584	18	0	0
T157	7386	17	0	0
T158	19932	90	0	0
T159	14319	19	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	10136	0	0
T77	11919	77	0	0
T88	2537	3	0	0
T89	4301	6	0	0
T99	104345	1808	0	0
T103	16415	245	0	0
T126	10170	115	0	0
T151	17584	40	0	0
T157	7386	21	0	0
T158	19932	123	0	0
T159	14319	13	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	9340	0	0
T77	11919	72	0	0
T88	2537	5	0	0
T89	4301	9	0	0
T99	104345	1357	0	0
T103	16415	227	0	0
T126	10170	4	0	0
T151	17584	31	0	0
T157	7386	9	0	0
T158	19932	74	0	0
T159	14319	41	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	8875	0	0
T77	11919	15	0	0
T89	4301	12	0	0
T99	104345	1936	0	0
T103	16415	254	0	0
T126	10170	159	0	0
T151	17584	39	0	0
T157	7386	11	0	0
T158	19932	35	0	0
T159	14319	33	0	0
T160	13696	54	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	10377	0	0
T77	11919	18	0	0
T88	2537	7	0	0
T89	4301	2	0	0
T99	104345	1759	0	0
T103	16415	302	0	0
T126	10170	140	0	0
T151	17584	13	0	0
T157	7386	22	0	0
T158	19932	54	0	0
T159	14319	36	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	8713	0	0
T77	11919	90	0	0
T88	2537	6	0	0
T89	4301	14	0	0
T99	104345	1481	0	0
T103	16415	280	0	0
T126	10170	133	0	0
T151	17584	25	0	0
T157	7386	7	0	0
T158	19932	46	0	0
T159	14319	19	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	10939	0	0
T77	11919	36	0	0
T88	2537	6	0	0
T89	4301	14	0	0
T99	104345	2061	0	0
T103	16415	224	0	0
T126	10170	104	0	0
T151	17584	7	0	0
T157	7386	8	0	0
T158	19932	53	0	0
T159	14319	76	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4138	0	0
T77	11919	55	0	0
T88	2537	2	0	0
T89	4301	7	0	0
T99	104345	511	0	0
T103	16415	130	0	0
T126	10170	110	0	0
T151	17584	39	0	0
T157	7386	27	0	0
T158	19932	71	0	0
T159	14319	44	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4483	0	0
T77	11919	13	0	0
T88	2537	2	0	0
T89	4301	10	0	0
T99	104345	812	0	0
T103	16415	110	0	0
T126	10170	53	0	0
T151	17584	7	0	0
T157	7386	58	0	0
T158	19932	46	0	0
T159	14319	65	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4372	0	0
T77	11919	46	0	0
T88	2537	5	0	0
T89	4301	17	0	0
T99	104345	749	0	0
T103	16415	73	0	0
T126	10170	102	0	0
T151	17584	63	0	0
T157	7386	28	0	0
T158	19932	46	0	0
T159	14319	56	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4446	0	0
T77	11919	48	0	0
T89	4301	9	0	0
T99	104345	604	0	0
T103	16415	183	0	0
T126	10170	115	0	0
T151	17584	23	0	0
T157	7386	11	0	0
T158	19932	43	0	0
T159	14319	35	0	0
T160	13696	33	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4795	0	0
T77	11919	44	0	0
T89	4301	7	0	0
T99	104345	961	0	0
T103	16415	129	0	0
T126	10170	62	0	0
T151	17584	26	0	0
T157	7386	21	0	0
T158	19932	73	0	0
T159	14319	18	0	0
T160	13696	84	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4265	0	0
T77	11919	52	0	0
T88	2537	4	0	0
T89	4301	17	0	0
T99	104345	712	0	0
T103	16415	75	0	0
T126	10170	158	0	0
T151	17584	29	0	0
T157	7386	29	0	0
T158	19932	56	0	0
T159	14319	42	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4569	0	0
T77	11919	29	0	0
T88	2537	3	0	0
T89	4301	14	0	0
T99	104345	746	0	0
T103	16415	93	0	0
T126	10170	111	0	0
T151	17584	22	0	0
T157	7386	44	0	0
T158	19932	72	0	0
T159	14319	49	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4809	0	0
T77	11919	19	0	0
T88	2537	7	0	0
T89	4301	12	0	0
T99	104345	937	0	0
T103	16415	48	0	0
T126	10170	55	0	0
T151	17584	25	0	0
T157	7386	24	0	0
T158	19932	98	0	0
T159	14319	66	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4346	0	0
T77	11919	62	0	0
T89	4301	10	0	0
T99	104345	809	0	0
T103	16415	161	0	0
T126	10170	76	0	0
T151	17584	29	0	0
T157	7386	30	0	0
T158	19932	103	0	0
T159	14319	77	0	0
T160	13696	44	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4173	0	0
T77	11919	40	0	0
T88	2537	6	0	0
T89	4301	9	0	0
T99	104345	634	0	0
T103	16415	101	0	0
T126	10170	99	0	0
T151	17584	32	0	0
T157	7386	52	0	0
T158	19932	64	0	0
T159	14319	46	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4250	0	0
T77	11919	76	0	0
T88	2537	8	0	0
T89	4301	13	0	0
T99	104345	647	0	0
T103	16415	174	0	0
T126	10170	71	0	0
T151	17584	46	0	0
T157	7386	2	0	0
T158	19932	49	0	0
T159	14319	39	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4422	0	0
T77	11919	32	0	0
T88	2537	8	0	0
T89	4301	9	0	0
T99	104345	742	0	0
T103	16415	76	0	0
T126	10170	82	0	0
T151	17584	13	0	0
T157	7386	3	0	0
T158	19932	79	0	0
T159	14319	70	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4373	0	0
T77	11919	75	0	0
T89	4301	17	0	0
T99	104345	848	0	0
T103	16415	52	0	0
T126	10170	65	0	0
T151	17584	18	0	0
T157	7386	8	0	0
T158	19932	80	0	0
T159	14319	46	0	0
T160	13696	28	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4521	0	0
T77	11919	109	0	0
T88	2537	5	0	0
T89	4301	10	0	0
T99	104345	760	0	0
T103	16415	117	0	0
T126	10170	63	0	0
T151	17584	50	0	0
T157	7386	2	0	0
T158	19932	75	0	0
T159	14319	30	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4473	0	0
T77	11919	42	0	0
T88	2537	5	0	0
T89	4301	8	0	0
T99	104345	689	0	0
T103	16415	150	0	0
T126	10170	58	0	0
T151	17584	48	0	0
T157	7386	41	0	0
T158	19932	52	0	0
T159	14319	98	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4634	0	0
T77	11919	32	0	0
T88	2537	2	0	0
T89	4301	5	0	0
T99	104345	896	0	0
T103	16415	25	0	0
T126	10170	116	0	0
T151	17584	16	0	0
T157	7386	19	0	0
T158	19932	70	0	0
T159	14319	25	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4392	0	0
T77	11919	77	0	0
T89	4301	13	0	0
T99	104345	657	0	0
T103	16415	92	0	0
T126	10170	67	0	0
T151	17584	20	0	0
T157	7386	34	0	0
T158	19932	93	0	0
T159	14319	24	0	0
T160	13696	31	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4429	0	0
T77	11919	91	0	0
T88	2537	7	0	0
T89	4301	9	0	0
T99	104345	744	0	0
T103	16415	116	0	0
T126	10170	90	0	0
T151	17584	41	0	0
T157	7386	34	0	0
T158	19932	36	0	0
T159	14319	45	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4348	0	0
T77	11919	42	0	0
T88	2537	1	0	0
T89	4301	13	0	0
T99	104345	730	0	0
T103	16415	20	0	0
T126	10170	45	0	0
T151	17584	33	0	0
T157	7386	42	0	0
T158	19932	73	0	0
T159	14319	46	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4328	0	0
T77	11919	10	0	0
T88	2537	6	0	0
T89	4301	9	0	0
T99	104345	785	0	0
T103	16415	127	0	0
T126	10170	90	0	0
T151	17584	50	0	0
T157	7386	21	0	0
T158	19932	9	0	0
T159	14319	14	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4390	0	0
T77	11919	37	0	0
T89	4301	13	0	0
T99	104345	907	0	0
T103	16415	148	0	0
T126	10170	55	0	0
T151	17584	46	0	0
T157	7386	72	0	0
T158	19932	86	0	0
T159	14319	37	0	0
T160	13696	21	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4477	0	0
T77	11919	31	0	0
T88	2537	9	0	0
T89	4301	9	0	0
T99	104345	695	0	0
T103	16415	67	0	0
T126	10170	93	0	0
T151	17584	45	0	0
T157	7386	40	0	0
T158	19932	67	0	0
T159	14319	50	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4771	0	0
T77	11919	50	0	0
T89	4301	12	0	0
T99	104345	1045	0	0
T103	16415	89	0	0
T126	10170	115	0	0
T151	17584	20	0	0
T157	7386	20	0	0
T158	19932	24	0	0
T159	14319	31	0	0
T160	13696	76	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4633	0	0
T77	11919	9	0	0
T88	2537	4	0	0
T89	4301	16	0	0
T99	104345	981	0	0
T103	16415	69	0	0
T126	10170	24	0	0
T151	17584	21	0	0
T157	7386	44	0	0
T158	19932	94	0	0
T159	14319	52	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1304	0	0
T77	11919	3	0	0
T88	2537	7	0	0
T89	4301	6	0	0
T99	104345	151	0	0
T103	16415	38	0	0
T126	10170	28	0	0
T151	17584	27	0	0
T157	7386	11	0	0
T158	19932	84	0	0
T159	14319	63	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1294	0	0
T77	11919	18	0	0
T88	2537	1	0	0
T89	4301	11	0	0
T99	104345	170	0	0
T103	16415	21	0	0
T126	10170	25	0	0
T151	17584	30	0	0
T157	7386	1	0	0
T158	19932	31	0	0
T159	14319	32	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1333	0	0
T77	11919	30	0	0
T88	2537	6	0	0
T89	4301	10	0	0
T99	104345	178	0	0
T101	32106	72	0	0
T103	16415	33	0	0
T126	10170	19	0	0
T158	19932	75	0	0
T159	14319	45	0	0
T160	13696	26	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1326	0	0
T77	11919	25	0	0
T88	2537	8	0	0
T89	4301	12	0	0
T99	104345	179	0	0
T103	16415	42	0	0
T126	10170	15	0	0
T151	17584	23	0	0
T157	7386	12	0	0
T158	19932	41	0	0
T159	14319	33	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1989	0	0
T77	11919	25	0	0
T88	2537	5	0	0
T89	4301	12	0	0
T99	104345	315	0	0
T103	16415	50	0	0
T126	10170	24	0	0
T151	17584	6	0	0
T157	7386	32	0	0
T158	19932	58	0	0
T159	14319	47	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	4019	0	0
T17	453752	26	0	0
T21	0	44	0	0
T65	0	76	0	0
T145	0	32	0	0
T155	11500	0	0	0
T161	0	12	0	0
T162	0	34	0	0
T163	0	7	0	0
T164	0	67	0	0
T165	0	16	0	0
T166	0	20	0	0
T167	1793	0	0	0
T168	1328	0	0	0
T169	1841	0	0	0
T170	1479	0	0	0
T171	145318	0	0	0
T172	60476	0	0	0
T173	543214	0	0	0
T174	32348	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1306	0	0
T77	11919	11	0	0
T88	2537	5	0	0
T89	4301	2	0	0
T99	104345	155	0	0
T103	16415	6	0	0
T126	10170	14	0	0
T151	17584	39	0	0
T157	7386	7	0	0
T158	19932	55	0	0
T159	14319	58	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1379	0	0
T77	11919	25	0	0
T88	2537	6	0	0
T89	4301	15	0	0
T99	104345	166	0	0
T103	16415	40	0	0
T126	10170	30	0	0
T151	17584	30	0	0
T157	7386	6	0	0
T158	19932	91	0	0
T159	14319	72	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1065	0	0
T77	11919	19	0	0
T88	2537	5	0	0
T89	4301	19	0	0
T99	104345	117	0	0
T103	16415	21	0	0
T126	10170	13	0	0
T151	17584	8	0	0
T157	7386	32	0	0
T158	19932	74	0	0
T159	14319	108	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1015	0	0
T77	11919	8	0	0
T88	2537	6	0	0
T89	4301	8	0	0
T99	104345	131	0	0
T103	16415	28	0	0
T126	10170	9	0	0
T151	17584	28	0	0
T157	7386	16	0	0
T158	19932	91	0	0
T159	14319	31	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	989	0	0
T77	11919	14	0	0
T88	2537	3	0	0
T89	4301	14	0	0
T99	104345	110	0	0
T103	16415	24	0	0
T126	10170	9	0	0
T151	17584	27	0	0
T157	7386	4	0	0
T158	19932	14	0	0
T159	14319	33	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	954	0	0
T77	11919	17	0	0
T88	2537	9	0	0
T89	4301	15	0	0
T99	104345	95	0	0
T103	16415	12	0	0
T126	10170	6	0	0
T151	17584	15	0	0
T157	7386	29	0	0
T158	19932	49	0	0
T159	14319	38	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1816	0	0
T77	11919	38	0	0
T89	4301	14	0	0
T99	104345	312	0	0
T103	16415	41	0	0
T126	10170	28	0	0
T151	17584	15	0	0
T157	7386	25	0	0
T158	19932	62	0	0
T159	14319	22	0	0
T160	13696	44	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1077	0	0
T77	11919	22	0	0
T89	4301	19	0	0
T99	104345	100	0	0
T103	16415	27	0	0
T126	10170	6	0	0
T151	17584	34	0	0
T157	7386	15	0	0
T158	19932	97	0	0
T159	14319	77	0	0
T160	13696	41	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	2107	0	0
T77	11919	8	0	0
T88	2537	8	0	0
T89	4301	8	0	0
T99	104345	360	0	0
T103	16415	33	0	0
T126	10170	24	0	0
T151	17584	22	0	0
T157	7386	23	0	0
T158	19932	80	0	0
T159	14319	29	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1275	0	0
T77	11919	29	0	0
T88	2537	1	0	0
T89	4301	11	0	0
T99	104345	155	0	0
T103	16415	29	0	0
T126	10170	21	0	0
T151	17584	34	0	0
T157	7386	36	0	0
T158	19932	92	0	0
T159	14319	106	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1035	0	0
T77	11919	6	0	0
T89	4301	10	0	0
T99	104345	134	0	0
T103	16415	28	0	0
T126	10170	12	0	0
T151	17584	46	0	0
T157	7386	12	0	0
T158	19932	84	0	0
T159	14319	60	0	0
T160	13696	21	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1037	0	0
T77	11919	3	0	0
T89	4301	3	0	0
T99	104345	112	0	0
T103	16415	18	0	0
T126	10170	14	0	0
T151	17584	33	0	0
T157	7386	38	0	0
T158	19932	72	0	0
T159	14319	84	0	0
T160	13696	33	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	943	0	0
T77	11919	13	0	0
T88	2537	7	0	0
T89	4301	2	0	0
T99	104345	125	0	0
T103	16415	26	0	0
T126	10170	12	0	0
T151	17584	24	0	0
T157	7386	2	0	0
T158	19932	88	0	0
T159	14319	54	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1026	0	0
T77	11919	17	0	0
T88	2537	4	0	0
T89	4301	7	0	0
T99	104345	140	0	0
T103	16415	18	0	0
T126	10170	15	0	0
T151	17584	31	0	0
T157	7386	54	0	0
T158	19932	39	0	0
T159	14319	29	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	867	0	0
T77	11919	14	0	0
T88	2537	4	0	0
T89	4301	8	0	0
T99	104345	117	0	0
T103	16415	11	0	0
T126	10170	15	0	0
T151	17584	17	0	0
T157	7386	33	0	0
T158	19932	55	0	0
T159	14319	58	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	368840212	1000	0	0
T77	11919	7	0	0
T88	2537	5	0	0
T89	4301	2	0	0
T99	104345	116	0	0
T103	16415	16	0	0
T126	10170	9	0	0
T151	17584	57	0	0
T157	7386	38	0	0
T158	19932	53	0	0
T159	14319	47	0	0