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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.03 98.38 93.99 98.62 89.36 97.21 95.45 99.20


Total test records in report: 1080
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T821 /workspace/coverage/default/23.spi_device_intercept.2259347921 Jun 23 05:50:45 PM PDT 24 Jun 23 05:50:48 PM PDT 24 31935197 ps
T822 /workspace/coverage/default/48.spi_device_upload.1081126631 Jun 23 05:51:58 PM PDT 24 Jun 23 05:52:06 PM PDT 24 1510327139 ps
T823 /workspace/coverage/default/9.spi_device_tpm_read_hw_reg.3767511182 Jun 23 05:49:58 PM PDT 24 Jun 23 05:50:13 PM PDT 24 4062383406 ps
T824 /workspace/coverage/default/7.spi_device_cfg_cmd.3822229515 Jun 23 05:49:58 PM PDT 24 Jun 23 05:50:02 PM PDT 24 154011047 ps
T288 /workspace/coverage/default/30.spi_device_flash_and_tpm_min_idle.1485865402 Jun 23 05:51:07 PM PDT 24 Jun 23 05:58:24 PM PDT 24 105710326122 ps
T825 /workspace/coverage/default/25.spi_device_read_buffer_direct.2088408656 Jun 23 05:50:51 PM PDT 24 Jun 23 05:50:56 PM PDT 24 169125433 ps
T826 /workspace/coverage/default/21.spi_device_upload.495616582 Jun 23 05:50:38 PM PDT 24 Jun 23 05:50:47 PM PDT 24 7061491584 ps
T827 /workspace/coverage/default/34.spi_device_tpm_rw.36195940 Jun 23 05:51:14 PM PDT 24 Jun 23 05:51:15 PM PDT 24 20294681 ps
T828 /workspace/coverage/default/34.spi_device_pass_addr_payload_swap.2195696270 Jun 23 05:51:26 PM PDT 24 Jun 23 05:51:37 PM PDT 24 11188766497 ps
T829 /workspace/coverage/default/25.spi_device_upload.1923584601 Jun 23 05:50:50 PM PDT 24 Jun 23 05:51:01 PM PDT 24 3459099051 ps
T291 /workspace/coverage/default/47.spi_device_stress_all.2226922947 Jun 23 05:52:12 PM PDT 24 Jun 23 05:53:30 PM PDT 24 3844911387 ps
T830 /workspace/coverage/default/34.spi_device_intercept.485069082 Jun 23 05:51:19 PM PDT 24 Jun 23 05:51:43 PM PDT 24 2553090949 ps
T52 /workspace/coverage/default/15.spi_device_flash_and_tpm_min_idle.3260879488 Jun 23 05:50:24 PM PDT 24 Jun 23 05:51:58 PM PDT 24 24479337346 ps
T831 /workspace/coverage/default/27.spi_device_flash_all.2503765434 Jun 23 05:50:52 PM PDT 24 Jun 23 05:55:03 PM PDT 24 63197031437 ps
T292 /workspace/coverage/default/22.spi_device_flash_and_tpm_min_idle.3339883556 Jun 23 05:50:41 PM PDT 24 Jun 23 06:00:45 PM PDT 24 70931246511 ps
T832 /workspace/coverage/default/0.spi_device_pass_addr_payload_swap.3076626756 Jun 23 05:49:44 PM PDT 24 Jun 23 05:49:55 PM PDT 24 672996536 ps
T833 /workspace/coverage/default/45.spi_device_tpm_sts_read.2251347533 Jun 23 05:51:50 PM PDT 24 Jun 23 05:51:52 PM PDT 24 239676393 ps
T834 /workspace/coverage/default/16.spi_device_read_buffer_direct.3085717101 Jun 23 05:50:21 PM PDT 24 Jun 23 05:50:28 PM PDT 24 644189492 ps
T835 /workspace/coverage/default/1.spi_device_pass_cmd_filtering.3598105150 Jun 23 05:49:55 PM PDT 24 Jun 23 05:50:15 PM PDT 24 27119837857 ps
T836 /workspace/coverage/default/45.spi_device_flash_mode.1323631167 Jun 23 05:51:48 PM PDT 24 Jun 23 05:51:55 PM PDT 24 169394316 ps
T837 /workspace/coverage/default/47.spi_device_csb_read.2439038285 Jun 23 05:51:57 PM PDT 24 Jun 23 05:51:58 PM PDT 24 29845515 ps
T838 /workspace/coverage/default/32.spi_device_tpm_sts_read.492009156 Jun 23 05:51:08 PM PDT 24 Jun 23 05:51:10 PM PDT 24 375492117 ps
T839 /workspace/coverage/default/26.spi_device_tpm_all.893095921 Jun 23 05:50:52 PM PDT 24 Jun 23 05:51:42 PM PDT 24 9537248664 ps
T840 /workspace/coverage/default/48.spi_device_read_buffer_direct.1236272906 Jun 23 05:51:59 PM PDT 24 Jun 23 05:52:05 PM PDT 24 1023115828 ps
T841 /workspace/coverage/default/26.spi_device_flash_all.3317078780 Jun 23 05:50:51 PM PDT 24 Jun 23 05:50:52 PM PDT 24 76058549 ps
T842 /workspace/coverage/default/44.spi_device_flash_and_tpm.1630159840 Jun 23 05:51:46 PM PDT 24 Jun 23 05:51:49 PM PDT 24 171378855 ps
T843 /workspace/coverage/default/30.spi_device_alert_test.895297048 Jun 23 05:51:08 PM PDT 24 Jun 23 05:51:09 PM PDT 24 42410110 ps
T289 /workspace/coverage/default/8.spi_device_flash_all.2132140885 Jun 23 05:50:01 PM PDT 24 Jun 23 05:51:39 PM PDT 24 39332017856 ps
T844 /workspace/coverage/default/11.spi_device_pass_cmd_filtering.2682949135 Jun 23 05:50:05 PM PDT 24 Jun 23 05:50:16 PM PDT 24 3904564603 ps
T280 /workspace/coverage/default/20.spi_device_stress_all.2978884383 Jun 23 05:50:39 PM PDT 24 Jun 23 06:04:50 PM PDT 24 523867036041 ps
T845 /workspace/coverage/default/41.spi_device_flash_all.2643014566 Jun 23 05:51:40 PM PDT 24 Jun 23 05:52:05 PM PDT 24 7138509033 ps
T846 /workspace/coverage/default/2.spi_device_pass_cmd_filtering.1523196498 Jun 23 05:49:46 PM PDT 24 Jun 23 05:50:05 PM PDT 24 60466373756 ps
T847 /workspace/coverage/default/19.spi_device_flash_and_tpm_min_idle.566363468 Jun 23 05:50:30 PM PDT 24 Jun 23 05:51:24 PM PDT 24 2469450868 ps
T848 /workspace/coverage/default/14.spi_device_pass_addr_payload_swap.2630840406 Jun 23 05:50:18 PM PDT 24 Jun 23 05:50:26 PM PDT 24 22748612538 ps
T849 /workspace/coverage/default/34.spi_device_read_buffer_direct.233991204 Jun 23 05:51:20 PM PDT 24 Jun 23 05:51:33 PM PDT 24 1015133973 ps
T850 /workspace/coverage/default/11.spi_device_flash_and_tpm.3320049526 Jun 23 05:50:11 PM PDT 24 Jun 23 05:53:24 PM PDT 24 17726070933 ps
T851 /workspace/coverage/default/11.spi_device_tpm_sts_read.430054524 Jun 23 05:50:07 PM PDT 24 Jun 23 05:50:08 PM PDT 24 17488861 ps
T852 /workspace/coverage/default/12.spi_device_csb_read.3608369652 Jun 23 05:50:14 PM PDT 24 Jun 23 05:50:15 PM PDT 24 16820147 ps
T853 /workspace/coverage/default/45.spi_device_intercept.3400189312 Jun 23 05:51:55 PM PDT 24 Jun 23 05:52:11 PM PDT 24 8428740422 ps
T854 /workspace/coverage/default/5.spi_device_tpm_all.3784354820 Jun 23 05:49:50 PM PDT 24 Jun 23 05:50:16 PM PDT 24 28685250942 ps
T855 /workspace/coverage/default/1.spi_device_flash_all.1511865782 Jun 23 05:49:45 PM PDT 24 Jun 23 05:51:52 PM PDT 24 62034760355 ps
T856 /workspace/coverage/default/43.spi_device_pass_cmd_filtering.3093767465 Jun 23 05:51:43 PM PDT 24 Jun 23 05:51:52 PM PDT 24 4172283404 ps
T857 /workspace/coverage/default/29.spi_device_alert_test.1421743944 Jun 23 05:51:04 PM PDT 24 Jun 23 05:51:05 PM PDT 24 188486682 ps
T858 /workspace/coverage/default/35.spi_device_csb_read.3693636283 Jun 23 05:51:18 PM PDT 24 Jun 23 05:51:19 PM PDT 24 19207485 ps
T859 /workspace/coverage/default/8.spi_device_intercept.4035220273 Jun 23 05:49:58 PM PDT 24 Jun 23 05:50:06 PM PDT 24 1241776795 ps
T860 /workspace/coverage/default/5.spi_device_pass_cmd_filtering.1836072327 Jun 23 05:49:50 PM PDT 24 Jun 23 05:49:54 PM PDT 24 1256198216 ps
T861 /workspace/coverage/default/49.spi_device_csb_read.1890121508 Jun 23 05:52:01 PM PDT 24 Jun 23 05:52:02 PM PDT 24 15861322 ps
T862 /workspace/coverage/default/31.spi_device_tpm_read_hw_reg.488430513 Jun 23 05:51:16 PM PDT 24 Jun 23 05:51:20 PM PDT 24 754996696 ps
T863 /workspace/coverage/default/16.spi_device_csb_read.98504167 Jun 23 05:50:21 PM PDT 24 Jun 23 05:50:22 PM PDT 24 58044951 ps
T864 /workspace/coverage/default/31.spi_device_pass_cmd_filtering.925151915 Jun 23 05:51:10 PM PDT 24 Jun 23 05:51:21 PM PDT 24 5031420970 ps
T865 /workspace/coverage/default/14.spi_device_tpm_rw.2309182565 Jun 23 05:50:18 PM PDT 24 Jun 23 05:50:21 PM PDT 24 239542773 ps
T866 /workspace/coverage/default/45.spi_device_tpm_all.3623019546 Jun 23 05:51:44 PM PDT 24 Jun 23 05:51:51 PM PDT 24 528177524 ps
T867 /workspace/coverage/default/33.spi_device_tpm_read_hw_reg.2974441834 Jun 23 05:51:22 PM PDT 24 Jun 23 05:51:34 PM PDT 24 40241858421 ps
T868 /workspace/coverage/default/14.spi_device_flash_and_tpm.824358314 Jun 23 05:50:22 PM PDT 24 Jun 23 05:53:04 PM PDT 24 29041121718 ps
T869 /workspace/coverage/default/46.spi_device_tpm_sts_read.1662588208 Jun 23 05:51:56 PM PDT 24 Jun 23 05:51:57 PM PDT 24 63594136 ps
T870 /workspace/coverage/default/1.spi_device_read_buffer_direct.1307473308 Jun 23 05:49:45 PM PDT 24 Jun 23 05:49:55 PM PDT 24 2066856375 ps
T871 /workspace/coverage/default/38.spi_device_tpm_rw.503385115 Jun 23 05:51:24 PM PDT 24 Jun 23 05:51:26 PM PDT 24 65034280 ps
T872 /workspace/coverage/default/38.spi_device_cfg_cmd.1212221045 Jun 23 05:51:26 PM PDT 24 Jun 23 05:51:45 PM PDT 24 7942892342 ps
T873 /workspace/coverage/default/6.spi_device_tpm_read_hw_reg.3995436907 Jun 23 05:49:52 PM PDT 24 Jun 23 05:49:55 PM PDT 24 156132528 ps
T874 /workspace/coverage/default/17.spi_device_tpm_all.3902029740 Jun 23 05:50:27 PM PDT 24 Jun 23 05:51:21 PM PDT 24 10414000401 ps
T875 /workspace/coverage/default/28.spi_device_tpm_sts_read.2703671919 Jun 23 05:50:59 PM PDT 24 Jun 23 05:51:01 PM PDT 24 46318704 ps
T876 /workspace/coverage/default/24.spi_device_pass_addr_payload_swap.835269862 Jun 23 05:50:48 PM PDT 24 Jun 23 05:50:57 PM PDT 24 2291763465 ps
T877 /workspace/coverage/default/36.spi_device_flash_mode.1710612631 Jun 23 05:51:25 PM PDT 24 Jun 23 05:51:39 PM PDT 24 960722117 ps
T878 /workspace/coverage/default/38.spi_device_read_buffer_direct.4111878175 Jun 23 05:51:36 PM PDT 24 Jun 23 05:51:48 PM PDT 24 3629297947 ps
T879 /workspace/coverage/default/10.spi_device_tpm_read_hw_reg.2843553450 Jun 23 05:50:04 PM PDT 24 Jun 23 05:50:20 PM PDT 24 4217200485 ps
T880 /workspace/coverage/default/47.spi_device_tpm_rw.1968890881 Jun 23 05:51:58 PM PDT 24 Jun 23 05:52:01 PM PDT 24 414702628 ps
T881 /workspace/coverage/default/20.spi_device_mailbox.2043414930 Jun 23 05:50:41 PM PDT 24 Jun 23 05:50:45 PM PDT 24 74281072 ps
T882 /workspace/coverage/default/38.spi_device_flash_and_tpm_min_idle.2121172057 Jun 23 05:51:32 PM PDT 24 Jun 23 05:55:28 PM PDT 24 75233207834 ps
T883 /workspace/coverage/default/40.spi_device_tpm_rw.1091319232 Jun 23 05:51:48 PM PDT 24 Jun 23 05:51:50 PM PDT 24 80384238 ps
T884 /workspace/coverage/default/49.spi_device_mailbox.510395271 Jun 23 05:52:04 PM PDT 24 Jun 23 05:52:06 PM PDT 24 91688741 ps
T885 /workspace/coverage/default/2.spi_device_csb_read.1853311952 Jun 23 05:49:45 PM PDT 24 Jun 23 05:49:46 PM PDT 24 138618775 ps
T886 /workspace/coverage/default/2.spi_device_stress_all.1655877544 Jun 23 05:49:54 PM PDT 24 Jun 23 05:50:48 PM PDT 24 11686222153 ps
T887 /workspace/coverage/default/34.spi_device_mailbox.3770311799 Jun 23 05:51:24 PM PDT 24 Jun 23 05:51:53 PM PDT 24 3509702690 ps
T888 /workspace/coverage/default/36.spi_device_tpm_rw.1965832664 Jun 23 05:51:25 PM PDT 24 Jun 23 05:51:27 PM PDT 24 102306725 ps
T889 /workspace/coverage/default/5.spi_device_intercept.378607633 Jun 23 05:49:50 PM PDT 24 Jun 23 05:49:57 PM PDT 24 360715251 ps
T197 /workspace/coverage/default/29.spi_device_mailbox.3411070625 Jun 23 05:51:03 PM PDT 24 Jun 23 05:51:37 PM PDT 24 6434498151 ps
T890 /workspace/coverage/default/33.spi_device_pass_addr_payload_swap.20953257 Jun 23 05:51:17 PM PDT 24 Jun 23 05:51:20 PM PDT 24 91740462 ps
T891 /workspace/coverage/default/6.spi_device_alert_test.885547176 Jun 23 05:49:54 PM PDT 24 Jun 23 05:49:56 PM PDT 24 48715637 ps
T296 /workspace/coverage/default/37.spi_device_pass_addr_payload_swap.420887240 Jun 23 05:51:28 PM PDT 24 Jun 23 05:51:39 PM PDT 24 1617795167 ps
T892 /workspace/coverage/default/20.spi_device_tpm_rw.3627410712 Jun 23 05:50:46 PM PDT 24 Jun 23 05:50:49 PM PDT 24 17961157 ps
T893 /workspace/coverage/default/10.spi_device_alert_test.1679071987 Jun 23 05:50:09 PM PDT 24 Jun 23 05:50:11 PM PDT 24 38036056 ps
T894 /workspace/coverage/default/5.spi_device_alert_test.3706847626 Jun 23 05:49:59 PM PDT 24 Jun 23 05:50:00 PM PDT 24 33313470 ps
T895 /workspace/coverage/default/26.spi_device_upload.2604649975 Jun 23 05:50:51 PM PDT 24 Jun 23 05:51:02 PM PDT 24 14492970964 ps
T299 /workspace/coverage/default/46.spi_device_stress_all.3892783735 Jun 23 05:52:09 PM PDT 24 Jun 23 05:53:53 PM PDT 24 9040902878 ps
T896 /workspace/coverage/default/6.spi_device_mailbox.1314880211 Jun 23 05:49:57 PM PDT 24 Jun 23 05:51:29 PM PDT 24 101772958565 ps
T897 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.3055227178 Jun 23 05:51:46 PM PDT 24 Jun 23 05:51:55 PM PDT 24 3128505909 ps
T898 /workspace/coverage/default/12.spi_device_flash_all.3965046094 Jun 23 05:50:17 PM PDT 24 Jun 23 05:51:25 PM PDT 24 6237079451 ps
T899 /workspace/coverage/default/43.spi_device_flash_and_tpm.754552668 Jun 23 05:51:53 PM PDT 24 Jun 23 05:55:47 PM PDT 24 30572623661 ps
T900 /workspace/coverage/default/35.spi_device_read_buffer_direct.2395646817 Jun 23 05:51:24 PM PDT 24 Jun 23 05:51:39 PM PDT 24 1154160439 ps
T901 /workspace/coverage/default/39.spi_device_tpm_all.213649374 Jun 23 05:51:43 PM PDT 24 Jun 23 05:52:00 PM PDT 24 1720742978 ps
T902 /workspace/coverage/default/14.spi_device_tpm_all.2776398349 Jun 23 05:50:16 PM PDT 24 Jun 23 05:50:38 PM PDT 24 13366845568 ps
T903 /workspace/coverage/default/21.spi_device_flash_mode.1152246570 Jun 23 05:50:39 PM PDT 24 Jun 23 05:50:47 PM PDT 24 2026822907 ps
T904 /workspace/coverage/default/9.spi_device_alert_test.36999839 Jun 23 05:50:03 PM PDT 24 Jun 23 05:50:05 PM PDT 24 14427439 ps
T905 /workspace/coverage/default/22.spi_device_flash_and_tpm.616720489 Jun 23 05:50:39 PM PDT 24 Jun 23 05:52:34 PM PDT 24 27102471804 ps
T279 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.611097734 Jun 23 05:49:52 PM PDT 24 Jun 23 05:54:59 PM PDT 24 119883101835 ps
T906 /workspace/coverage/default/7.spi_device_tpm_all.2672859774 Jun 23 05:49:54 PM PDT 24 Jun 23 05:50:17 PM PDT 24 2497692611 ps
T907 /workspace/coverage/default/28.spi_device_pass_cmd_filtering.1364035100 Jun 23 05:51:05 PM PDT 24 Jun 23 05:51:15 PM PDT 24 3576565691 ps
T253 /workspace/coverage/default/0.spi_device_stress_all.3400552644 Jun 23 05:49:38 PM PDT 24 Jun 23 05:54:12 PM PDT 24 163359258643 ps
T908 /workspace/coverage/default/29.spi_device_flash_and_tpm.733353826 Jun 23 05:51:05 PM PDT 24 Jun 23 05:56:40 PM PDT 24 42753839747 ps
T909 /workspace/coverage/default/3.spi_device_intercept.2872701062 Jun 23 05:49:45 PM PDT 24 Jun 23 05:49:57 PM PDT 24 1033249229 ps
T910 /workspace/coverage/default/3.spi_device_mailbox.2045946542 Jun 23 05:49:50 PM PDT 24 Jun 23 05:49:53 PM PDT 24 392413202 ps
T277 /workspace/coverage/default/45.spi_device_flash_and_tpm.3145532585 Jun 23 05:51:51 PM PDT 24 Jun 23 05:57:38 PM PDT 24 37566105699 ps
T911 /workspace/coverage/default/31.spi_device_flash_mode.3116480089 Jun 23 05:51:12 PM PDT 24 Jun 23 05:52:33 PM PDT 24 5418422005 ps
T912 /workspace/coverage/default/48.spi_device_tpm_all.3178055949 Jun 23 05:52:01 PM PDT 24 Jun 23 05:52:11 PM PDT 24 2562839161 ps
T913 /workspace/coverage/default/3.spi_device_cfg_cmd.1772513519 Jun 23 05:49:50 PM PDT 24 Jun 23 05:50:05 PM PDT 24 2609779153 ps
T914 /workspace/coverage/default/40.spi_device_read_buffer_direct.2619352570 Jun 23 05:51:38 PM PDT 24 Jun 23 05:51:47 PM PDT 24 1985211724 ps
T915 /workspace/coverage/default/29.spi_device_csb_read.3835229760 Jun 23 05:51:01 PM PDT 24 Jun 23 05:51:03 PM PDT 24 40521208 ps
T916 /workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.3956240710 Jun 23 05:50:22 PM PDT 24 Jun 23 05:56:11 PM PDT 24 157401474188 ps
T917 /workspace/coverage/default/15.spi_device_mailbox.2786668578 Jun 23 05:50:23 PM PDT 24 Jun 23 05:50:26 PM PDT 24 918518236 ps
T918 /workspace/coverage/default/32.spi_device_tpm_rw.1127498998 Jun 23 05:51:12 PM PDT 24 Jun 23 05:51:14 PM PDT 24 18579749 ps
T919 /workspace/coverage/default/49.spi_device_tpm_all.156767986 Jun 23 05:52:03 PM PDT 24 Jun 23 05:52:10 PM PDT 24 1798914854 ps
T920 /workspace/coverage/default/48.spi_device_pass_cmd_filtering.3340250462 Jun 23 05:51:59 PM PDT 24 Jun 23 05:52:01 PM PDT 24 525595830 ps
T921 /workspace/coverage/default/0.spi_device_tpm_all.4218676136 Jun 23 05:49:37 PM PDT 24 Jun 23 05:49:55 PM PDT 24 4493340011 ps
T286 /workspace/coverage/default/34.spi_device_flash_all.33096501 Jun 23 05:51:23 PM PDT 24 Jun 23 05:57:54 PM PDT 24 203501686244 ps
T922 /workspace/coverage/default/16.spi_device_tpm_all.753056026 Jun 23 05:50:23 PM PDT 24 Jun 23 05:50:55 PM PDT 24 2900773537 ps
T923 /workspace/coverage/default/15.spi_device_tpm_all.1729557050 Jun 23 05:50:25 PM PDT 24 Jun 23 05:50:46 PM PDT 24 4458588688 ps
T924 /workspace/coverage/default/16.spi_device_pass_cmd_filtering.284380670 Jun 23 05:50:29 PM PDT 24 Jun 23 05:50:39 PM PDT 24 1707997620 ps
T925 /workspace/coverage/default/17.spi_device_alert_test.801892917 Jun 23 05:50:35 PM PDT 24 Jun 23 05:50:36 PM PDT 24 26088050 ps
T72 /workspace/coverage/default/1.spi_device_sec_cm.4065343459 Jun 23 05:49:44 PM PDT 24 Jun 23 05:49:45 PM PDT 24 715369854 ps
T926 /workspace/coverage/default/28.spi_device_tpm_rw.764173585 Jun 23 05:51:00 PM PDT 24 Jun 23 05:51:03 PM PDT 24 83579232 ps
T293 /workspace/coverage/default/35.spi_device_pass_addr_payload_swap.491877892 Jun 23 05:51:22 PM PDT 24 Jun 23 05:51:35 PM PDT 24 20757219339 ps
T281 /workspace/coverage/default/1.spi_device_stress_all.3840007611 Jun 23 05:49:48 PM PDT 24 Jun 23 05:53:50 PM PDT 24 24969255776 ps
T927 /workspace/coverage/default/0.spi_device_tpm_sts_read.3609255700 Jun 23 05:49:42 PM PDT 24 Jun 23 05:49:44 PM PDT 24 17350866 ps
T928 /workspace/coverage/default/11.spi_device_mailbox.176722643 Jun 23 05:50:10 PM PDT 24 Jun 23 05:50:35 PM PDT 24 5321378682 ps
T929 /workspace/coverage/default/37.spi_device_intercept.1868396456 Jun 23 05:51:23 PM PDT 24 Jun 23 05:51:27 PM PDT 24 582360276 ps
T930 /workspace/coverage/default/22.spi_device_pass_addr_payload_swap.3373234410 Jun 23 05:50:44 PM PDT 24 Jun 23 05:50:51 PM PDT 24 813160217 ps
T931 /workspace/coverage/default/23.spi_device_pass_cmd_filtering.4207970038 Jun 23 05:50:45 PM PDT 24 Jun 23 05:50:58 PM PDT 24 4839554068 ps
T932 /workspace/coverage/default/26.spi_device_tpm_read_hw_reg.3233944032 Jun 23 05:50:51 PM PDT 24 Jun 23 05:50:57 PM PDT 24 2308299214 ps
T933 /workspace/coverage/default/39.spi_device_flash_all.2101543914 Jun 23 05:51:36 PM PDT 24 Jun 23 05:51:37 PM PDT 24 251593284 ps
T934 /workspace/coverage/default/27.spi_device_alert_test.3568806966 Jun 23 05:50:56 PM PDT 24 Jun 23 05:50:57 PM PDT 24 17264620 ps
T935 /workspace/coverage/default/2.spi_device_tpm_all.3502641182 Jun 23 05:49:45 PM PDT 24 Jun 23 05:50:21 PM PDT 24 12788658527 ps
T936 /workspace/coverage/default/45.spi_device_flash_all.840168170 Jun 23 05:51:57 PM PDT 24 Jun 23 05:52:31 PM PDT 24 9175562363 ps
T937 /workspace/coverage/default/16.spi_device_cfg_cmd.2908472206 Jun 23 05:50:29 PM PDT 24 Jun 23 05:50:39 PM PDT 24 2889617143 ps
T938 /workspace/coverage/default/42.spi_device_flash_mode.2321363403 Jun 23 05:51:41 PM PDT 24 Jun 23 05:51:47 PM PDT 24 556954248 ps
T157 /workspace/coverage/default/35.spi_device_stress_all.626490177 Jun 23 05:51:22 PM PDT 24 Jun 23 05:57:10 PM PDT 24 186416339535 ps
T939 /workspace/coverage/default/47.spi_device_read_buffer_direct.1356605597 Jun 23 05:51:57 PM PDT 24 Jun 23 05:52:02 PM PDT 24 821555313 ps
T940 /workspace/coverage/default/49.spi_device_flash_all.3744223516 Jun 23 05:52:02 PM PDT 24 Jun 23 05:52:27 PM PDT 24 1843767207 ps
T941 /workspace/coverage/default/37.spi_device_flash_and_tpm_min_idle.1481044069 Jun 23 05:51:24 PM PDT 24 Jun 23 05:53:26 PM PDT 24 46977916810 ps
T942 /workspace/coverage/default/47.spi_device_tpm_read_hw_reg.2623418824 Jun 23 05:51:58 PM PDT 24 Jun 23 05:52:11 PM PDT 24 12303662209 ps
T943 /workspace/coverage/default/18.spi_device_mailbox.2112847268 Jun 23 05:50:39 PM PDT 24 Jun 23 05:52:01 PM PDT 24 10295250141 ps
T944 /workspace/coverage/default/7.spi_device_stress_all.1733543944 Jun 23 05:49:57 PM PDT 24 Jun 23 05:52:43 PM PDT 24 31114091225 ps
T945 /workspace/coverage/default/33.spi_device_stress_all.1403803129 Jun 23 05:51:15 PM PDT 24 Jun 23 05:54:38 PM PDT 24 14577979548 ps
T946 /workspace/coverage/default/0.spi_device_flash_and_tpm.1692313264 Jun 23 05:49:43 PM PDT 24 Jun 23 05:58:11 PM PDT 24 50310140624 ps
T947 /workspace/coverage/default/34.spi_device_tpm_all.2860228546 Jun 23 05:51:17 PM PDT 24 Jun 23 05:51:48 PM PDT 24 1978950498 ps
T948 /workspace/coverage/default/11.spi_device_flash_mode.2752021664 Jun 23 05:50:05 PM PDT 24 Jun 23 05:50:10 PM PDT 24 122296265 ps
T949 /workspace/coverage/default/11.spi_device_upload.1647696620 Jun 23 05:50:11 PM PDT 24 Jun 23 05:50:20 PM PDT 24 299113742 ps
T950 /workspace/coverage/default/36.spi_device_alert_test.2211930957 Jun 23 05:51:26 PM PDT 24 Jun 23 05:51:28 PM PDT 24 41037588 ps
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T283 /workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.3733823832 Jun 23 05:51:20 PM PDT 24 Jun 23 05:52:59 PM PDT 24 7034802114 ps
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T274 /workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.686549540 Jun 23 05:50:26 PM PDT 24 Jun 23 05:51:24 PM PDT 24 3674604105 ps
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T64 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3058368761 Jun 23 05:14:30 PM PDT 24 Jun 23 05:14:32 PM PDT 24 27818895 ps
T957 /workspace/coverage/cover_reg_top/33.spi_device_intr_test.441655569 Jun 23 05:14:33 PM PDT 24 Jun 23 05:14:34 PM PDT 24 56371800 ps
T65 /workspace/coverage/cover_reg_top/0.spi_device_tl_errors.327259402 Jun 23 05:13:42 PM PDT 24 Jun 23 05:13:46 PM PDT 24 431141745 ps
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T66 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.2474385646 Jun 23 05:13:58 PM PDT 24 Jun 23 05:14:01 PM PDT 24 324701488 ps
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T959 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2099294691 Jun 23 05:13:47 PM PDT 24 Jun 23 05:13:55 PM PDT 24 553193671 ps
T96 /workspace/coverage/cover_reg_top/16.spi_device_tl_errors.1098823779 Jun 23 05:14:21 PM PDT 24 Jun 23 05:14:25 PM PDT 24 359840673 ps
T960 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.3653263021 Jun 23 05:14:33 PM PDT 24 Jun 23 05:14:34 PM PDT 24 16337424 ps
T961 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.3094183260 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:29 PM PDT 24 11867838 ps
T962 /workspace/coverage/cover_reg_top/31.spi_device_intr_test.1232949975 Jun 23 05:14:33 PM PDT 24 Jun 23 05:14:34 PM PDT 24 17527492 ps
T115 /workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3576480233 Jun 23 05:13:46 PM PDT 24 Jun 23 05:13:49 PM PDT 24 36419456 ps
T110 /workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.3580568450 Jun 23 05:14:07 PM PDT 24 Jun 23 05:14:12 PM PDT 24 509242378 ps
T963 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.1326145488 Jun 23 05:13:45 PM PDT 24 Jun 23 05:13:46 PM PDT 24 52531931 ps
T964 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.2478157496 Jun 23 05:14:35 PM PDT 24 Jun 23 05:14:36 PM PDT 24 42758688 ps
T116 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1242644399 Jun 23 05:14:02 PM PDT 24 Jun 23 05:14:05 PM PDT 24 95158667 ps
T97 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.3490255161 Jun 23 05:14:08 PM PDT 24 Jun 23 05:14:29 PM PDT 24 6038020907 ps
T965 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.297274001 Jun 23 05:14:35 PM PDT 24 Jun 23 05:14:36 PM PDT 24 52303221 ps
T140 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2480647088 Jun 23 05:14:11 PM PDT 24 Jun 23 05:14:14 PM PDT 24 44077878 ps
T117 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.4028905637 Jun 23 05:13:59 PM PDT 24 Jun 23 05:14:01 PM PDT 24 140661431 ps
T101 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.414166412 Jun 23 05:13:49 PM PDT 24 Jun 23 05:13:52 PM PDT 24 311197241 ps
T141 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.3929302351 Jun 23 05:14:11 PM PDT 24 Jun 23 05:14:14 PM PDT 24 80418252 ps
T118 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.658254229 Jun 23 05:13:50 PM PDT 24 Jun 23 05:13:51 PM PDT 24 38645971 ps
T111 /workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.2440048263 Jun 23 05:14:08 PM PDT 24 Jun 23 05:14:12 PM PDT 24 273078409 ps
T98 /workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2312076707 Jun 23 05:13:48 PM PDT 24 Jun 23 05:14:06 PM PDT 24 7241289357 ps
T119 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.977841935 Jun 23 05:13:52 PM PDT 24 Jun 23 05:14:20 PM PDT 24 1632521987 ps
T147 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2915890245 Jun 23 05:13:52 PM PDT 24 Jun 23 05:14:18 PM PDT 24 7209828178 ps
T112 /workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.3209947826 Jun 23 05:14:24 PM PDT 24 Jun 23 05:14:27 PM PDT 24 485529018 ps
T966 /workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.4133181862 Jun 23 05:14:09 PM PDT 24 Jun 23 05:14:12 PM PDT 24 127592479 ps
T967 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.3318233072 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:30 PM PDT 24 42903596 ps
T102 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.1684202739 Jun 23 05:14:16 PM PDT 24 Jun 23 05:14:20 PM PDT 24 115758091 ps
T125 /workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.30954238 Jun 23 05:13:59 PM PDT 24 Jun 23 05:14:28 PM PDT 24 1801867809 ps
T99 /workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.730002731 Jun 23 05:14:02 PM PDT 24 Jun 23 05:14:17 PM PDT 24 679024597 ps
T104 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.205058352 Jun 23 05:14:09 PM PDT 24 Jun 23 05:14:13 PM PDT 24 96477798 ps
T968 /workspace/coverage/cover_reg_top/19.spi_device_csr_rw.892292528 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:30 PM PDT 24 20102497 ps
T969 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.3293697321 Jun 23 05:13:52 PM PDT 24 Jun 23 05:13:53 PM PDT 24 13826800 ps
T970 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.3854308127 Jun 23 05:14:10 PM PDT 24 Jun 23 05:14:12 PM PDT 24 45213054 ps
T971 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.3708675787 Jun 23 05:14:35 PM PDT 24 Jun 23 05:14:36 PM PDT 24 16483567 ps
T972 /workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.190557444 Jun 23 05:14:17 PM PDT 24 Jun 23 05:14:21 PM PDT 24 220057959 ps
T103 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1291606499 Jun 23 05:14:12 PM PDT 24 Jun 23 05:14:17 PM PDT 24 243107356 ps
T148 /workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1791598320 Jun 23 05:14:08 PM PDT 24 Jun 23 05:14:12 PM PDT 24 484815910 ps
T120 /workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1106503897 Jun 23 05:14:19 PM PDT 24 Jun 23 05:14:22 PM PDT 24 27889749 ps
T973 /workspace/coverage/cover_reg_top/45.spi_device_intr_test.3664146488 Jun 23 05:14:36 PM PDT 24 Jun 23 05:14:37 PM PDT 24 32289784 ps
T974 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2981016475 Jun 23 05:14:05 PM PDT 24 Jun 23 05:14:10 PM PDT 24 166648595 ps
T105 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.1166240862 Jun 23 05:13:52 PM PDT 24 Jun 23 05:13:57 PM PDT 24 583077092 ps
T975 /workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.896236090 Jun 23 05:14:17 PM PDT 24 Jun 23 05:14:22 PM PDT 24 69098063 ps
T976 /workspace/coverage/cover_reg_top/9.spi_device_intr_test.3149528073 Jun 23 05:14:09 PM PDT 24 Jun 23 05:14:11 PM PDT 24 54113368 ps
T977 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.1532970665 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:30 PM PDT 24 43962480 ps
T978 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2901038362 Jun 23 05:13:42 PM PDT 24 Jun 23 05:13:46 PM PDT 24 517604542 ps
T107 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.1063973262 Jun 23 05:14:07 PM PDT 24 Jun 23 05:14:11 PM PDT 24 45834973 ps
T173 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.2417882216 Jun 23 05:14:24 PM PDT 24 Jun 23 05:14:41 PM PDT 24 1243672170 ps
T149 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1170528875 Jun 23 05:13:47 PM PDT 24 Jun 23 05:13:49 PM PDT 24 68676134 ps
T121 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.1338538713 Jun 23 05:14:24 PM PDT 24 Jun 23 05:14:27 PM PDT 24 196117538 ps
T979 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.485946857 Jun 23 05:14:19 PM PDT 24 Jun 23 05:14:22 PM PDT 24 56699423 ps
T122 /workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.3004874041 Jun 23 05:13:53 PM PDT 24 Jun 23 05:14:03 PM PDT 24 2473987983 ps
T123 /workspace/coverage/cover_reg_top/14.spi_device_csr_rw.1217759406 Jun 23 05:14:22 PM PDT 24 Jun 23 05:14:25 PM PDT 24 79579416 ps
T106 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.4239229164 Jun 23 05:14:03 PM PDT 24 Jun 23 05:14:09 PM PDT 24 714142286 ps
T124 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.3580217186 Jun 23 05:14:17 PM PDT 24 Jun 23 05:14:19 PM PDT 24 36860305 ps
T980 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.837100396 Jun 23 05:13:59 PM PDT 24 Jun 23 05:14:03 PM PDT 24 190705336 ps
T981 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.3279924853 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:34 PM PDT 24 207125457 ps
T982 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.4016865550 Jun 23 05:14:30 PM PDT 24 Jun 23 05:14:31 PM PDT 24 57598247 ps
T126 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.4227107102 Jun 23 05:13:46 PM PDT 24 Jun 23 05:13:48 PM PDT 24 39578263 ps
T983 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.1398941433 Jun 23 05:14:22 PM PDT 24 Jun 23 05:14:23 PM PDT 24 23297101 ps
T174 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.665339737 Jun 23 05:13:45 PM PDT 24 Jun 23 05:13:58 PM PDT 24 786046332 ps
T984 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.3743313158 Jun 23 05:13:54 PM PDT 24 Jun 23 05:13:56 PM PDT 24 78343012 ps
T985 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.2531832834 Jun 23 05:14:14 PM PDT 24 Jun 23 05:14:18 PM PDT 24 123664243 ps
T171 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.196354655 Jun 23 05:14:13 PM PDT 24 Jun 23 05:14:19 PM PDT 24 402607771 ps
T109 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.731715327 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:33 PM PDT 24 402985473 ps
T82 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.3472806875 Jun 23 05:13:46 PM PDT 24 Jun 23 05:13:48 PM PDT 24 199595691 ps
T986 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.2389119727 Jun 23 05:14:21 PM PDT 24 Jun 23 05:14:25 PM PDT 24 153807751 ps
T987 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.3087928203 Jun 23 05:14:39 PM PDT 24 Jun 23 05:14:40 PM PDT 24 15223556 ps
T988 /workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2933858702 Jun 23 05:14:13 PM PDT 24 Jun 23 05:14:17 PM PDT 24 589562948 ps
T177 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.3236715521 Jun 23 05:13:53 PM PDT 24 Jun 23 05:14:09 PM PDT 24 2667363739 ps
T989 /workspace/coverage/cover_reg_top/43.spi_device_intr_test.3624788608 Jun 23 05:14:34 PM PDT 24 Jun 23 05:14:35 PM PDT 24 11212880 ps
T990 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.2885761126 Jun 23 05:14:29 PM PDT 24 Jun 23 05:14:31 PM PDT 24 31117805 ps
T991 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.2798201141 Jun 23 05:14:01 PM PDT 24 Jun 23 05:14:03 PM PDT 24 76301839 ps
T992 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1373337633 Jun 23 05:14:03 PM PDT 24 Jun 23 05:14:06 PM PDT 24 509143320 ps
T993 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.2017739341 Jun 23 05:13:48 PM PDT 24 Jun 23 05:13:49 PM PDT 24 18765258 ps
T994 /workspace/coverage/cover_reg_top/18.spi_device_intr_test.2270095533 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:30 PM PDT 24 108778760 ps
T995 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.2442087018 Jun 23 05:13:41 PM PDT 24 Jun 23 05:13:42 PM PDT 24 36100570 ps
T996 /workspace/coverage/cover_reg_top/15.spi_device_tl_errors.1018592388 Jun 23 05:14:22 PM PDT 24 Jun 23 05:14:27 PM PDT 24 569629498 ps
T997 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3634848347 Jun 23 05:14:15 PM PDT 24 Jun 23 05:14:17 PM PDT 24 79625171 ps
T998 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.554913030 Jun 23 05:14:18 PM PDT 24 Jun 23 05:14:27 PM PDT 24 1440604172 ps
T999 /workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.1333730653 Jun 23 05:14:29 PM PDT 24 Jun 23 05:14:39 PM PDT 24 1302697316 ps
T1000 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.110320016 Jun 23 05:14:28 PM PDT 24 Jun 23 05:14:30 PM PDT 24 40956867 ps
T1001 /workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.2727068281 Jun 23 05:13:45 PM PDT 24 Jun 23 05:13:47 PM PDT 24 17572586 ps
T1002 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3453379776 Jun 23 05:14:24 PM PDT 24 Jun 23 05:14:26 PM PDT 24 21503075 ps
T1003 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.1736996650 Jun 23 05:13:41 PM PDT 24 Jun 23 05:13:50 PM PDT 24 1046755132 ps
T172 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.1935960561 Jun 23 05:14:03 PM PDT 24 Jun 23 05:14:17 PM PDT 24 607685202 ps
T83 /workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.734811080 Jun 23 05:13:59 PM PDT 24 Jun 23 05:14:01 PM PDT 24 112017972 ps
T1004 /workspace/coverage/cover_reg_top/8.spi_device_intr_test.2856151921 Jun 23 05:14:08 PM PDT 24 Jun 23 05:14:09 PM PDT 24 14244228 ps
T1005 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2363920603 Jun 23 05:13:46 PM PDT 24 Jun 23 05:14:21 PM PDT 24 2614050134 ps
T1006 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.322724741 Jun 23 05:14:34 PM PDT 24 Jun 23 05:14:35 PM PDT 24 50574598 ps
T1007 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.4094086140 Jun 23 05:14:18 PM PDT 24 Jun 23 05:14:20 PM PDT 24 111267221 ps
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