Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
3520 |
0 |
0 |
T65 |
11033 |
114 |
0 |
0 |
T66 |
2020 |
48 |
0 |
0 |
T67 |
27715 |
3 |
0 |
0 |
T93 |
5352 |
13 |
0 |
0 |
T94 |
27763 |
2 |
0 |
0 |
T95 |
10103 |
1 |
0 |
0 |
T96 |
4464 |
3 |
0 |
0 |
T97 |
9927 |
115 |
0 |
0 |
T106 |
14283 |
5 |
0 |
0 |
T111 |
55380 |
4 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1429 |
0 |
0 |
T84 |
4839 |
7 |
0 |
0 |
T104 |
9346 |
2 |
0 |
0 |
T106 |
14283 |
29 |
0 |
0 |
T121 |
10101 |
9 |
0 |
0 |
T144 |
14376 |
56 |
0 |
0 |
T159 |
6365 |
26 |
0 |
0 |
T160 |
7595 |
17 |
0 |
0 |
T161 |
34814 |
53 |
0 |
0 |
T162 |
11332 |
19 |
0 |
0 |
T163 |
66805 |
67 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1466 |
0 |
0 |
T84 |
4839 |
15 |
0 |
0 |
T104 |
9346 |
8 |
0 |
0 |
T106 |
14283 |
20 |
0 |
0 |
T121 |
10101 |
2 |
0 |
0 |
T144 |
14376 |
35 |
0 |
0 |
T159 |
6365 |
28 |
0 |
0 |
T160 |
7595 |
17 |
0 |
0 |
T161 |
34814 |
38 |
0 |
0 |
T162 |
11332 |
12 |
0 |
0 |
T163 |
66805 |
72 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
2008 |
0 |
0 |
T84 |
4839 |
2 |
0 |
0 |
T104 |
9346 |
24 |
0 |
0 |
T106 |
14283 |
34 |
0 |
0 |
T121 |
10101 |
1 |
0 |
0 |
T144 |
14376 |
36 |
0 |
0 |
T159 |
6365 |
19 |
0 |
0 |
T160 |
7595 |
42 |
0 |
0 |
T161 |
34814 |
54 |
0 |
0 |
T162 |
11332 |
19 |
0 |
0 |
T163 |
66805 |
149 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
12974 |
0 |
0 |
T84 |
4839 |
10 |
0 |
0 |
T104 |
9346 |
52 |
0 |
0 |
T106 |
14283 |
130 |
0 |
0 |
T121 |
10101 |
122 |
0 |
0 |
T144 |
14376 |
48 |
0 |
0 |
T159 |
6365 |
24 |
0 |
0 |
T160 |
7595 |
36 |
0 |
0 |
T161 |
34814 |
476 |
0 |
0 |
T162 |
11332 |
304 |
0 |
0 |
T163 |
66805 |
1681 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
12291 |
0 |
0 |
T84 |
4839 |
11 |
0 |
0 |
T104 |
9346 |
7 |
0 |
0 |
T106 |
14283 |
292 |
0 |
0 |
T121 |
10101 |
65 |
0 |
0 |
T144 |
14376 |
49 |
0 |
0 |
T160 |
7595 |
17 |
0 |
0 |
T161 |
34814 |
359 |
0 |
0 |
T162 |
11332 |
349 |
0 |
0 |
T163 |
66805 |
1125 |
0 |
0 |
T164 |
108844 |
1607 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
10954 |
0 |
0 |
T84 |
4839 |
20 |
0 |
0 |
T106 |
14283 |
141 |
0 |
0 |
T121 |
10101 |
78 |
0 |
0 |
T144 |
14376 |
57 |
0 |
0 |
T159 |
6365 |
10 |
0 |
0 |
T161 |
34814 |
488 |
0 |
0 |
T162 |
11332 |
143 |
0 |
0 |
T163 |
66805 |
768 |
0 |
0 |
T164 |
108844 |
1761 |
0 |
0 |
T165 |
5065 |
6 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
13830 |
0 |
0 |
T84 |
4839 |
19 |
0 |
0 |
T104 |
9346 |
142 |
0 |
0 |
T106 |
14283 |
225 |
0 |
0 |
T121 |
10101 |
168 |
0 |
0 |
T144 |
14376 |
31 |
0 |
0 |
T159 |
6365 |
13 |
0 |
0 |
T160 |
7595 |
48 |
0 |
0 |
T161 |
34814 |
743 |
0 |
0 |
T162 |
11332 |
140 |
0 |
0 |
T163 |
66805 |
1713 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
10991 |
0 |
0 |
T84 |
4839 |
12 |
0 |
0 |
T104 |
9346 |
12 |
0 |
0 |
T106 |
14283 |
155 |
0 |
0 |
T121 |
10101 |
133 |
0 |
0 |
T144 |
14376 |
68 |
0 |
0 |
T159 |
6365 |
13 |
0 |
0 |
T160 |
7595 |
19 |
0 |
0 |
T161 |
34814 |
530 |
0 |
0 |
T162 |
11332 |
274 |
0 |
0 |
T163 |
66805 |
716 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
12414 |
0 |
0 |
T84 |
4839 |
9 |
0 |
0 |
T104 |
9346 |
100 |
0 |
0 |
T106 |
14283 |
180 |
0 |
0 |
T121 |
10101 |
83 |
0 |
0 |
T144 |
14376 |
41 |
0 |
0 |
T159 |
6365 |
10 |
0 |
0 |
T160 |
7595 |
33 |
0 |
0 |
T161 |
34814 |
903 |
0 |
0 |
T162 |
11332 |
277 |
0 |
0 |
T163 |
66805 |
1116 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
11799 |
0 |
0 |
T84 |
4839 |
15 |
0 |
0 |
T104 |
9346 |
6 |
0 |
0 |
T106 |
14283 |
115 |
0 |
0 |
T121 |
10101 |
192 |
0 |
0 |
T144 |
14376 |
46 |
0 |
0 |
T159 |
6365 |
44 |
0 |
0 |
T160 |
7595 |
31 |
0 |
0 |
T161 |
34814 |
858 |
0 |
0 |
T163 |
66805 |
1329 |
0 |
0 |
T164 |
108844 |
2216 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
13476 |
0 |
0 |
T84 |
4839 |
23 |
0 |
0 |
T104 |
9346 |
164 |
0 |
0 |
T106 |
14283 |
270 |
0 |
0 |
T121 |
10101 |
227 |
0 |
0 |
T144 |
14376 |
68 |
0 |
0 |
T159 |
6365 |
35 |
0 |
0 |
T160 |
7595 |
21 |
0 |
0 |
T161 |
34814 |
468 |
0 |
0 |
T162 |
11332 |
392 |
0 |
0 |
T163 |
66805 |
1442 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5633 |
0 |
0 |
T84 |
4839 |
6 |
0 |
0 |
T104 |
9346 |
47 |
0 |
0 |
T106 |
14283 |
63 |
0 |
0 |
T121 |
10101 |
24 |
0 |
0 |
T144 |
14376 |
21 |
0 |
0 |
T159 |
6365 |
22 |
0 |
0 |
T160 |
7595 |
30 |
0 |
0 |
T161 |
34814 |
341 |
0 |
0 |
T162 |
11332 |
90 |
0 |
0 |
T163 |
66805 |
714 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5577 |
0 |
0 |
T84 |
4839 |
14 |
0 |
0 |
T104 |
9346 |
73 |
0 |
0 |
T106 |
14283 |
144 |
0 |
0 |
T121 |
10101 |
23 |
0 |
0 |
T144 |
14376 |
43 |
0 |
0 |
T159 |
6365 |
1 |
0 |
0 |
T160 |
7595 |
17 |
0 |
0 |
T161 |
34814 |
291 |
0 |
0 |
T162 |
11332 |
159 |
0 |
0 |
T163 |
66805 |
543 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
6103 |
0 |
0 |
T84 |
4839 |
18 |
0 |
0 |
T104 |
9346 |
62 |
0 |
0 |
T106 |
14283 |
138 |
0 |
0 |
T121 |
10101 |
72 |
0 |
0 |
T144 |
14376 |
57 |
0 |
0 |
T159 |
6365 |
5 |
0 |
0 |
T160 |
7595 |
15 |
0 |
0 |
T161 |
34814 |
250 |
0 |
0 |
T162 |
11332 |
62 |
0 |
0 |
T163 |
66805 |
459 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5668 |
0 |
0 |
T84 |
4839 |
27 |
0 |
0 |
T104 |
9346 |
29 |
0 |
0 |
T106 |
14283 |
110 |
0 |
0 |
T121 |
10101 |
66 |
0 |
0 |
T144 |
14376 |
31 |
0 |
0 |
T159 |
6365 |
30 |
0 |
0 |
T160 |
7595 |
10 |
0 |
0 |
T161 |
34814 |
176 |
0 |
0 |
T162 |
11332 |
180 |
0 |
0 |
T163 |
66805 |
515 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5949 |
0 |
0 |
T84 |
4839 |
11 |
0 |
0 |
T104 |
9346 |
35 |
0 |
0 |
T106 |
14283 |
57 |
0 |
0 |
T121 |
10101 |
73 |
0 |
0 |
T144 |
14376 |
75 |
0 |
0 |
T159 |
6365 |
57 |
0 |
0 |
T160 |
7595 |
14 |
0 |
0 |
T161 |
34814 |
329 |
0 |
0 |
T162 |
11332 |
54 |
0 |
0 |
T163 |
66805 |
462 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5610 |
0 |
0 |
T84 |
4839 |
16 |
0 |
0 |
T104 |
9346 |
23 |
0 |
0 |
T106 |
14283 |
91 |
0 |
0 |
T121 |
10101 |
23 |
0 |
0 |
T144 |
14376 |
64 |
0 |
0 |
T159 |
6365 |
7 |
0 |
0 |
T161 |
34814 |
294 |
0 |
0 |
T162 |
11332 |
48 |
0 |
0 |
T163 |
66805 |
611 |
0 |
0 |
T164 |
108844 |
736 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5103 |
0 |
0 |
T84 |
4839 |
6 |
0 |
0 |
T104 |
9346 |
44 |
0 |
0 |
T106 |
14283 |
120 |
0 |
0 |
T144 |
14376 |
49 |
0 |
0 |
T159 |
6365 |
10 |
0 |
0 |
T160 |
7595 |
6 |
0 |
0 |
T161 |
34814 |
170 |
0 |
0 |
T162 |
11332 |
70 |
0 |
0 |
T163 |
66805 |
404 |
0 |
0 |
T164 |
108844 |
652 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5494 |
0 |
0 |
T65 |
11033 |
5 |
0 |
0 |
T84 |
4839 |
8 |
0 |
0 |
T104 |
9346 |
23 |
0 |
0 |
T106 |
14283 |
68 |
0 |
0 |
T121 |
10101 |
55 |
0 |
0 |
T144 |
14376 |
39 |
0 |
0 |
T159 |
6365 |
7 |
0 |
0 |
T160 |
7595 |
26 |
0 |
0 |
T161 |
34814 |
142 |
0 |
0 |
T162 |
11332 |
129 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
6150 |
0 |
0 |
T84 |
4839 |
8 |
0 |
0 |
T104 |
9346 |
55 |
0 |
0 |
T106 |
14283 |
57 |
0 |
0 |
T121 |
10101 |
1 |
0 |
0 |
T144 |
14376 |
56 |
0 |
0 |
T159 |
6365 |
33 |
0 |
0 |
T160 |
7595 |
18 |
0 |
0 |
T161 |
34814 |
361 |
0 |
0 |
T162 |
11332 |
99 |
0 |
0 |
T163 |
66805 |
594 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5835 |
0 |
0 |
T84 |
4839 |
9 |
0 |
0 |
T106 |
14283 |
57 |
0 |
0 |
T121 |
10101 |
63 |
0 |
0 |
T144 |
14376 |
46 |
0 |
0 |
T159 |
6365 |
29 |
0 |
0 |
T160 |
7595 |
17 |
0 |
0 |
T161 |
34814 |
271 |
0 |
0 |
T162 |
11332 |
122 |
0 |
0 |
T163 |
66805 |
502 |
0 |
0 |
T164 |
108844 |
820 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5250 |
0 |
0 |
T84 |
4839 |
6 |
0 |
0 |
T104 |
9346 |
33 |
0 |
0 |
T106 |
14283 |
110 |
0 |
0 |
T121 |
10101 |
62 |
0 |
0 |
T144 |
14376 |
37 |
0 |
0 |
T159 |
6365 |
14 |
0 |
0 |
T160 |
7595 |
18 |
0 |
0 |
T161 |
34814 |
223 |
0 |
0 |
T162 |
11332 |
19 |
0 |
0 |
T163 |
66805 |
408 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5369 |
0 |
0 |
T84 |
4839 |
3 |
0 |
0 |
T104 |
9346 |
23 |
0 |
0 |
T106 |
14283 |
122 |
0 |
0 |
T121 |
10101 |
30 |
0 |
0 |
T144 |
14376 |
66 |
0 |
0 |
T159 |
6365 |
19 |
0 |
0 |
T160 |
7595 |
21 |
0 |
0 |
T161 |
34814 |
167 |
0 |
0 |
T162 |
11332 |
56 |
0 |
0 |
T163 |
66805 |
550 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5948 |
0 |
0 |
T65 |
11033 |
3 |
0 |
0 |
T84 |
4839 |
10 |
0 |
0 |
T104 |
9346 |
1 |
0 |
0 |
T106 |
14283 |
71 |
0 |
0 |
T121 |
10101 |
37 |
0 |
0 |
T144 |
14376 |
23 |
0 |
0 |
T159 |
6365 |
8 |
0 |
0 |
T160 |
7595 |
20 |
0 |
0 |
T161 |
34814 |
193 |
0 |
0 |
T162 |
11332 |
156 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
6469 |
0 |
0 |
T84 |
4839 |
10 |
0 |
0 |
T104 |
9346 |
42 |
0 |
0 |
T106 |
14283 |
126 |
0 |
0 |
T121 |
10101 |
49 |
0 |
0 |
T144 |
14376 |
39 |
0 |
0 |
T159 |
6365 |
26 |
0 |
0 |
T160 |
7595 |
4 |
0 |
0 |
T161 |
34814 |
235 |
0 |
0 |
T162 |
11332 |
104 |
0 |
0 |
T163 |
66805 |
829 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
6185 |
0 |
0 |
T84 |
4839 |
15 |
0 |
0 |
T104 |
9346 |
35 |
0 |
0 |
T106 |
14283 |
139 |
0 |
0 |
T121 |
10101 |
60 |
0 |
0 |
T144 |
14376 |
54 |
0 |
0 |
T159 |
6365 |
14 |
0 |
0 |
T160 |
7595 |
56 |
0 |
0 |
T161 |
34814 |
196 |
0 |
0 |
T162 |
11332 |
69 |
0 |
0 |
T163 |
66805 |
693 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5819 |
0 |
0 |
T84 |
4839 |
9 |
0 |
0 |
T104 |
9346 |
61 |
0 |
0 |
T106 |
14283 |
84 |
0 |
0 |
T121 |
10101 |
29 |
0 |
0 |
T144 |
14376 |
24 |
0 |
0 |
T159 |
6365 |
43 |
0 |
0 |
T160 |
7595 |
22 |
0 |
0 |
T161 |
34814 |
273 |
0 |
0 |
T162 |
11332 |
135 |
0 |
0 |
T163 |
66805 |
314 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5622 |
0 |
0 |
T84 |
4839 |
8 |
0 |
0 |
T104 |
9346 |
38 |
0 |
0 |
T106 |
14283 |
61 |
0 |
0 |
T121 |
10101 |
76 |
0 |
0 |
T144 |
14376 |
46 |
0 |
0 |
T159 |
6365 |
11 |
0 |
0 |
T160 |
7595 |
2 |
0 |
0 |
T161 |
34814 |
176 |
0 |
0 |
T162 |
11332 |
104 |
0 |
0 |
T163 |
66805 |
693 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5714 |
0 |
0 |
T84 |
4839 |
7 |
0 |
0 |
T104 |
9346 |
38 |
0 |
0 |
T106 |
14283 |
117 |
0 |
0 |
T121 |
10101 |
34 |
0 |
0 |
T144 |
14376 |
81 |
0 |
0 |
T159 |
6365 |
18 |
0 |
0 |
T160 |
7595 |
20 |
0 |
0 |
T161 |
34814 |
291 |
0 |
0 |
T162 |
11332 |
71 |
0 |
0 |
T163 |
66805 |
710 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5726 |
0 |
0 |
T84 |
4839 |
15 |
0 |
0 |
T104 |
9346 |
57 |
0 |
0 |
T106 |
14283 |
115 |
0 |
0 |
T121 |
10101 |
79 |
0 |
0 |
T144 |
14376 |
38 |
0 |
0 |
T160 |
7595 |
21 |
0 |
0 |
T161 |
34814 |
163 |
0 |
0 |
T162 |
11332 |
55 |
0 |
0 |
T163 |
66805 |
749 |
0 |
0 |
T164 |
108844 |
681 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
6109 |
0 |
0 |
T84 |
4839 |
15 |
0 |
0 |
T104 |
9346 |
19 |
0 |
0 |
T106 |
14283 |
105 |
0 |
0 |
T121 |
10101 |
98 |
0 |
0 |
T144 |
14376 |
29 |
0 |
0 |
T159 |
6365 |
33 |
0 |
0 |
T160 |
7595 |
9 |
0 |
0 |
T161 |
34814 |
356 |
0 |
0 |
T162 |
11332 |
10 |
0 |
0 |
T163 |
66805 |
496 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5439 |
0 |
0 |
T84 |
4839 |
10 |
0 |
0 |
T104 |
9346 |
18 |
0 |
0 |
T106 |
14283 |
65 |
0 |
0 |
T121 |
10101 |
32 |
0 |
0 |
T144 |
14376 |
32 |
0 |
0 |
T159 |
6365 |
9 |
0 |
0 |
T160 |
7595 |
7 |
0 |
0 |
T161 |
34814 |
275 |
0 |
0 |
T162 |
11332 |
42 |
0 |
0 |
T163 |
66805 |
512 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5323 |
0 |
0 |
T84 |
4839 |
24 |
0 |
0 |
T104 |
9346 |
61 |
0 |
0 |
T106 |
14283 |
78 |
0 |
0 |
T121 |
10101 |
34 |
0 |
0 |
T144 |
14376 |
5 |
0 |
0 |
T159 |
6365 |
37 |
0 |
0 |
T160 |
7595 |
36 |
0 |
0 |
T161 |
34814 |
174 |
0 |
0 |
T162 |
11332 |
148 |
0 |
0 |
T163 |
66805 |
392 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5888 |
0 |
0 |
T84 |
4839 |
7 |
0 |
0 |
T104 |
9346 |
23 |
0 |
0 |
T106 |
14283 |
25 |
0 |
0 |
T121 |
10101 |
52 |
0 |
0 |
T144 |
14376 |
59 |
0 |
0 |
T159 |
6365 |
40 |
0 |
0 |
T160 |
7595 |
2 |
0 |
0 |
T161 |
34814 |
375 |
0 |
0 |
T162 |
11332 |
107 |
0 |
0 |
T163 |
66805 |
618 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
5754 |
0 |
0 |
T84 |
4839 |
10 |
0 |
0 |
T104 |
9346 |
60 |
0 |
0 |
T106 |
14283 |
131 |
0 |
0 |
T121 |
10101 |
60 |
0 |
0 |
T144 |
14376 |
56 |
0 |
0 |
T159 |
6365 |
4 |
0 |
0 |
T160 |
7595 |
7 |
0 |
0 |
T161 |
34814 |
231 |
0 |
0 |
T162 |
11332 |
112 |
0 |
0 |
T163 |
66805 |
528 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1805 |
0 |
0 |
T84 |
4839 |
12 |
0 |
0 |
T106 |
14283 |
35 |
0 |
0 |
T121 |
10101 |
18 |
0 |
0 |
T144 |
14376 |
38 |
0 |
0 |
T159 |
6365 |
23 |
0 |
0 |
T160 |
7595 |
32 |
0 |
0 |
T161 |
34814 |
63 |
0 |
0 |
T162 |
11332 |
16 |
0 |
0 |
T163 |
66805 |
146 |
0 |
0 |
T164 |
108844 |
165 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1747 |
0 |
0 |
T84 |
4839 |
5 |
0 |
0 |
T104 |
9346 |
10 |
0 |
0 |
T106 |
14283 |
34 |
0 |
0 |
T121 |
10101 |
7 |
0 |
0 |
T144 |
14376 |
41 |
0 |
0 |
T159 |
6365 |
9 |
0 |
0 |
T161 |
34814 |
49 |
0 |
0 |
T162 |
11332 |
21 |
0 |
0 |
T163 |
66805 |
114 |
0 |
0 |
T164 |
108844 |
164 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1722 |
0 |
0 |
T84 |
4839 |
9 |
0 |
0 |
T104 |
9346 |
1 |
0 |
0 |
T106 |
14283 |
36 |
0 |
0 |
T121 |
10101 |
13 |
0 |
0 |
T144 |
14376 |
19 |
0 |
0 |
T159 |
6365 |
34 |
0 |
0 |
T160 |
7595 |
41 |
0 |
0 |
T161 |
34814 |
63 |
0 |
0 |
T162 |
11332 |
30 |
0 |
0 |
T163 |
66805 |
137 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1717 |
0 |
0 |
T84 |
4839 |
10 |
0 |
0 |
T104 |
9346 |
15 |
0 |
0 |
T106 |
14283 |
33 |
0 |
0 |
T121 |
10101 |
2 |
0 |
0 |
T144 |
14376 |
78 |
0 |
0 |
T159 |
6365 |
2 |
0 |
0 |
T160 |
7595 |
53 |
0 |
0 |
T161 |
34814 |
57 |
0 |
0 |
T162 |
11332 |
12 |
0 |
0 |
T163 |
66805 |
102 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
2468 |
0 |
0 |
T84 |
4839 |
10 |
0 |
0 |
T104 |
9346 |
13 |
0 |
0 |
T106 |
14283 |
45 |
0 |
0 |
T121 |
10101 |
19 |
0 |
0 |
T144 |
14376 |
67 |
0 |
0 |
T159 |
6365 |
13 |
0 |
0 |
T160 |
7595 |
17 |
0 |
0 |
T161 |
34814 |
74 |
0 |
0 |
T162 |
11332 |
25 |
0 |
0 |
T163 |
66805 |
170 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
4487 |
0 |
0 |
T13 |
3674 |
12 |
0 |
0 |
T17 |
0 |
19 |
0 |
0 |
T48 |
407565 |
0 |
0 |
0 |
T59 |
0 |
45 |
0 |
0 |
T68 |
0 |
19 |
0 |
0 |
T138 |
0 |
31 |
0 |
0 |
T166 |
0 |
26 |
0 |
0 |
T167 |
0 |
68 |
0 |
0 |
T168 |
0 |
21 |
0 |
0 |
T169 |
0 |
41 |
0 |
0 |
T170 |
0 |
3 |
0 |
0 |
T171 |
4538 |
0 |
0 |
0 |
T172 |
37956 |
0 |
0 |
0 |
T173 |
1270 |
0 |
0 |
0 |
T174 |
10681 |
0 |
0 |
0 |
T175 |
1546 |
0 |
0 |
0 |
T176 |
73950 |
0 |
0 |
0 |
T177 |
756226 |
0 |
0 |
0 |
T178 |
386564 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1731 |
0 |
0 |
T84 |
4839 |
15 |
0 |
0 |
T104 |
9346 |
9 |
0 |
0 |
T106 |
14283 |
28 |
0 |
0 |
T121 |
10101 |
7 |
0 |
0 |
T144 |
14376 |
12 |
0 |
0 |
T159 |
6365 |
32 |
0 |
0 |
T160 |
7595 |
16 |
0 |
0 |
T161 |
34814 |
60 |
0 |
0 |
T162 |
11332 |
21 |
0 |
0 |
T163 |
66805 |
122 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1691 |
0 |
0 |
T84 |
4839 |
12 |
0 |
0 |
T104 |
9346 |
8 |
0 |
0 |
T106 |
14283 |
43 |
0 |
0 |
T121 |
10101 |
14 |
0 |
0 |
T144 |
14376 |
9 |
0 |
0 |
T159 |
6365 |
6 |
0 |
0 |
T160 |
7595 |
22 |
0 |
0 |
T161 |
34814 |
47 |
0 |
0 |
T162 |
11332 |
24 |
0 |
0 |
T163 |
66805 |
119 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1454 |
0 |
0 |
T84 |
4839 |
16 |
0 |
0 |
T104 |
9346 |
6 |
0 |
0 |
T106 |
14283 |
30 |
0 |
0 |
T121 |
10101 |
11 |
0 |
0 |
T144 |
14376 |
76 |
0 |
0 |
T159 |
6365 |
12 |
0 |
0 |
T160 |
7595 |
29 |
0 |
0 |
T161 |
34814 |
50 |
0 |
0 |
T162 |
11332 |
19 |
0 |
0 |
T163 |
66805 |
86 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1417 |
0 |
0 |
T84 |
4839 |
8 |
0 |
0 |
T104 |
9346 |
17 |
0 |
0 |
T106 |
14283 |
26 |
0 |
0 |
T121 |
10101 |
8 |
0 |
0 |
T144 |
14376 |
42 |
0 |
0 |
T159 |
6365 |
20 |
0 |
0 |
T160 |
7595 |
35 |
0 |
0 |
T161 |
34814 |
33 |
0 |
0 |
T162 |
11332 |
5 |
0 |
0 |
T163 |
66805 |
84 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1407 |
0 |
0 |
T84 |
4839 |
16 |
0 |
0 |
T104 |
9346 |
11 |
0 |
0 |
T106 |
14283 |
18 |
0 |
0 |
T121 |
10101 |
2 |
0 |
0 |
T144 |
14376 |
87 |
0 |
0 |
T159 |
6365 |
13 |
0 |
0 |
T160 |
7595 |
27 |
0 |
0 |
T161 |
34814 |
19 |
0 |
0 |
T162 |
11332 |
12 |
0 |
0 |
T163 |
66805 |
81 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1433 |
0 |
0 |
T84 |
4839 |
11 |
0 |
0 |
T104 |
9346 |
9 |
0 |
0 |
T106 |
14283 |
28 |
0 |
0 |
T121 |
10101 |
2 |
0 |
0 |
T144 |
14376 |
38 |
0 |
0 |
T159 |
6365 |
43 |
0 |
0 |
T160 |
7595 |
30 |
0 |
0 |
T161 |
34814 |
41 |
0 |
0 |
T162 |
11332 |
9 |
0 |
0 |
T163 |
66805 |
92 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
2538 |
0 |
0 |
T84 |
4839 |
11 |
0 |
0 |
T104 |
9346 |
26 |
0 |
0 |
T106 |
14283 |
52 |
0 |
0 |
T121 |
10101 |
13 |
0 |
0 |
T144 |
14376 |
40 |
0 |
0 |
T159 |
6365 |
63 |
0 |
0 |
T160 |
7595 |
14 |
0 |
0 |
T161 |
34814 |
72 |
0 |
0 |
T162 |
11332 |
21 |
0 |
0 |
T163 |
66805 |
160 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1354 |
0 |
0 |
T84 |
4839 |
6 |
0 |
0 |
T104 |
9346 |
9 |
0 |
0 |
T106 |
14283 |
11 |
0 |
0 |
T121 |
10101 |
13 |
0 |
0 |
T144 |
14376 |
12 |
0 |
0 |
T159 |
6365 |
7 |
0 |
0 |
T160 |
7595 |
34 |
0 |
0 |
T161 |
34814 |
38 |
0 |
0 |
T162 |
11332 |
19 |
0 |
0 |
T163 |
66805 |
77 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
2904 |
0 |
0 |
T84 |
4839 |
19 |
0 |
0 |
T104 |
9346 |
8 |
0 |
0 |
T106 |
14283 |
26 |
0 |
0 |
T121 |
10101 |
31 |
0 |
0 |
T144 |
14376 |
33 |
0 |
0 |
T159 |
6365 |
40 |
0 |
0 |
T160 |
7595 |
20 |
0 |
0 |
T161 |
34814 |
113 |
0 |
0 |
T162 |
11332 |
25 |
0 |
0 |
T163 |
66805 |
251 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1705 |
0 |
0 |
T84 |
4839 |
9 |
0 |
0 |
T104 |
9346 |
5 |
0 |
0 |
T106 |
14283 |
30 |
0 |
0 |
T121 |
10101 |
19 |
0 |
0 |
T144 |
14376 |
39 |
0 |
0 |
T159 |
6365 |
13 |
0 |
0 |
T160 |
7595 |
3 |
0 |
0 |
T161 |
34814 |
47 |
0 |
0 |
T162 |
11332 |
21 |
0 |
0 |
T163 |
66805 |
95 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1420 |
0 |
0 |
T84 |
4839 |
7 |
0 |
0 |
T104 |
9346 |
7 |
0 |
0 |
T106 |
14283 |
21 |
0 |
0 |
T121 |
10101 |
7 |
0 |
0 |
T144 |
14376 |
38 |
0 |
0 |
T159 |
6365 |
24 |
0 |
0 |
T160 |
7595 |
6 |
0 |
0 |
T161 |
34814 |
28 |
0 |
0 |
T162 |
11332 |
12 |
0 |
0 |
T163 |
66805 |
98 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1368 |
0 |
0 |
T84 |
4839 |
8 |
0 |
0 |
T104 |
9346 |
12 |
0 |
0 |
T106 |
14283 |
22 |
0 |
0 |
T121 |
10101 |
14 |
0 |
0 |
T144 |
14376 |
67 |
0 |
0 |
T159 |
6365 |
20 |
0 |
0 |
T160 |
7595 |
28 |
0 |
0 |
T161 |
34814 |
56 |
0 |
0 |
T162 |
11332 |
5 |
0 |
0 |
T163 |
66805 |
58 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1337 |
0 |
0 |
T84 |
4839 |
20 |
0 |
0 |
T104 |
9346 |
10 |
0 |
0 |
T106 |
14283 |
20 |
0 |
0 |
T121 |
10101 |
11 |
0 |
0 |
T144 |
14376 |
54 |
0 |
0 |
T159 |
6365 |
8 |
0 |
0 |
T160 |
7595 |
21 |
0 |
0 |
T161 |
34814 |
31 |
0 |
0 |
T162 |
11332 |
6 |
0 |
0 |
T163 |
66805 |
102 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1364 |
0 |
0 |
T84 |
4839 |
8 |
0 |
0 |
T104 |
9346 |
5 |
0 |
0 |
T106 |
14283 |
36 |
0 |
0 |
T121 |
10101 |
6 |
0 |
0 |
T144 |
14376 |
38 |
0 |
0 |
T159 |
6365 |
19 |
0 |
0 |
T160 |
7595 |
16 |
0 |
0 |
T161 |
34814 |
37 |
0 |
0 |
T162 |
11332 |
19 |
0 |
0 |
T163 |
66805 |
71 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1419 |
0 |
0 |
T84 |
4839 |
14 |
0 |
0 |
T104 |
9346 |
15 |
0 |
0 |
T106 |
14283 |
28 |
0 |
0 |
T121 |
10101 |
5 |
0 |
0 |
T144 |
14376 |
42 |
0 |
0 |
T160 |
7595 |
21 |
0 |
0 |
T161 |
34814 |
35 |
0 |
0 |
T162 |
11332 |
13 |
0 |
0 |
T163 |
66805 |
86 |
0 |
0 |
T164 |
108844 |
137 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
411185669 |
1447 |
0 |
0 |
T84 |
4839 |
9 |
0 |
0 |
T104 |
9346 |
3 |
0 |
0 |
T106 |
14283 |
26 |
0 |
0 |
T121 |
10101 |
10 |
0 |
0 |
T144 |
14376 |
17 |
0 |
0 |
T159 |
6365 |
5 |
0 |
0 |
T160 |
7595 |
32 |
0 |
0 |
T161 |
34814 |
43 |
0 |
0 |
T162 |
11332 |
13 |
0 |
0 |
T163 |
66805 |
75 |
0 |
0 |