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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.04 98.38 93.99 98.62 89.36 97.19 95.45 99.25


Total test records in report: 1081
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

T823 /workspace/coverage/default/19.spi_device_stress_all.1546966529 Jun 24 04:41:18 PM PDT 24 Jun 24 04:42:18 PM PDT 24 4976930681 ps
T309 /workspace/coverage/default/3.spi_device_flash_mode.3858778902 Jun 24 04:40:28 PM PDT 24 Jun 24 04:40:53 PM PDT 24 1038341826 ps
T824 /workspace/coverage/default/19.spi_device_flash_all.3965887486 Jun 24 04:41:17 PM PDT 24 Jun 24 04:41:41 PM PDT 24 546856935 ps
T292 /workspace/coverage/default/31.spi_device_flash_and_tpm_min_idle.2399023196 Jun 24 04:41:50 PM PDT 24 Jun 24 04:50:15 PM PDT 24 304372748499 ps
T69 /workspace/coverage/default/0.spi_device_ram_cfg.605868265 Jun 24 04:40:04 PM PDT 24 Jun 24 04:40:32 PM PDT 24 35442900 ps
T825 /workspace/coverage/default/44.spi_device_csb_read.1957292496 Jun 24 04:42:30 PM PDT 24 Jun 24 04:42:41 PM PDT 24 29738110 ps
T826 /workspace/coverage/default/19.spi_device_flash_and_tpm_min_idle.2415733228 Jun 24 04:41:15 PM PDT 24 Jun 24 04:43:09 PM PDT 24 13406000320 ps
T73 /workspace/coverage/default/1.spi_device_sec_cm.3132558669 Jun 24 04:40:19 PM PDT 24 Jun 24 04:40:38 PM PDT 24 321208129 ps
T827 /workspace/coverage/default/45.spi_device_flash_and_tpm.1254508446 Jun 24 04:42:30 PM PDT 24 Jun 24 04:43:35 PM PDT 24 31960651684 ps
T828 /workspace/coverage/default/16.spi_device_upload.4047334124 Jun 24 04:41:15 PM PDT 24 Jun 24 04:41:45 PM PDT 24 6467495349 ps
T829 /workspace/coverage/default/35.spi_device_cfg_cmd.153642456 Jun 24 04:42:06 PM PDT 24 Jun 24 04:42:23 PM PDT 24 541116891 ps
T830 /workspace/coverage/default/3.spi_device_pass_cmd_filtering.909843360 Jun 24 04:40:27 PM PDT 24 Jun 24 04:41:03 PM PDT 24 28730729980 ps
T297 /workspace/coverage/default/31.spi_device_stress_all.1551800196 Jun 24 04:41:52 PM PDT 24 Jun 24 04:52:06 PM PDT 24 480838084678 ps
T831 /workspace/coverage/default/45.spi_device_mailbox.1363851720 Jun 24 04:42:32 PM PDT 24 Jun 24 04:42:55 PM PDT 24 893385759 ps
T832 /workspace/coverage/default/26.spi_device_tpm_rw.3530339900 Jun 24 04:41:39 PM PDT 24 Jun 24 04:41:50 PM PDT 24 101538938 ps
T833 /workspace/coverage/default/12.spi_device_tpm_all.4293060539 Jun 24 04:40:59 PM PDT 24 Jun 24 04:41:13 PM PDT 24 1352687148 ps
T834 /workspace/coverage/default/14.spi_device_tpm_read_hw_reg.965370271 Jun 24 04:40:59 PM PDT 24 Jun 24 04:41:08 PM PDT 24 84496053 ps
T835 /workspace/coverage/default/19.spi_device_tpm_read_hw_reg.383570739 Jun 24 04:41:20 PM PDT 24 Jun 24 04:41:37 PM PDT 24 1379790208 ps
T836 /workspace/coverage/default/1.spi_device_tpm_read_hw_reg.2046295915 Jun 24 04:40:11 PM PDT 24 Jun 24 04:41:01 PM PDT 24 10992379387 ps
T837 /workspace/coverage/default/18.spi_device_flash_mode.4267362323 Jun 24 04:41:17 PM PDT 24 Jun 24 04:41:32 PM PDT 24 1751979236 ps
T838 /workspace/coverage/default/32.spi_device_tpm_all.1021546596 Jun 24 04:41:56 PM PDT 24 Jun 24 04:42:07 PM PDT 24 52640111 ps
T839 /workspace/coverage/default/34.spi_device_csb_read.3112880130 Jun 24 04:41:57 PM PDT 24 Jun 24 04:42:08 PM PDT 24 14557321 ps
T840 /workspace/coverage/default/15.spi_device_flash_and_tpm_min_idle.3117889389 Jun 24 04:41:13 PM PDT 24 Jun 24 04:42:47 PM PDT 24 14726303964 ps
T841 /workspace/coverage/default/38.spi_device_upload.426205493 Jun 24 04:42:12 PM PDT 24 Jun 24 04:42:27 PM PDT 24 1120102040 ps
T842 /workspace/coverage/default/16.spi_device_read_buffer_direct.884039009 Jun 24 04:41:12 PM PDT 24 Jun 24 04:41:26 PM PDT 24 1118910216 ps
T843 /workspace/coverage/default/2.spi_device_cfg_cmd.3894081167 Jun 24 04:40:21 PM PDT 24 Jun 24 04:40:40 PM PDT 24 247864322 ps
T844 /workspace/coverage/default/22.spi_device_flash_mode.2422097277 Jun 24 04:41:29 PM PDT 24 Jun 24 04:41:44 PM PDT 24 544137501 ps
T845 /workspace/coverage/default/21.spi_device_tpm_all.1088494333 Jun 24 04:41:22 PM PDT 24 Jun 24 04:41:43 PM PDT 24 5728107525 ps
T846 /workspace/coverage/default/43.spi_device_mailbox.3312827167 Jun 24 04:42:23 PM PDT 24 Jun 24 04:42:41 PM PDT 24 8156650114 ps
T847 /workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.1622873545 Jun 24 04:40:18 PM PDT 24 Jun 24 04:41:28 PM PDT 24 7188823650 ps
T848 /workspace/coverage/default/35.spi_device_mailbox.1674029775 Jun 24 04:42:03 PM PDT 24 Jun 24 04:42:25 PM PDT 24 821429119 ps
T849 /workspace/coverage/default/9.spi_device_tpm_rw.2675966624 Jun 24 04:41:02 PM PDT 24 Jun 24 04:41:10 PM PDT 24 37007417 ps
T850 /workspace/coverage/default/17.spi_device_read_buffer_direct.3199241960 Jun 24 04:41:10 PM PDT 24 Jun 24 04:41:24 PM PDT 24 281932077 ps
T851 /workspace/coverage/default/39.spi_device_tpm_rw.3422422345 Jun 24 04:42:08 PM PDT 24 Jun 24 04:42:24 PM PDT 24 924820555 ps
T852 /workspace/coverage/default/0.spi_device_cfg_cmd.3354697412 Jun 24 04:40:11 PM PDT 24 Jun 24 04:40:37 PM PDT 24 66868854 ps
T853 /workspace/coverage/default/38.spi_device_read_buffer_direct.2810372433 Jun 24 04:42:08 PM PDT 24 Jun 24 04:42:22 PM PDT 24 90920636 ps
T854 /workspace/coverage/default/22.spi_device_upload.746983621 Jun 24 04:41:22 PM PDT 24 Jun 24 04:41:40 PM PDT 24 6101831483 ps
T855 /workspace/coverage/default/28.spi_device_stress_all.1702588408 Jun 24 04:41:42 PM PDT 24 Jun 24 04:42:19 PM PDT 24 1933419293 ps
T856 /workspace/coverage/default/46.spi_device_pass_addr_payload_swap.1874206443 Jun 24 04:42:29 PM PDT 24 Jun 24 04:43:04 PM PDT 24 43422411226 ps
T857 /workspace/coverage/default/1.spi_device_tpm_rw.1706058838 Jun 24 04:40:10 PM PDT 24 Jun 24 04:40:35 PM PDT 24 228791173 ps
T858 /workspace/coverage/default/0.spi_device_intercept.654623122 Jun 24 04:40:19 PM PDT 24 Jun 24 04:40:58 PM PDT 24 3008530660 ps
T859 /workspace/coverage/default/45.spi_device_tpm_sts_read.4080449060 Jun 24 04:42:30 PM PDT 24 Jun 24 04:42:40 PM PDT 24 605564258 ps
T860 /workspace/coverage/default/29.spi_device_flash_all.2765107702 Jun 24 04:41:53 PM PDT 24 Jun 24 04:45:14 PM PDT 24 103976362440 ps
T314 /workspace/coverage/default/41.spi_device_flash_mode.2788555030 Jun 24 04:42:19 PM PDT 24 Jun 24 04:42:39 PM PDT 24 208982149 ps
T861 /workspace/coverage/default/18.spi_device_pass_cmd_filtering.1645888477 Jun 24 04:41:16 PM PDT 24 Jun 24 04:41:29 PM PDT 24 599725970 ps
T862 /workspace/coverage/default/16.spi_device_flash_and_tpm_min_idle.3090352940 Jun 24 04:41:12 PM PDT 24 Jun 24 04:45:34 PM PDT 24 101544447397 ps
T863 /workspace/coverage/default/49.spi_device_intercept.976266672 Jun 24 04:42:43 PM PDT 24 Jun 24 04:42:53 PM PDT 24 226349073 ps
T864 /workspace/coverage/default/18.spi_device_read_buffer_direct.1574719714 Jun 24 04:41:18 PM PDT 24 Jun 24 04:41:33 PM PDT 24 461853255 ps
T865 /workspace/coverage/default/32.spi_device_alert_test.1214693025 Jun 24 04:41:55 PM PDT 24 Jun 24 04:42:06 PM PDT 24 12983161 ps
T866 /workspace/coverage/default/26.spi_device_flash_all.148155018 Jun 24 04:41:44 PM PDT 24 Jun 24 04:45:14 PM PDT 24 108963050593 ps
T867 /workspace/coverage/default/42.spi_device_csb_read.184004635 Jun 24 04:42:23 PM PDT 24 Jun 24 04:42:34 PM PDT 24 64253503 ps
T868 /workspace/coverage/default/7.spi_device_csb_read.3771461158 Jun 24 04:40:56 PM PDT 24 Jun 24 04:41:03 PM PDT 24 37207230 ps
T869 /workspace/coverage/default/47.spi_device_csb_read.3935681840 Jun 24 04:42:42 PM PDT 24 Jun 24 04:42:48 PM PDT 24 17463371 ps
T870 /workspace/coverage/default/2.spi_device_tpm_sts_read.2423438427 Jun 24 04:40:20 PM PDT 24 Jun 24 04:40:38 PM PDT 24 51134996 ps
T871 /workspace/coverage/default/35.spi_device_flash_and_tpm_min_idle.3181250604 Jun 24 04:42:05 PM PDT 24 Jun 24 04:42:42 PM PDT 24 5621362558 ps
T872 /workspace/coverage/default/48.spi_device_mailbox.109193393 Jun 24 04:42:35 PM PDT 24 Jun 24 04:42:58 PM PDT 24 3302998318 ps
T873 /workspace/coverage/default/14.spi_device_flash_mode.1638281294 Jun 24 04:41:20 PM PDT 24 Jun 24 04:42:06 PM PDT 24 2310494862 ps
T874 /workspace/coverage/default/9.spi_device_pass_cmd_filtering.2168780254 Jun 24 04:41:00 PM PDT 24 Jun 24 04:41:16 PM PDT 24 4095911307 ps
T875 /workspace/coverage/default/43.spi_device_flash_mode.1559738515 Jun 24 04:42:24 PM PDT 24 Jun 24 04:42:46 PM PDT 24 1462411155 ps
T876 /workspace/coverage/default/19.spi_device_alert_test.503430833 Jun 24 04:41:19 PM PDT 24 Jun 24 04:41:30 PM PDT 24 63720580 ps
T877 /workspace/coverage/default/47.spi_device_stress_all.2750964278 Jun 24 04:42:38 PM PDT 24 Jun 24 04:43:00 PM PDT 24 4765056196 ps
T284 /workspace/coverage/default/26.spi_device_flash_and_tpm.151836835 Jun 24 04:41:45 PM PDT 24 Jun 24 04:50:09 PM PDT 24 239735640328 ps
T878 /workspace/coverage/default/28.spi_device_read_buffer_direct.1087051076 Jun 24 04:41:44 PM PDT 24 Jun 24 04:42:05 PM PDT 24 4730695610 ps
T879 /workspace/coverage/default/38.spi_device_mailbox.1947690140 Jun 24 04:42:14 PM PDT 24 Jun 24 04:42:42 PM PDT 24 1282600748 ps
T880 /workspace/coverage/default/28.spi_device_flash_and_tpm_min_idle.3012764553 Jun 24 04:41:50 PM PDT 24 Jun 24 04:42:51 PM PDT 24 3589083250 ps
T881 /workspace/coverage/default/44.spi_device_flash_mode.625712808 Jun 24 04:42:32 PM PDT 24 Jun 24 04:42:55 PM PDT 24 1938377070 ps
T882 /workspace/coverage/default/5.spi_device_alert_test.1096585249 Jun 24 04:40:47 PM PDT 24 Jun 24 04:40:50 PM PDT 24 14299923 ps
T883 /workspace/coverage/default/20.spi_device_flash_all.2753336514 Jun 24 04:41:24 PM PDT 24 Jun 24 04:42:57 PM PDT 24 11877143442 ps
T884 /workspace/coverage/default/49.spi_device_flash_and_tpm_min_idle.3823811959 Jun 24 04:42:44 PM PDT 24 Jun 24 04:49:46 PM PDT 24 197500124862 ps
T885 /workspace/coverage/default/34.spi_device_flash_and_tpm_min_idle.3594704661 Jun 24 04:42:04 PM PDT 24 Jun 24 04:47:43 PM PDT 24 57133776383 ps
T886 /workspace/coverage/default/34.spi_device_flash_mode.3839718826 Jun 24 04:41:56 PM PDT 24 Jun 24 04:42:11 PM PDT 24 99155666 ps
T887 /workspace/coverage/default/39.spi_device_read_buffer_direct.3020032902 Jun 24 04:42:17 PM PDT 24 Jun 24 04:42:40 PM PDT 24 12467860413 ps
T888 /workspace/coverage/default/17.spi_device_pass_cmd_filtering.937919650 Jun 24 04:41:10 PM PDT 24 Jun 24 04:41:28 PM PDT 24 1112877612 ps
T889 /workspace/coverage/default/18.spi_device_upload.1692131884 Jun 24 04:41:22 PM PDT 24 Jun 24 04:41:35 PM PDT 24 55704763 ps
T890 /workspace/coverage/default/13.spi_device_tpm_all.1317078576 Jun 24 04:41:07 PM PDT 24 Jun 24 04:41:18 PM PDT 24 667216765 ps
T891 /workspace/coverage/default/12.spi_device_tpm_sts_read.4004240818 Jun 24 04:41:08 PM PDT 24 Jun 24 04:41:18 PM PDT 24 127451014 ps
T892 /workspace/coverage/default/30.spi_device_tpm_sts_read.3368066236 Jun 24 04:41:52 PM PDT 24 Jun 24 04:42:03 PM PDT 24 71885901 ps
T893 /workspace/coverage/default/2.spi_device_tpm_rw.2767759536 Jun 24 04:40:18 PM PDT 24 Jun 24 04:40:38 PM PDT 24 59798880 ps
T894 /workspace/coverage/default/35.spi_device_tpm_all.3038315175 Jun 24 04:42:03 PM PDT 24 Jun 24 04:42:39 PM PDT 24 22816592997 ps
T895 /workspace/coverage/default/33.spi_device_flash_mode.509347780 Jun 24 04:41:56 PM PDT 24 Jun 24 04:42:38 PM PDT 24 3319372786 ps
T896 /workspace/coverage/default/6.spi_device_pass_cmd_filtering.4053391509 Jun 24 04:40:51 PM PDT 24 Jun 24 04:41:02 PM PDT 24 4791570203 ps
T897 /workspace/coverage/default/34.spi_device_alert_test.3072127732 Jun 24 04:42:05 PM PDT 24 Jun 24 04:42:17 PM PDT 24 12215965 ps
T898 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.4082897466 Jun 24 04:41:07 PM PDT 24 Jun 24 04:41:23 PM PDT 24 5780979347 ps
T899 /workspace/coverage/default/10.spi_device_mailbox.2807409328 Jun 24 04:41:00 PM PDT 24 Jun 24 04:41:19 PM PDT 24 679810750 ps
T900 /workspace/coverage/default/28.spi_device_intercept.627758995 Jun 24 04:41:43 PM PDT 24 Jun 24 04:41:56 PM PDT 24 3285891779 ps
T901 /workspace/coverage/default/1.spi_device_tpm_all.872972536 Jun 24 04:40:12 PM PDT 24 Jun 24 04:40:48 PM PDT 24 1983359648 ps
T902 /workspace/coverage/default/14.spi_device_flash_and_tpm.3000990184 Jun 24 04:41:14 PM PDT 24 Jun 24 04:43:54 PM PDT 24 58414418461 ps
T903 /workspace/coverage/default/11.spi_device_upload.895913149 Jun 24 04:41:03 PM PDT 24 Jun 24 04:41:13 PM PDT 24 57363616 ps
T904 /workspace/coverage/default/47.spi_device_mailbox.3634588331 Jun 24 04:42:39 PM PDT 24 Jun 24 04:43:39 PM PDT 24 6435641918 ps
T905 /workspace/coverage/default/21.spi_device_tpm_rw.2496915301 Jun 24 04:41:24 PM PDT 24 Jun 24 04:41:36 PM PDT 24 55441458 ps
T906 /workspace/coverage/default/42.spi_device_flash_mode.2446889218 Jun 24 04:42:24 PM PDT 24 Jun 24 04:42:51 PM PDT 24 1382500565 ps
T907 /workspace/coverage/default/0.spi_device_tpm_all.2432160995 Jun 24 04:40:02 PM PDT 24 Jun 24 04:40:47 PM PDT 24 5533250783 ps
T908 /workspace/coverage/default/21.spi_device_cfg_cmd.2059005849 Jun 24 04:41:24 PM PDT 24 Jun 24 04:41:37 PM PDT 24 249809076 ps
T909 /workspace/coverage/default/20.spi_device_read_buffer_direct.4248994434 Jun 24 04:41:20 PM PDT 24 Jun 24 04:41:44 PM PDT 24 1216815466 ps
T910 /workspace/coverage/default/11.spi_device_flash_and_tpm.623955937 Jun 24 04:40:59 PM PDT 24 Jun 24 04:42:41 PM PDT 24 19788592449 ps
T210 /workspace/coverage/default/14.spi_device_stress_all.1480938795 Jun 24 04:41:12 PM PDT 24 Jun 24 04:43:08 PM PDT 24 19719907464 ps
T911 /workspace/coverage/default/6.spi_device_tpm_rw.2031086746 Jun 24 04:40:48 PM PDT 24 Jun 24 04:40:52 PM PDT 24 46993763 ps
T912 /workspace/coverage/default/4.spi_device_mailbox.513568659 Jun 24 04:40:35 PM PDT 24 Jun 24 04:40:59 PM PDT 24 2136134889 ps
T913 /workspace/coverage/default/1.spi_device_stress_all.4280981131 Jun 24 04:40:19 PM PDT 24 Jun 24 04:40:38 PM PDT 24 38000605 ps
T914 /workspace/coverage/default/33.spi_device_tpm_read_hw_reg.4137557258 Jun 24 04:41:58 PM PDT 24 Jun 24 04:42:14 PM PDT 24 2648626465 ps
T915 /workspace/coverage/default/25.spi_device_flash_all.1082926669 Jun 24 04:41:38 PM PDT 24 Jun 24 04:42:24 PM PDT 24 1582358902 ps
T916 /workspace/coverage/default/41.spi_device_intercept.2880147014 Jun 24 04:42:18 PM PDT 24 Jun 24 04:42:42 PM PDT 24 3140292255 ps
T289 /workspace/coverage/default/31.spi_device_flash_and_tpm.597428640 Jun 24 04:41:53 PM PDT 24 Jun 24 04:45:05 PM PDT 24 26970679032 ps
T917 /workspace/coverage/default/1.spi_device_read_buffer_direct.3945723153 Jun 24 04:40:18 PM PDT 24 Jun 24 04:40:44 PM PDT 24 827105272 ps
T918 /workspace/coverage/default/7.spi_device_alert_test.612606040 Jun 24 04:40:55 PM PDT 24 Jun 24 04:41:00 PM PDT 24 13170035 ps
T919 /workspace/coverage/default/20.spi_device_mailbox.4251206 Jun 24 04:41:22 PM PDT 24 Jun 24 04:42:07 PM PDT 24 3944678518 ps
T920 /workspace/coverage/default/49.spi_device_mailbox.2185539166 Jun 24 04:42:45 PM PDT 24 Jun 24 04:43:30 PM PDT 24 14877987642 ps
T921 /workspace/coverage/default/47.spi_device_flash_all.3726449534 Jun 24 04:42:36 PM PDT 24 Jun 24 04:43:16 PM PDT 24 3493993360 ps
T922 /workspace/coverage/default/32.spi_device_pass_addr_payload_swap.547787806 Jun 24 04:41:54 PM PDT 24 Jun 24 04:42:17 PM PDT 24 9854092697 ps
T923 /workspace/coverage/default/7.spi_device_flash_and_tpm.3220141523 Jun 24 04:40:55 PM PDT 24 Jun 24 04:42:05 PM PDT 24 3582586758 ps
T924 /workspace/coverage/default/49.spi_device_pass_cmd_filtering.980039058 Jun 24 04:42:45 PM PDT 24 Jun 24 04:42:57 PM PDT 24 526664147 ps
T301 /workspace/coverage/default/4.spi_device_pass_addr_payload_swap.4012718416 Jun 24 04:40:36 PM PDT 24 Jun 24 04:40:48 PM PDT 24 302933193 ps
T925 /workspace/coverage/default/38.spi_device_flash_and_tpm.3990495261 Jun 24 04:42:11 PM PDT 24 Jun 24 04:43:26 PM PDT 24 6923174718 ps
T926 /workspace/coverage/default/1.spi_device_flash_all.1151387301 Jun 24 04:40:18 PM PDT 24 Jun 24 04:41:14 PM PDT 24 5345495711 ps
T298 /workspace/coverage/default/26.spi_device_flash_and_tpm_min_idle.1534104352 Jun 24 04:41:46 PM PDT 24 Jun 24 04:43:27 PM PDT 24 8278760927 ps
T927 /workspace/coverage/default/12.spi_device_read_buffer_direct.3744725569 Jun 24 04:41:00 PM PDT 24 Jun 24 04:41:14 PM PDT 24 4883002695 ps
T928 /workspace/coverage/default/32.spi_device_csb_read.4234971061 Jun 24 04:41:54 PM PDT 24 Jun 24 04:42:04 PM PDT 24 27782110 ps
T929 /workspace/coverage/default/5.spi_device_flash_all.626628748 Jun 24 04:40:46 PM PDT 24 Jun 24 04:41:28 PM PDT 24 5865890563 ps
T930 /workspace/coverage/default/36.spi_device_pass_cmd_filtering.2013436685 Jun 24 04:42:05 PM PDT 24 Jun 24 04:42:18 PM PDT 24 102106319 ps
T931 /workspace/coverage/default/41.spi_device_tpm_sts_read.3613944378 Jun 24 04:42:17 PM PDT 24 Jun 24 04:42:29 PM PDT 24 95804946 ps
T932 /workspace/coverage/default/26.spi_device_read_buffer_direct.658470001 Jun 24 04:41:42 PM PDT 24 Jun 24 04:41:56 PM PDT 24 3116782177 ps
T302 /workspace/coverage/default/10.spi_device_flash_and_tpm.1182118201 Jun 24 04:40:56 PM PDT 24 Jun 24 04:49:02 PM PDT 24 53311302279 ps
T933 /workspace/coverage/default/48.spi_device_pass_cmd_filtering.1493088937 Jun 24 04:42:37 PM PDT 24 Jun 24 04:42:52 PM PDT 24 1732320430 ps
T934 /workspace/coverage/default/24.spi_device_tpm_all.987514855 Jun 24 04:41:27 PM PDT 24 Jun 24 04:41:53 PM PDT 24 1364698709 ps
T935 /workspace/coverage/default/7.spi_device_tpm_rw.1562423214 Jun 24 04:40:52 PM PDT 24 Jun 24 04:40:59 PM PDT 24 325782981 ps
T936 /workspace/coverage/default/8.spi_device_stress_all.3508080183 Jun 24 04:40:54 PM PDT 24 Jun 24 04:44:02 PM PDT 24 247784894007 ps
T937 /workspace/coverage/default/4.spi_device_upload.3992998615 Jun 24 04:40:39 PM PDT 24 Jun 24 04:40:52 PM PDT 24 1833857665 ps
T938 /workspace/coverage/default/16.spi_device_tpm_sts_read.274550485 Jun 24 04:41:10 PM PDT 24 Jun 24 04:41:20 PM PDT 24 69981024 ps
T939 /workspace/coverage/default/31.spi_device_tpm_rw.1877561255 Jun 24 04:41:50 PM PDT 24 Jun 24 04:42:01 PM PDT 24 423253965 ps
T940 /workspace/coverage/default/23.spi_device_alert_test.1548277247 Jun 24 04:41:31 PM PDT 24 Jun 24 04:41:41 PM PDT 24 14109181 ps
T941 /workspace/coverage/default/16.spi_device_flash_and_tpm.3982072783 Jun 24 04:41:19 PM PDT 24 Jun 24 04:47:14 PM PDT 24 132279048347 ps
T942 /workspace/coverage/default/37.spi_device_flash_all.1026051602 Jun 24 04:42:14 PM PDT 24 Jun 24 04:42:29 PM PDT 24 195035098 ps
T943 /workspace/coverage/default/48.spi_device_alert_test.1696226523 Jun 24 04:42:42 PM PDT 24 Jun 24 04:42:48 PM PDT 24 55500099 ps
T944 /workspace/coverage/default/39.spi_device_mailbox.4280980212 Jun 24 04:42:09 PM PDT 24 Jun 24 04:43:21 PM PDT 24 62155408558 ps
T945 /workspace/coverage/default/30.spi_device_upload.635503812 Jun 24 04:41:53 PM PDT 24 Jun 24 04:42:16 PM PDT 24 3132895151 ps
T946 /workspace/coverage/default/30.spi_device_mailbox.2334479253 Jun 24 04:41:50 PM PDT 24 Jun 24 04:42:23 PM PDT 24 4266219163 ps
T947 /workspace/coverage/default/0.spi_device_pass_addr_payload_swap.1045240514 Jun 24 04:40:11 PM PDT 24 Jun 24 04:40:41 PM PDT 24 431007080 ps
T948 /workspace/coverage/default/35.spi_device_pass_cmd_filtering.82883054 Jun 24 04:42:05 PM PDT 24 Jun 24 04:42:19 PM PDT 24 348263512 ps
T949 /workspace/coverage/default/46.spi_device_flash_mode.2202131305 Jun 24 04:42:32 PM PDT 24 Jun 24 04:42:48 PM PDT 24 812110954 ps
T950 /workspace/coverage/default/18.spi_device_alert_test.1675146484 Jun 24 04:41:13 PM PDT 24 Jun 24 04:41:23 PM PDT 24 13706527 ps
T951 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.2752458422 Jun 24 04:42:36 PM PDT 24 Jun 24 04:42:55 PM PDT 24 553708532 ps
T952 /workspace/coverage/default/35.spi_device_tpm_sts_read.3249579800 Jun 24 04:42:04 PM PDT 24 Jun 24 04:42:15 PM PDT 24 120470745 ps
T953 /workspace/coverage/default/0.spi_device_pass_cmd_filtering.3480930130 Jun 24 04:40:20 PM PDT 24 Jun 24 04:40:45 PM PDT 24 3649811021 ps
T954 /workspace/coverage/default/6.spi_device_flash_and_tpm.2572760918 Jun 24 04:40:56 PM PDT 24 Jun 24 04:41:05 PM PDT 24 1470227090 ps
T955 /workspace/coverage/default/33.spi_device_pass_addr_payload_swap.615904962 Jun 24 04:41:56 PM PDT 24 Jun 24 04:42:14 PM PDT 24 1440646581 ps
T956 /workspace/coverage/default/49.spi_device_tpm_read_hw_reg.1210193574 Jun 24 04:42:43 PM PDT 24 Jun 24 04:43:03 PM PDT 24 9899343710 ps
T957 /workspace/coverage/default/43.spi_device_alert_test.1730165456 Jun 24 04:42:29 PM PDT 24 Jun 24 04:42:39 PM PDT 24 39618804 ps
T958 /workspace/coverage/default/42.spi_device_intercept.4159961207 Jun 24 04:42:23 PM PDT 24 Jun 24 04:42:51 PM PDT 24 2103398866 ps
T959 /workspace/coverage/default/40.spi_device_flash_and_tpm.1096413189 Jun 24 04:42:15 PM PDT 24 Jun 24 04:42:53 PM PDT 24 6723120057 ps
T960 /workspace/coverage/default/25.spi_device_tpm_all.1960591604 Jun 24 04:41:38 PM PDT 24 Jun 24 04:41:49 PM PDT 24 403173746 ps
T961 /workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.4290770567 Jun 24 04:40:51 PM PDT 24 Jun 24 04:41:21 PM PDT 24 5191646098 ps
T962 /workspace/coverage/default/32.spi_device_cfg_cmd.4045083694 Jun 24 04:42:01 PM PDT 24 Jun 24 04:42:17 PM PDT 24 373159369 ps
T963 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.1899474285 Jun 24 04:40:51 PM PDT 24 Jun 24 04:41:05 PM PDT 24 8022474610 ps
T964 /workspace/coverage/default/43.spi_device_flash_all.3547624313 Jun 24 04:42:22 PM PDT 24 Jun 24 04:42:34 PM PDT 24 106515340 ps
T965 /workspace/coverage/default/42.spi_device_tpm_rw.4139284451 Jun 24 04:42:27 PM PDT 24 Jun 24 04:42:39 PM PDT 24 537525798 ps
T966 /workspace/coverage/default/10.spi_device_flash_mode.178221889 Jun 24 04:40:54 PM PDT 24 Jun 24 04:41:04 PM PDT 24 527407116 ps
T144 /workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.1324948938 Jun 24 04:35:00 PM PDT 24 Jun 24 04:35:06 PM PDT 24 287560414 ps
T65 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1082339829 Jun 24 04:34:51 PM PDT 24 Jun 24 04:34:55 PM PDT 24 112604695 ps
T145 /workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.913759587 Jun 24 04:34:46 PM PDT 24 Jun 24 04:34:50 PM PDT 24 137620669 ps
T66 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.2479565700 Jun 24 04:34:59 PM PDT 24 Jun 24 04:35:02 PM PDT 24 155450169 ps
T114 /workspace/coverage/cover_reg_top/13.spi_device_csr_rw.411969865 Jun 24 04:35:15 PM PDT 24 Jun 24 04:35:19 PM PDT 24 134569206 ps
T146 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.1308818697 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:59 PM PDT 24 25981850 ps
T67 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.2365180792 Jun 24 04:34:29 PM PDT 24 Jun 24 04:34:49 PM PDT 24 1385883233 ps
T967 /workspace/coverage/cover_reg_top/6.spi_device_intr_test.4069567053 Jun 24 04:34:45 PM PDT 24 Jun 24 04:34:48 PM PDT 24 36674402 ps
T94 /workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.1708435348 Jun 24 04:34:46 PM PDT 24 Jun 24 04:35:06 PM PDT 24 1542479675 ps
T968 /workspace/coverage/cover_reg_top/31.spi_device_intr_test.3357703862 Jun 24 04:34:56 PM PDT 24 Jun 24 04:34:59 PM PDT 24 17884343 ps
T93 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.4274361814 Jun 24 04:35:11 PM PDT 24 Jun 24 04:35:17 PM PDT 24 107084388 ps
T147 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.1839661897 Jun 24 04:34:50 PM PDT 24 Jun 24 04:34:54 PM PDT 24 170768989 ps
T96 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2906451993 Jun 24 04:34:39 PM PDT 24 Jun 24 04:34:41 PM PDT 24 186051419 ps
T84 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.1572661900 Jun 24 04:34:40 PM PDT 24 Jun 24 04:34:42 PM PDT 24 179237940 ps
T969 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.2751884953 Jun 24 04:35:12 PM PDT 24 Jun 24 04:35:17 PM PDT 24 46305514 ps
T115 /workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3899353651 Jun 24 04:34:36 PM PDT 24 Jun 24 04:34:39 PM PDT 24 62065544 ps
T159 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.1135863283 Jun 24 04:35:15 PM PDT 24 Jun 24 04:35:19 PM PDT 24 276778222 ps
T106 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.3701320223 Jun 24 04:34:45 PM PDT 24 Jun 24 04:34:51 PM PDT 24 297578591 ps
T116 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2518466965 Jun 24 04:34:32 PM PDT 24 Jun 24 04:34:50 PM PDT 24 632723149 ps
T117 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.466634200 Jun 24 04:34:44 PM PDT 24 Jun 24 04:34:49 PM PDT 24 40563794 ps
T970 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.1826404738 Jun 24 04:35:06 PM PDT 24 Jun 24 04:35:10 PM PDT 24 113796092 ps
T971 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.341595854 Jun 24 04:34:59 PM PDT 24 Jun 24 04:35:02 PM PDT 24 29082573 ps
T972 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.1432345731 Jun 24 04:34:56 PM PDT 24 Jun 24 04:35:01 PM PDT 24 170409302 ps
T973 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1697376614 Jun 24 04:34:52 PM PDT 24 Jun 24 04:34:57 PM PDT 24 61777798 ps
T160 /workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1609078404 Jun 24 04:34:46 PM PDT 24 Jun 24 04:34:50 PM PDT 24 75976761 ps
T974 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3129217263 Jun 24 04:34:40 PM PDT 24 Jun 24 04:34:53 PM PDT 24 202881886 ps
T975 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.1350229481 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:58 PM PDT 24 17280552 ps
T95 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.29463978 Jun 24 04:34:36 PM PDT 24 Jun 24 04:34:44 PM PDT 24 421048258 ps
T976 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.1922954014 Jun 24 04:34:48 PM PDT 24 Jun 24 04:34:51 PM PDT 24 40197728 ps
T111 /workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.2748093382 Jun 24 04:34:46 PM PDT 24 Jun 24 04:35:05 PM PDT 24 1107636773 ps
T977 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.3336209128 Jun 24 04:35:00 PM PDT 24 Jun 24 04:35:03 PM PDT 24 44617160 ps
T161 /workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.130545139 Jun 24 04:35:09 PM PDT 24 Jun 24 04:35:18 PM PDT 24 5802686764 ps
T978 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.1442128583 Jun 24 04:34:42 PM PDT 24 Jun 24 04:34:44 PM PDT 24 10358413 ps
T979 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.1888247916 Jun 24 04:34:58 PM PDT 24 Jun 24 04:35:01 PM PDT 24 15662438 ps
T118 /workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.2933870302 Jun 24 04:34:29 PM PDT 24 Jun 24 04:34:32 PM PDT 24 40841035 ps
T119 /workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.1578801237 Jun 24 04:34:46 PM PDT 24 Jun 24 04:34:49 PM PDT 24 53092149 ps
T980 /workspace/coverage/cover_reg_top/28.spi_device_intr_test.306625308 Jun 24 04:35:02 PM PDT 24 Jun 24 04:35:05 PM PDT 24 39164399 ps
T97 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.2767530378 Jun 24 04:34:40 PM PDT 24 Jun 24 04:34:44 PM PDT 24 215855437 ps
T120 /workspace/coverage/cover_reg_top/1.spi_device_csr_rw.997097669 Jun 24 04:34:47 PM PDT 24 Jun 24 04:34:50 PM PDT 24 42667906 ps
T162 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.752104891 Jun 24 04:34:48 PM PDT 24 Jun 24 04:34:52 PM PDT 24 472270146 ps
T98 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.3322654979 Jun 24 04:34:42 PM PDT 24 Jun 24 04:34:47 PM PDT 24 212992666 ps
T981 /workspace/coverage/cover_reg_top/2.spi_device_intr_test.3141388436 Jun 24 04:34:36 PM PDT 24 Jun 24 04:34:38 PM PDT 24 17558029 ps
T982 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2235845627 Jun 24 04:34:41 PM PDT 24 Jun 24 04:34:55 PM PDT 24 753359240 ps
T121 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.548142385 Jun 24 04:34:36 PM PDT 24 Jun 24 04:34:39 PM PDT 24 202066450 ps
T983 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.1071229371 Jun 24 04:35:02 PM PDT 24 Jun 24 04:35:04 PM PDT 24 28213765 ps
T122 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.57460523 Jun 24 04:34:44 PM PDT 24 Jun 24 04:34:48 PM PDT 24 60792549 ps
T104 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3873733024 Jun 24 04:34:34 PM PDT 24 Jun 24 04:34:38 PM PDT 24 373940416 ps
T112 /workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.797326189 Jun 24 04:34:54 PM PDT 24 Jun 24 04:35:08 PM PDT 24 813171433 ps
T984 /workspace/coverage/cover_reg_top/10.spi_device_intr_test.173349094 Jun 24 04:34:45 PM PDT 24 Jun 24 04:34:48 PM PDT 24 14233915 ps
T101 /workspace/coverage/cover_reg_top/0.spi_device_tl_errors.1533205604 Jun 24 04:34:33 PM PDT 24 Jun 24 04:34:37 PM PDT 24 121623530 ps
T985 /workspace/coverage/cover_reg_top/26.spi_device_intr_test.2126271850 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:58 PM PDT 24 15595814 ps
T986 /workspace/coverage/cover_reg_top/9.spi_device_intr_test.310885741 Jun 24 04:34:46 PM PDT 24 Jun 24 04:34:49 PM PDT 24 26523029 ps
T163 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.416344514 Jun 24 04:34:50 PM PDT 24 Jun 24 04:35:07 PM PDT 24 2783619937 ps
T99 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3145450981 Jun 24 04:34:43 PM PDT 24 Jun 24 04:34:50 PM PDT 24 83729071 ps
T987 /workspace/coverage/cover_reg_top/5.spi_device_intr_test.2793190280 Jun 24 04:34:50 PM PDT 24 Jun 24 04:34:53 PM PDT 24 40887362 ps
T988 /workspace/coverage/cover_reg_top/8.spi_device_intr_test.3880511277 Jun 24 04:34:46 PM PDT 24 Jun 24 04:34:49 PM PDT 24 26075156 ps
T989 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.2154944517 Jun 24 04:34:56 PM PDT 24 Jun 24 04:34:59 PM PDT 24 15750762 ps
T990 /workspace/coverage/cover_reg_top/4.spi_device_mem_walk.2199384562 Jun 24 04:34:55 PM PDT 24 Jun 24 04:35:02 PM PDT 24 39275439 ps
T991 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.865124805 Jun 24 04:35:15 PM PDT 24 Jun 24 04:35:18 PM PDT 24 18857644 ps
T992 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.2503718128 Jun 24 04:35:07 PM PDT 24 Jun 24 04:35:08 PM PDT 24 14186548 ps
T108 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.881885606 Jun 24 04:34:59 PM PDT 24 Jun 24 04:35:04 PM PDT 24 317306042 ps
T993 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.4046618747 Jun 24 04:34:36 PM PDT 24 Jun 24 04:34:38 PM PDT 24 15437196 ps
T994 /workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.3963704198 Jun 24 04:34:46 PM PDT 24 Jun 24 04:34:50 PM PDT 24 53250581 ps
T164 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1221514351 Jun 24 04:34:53 PM PDT 24 Jun 24 04:35:19 PM PDT 24 1133855445 ps
T995 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.3357313127 Jun 24 04:34:59 PM PDT 24 Jun 24 04:35:02 PM PDT 24 15220092 ps
T996 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.3057231027 Jun 24 04:34:54 PM PDT 24 Jun 24 04:34:56 PM PDT 24 38783148 ps
T997 /workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.2544618853 Jun 24 04:34:51 PM PDT 24 Jun 24 04:34:55 PM PDT 24 42529727 ps
T998 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.1296061276 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:58 PM PDT 24 12522749 ps
T999 /workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3771028476 Jun 24 04:34:52 PM PDT 24 Jun 24 04:34:56 PM PDT 24 468266705 ps
T1000 /workspace/coverage/cover_reg_top/37.spi_device_intr_test.4168433510 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:59 PM PDT 24 33885538 ps
T100 /workspace/coverage/cover_reg_top/15.spi_device_tl_errors.4096244570 Jun 24 04:34:52 PM PDT 24 Jun 24 04:34:57 PM PDT 24 160296820 ps
T1001 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2931729958 Jun 24 04:34:46 PM PDT 24 Jun 24 04:34:49 PM PDT 24 76492112 ps
T107 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.2182936048 Jun 24 04:34:54 PM PDT 24 Jun 24 04:34:58 PM PDT 24 27814640 ps
T85 /workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2652183900 Jun 24 04:34:49 PM PDT 24 Jun 24 04:34:52 PM PDT 24 135767127 ps
T1002 /workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1482744571 Jun 24 04:34:49 PM PDT 24 Jun 24 04:34:51 PM PDT 24 13914118 ps
T165 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3495439160 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:59 PM PDT 24 56944140 ps
T1003 /workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.703461142 Jun 24 04:34:49 PM PDT 24 Jun 24 04:34:59 PM PDT 24 311014857 ps
T1004 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.3675467684 Jun 24 04:34:55 PM PDT 24 Jun 24 04:35:01 PM PDT 24 178129789 ps
T102 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.4178273413 Jun 24 04:34:50 PM PDT 24 Jun 24 04:34:56 PM PDT 24 545682774 ps
T1005 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.2125754125 Jun 24 04:34:51 PM PDT 24 Jun 24 04:34:54 PM PDT 24 368584508 ps
T1006 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.2609935185 Jun 24 04:34:53 PM PDT 24 Jun 24 04:34:55 PM PDT 24 12337586 ps
T1007 /workspace/coverage/cover_reg_top/12.spi_device_intr_test.1389641485 Jun 24 04:35:01 PM PDT 24 Jun 24 04:35:03 PM PDT 24 34559617 ps
T1008 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.487952375 Jun 24 04:34:59 PM PDT 24 Jun 24 04:35:02 PM PDT 24 19852226 ps
T105 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2661953014 Jun 24 04:34:45 PM PDT 24 Jun 24 04:34:50 PM PDT 24 409796374 ps
T1009 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3459299040 Jun 24 04:34:48 PM PDT 24 Jun 24 04:34:52 PM PDT 24 207987308 ps
T103 /workspace/coverage/cover_reg_top/3.spi_device_tl_errors.1639902524 Jun 24 04:34:42 PM PDT 24 Jun 24 04:34:46 PM PDT 24 135383659 ps
T1010 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.2444479144 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:59 PM PDT 24 66520832 ps
T184 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1425056591 Jun 24 04:35:16 PM PDT 24 Jun 24 04:35:26 PM PDT 24 372667502 ps
T123 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.3390611516 Jun 24 04:34:45 PM PDT 24 Jun 24 04:34:50 PM PDT 24 36530866 ps
T1011 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.1374834995 Jun 24 04:35:15 PM PDT 24 Jun 24 04:35:19 PM PDT 24 16115638 ps
T124 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.4100699040 Jun 24 04:34:48 PM PDT 24 Jun 24 04:34:52 PM PDT 24 138415411 ps
T1012 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.3369114926 Jun 24 04:35:00 PM PDT 24 Jun 24 04:35:03 PM PDT 24 69778681 ps
T1013 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.4167473118 Jun 24 04:34:54 PM PDT 24 Jun 24 04:35:00 PM PDT 24 417062169 ps
T1014 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.4067146173 Jun 24 04:34:55 PM PDT 24 Jun 24 04:34:59 PM PDT 24 52753595 ps
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