Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	408007305	3292	0	0
addr_swap_data_rd_A	408007305	1984	0	0
addr_swap_mask_rd_A	408007305	1997	0	0
cfg_rd_A	408007305	2842	0	0
cmd_filter_0_rd_A	408007305	17479	0	0
cmd_filter_1_rd_A	408007305	16370	0	0
cmd_filter_2_rd_A	408007305	16997	0	0
cmd_filter_3_rd_A	408007305	18544	0	0
cmd_filter_4_rd_A	408007305	17223	0	0
cmd_filter_5_rd_A	408007305	18111	0	0
cmd_filter_6_rd_A	408007305	17125	0	0
cmd_filter_7_rd_A	408007305	15888	0	0
cmd_info_0_rd_A	408007305	7957	0	0
cmd_info_10_rd_A	408007305	7392	0	0
cmd_info_11_rd_A	408007305	8286	0	0
cmd_info_12_rd_A	408007305	8092	0	0
cmd_info_13_rd_A	408007305	7841	0	0
cmd_info_14_rd_A	408007305	7605	0	0
cmd_info_15_rd_A	408007305	8377	0	0
cmd_info_16_rd_A	408007305	7770	0	0
cmd_info_17_rd_A	408007305	7152	0	0
cmd_info_18_rd_A	408007305	7792	0	0
cmd_info_19_rd_A	408007305	7028	0	0
cmd_info_1_rd_A	408007305	7965	0	0
cmd_info_20_rd_A	408007305	8362	0	0
cmd_info_21_rd_A	408007305	8352	0	0
cmd_info_22_rd_A	408007305	8326	0	0
cmd_info_23_rd_A	408007305	7377	0	0
cmd_info_2_rd_A	408007305	7884	0	0
cmd_info_3_rd_A	408007305	7378	0	0
cmd_info_4_rd_A	408007305	7942	0	0
cmd_info_5_rd_A	408007305	8556	0	0
cmd_info_6_rd_A	408007305	8061	0	0
cmd_info_7_rd_A	408007305	7490	0	0
cmd_info_8_rd_A	408007305	7307	0	0
cmd_info_9_rd_A	408007305	7868	0	0
cmd_info_en4b_rd_A	408007305	2512	0	0
cmd_info_ex4b_rd_A	408007305	2476	0	0
cmd_info_wrdi_rd_A	408007305	2299	0	0
cmd_info_wren_rd_A	408007305	2350	0	0
intercept_en_rd_A	408007305	3307	0	0
intr_enable_rd_A	408007305	6004	0	0
jedec_cc_rd_A	408007305	2393	0	0
jedec_id_rd_A	408007305	2438	0	0
mailbox_addr_rd_A	408007305	2046	0	0
payload_swap_data_rd_A	408007305	2018	0	0
payload_swap_mask_rd_A	408007305	1863	0	0
read_threshold_rd_A	408007305	1929	0	0
tpm_access_0_rd_A	408007305	3259	0	0
tpm_access_1_rd_A	408007305	2064	0	0
tpm_cfg_rd_A	408007305	3906	0	0
tpm_did_vid_rd_A	408007305	2340	0	0
tpm_int_enable_rd_A	408007305	2006	0	0
tpm_int_status_rd_A	408007305	2011	0	0
tpm_int_vector_rd_A	408007305	1989	0	0
tpm_intf_capability_rd_A	408007305	1931	0	0
tpm_rid_rd_A	408007305	1939	0	0
tpm_sts_rd_A	408007305	2062	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	3292	0	0
T53	19169	5	0	0
T54	4913	120	0	0
T55	7364	94	0	0
T77	14896	202	0	0
T78	104835	8	0	0
T79	9799	3	0	0
T81	2915	95	0	0
T82	5351	142	0	0
T91	10780	5	0	0
T93	72155	4	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	1984	0	0
T64	2993	8	0	0
T78	104835	131	0	0
T90	15330	23	0	0
T93	72155	83	0	0
T94	5481	7	0	0
T96	11278	20	0	0
T122	7331	17	0	0
T123	36078	23	0	0
T124	69201	88	0	0
T125	15941	19	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	1997	0	0
T64	2993	5	0	0
T78	104835	99	0	0
T90	15330	22	0	0
T93	72155	88	0	0
T94	5481	3	0	0
T96	11278	13	0	0
T122	7331	41	0	0
T123	36078	51	0	0
T124	69201	68	0	0
T125	15941	21	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2842	0	0
T64	2993	9	0	0
T78	104835	258	0	0
T90	15330	60	0	0
T93	72155	88	0	0
T94	5481	18	0	0
T96	11278	9	0	0
T122	7331	18	0	0
T123	36078	60	0	0
T124	69201	158	0	0
T125	15941	22	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	17479	0	0
T78	104835	1939	0	0
T90	15330	139	0	0
T93	72155	1461	0	0
T94	5481	4	0	0
T96	11278	340	0	0
T122	7331	5	0	0
T123	36078	550	0	0
T124	69201	1348	0	0
T125	15941	388	0	0
T126	15634	206	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	16370	0	0
T64	2993	1	0	0
T78	104835	1494	0	0
T90	15330	282	0	0
T93	72155	1003	0	0
T94	5481	10	0	0
T96	11278	116	0	0
T122	7331	64	0	0
T123	36078	773	0	0
T124	69201	1477	0	0
T125	15941	395	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	16997	0	0
T64	2993	3	0	0
T78	104835	1777	0	0
T90	15330	218	0	0
T93	72155	1470	0	0
T94	5481	123	0	0
T96	11278	110	0	0
T122	7331	12	0	0
T123	36078	539	0	0
T124	69201	677	0	0
T125	15941	369	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	18544	0	0
T64	2993	6	0	0
T78	104835	2257	0	0
T90	15330	352	0	0
T93	72155	1248	0	0
T94	5481	10	0	0
T96	11278	116	0	0
T122	7331	31	0	0
T123	36078	750	0	0
T124	69201	1343	0	0
T125	15941	292	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	17223	0	0
T64	2993	11	0	0
T78	104835	2419	0	0
T90	15330	160	0	0
T93	72155	1240	0	0
T94	5481	12	0	0
T96	11278	217	0	0
T122	7331	39	0	0
T123	36078	515	0	0
T124	69201	1162	0	0
T125	15941	20	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	18111	0	0
T64	2993	10	0	0
T78	104835	1390	0	0
T90	15330	243	0	0
T93	72155	1213	0	0
T94	5481	114	0	0
T96	11278	143	0	0
T122	7331	59	0	0
T123	36078	1031	0	0
T124	69201	1032	0	0
T125	15941	351	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	17125	0	0
T64	2993	7	0	0
T78	104835	1720	0	0
T90	15330	20	0	0
T93	72155	1272	0	0
T94	5481	11	0	0
T96	11278	238	0	0
T122	7331	24	0	0
T123	36078	611	0	0
T124	69201	1699	0	0
T125	15941	26	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	15888	0	0
T64	2993	7	0	0
T78	104835	1933	0	0
T88	14672	5	0	0
T90	15330	141	0	0
T93	72155	1587	0	0
T94	5481	93	0	0
T96	11278	249	0	0
T122	7331	15	0	0
T123	36078	733	0	0
T124	69201	1267	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7957	0	0
T64	2993	10	0	0
T78	104835	728	0	0
T90	15330	55	0	0
T93	72155	399	0	0
T94	5481	37	0	0
T96	11278	100	0	0
T122	7331	32	0	0
T123	36078	240	0	0
T124	69201	771	0	0
T125	15941	186	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7392	0	0
T64	2993	7	0	0
T78	104835	781	0	0
T90	15330	62	0	0
T93	72155	443	0	0
T94	5481	5	0	0
T96	11278	112	0	0
T122	7331	31	0	0
T123	36078	352	0	0
T124	69201	412	0	0
T125	15941	134	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8286	0	0
T64	2993	3	0	0
T78	104835	898	0	0
T90	15330	116	0	0
T93	72155	514	0	0
T94	5481	60	0	0
T96	11278	8	0	0
T122	7331	5	0	0
T123	36078	356	0	0
T124	69201	406	0	0
T125	15941	17	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8092	0	0
T64	2993	13	0	0
T78	104835	769	0	0
T90	15330	95	0	0
T93	72155	452	0	0
T94	5481	52	0	0
T96	11278	74	0	0
T122	7331	49	0	0
T123	36078	324	0	0
T124	69201	516	0	0
T125	15941	75	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7841	0	0
T64	2993	4	0	0
T78	104835	921	0	0
T90	15330	96	0	0
T93	72155	364	0	0
T94	5481	70	0	0
T96	11278	80	0	0
T122	7331	8	0	0
T123	36078	342	0	0
T124	69201	464	0	0
T125	15941	27	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7605	0	0
T64	2993	10	0	0
T78	104835	760	0	0
T90	15330	103	0	0
T93	72155	672	0	0
T94	5481	50	0	0
T96	11278	88	0	0
T122	7331	14	0	0
T123	36078	256	0	0
T124	69201	499	0	0
T125	15941	179	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8377	0	0
T64	2993	4	0	0
T78	104835	932	0	0
T90	15330	102	0	0
T93	72155	545	0	0
T94	5481	70	0	0
T96	11278	67	0	0
T122	7331	37	0	0
T123	36078	371	0	0
T124	69201	605	0	0
T125	15941	117	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7770	0	0
T64	2993	2	0	0
T78	104835	620	0	0
T90	15330	114	0	0
T93	72155	430	0	0
T94	5481	4	0	0
T96	11278	65	0	0
T122	7331	15	0	0
T123	36078	243	0	0
T124	69201	577	0	0
T125	15941	24	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7152	0	0
T64	2993	2	0	0
T78	104835	678	0	0
T90	15330	40	0	0
T93	72155	759	0	0
T94	5481	10	0	0
T96	11278	43	0	0
T122	7331	30	0	0
T123	36078	285	0	0
T124	69201	514	0	0
T125	15941	15	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7792	0	0
T64	2993	9	0	0
T78	104835	652	0	0
T90	15330	107	0	0
T93	72155	585	0	0
T94	5481	7	0	0
T96	11278	104	0	0
T122	7331	1	0	0
T123	36078	359	0	0
T124	69201	403	0	0
T125	15941	100	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7028	0	0
T64	2993	1	0	0
T78	104835	521	0	0
T88	14672	9	0	0
T90	15330	13	0	0
T93	72155	474	0	0
T94	5481	73	0	0
T96	11278	115	0	0
T122	7331	16	0	0
T123	36078	328	0	0
T124	69201	412	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7965	0	0
T64	2993	10	0	0
T78	104835	755	0	0
T90	15330	15	0	0
T93	72155	509	0	0
T94	5481	48	0	0
T96	11278	52	0	0
T122	7331	65	0	0
T123	36078	246	0	0
T124	69201	646	0	0
T125	15941	110	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8362	0	0
T64	2993	6	0	0
T78	104835	970	0	0
T90	15330	22	0	0
T93	72155	419	0	0
T94	5481	55	0	0
T96	11278	92	0	0
T122	7331	3	0	0
T123	36078	178	0	0
T124	69201	598	0	0
T125	15941	104	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8352	0	0
T64	2993	4	0	0
T78	104835	886	0	0
T90	15330	66	0	0
T93	72155	489	0	0
T94	5481	3	0	0
T96	11278	56	0	0
T122	7331	1	0	0
T123	36078	371	0	0
T124	69201	625	0	0
T125	15941	71	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8326	0	0
T64	2993	3	0	0
T78	104835	603	0	0
T88	14672	9	0	0
T90	15330	95	0	0
T93	72155	715	0	0
T94	5481	53	0	0
T96	11278	143	0	0
T122	7331	21	0	0
T123	36078	164	0	0
T124	69201	515	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7377	0	0
T64	2993	8	0	0
T78	104835	743	0	0
T90	15330	122	0	0
T93	72155	461	0	0
T94	5481	3	0	0
T96	11278	53	0	0
T122	7331	22	0	0
T123	36078	256	0	0
T124	69201	484	0	0
T125	15941	172	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7884	0	0
T64	2993	12	0	0
T78	104835	767	0	0
T90	15330	129	0	0
T93	72155	603	0	0
T94	5481	1	0	0
T96	11278	49	0	0
T122	7331	24	0	0
T123	36078	291	0	0
T124	69201	369	0	0
T125	15941	124	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7378	0	0
T64	2993	8	0	0
T78	104835	615	0	0
T90	15330	129	0	0
T93	72155	644	0	0
T94	5481	64	0	0
T96	11278	42	0	0
T122	7331	11	0	0
T123	36078	310	0	0
T124	69201	394	0	0
T125	15941	90	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7942	0	0
T64	2993	5	0	0
T78	104835	956	0	0
T90	15330	69	0	0
T93	72155	685	0	0
T94	5481	49	0	0
T96	11278	57	0	0
T122	7331	8	0	0
T123	36078	259	0	0
T124	69201	395	0	0
T125	15941	174	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8556	0	0
T64	2993	11	0	0
T78	104835	817	0	0
T90	15330	153	0	0
T93	72155	424	0	0
T94	5481	66	0	0
T96	11278	109	0	0
T122	7331	5	0	0
T123	36078	359	0	0
T124	69201	553	0	0
T125	15941	105	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	8061	0	0
T64	2993	3	0	0
T78	104835	881	0	0
T90	15330	136	0	0
T93	72155	356	0	0
T94	5481	55	0	0
T96	11278	137	0	0
T122	7331	21	0	0
T123	36078	295	0	0
T124	69201	346	0	0
T125	15941	62	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7490	0	0
T64	2993	15	0	0
T78	104835	955	0	0
T90	15330	69	0	0
T93	72155	451	0	0
T94	5481	13	0	0
T96	11278	112	0	0
T122	7331	4	0	0
T123	36078	287	0	0
T124	69201	538	0	0
T125	15941	67	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7307	0	0
T64	2993	13	0	0
T78	104835	616	0	0
T90	15330	24	0	0
T93	72155	449	0	0
T94	5481	7	0	0
T96	11278	141	0	0
T122	7331	21	0	0
T123	36078	134	0	0
T124	69201	512	0	0
T125	15941	101	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	7868	0	0
T64	2993	11	0	0
T78	104835	566	0	0
T90	15330	93	0	0
T93	72155	738	0	0
T94	5481	43	0	0
T96	11278	105	0	0
T122	7331	54	0	0
T123	36078	377	0	0
T124	69201	428	0	0
T125	15941	78	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2512	0	0
T64	2993	5	0	0
T78	104835	159	0	0
T90	15330	32	0	0
T93	72155	124	0	0
T94	5481	13	0	0
T96	11278	12	0	0
T122	7331	9	0	0
T123	36078	51	0	0
T124	69201	81	0	0
T125	15941	21	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2476	0	0
T64	2993	7	0	0
T78	104835	205	0	0
T90	15330	15	0	0
T93	72155	122	0	0
T94	5481	18	0	0
T96	11278	2	0	0
T122	7331	24	0	0
T123	36078	61	0	0
T124	69201	89	0	0
T125	15941	30	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2299	0	0
T64	2993	9	0	0
T78	104835	135	0	0
T90	15330	31	0	0
T93	72155	107	0	0
T94	5481	2	0	0
T96	11278	12	0	0
T123	36078	56	0	0
T124	69201	115	0	0
T125	15941	25	0	0
T126	15634	33	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2350	0	0
T64	2993	9	0	0
T78	104835	148	0	0
T90	15330	17	0	0
T93	72155	103	0	0
T94	5481	4	0	0
T96	11278	23	0	0
T122	7331	18	0	0
T123	36078	50	0	0
T124	69201	100	0	0
T125	15941	28	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	3307	0	0
T78	104835	297	0	0
T90	15330	14	0	0
T93	72155	174	0	0
T94	5481	11	0	0
T96	11278	17	0	0
T122	7331	24	0	0
T123	36078	101	0	0
T124	69201	167	0	0
T125	15941	49	0	0
T126	15634	55	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	6004	0	0
T18	151765	6	0	0
T19	575212	0	0	0
T34	0	50	0	0
T76	16480	0	0	0
T127	0	20	0	0
T128	0	4	0	0
T129	0	42	0	0
T130	0	48	0	0
T131	0	67	0	0
T132	0	4	0	0
T133	0	40	0	0
T134	0	47	0	0
T135	3638	0	0	0
T136	2679	0	0	0
T137	2201	0	0	0
T138	1973	0	0	0
T139	1651	0	0	0
T140	10441	0	0	0
T141	1814	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2393	0	0
T64	2993	3	0	0
T78	104835	146	0	0
T90	15330	23	0	0
T93	72155	112	0	0
T94	5481	9	0	0
T96	11278	23	0	0
T122	7331	12	0	0
T123	36078	76	0	0
T124	69201	100	0	0
T125	15941	29	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2438	0	0
T64	2993	7	0	0
T78	104835	172	0	0
T90	15330	26	0	0
T93	72155	124	0	0
T94	5481	8	0	0
T96	11278	25	0	0
T122	7331	16	0	0
T123	36078	76	0	0
T124	69201	106	0	0
T125	15941	34	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2046	0	0
T64	2993	4	0	0
T78	104835	105	0	0
T90	15330	23	0	0
T93	72155	90	0	0
T94	5481	12	0	0
T96	11278	8	0	0
T122	7331	9	0	0
T123	36078	27	0	0
T124	69201	89	0	0
T125	15941	22	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2018	0	0
T64	2993	5	0	0
T78	104835	99	0	0
T90	15330	22	0	0
T93	72155	92	0	0
T94	5481	12	0	0
T96	11278	13	0	0
T122	7331	24	0	0
T123	36078	14	0	0
T124	69201	85	0	0
T125	15941	26	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	1863	0	0
T64	2993	9	0	0
T78	104835	92	0	0
T90	15330	26	0	0
T93	72155	73	0	0
T94	5481	1	0	0
T122	7331	19	0	0
T123	36078	24	0	0
T124	69201	83	0	0
T125	15941	11	0	0
T126	15634	19	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	1929	0	0
T64	2993	12	0	0
T78	104835	118	0	0
T90	15330	20	0	0
T93	72155	75	0	0
T94	5481	4	0	0
T96	11278	14	0	0
T122	7331	19	0	0
T123	36078	30	0	0
T124	69201	87	0	0
T125	15941	25	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	3259	0	0
T64	2993	10	0	0
T78	104835	226	0	0
T90	15330	28	0	0
T93	72155	156	0	0
T94	5481	6	0	0
T96	11278	14	0	0
T122	7331	4	0	0
T123	36078	96	0	0
T124	69201	199	0	0
T125	15941	30	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2064	0	0
T64	2993	10	0	0
T78	104835	110	0	0
T90	15330	22	0	0
T93	72155	96	0	0
T94	5481	9	0	0
T96	11278	17	0	0
T122	7331	21	0	0
T123	36078	55	0	0
T124	69201	83	0	0
T125	15941	18	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	3906	0	0
T64	2993	2	0	0
T78	104835	377	0	0
T90	15330	58	0	0
T93	72155	240	0	0
T94	5481	26	0	0
T96	11278	60	0	0
T122	7331	11	0	0
T123	36078	115	0	0
T124	69201	184	0	0
T125	15941	51	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2340	0	0
T64	2993	8	0	0
T78	104835	135	0	0
T90	15330	17	0	0
T93	72155	129	0	0
T94	5481	15	0	0
T96	11278	14	0	0
T122	7331	9	0	0
T123	36078	72	0	0
T124	69201	104	0	0
T125	15941	26	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2006	0	0
T64	2993	9	0	0
T78	104835	108	0	0
T90	15330	24	0	0
T93	72155	78	0	0
T94	5481	11	0	0
T96	11278	4	0	0
T122	7331	18	0	0
T123	36078	44	0	0
T124	69201	65	0	0
T125	15941	16	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2011	0	0
T78	104835	117	0	0
T88	14672	2	0	0
T90	15330	17	0	0
T93	72155	82	0	0
T94	5481	9	0	0
T96	11278	12	0	0
T122	7331	39	0	0
T123	36078	36	0	0
T124	69201	95	0	0
T125	15941	12	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	1989	0	0
T64	2993	11	0	0
T78	104835	113	0	0
T90	15330	10	0	0
T93	72155	74	0	0
T94	5481	5	0	0
T96	11278	5	0	0
T122	7331	20	0	0
T123	36078	43	0	0
T124	69201	71	0	0
T125	15941	28	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	1931	0	0
T64	2993	14	0	0
T78	104835	96	0	0
T90	15330	18	0	0
T93	72155	74	0	0
T94	5481	1	0	0
T96	11278	8	0	0
T122	7331	30	0	0
T123	36078	35	0	0
T124	69201	86	0	0
T125	15941	33	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	1939	0	0
T64	2993	9	0	0
T78	104835	115	0	0
T88	14672	4	0	0
T90	15330	21	0	0
T93	72155	69	0	0
T94	5481	3	0	0
T96	11278	8	0	0
T122	7331	39	0	0
T123	36078	35	0	0
T124	69201	82	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	408007305	2062	0	0
T64	2993	4	0	0
T78	104835	134	0	0
T90	15330	27	0	0
T93	72155	101	0	0
T94	5481	9	0	0
T96	11278	13	0	0
T122	7331	16	0	0
T123	36078	42	0	0
T124	69201	61	0	0
T125	15941	36	0	0