Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2814 |
0 |
0 |
T63 |
5908 |
22 |
0 |
0 |
T64 |
2393 |
10 |
0 |
0 |
T65 |
4041 |
10 |
0 |
0 |
T93 |
89969 |
5 |
0 |
0 |
T94 |
5756 |
95 |
0 |
0 |
T95 |
19811 |
1 |
0 |
0 |
T96 |
26840 |
2 |
0 |
0 |
T97 |
8365 |
67 |
0 |
0 |
T98 |
5106 |
57 |
0 |
0 |
T105 |
3052 |
142 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2482 |
0 |
0 |
T93 |
89969 |
66 |
0 |
0 |
T111 |
180773 |
465 |
0 |
0 |
T113 |
7203 |
7 |
0 |
0 |
T132 |
20985 |
58 |
0 |
0 |
T139 |
19549 |
82 |
0 |
0 |
T140 |
7063 |
7 |
0 |
0 |
T141 |
13830 |
32 |
0 |
0 |
T142 |
98164 |
114 |
0 |
0 |
T143 |
7717 |
11 |
0 |
0 |
T144 |
4296 |
5 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2630 |
0 |
0 |
T93 |
89969 |
65 |
0 |
0 |
T111 |
180773 |
497 |
0 |
0 |
T113 |
7203 |
13 |
0 |
0 |
T132 |
20985 |
93 |
0 |
0 |
T139 |
19549 |
71 |
0 |
0 |
T140 |
7063 |
2 |
0 |
0 |
T141 |
13830 |
25 |
0 |
0 |
T142 |
98164 |
82 |
0 |
0 |
T143 |
7717 |
15 |
0 |
0 |
T145 |
7730 |
20 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
3030 |
0 |
0 |
T93 |
89969 |
137 |
0 |
0 |
T111 |
180773 |
463 |
0 |
0 |
T113 |
7203 |
11 |
0 |
0 |
T132 |
20985 |
71 |
0 |
0 |
T139 |
19549 |
24 |
0 |
0 |
T140 |
7063 |
31 |
0 |
0 |
T141 |
13830 |
23 |
0 |
0 |
T142 |
98164 |
230 |
0 |
0 |
T143 |
7717 |
23 |
0 |
0 |
T145 |
7730 |
20 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
8903 |
0 |
0 |
T93 |
89969 |
1169 |
0 |
0 |
T111 |
180773 |
454 |
0 |
0 |
T113 |
7203 |
7 |
0 |
0 |
T132 |
20985 |
45 |
0 |
0 |
T139 |
19549 |
48 |
0 |
0 |
T140 |
7063 |
156 |
0 |
0 |
T141 |
13830 |
147 |
0 |
0 |
T142 |
98164 |
1734 |
0 |
0 |
T143 |
7717 |
16 |
0 |
0 |
T145 |
7730 |
2 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
9891 |
0 |
0 |
T63 |
5908 |
6 |
0 |
0 |
T93 |
89969 |
1335 |
0 |
0 |
T111 |
180773 |
456 |
0 |
0 |
T113 |
7203 |
135 |
0 |
0 |
T132 |
20985 |
70 |
0 |
0 |
T139 |
19549 |
64 |
0 |
0 |
T140 |
7063 |
135 |
0 |
0 |
T141 |
13830 |
105 |
0 |
0 |
T142 |
98164 |
1868 |
0 |
0 |
T145 |
7730 |
26 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
8258 |
0 |
0 |
T93 |
89969 |
1050 |
0 |
0 |
T111 |
180773 |
429 |
0 |
0 |
T113 |
7203 |
5 |
0 |
0 |
T132 |
20985 |
73 |
0 |
0 |
T139 |
19549 |
93 |
0 |
0 |
T140 |
7063 |
146 |
0 |
0 |
T141 |
13830 |
155 |
0 |
0 |
T142 |
98164 |
1924 |
0 |
0 |
T143 |
7717 |
24 |
0 |
0 |
T145 |
7730 |
25 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
9294 |
0 |
0 |
T93 |
89969 |
788 |
0 |
0 |
T111 |
180773 |
463 |
0 |
0 |
T113 |
7203 |
131 |
0 |
0 |
T132 |
20985 |
51 |
0 |
0 |
T139 |
19549 |
91 |
0 |
0 |
T140 |
7063 |
221 |
0 |
0 |
T141 |
13830 |
275 |
0 |
0 |
T142 |
98164 |
2439 |
0 |
0 |
T143 |
7717 |
43 |
0 |
0 |
T145 |
7730 |
16 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
8449 |
0 |
0 |
T93 |
89969 |
1030 |
0 |
0 |
T111 |
180773 |
436 |
0 |
0 |
T113 |
7203 |
148 |
0 |
0 |
T132 |
20985 |
62 |
0 |
0 |
T139 |
19549 |
56 |
0 |
0 |
T140 |
7063 |
148 |
0 |
0 |
T141 |
13830 |
22 |
0 |
0 |
T142 |
98164 |
1769 |
0 |
0 |
T143 |
7717 |
8 |
0 |
0 |
T145 |
7730 |
23 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
8330 |
0 |
0 |
T93 |
89969 |
816 |
0 |
0 |
T111 |
180773 |
451 |
0 |
0 |
T113 |
7203 |
128 |
0 |
0 |
T132 |
20985 |
58 |
0 |
0 |
T139 |
19549 |
26 |
0 |
0 |
T140 |
7063 |
157 |
0 |
0 |
T141 |
13830 |
124 |
0 |
0 |
T142 |
98164 |
1719 |
0 |
0 |
T143 |
7717 |
4 |
0 |
0 |
T145 |
7730 |
34 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
9119 |
0 |
0 |
T93 |
89969 |
982 |
0 |
0 |
T111 |
180773 |
442 |
0 |
0 |
T113 |
7203 |
6 |
0 |
0 |
T132 |
20985 |
91 |
0 |
0 |
T139 |
19549 |
124 |
0 |
0 |
T140 |
7063 |
297 |
0 |
0 |
T141 |
13830 |
271 |
0 |
0 |
T142 |
98164 |
1726 |
0 |
0 |
T143 |
7717 |
24 |
0 |
0 |
T145 |
7730 |
27 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
8694 |
0 |
0 |
T93 |
89969 |
1000 |
0 |
0 |
T111 |
180773 |
439 |
0 |
0 |
T113 |
7203 |
194 |
0 |
0 |
T132 |
20985 |
46 |
0 |
0 |
T139 |
19549 |
36 |
0 |
0 |
T140 |
7063 |
138 |
0 |
0 |
T141 |
13830 |
233 |
0 |
0 |
T142 |
98164 |
1736 |
0 |
0 |
T143 |
7717 |
19 |
0 |
0 |
T145 |
7730 |
12 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4891 |
0 |
0 |
T93 |
89969 |
521 |
0 |
0 |
T111 |
180773 |
445 |
0 |
0 |
T113 |
7203 |
5 |
0 |
0 |
T132 |
20985 |
53 |
0 |
0 |
T139 |
19549 |
83 |
0 |
0 |
T140 |
7063 |
59 |
0 |
0 |
T141 |
13830 |
19 |
0 |
0 |
T142 |
98164 |
712 |
0 |
0 |
T143 |
7717 |
14 |
0 |
0 |
T145 |
7730 |
49 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4763 |
0 |
0 |
T93 |
89969 |
312 |
0 |
0 |
T111 |
180773 |
459 |
0 |
0 |
T113 |
7203 |
99 |
0 |
0 |
T132 |
20985 |
72 |
0 |
0 |
T139 |
19549 |
24 |
0 |
0 |
T140 |
7063 |
54 |
0 |
0 |
T141 |
13830 |
62 |
0 |
0 |
T142 |
98164 |
830 |
0 |
0 |
T143 |
7717 |
27 |
0 |
0 |
T145 |
7730 |
6 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4927 |
0 |
0 |
T93 |
89969 |
367 |
0 |
0 |
T94 |
5756 |
7 |
0 |
0 |
T111 |
180773 |
447 |
0 |
0 |
T113 |
7203 |
32 |
0 |
0 |
T132 |
20985 |
74 |
0 |
0 |
T139 |
19549 |
24 |
0 |
0 |
T140 |
7063 |
53 |
0 |
0 |
T141 |
13830 |
28 |
0 |
0 |
T145 |
7730 |
20 |
0 |
0 |
T146 |
8229 |
5 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5591 |
0 |
0 |
T93 |
89969 |
482 |
0 |
0 |
T111 |
180773 |
446 |
0 |
0 |
T113 |
7203 |
52 |
0 |
0 |
T132 |
20985 |
60 |
0 |
0 |
T139 |
19549 |
49 |
0 |
0 |
T140 |
7063 |
9 |
0 |
0 |
T141 |
13830 |
139 |
0 |
0 |
T142 |
98164 |
1077 |
0 |
0 |
T143 |
7717 |
49 |
0 |
0 |
T145 |
7730 |
22 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5015 |
0 |
0 |
T93 |
89969 |
484 |
0 |
0 |
T107 |
13884 |
1 |
0 |
0 |
T111 |
180773 |
468 |
0 |
0 |
T113 |
7203 |
6 |
0 |
0 |
T132 |
20985 |
79 |
0 |
0 |
T139 |
19549 |
75 |
0 |
0 |
T140 |
7063 |
9 |
0 |
0 |
T141 |
13830 |
115 |
0 |
0 |
T142 |
98164 |
804 |
0 |
0 |
T145 |
7730 |
42 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4898 |
0 |
0 |
T93 |
89969 |
447 |
0 |
0 |
T111 |
180773 |
469 |
0 |
0 |
T113 |
7203 |
62 |
0 |
0 |
T132 |
20985 |
33 |
0 |
0 |
T139 |
19549 |
48 |
0 |
0 |
T140 |
7063 |
48 |
0 |
0 |
T141 |
13830 |
70 |
0 |
0 |
T142 |
98164 |
703 |
0 |
0 |
T143 |
7717 |
20 |
0 |
0 |
T145 |
7730 |
29 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5071 |
0 |
0 |
T93 |
89969 |
591 |
0 |
0 |
T111 |
180773 |
467 |
0 |
0 |
T113 |
7203 |
41 |
0 |
0 |
T132 |
20985 |
24 |
0 |
0 |
T139 |
19549 |
54 |
0 |
0 |
T140 |
7063 |
9 |
0 |
0 |
T141 |
13830 |
115 |
0 |
0 |
T142 |
98164 |
736 |
0 |
0 |
T143 |
7717 |
7 |
0 |
0 |
T145 |
7730 |
42 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5072 |
0 |
0 |
T93 |
89969 |
392 |
0 |
0 |
T111 |
180773 |
421 |
0 |
0 |
T113 |
7203 |
13 |
0 |
0 |
T132 |
20985 |
63 |
0 |
0 |
T139 |
19549 |
56 |
0 |
0 |
T140 |
7063 |
4 |
0 |
0 |
T141 |
13830 |
67 |
0 |
0 |
T142 |
98164 |
788 |
0 |
0 |
T143 |
7717 |
23 |
0 |
0 |
T145 |
7730 |
44 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5224 |
0 |
0 |
T93 |
89969 |
553 |
0 |
0 |
T101 |
5761 |
10 |
0 |
0 |
T111 |
180773 |
418 |
0 |
0 |
T113 |
7203 |
56 |
0 |
0 |
T132 |
20985 |
101 |
0 |
0 |
T139 |
19549 |
73 |
0 |
0 |
T140 |
7063 |
74 |
0 |
0 |
T141 |
13830 |
4 |
0 |
0 |
T142 |
98164 |
885 |
0 |
0 |
T145 |
7730 |
8 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5777 |
0 |
0 |
T93 |
89969 |
461 |
0 |
0 |
T111 |
180773 |
438 |
0 |
0 |
T113 |
7203 |
62 |
0 |
0 |
T132 |
20985 |
40 |
0 |
0 |
T139 |
19549 |
69 |
0 |
0 |
T140 |
7063 |
3 |
0 |
0 |
T141 |
13830 |
156 |
0 |
0 |
T142 |
98164 |
1039 |
0 |
0 |
T143 |
7717 |
43 |
0 |
0 |
T145 |
7730 |
5 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4982 |
0 |
0 |
T93 |
89969 |
521 |
0 |
0 |
T111 |
180773 |
438 |
0 |
0 |
T113 |
7203 |
51 |
0 |
0 |
T132 |
20985 |
43 |
0 |
0 |
T139 |
19549 |
41 |
0 |
0 |
T140 |
7063 |
64 |
0 |
0 |
T141 |
13830 |
56 |
0 |
0 |
T142 |
98164 |
834 |
0 |
0 |
T143 |
7717 |
19 |
0 |
0 |
T145 |
7730 |
9 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5080 |
0 |
0 |
T93 |
89969 |
441 |
0 |
0 |
T111 |
180773 |
434 |
0 |
0 |
T113 |
7203 |
56 |
0 |
0 |
T132 |
20985 |
62 |
0 |
0 |
T139 |
19549 |
110 |
0 |
0 |
T140 |
7063 |
35 |
0 |
0 |
T141 |
13830 |
86 |
0 |
0 |
T142 |
98164 |
816 |
0 |
0 |
T143 |
7717 |
9 |
0 |
0 |
T145 |
7730 |
13 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4964 |
0 |
0 |
T93 |
89969 |
282 |
0 |
0 |
T108 |
6159 |
6 |
0 |
0 |
T111 |
180773 |
446 |
0 |
0 |
T113 |
7203 |
47 |
0 |
0 |
T132 |
20985 |
53 |
0 |
0 |
T139 |
19549 |
63 |
0 |
0 |
T140 |
7063 |
58 |
0 |
0 |
T141 |
13830 |
85 |
0 |
0 |
T142 |
98164 |
753 |
0 |
0 |
T145 |
7730 |
13 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5590 |
0 |
0 |
T93 |
89969 |
611 |
0 |
0 |
T111 |
180773 |
420 |
0 |
0 |
T113 |
7203 |
94 |
0 |
0 |
T132 |
20985 |
72 |
0 |
0 |
T139 |
19549 |
52 |
0 |
0 |
T140 |
7063 |
91 |
0 |
0 |
T141 |
13830 |
119 |
0 |
0 |
T142 |
98164 |
836 |
0 |
0 |
T143 |
7717 |
21 |
0 |
0 |
T145 |
7730 |
30 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4693 |
0 |
0 |
T93 |
89969 |
347 |
0 |
0 |
T111 |
180773 |
478 |
0 |
0 |
T113 |
7203 |
12 |
0 |
0 |
T132 |
20985 |
96 |
0 |
0 |
T139 |
19549 |
74 |
0 |
0 |
T140 |
7063 |
50 |
0 |
0 |
T141 |
13830 |
70 |
0 |
0 |
T142 |
98164 |
746 |
0 |
0 |
T143 |
7717 |
20 |
0 |
0 |
T145 |
7730 |
52 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5047 |
0 |
0 |
T93 |
89969 |
437 |
0 |
0 |
T111 |
180773 |
428 |
0 |
0 |
T113 |
7203 |
85 |
0 |
0 |
T132 |
20985 |
60 |
0 |
0 |
T139 |
19549 |
57 |
0 |
0 |
T140 |
7063 |
47 |
0 |
0 |
T141 |
13830 |
53 |
0 |
0 |
T142 |
98164 |
494 |
0 |
0 |
T143 |
7717 |
17 |
0 |
0 |
T145 |
7730 |
23 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5033 |
0 |
0 |
T93 |
89969 |
459 |
0 |
0 |
T111 |
180773 |
441 |
0 |
0 |
T113 |
7203 |
102 |
0 |
0 |
T132 |
20985 |
41 |
0 |
0 |
T139 |
19549 |
64 |
0 |
0 |
T140 |
7063 |
48 |
0 |
0 |
T141 |
13830 |
18 |
0 |
0 |
T142 |
98164 |
692 |
0 |
0 |
T143 |
7717 |
45 |
0 |
0 |
T145 |
7730 |
43 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5630 |
0 |
0 |
T93 |
89969 |
586 |
0 |
0 |
T111 |
180773 |
476 |
0 |
0 |
T113 |
7203 |
45 |
0 |
0 |
T132 |
20985 |
70 |
0 |
0 |
T139 |
19549 |
65 |
0 |
0 |
T140 |
7063 |
57 |
0 |
0 |
T141 |
13830 |
84 |
0 |
0 |
T142 |
98164 |
952 |
0 |
0 |
T143 |
7717 |
28 |
0 |
0 |
T145 |
7730 |
33 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5026 |
0 |
0 |
T93 |
89969 |
314 |
0 |
0 |
T111 |
180773 |
465 |
0 |
0 |
T113 |
7203 |
5 |
0 |
0 |
T132 |
20985 |
49 |
0 |
0 |
T139 |
19549 |
68 |
0 |
0 |
T140 |
7063 |
53 |
0 |
0 |
T141 |
13830 |
74 |
0 |
0 |
T142 |
98164 |
684 |
0 |
0 |
T143 |
7717 |
37 |
0 |
0 |
T145 |
7730 |
17 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5483 |
0 |
0 |
T93 |
89969 |
420 |
0 |
0 |
T111 |
180773 |
446 |
0 |
0 |
T113 |
7203 |
62 |
0 |
0 |
T132 |
20985 |
50 |
0 |
0 |
T139 |
19549 |
37 |
0 |
0 |
T140 |
7063 |
11 |
0 |
0 |
T141 |
13830 |
110 |
0 |
0 |
T142 |
98164 |
890 |
0 |
0 |
T143 |
7717 |
20 |
0 |
0 |
T145 |
7730 |
23 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5138 |
0 |
0 |
T93 |
89969 |
456 |
0 |
0 |
T111 |
180773 |
383 |
0 |
0 |
T113 |
7203 |
87 |
0 |
0 |
T132 |
20985 |
67 |
0 |
0 |
T139 |
19549 |
77 |
0 |
0 |
T140 |
7063 |
56 |
0 |
0 |
T141 |
13830 |
57 |
0 |
0 |
T142 |
98164 |
713 |
0 |
0 |
T143 |
7717 |
40 |
0 |
0 |
T145 |
7730 |
21 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
5376 |
0 |
0 |
T93 |
89969 |
549 |
0 |
0 |
T111 |
180773 |
482 |
0 |
0 |
T113 |
7203 |
4 |
0 |
0 |
T132 |
20985 |
47 |
0 |
0 |
T139 |
19549 |
92 |
0 |
0 |
T140 |
7063 |
44 |
0 |
0 |
T141 |
13830 |
75 |
0 |
0 |
T142 |
98164 |
836 |
0 |
0 |
T143 |
7717 |
35 |
0 |
0 |
T145 |
7730 |
31 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4735 |
0 |
0 |
T93 |
89969 |
515 |
0 |
0 |
T111 |
180773 |
454 |
0 |
0 |
T113 |
7203 |
96 |
0 |
0 |
T132 |
20985 |
68 |
0 |
0 |
T139 |
19549 |
96 |
0 |
0 |
T140 |
7063 |
54 |
0 |
0 |
T141 |
13830 |
94 |
0 |
0 |
T142 |
98164 |
683 |
0 |
0 |
T143 |
7717 |
11 |
0 |
0 |
T144 |
4296 |
55 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4973 |
0 |
0 |
T93 |
89969 |
444 |
0 |
0 |
T111 |
180773 |
435 |
0 |
0 |
T113 |
7203 |
47 |
0 |
0 |
T132 |
20985 |
115 |
0 |
0 |
T139 |
19549 |
90 |
0 |
0 |
T140 |
7063 |
14 |
0 |
0 |
T141 |
13830 |
29 |
0 |
0 |
T142 |
98164 |
796 |
0 |
0 |
T143 |
7717 |
33 |
0 |
0 |
T145 |
7730 |
28 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2801 |
0 |
0 |
T93 |
89969 |
97 |
0 |
0 |
T111 |
180773 |
474 |
0 |
0 |
T113 |
7203 |
15 |
0 |
0 |
T132 |
20985 |
77 |
0 |
0 |
T139 |
19549 |
130 |
0 |
0 |
T140 |
7063 |
7 |
0 |
0 |
T141 |
13830 |
38 |
0 |
0 |
T142 |
98164 |
174 |
0 |
0 |
T143 |
7717 |
2 |
0 |
0 |
T145 |
7730 |
17 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2772 |
0 |
0 |
T93 |
89969 |
85 |
0 |
0 |
T111 |
180773 |
421 |
0 |
0 |
T113 |
7203 |
10 |
0 |
0 |
T132 |
20985 |
30 |
0 |
0 |
T139 |
19549 |
87 |
0 |
0 |
T140 |
7063 |
18 |
0 |
0 |
T141 |
13830 |
50 |
0 |
0 |
T142 |
98164 |
179 |
0 |
0 |
T143 |
7717 |
49 |
0 |
0 |
T145 |
7730 |
45 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2730 |
0 |
0 |
T93 |
89969 |
150 |
0 |
0 |
T111 |
180773 |
436 |
0 |
0 |
T113 |
7203 |
2 |
0 |
0 |
T132 |
20985 |
26 |
0 |
0 |
T139 |
19549 |
56 |
0 |
0 |
T140 |
7063 |
16 |
0 |
0 |
T141 |
13830 |
15 |
0 |
0 |
T142 |
98164 |
157 |
0 |
0 |
T143 |
7717 |
23 |
0 |
0 |
T145 |
7730 |
20 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2807 |
0 |
0 |
T93 |
89969 |
111 |
0 |
0 |
T111 |
180773 |
445 |
0 |
0 |
T113 |
7203 |
18 |
0 |
0 |
T132 |
20985 |
115 |
0 |
0 |
T139 |
19549 |
48 |
0 |
0 |
T140 |
7063 |
13 |
0 |
0 |
T141 |
13830 |
32 |
0 |
0 |
T142 |
98164 |
183 |
0 |
0 |
T144 |
4296 |
4 |
0 |
0 |
T145 |
7730 |
30 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
3159 |
0 |
0 |
T93 |
89969 |
180 |
0 |
0 |
T111 |
180773 |
416 |
0 |
0 |
T113 |
7203 |
11 |
0 |
0 |
T132 |
20985 |
60 |
0 |
0 |
T139 |
19549 |
59 |
0 |
0 |
T140 |
7063 |
9 |
0 |
0 |
T141 |
13830 |
21 |
0 |
0 |
T142 |
98164 |
315 |
0 |
0 |
T143 |
7717 |
22 |
0 |
0 |
T145 |
7730 |
34 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
4618 |
0 |
0 |
T21 |
200672 |
33 |
0 |
0 |
T24 |
169035 |
0 |
0 |
0 |
T30 |
0 |
18 |
0 |
0 |
T31 |
0 |
3 |
0 |
0 |
T33 |
143059 |
0 |
0 |
0 |
T34 |
1630 |
0 |
0 |
0 |
T35 |
15840 |
0 |
0 |
0 |
T36 |
6950 |
0 |
0 |
0 |
T37 |
533087 |
0 |
0 |
0 |
T38 |
5495 |
0 |
0 |
0 |
T39 |
11140 |
0 |
0 |
0 |
T40 |
972 |
0 |
0 |
0 |
T66 |
0 |
17 |
0 |
0 |
T147 |
0 |
20 |
0 |
0 |
T148 |
0 |
31 |
0 |
0 |
T149 |
0 |
39 |
0 |
0 |
T150 |
0 |
13 |
0 |
0 |
T151 |
0 |
7 |
0 |
0 |
T152 |
0 |
20 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2838 |
0 |
0 |
T93 |
89969 |
68 |
0 |
0 |
T111 |
180773 |
462 |
0 |
0 |
T113 |
7203 |
8 |
0 |
0 |
T132 |
20985 |
79 |
0 |
0 |
T139 |
19549 |
94 |
0 |
0 |
T140 |
7063 |
8 |
0 |
0 |
T141 |
13830 |
44 |
0 |
0 |
T142 |
98164 |
165 |
0 |
0 |
T143 |
7717 |
7 |
0 |
0 |
T145 |
7730 |
38 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2818 |
0 |
0 |
T93 |
89969 |
108 |
0 |
0 |
T111 |
180773 |
438 |
0 |
0 |
T113 |
7203 |
5 |
0 |
0 |
T132 |
20985 |
68 |
0 |
0 |
T139 |
19549 |
60 |
0 |
0 |
T140 |
7063 |
16 |
0 |
0 |
T141 |
13830 |
32 |
0 |
0 |
T142 |
98164 |
158 |
0 |
0 |
T143 |
7717 |
1 |
0 |
0 |
T145 |
7730 |
32 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2340 |
0 |
0 |
T93 |
89969 |
32 |
0 |
0 |
T111 |
180773 |
395 |
0 |
0 |
T113 |
7203 |
7 |
0 |
0 |
T132 |
20985 |
80 |
0 |
0 |
T139 |
19549 |
70 |
0 |
0 |
T140 |
7063 |
5 |
0 |
0 |
T141 |
13830 |
31 |
0 |
0 |
T142 |
98164 |
79 |
0 |
0 |
T143 |
7717 |
8 |
0 |
0 |
T145 |
7730 |
4 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2351 |
0 |
0 |
T93 |
89969 |
69 |
0 |
0 |
T111 |
180773 |
454 |
0 |
0 |
T113 |
7203 |
6 |
0 |
0 |
T132 |
20985 |
47 |
0 |
0 |
T139 |
19549 |
77 |
0 |
0 |
T140 |
7063 |
9 |
0 |
0 |
T141 |
13830 |
19 |
0 |
0 |
T142 |
98164 |
114 |
0 |
0 |
T143 |
7717 |
34 |
0 |
0 |
T145 |
7730 |
1 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2504 |
0 |
0 |
T93 |
89969 |
83 |
0 |
0 |
T111 |
180773 |
466 |
0 |
0 |
T113 |
7203 |
13 |
0 |
0 |
T132 |
20985 |
48 |
0 |
0 |
T139 |
19549 |
39 |
0 |
0 |
T140 |
7063 |
2 |
0 |
0 |
T141 |
13830 |
20 |
0 |
0 |
T142 |
98164 |
98 |
0 |
0 |
T143 |
7717 |
22 |
0 |
0 |
T145 |
7730 |
13 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2522 |
0 |
0 |
T93 |
89969 |
54 |
0 |
0 |
T111 |
180773 |
465 |
0 |
0 |
T113 |
7203 |
9 |
0 |
0 |
T132 |
20985 |
26 |
0 |
0 |
T139 |
19549 |
59 |
0 |
0 |
T140 |
7063 |
3 |
0 |
0 |
T141 |
13830 |
13 |
0 |
0 |
T142 |
98164 |
121 |
0 |
0 |
T143 |
7717 |
40 |
0 |
0 |
T145 |
7730 |
24 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
3243 |
0 |
0 |
T93 |
89969 |
136 |
0 |
0 |
T108 |
6159 |
8 |
0 |
0 |
T111 |
180773 |
495 |
0 |
0 |
T113 |
7203 |
16 |
0 |
0 |
T132 |
20985 |
62 |
0 |
0 |
T139 |
19549 |
86 |
0 |
0 |
T140 |
7063 |
7 |
0 |
0 |
T141 |
13830 |
50 |
0 |
0 |
T142 |
98164 |
304 |
0 |
0 |
T145 |
7730 |
40 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2481 |
0 |
0 |
T63 |
5908 |
4 |
0 |
0 |
T93 |
89969 |
76 |
0 |
0 |
T108 |
6159 |
3 |
0 |
0 |
T111 |
180773 |
462 |
0 |
0 |
T113 |
7203 |
8 |
0 |
0 |
T132 |
20985 |
74 |
0 |
0 |
T139 |
19549 |
72 |
0 |
0 |
T140 |
7063 |
2 |
0 |
0 |
T141 |
13830 |
26 |
0 |
0 |
T145 |
7730 |
23 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
3419 |
0 |
0 |
T93 |
89969 |
163 |
0 |
0 |
T111 |
180773 |
424 |
0 |
0 |
T113 |
7203 |
16 |
0 |
0 |
T132 |
20985 |
55 |
0 |
0 |
T139 |
19549 |
29 |
0 |
0 |
T140 |
7063 |
26 |
0 |
0 |
T141 |
13830 |
29 |
0 |
0 |
T142 |
98164 |
377 |
0 |
0 |
T143 |
7717 |
14 |
0 |
0 |
T145 |
7730 |
33 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2787 |
0 |
0 |
T93 |
89969 |
130 |
0 |
0 |
T111 |
180773 |
489 |
0 |
0 |
T113 |
7203 |
12 |
0 |
0 |
T132 |
20985 |
83 |
0 |
0 |
T139 |
19549 |
89 |
0 |
0 |
T140 |
7063 |
14 |
0 |
0 |
T141 |
13830 |
21 |
0 |
0 |
T142 |
98164 |
180 |
0 |
0 |
T143 |
7717 |
2 |
0 |
0 |
T145 |
7730 |
23 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2571 |
0 |
0 |
T93 |
89969 |
73 |
0 |
0 |
T108 |
6159 |
2 |
0 |
0 |
T111 |
180773 |
455 |
0 |
0 |
T113 |
7203 |
9 |
0 |
0 |
T132 |
20985 |
65 |
0 |
0 |
T139 |
19549 |
82 |
0 |
0 |
T140 |
7063 |
8 |
0 |
0 |
T141 |
13830 |
10 |
0 |
0 |
T142 |
98164 |
109 |
0 |
0 |
T145 |
7730 |
13 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2508 |
0 |
0 |
T93 |
89969 |
86 |
0 |
0 |
T111 |
180773 |
410 |
0 |
0 |
T113 |
7203 |
1 |
0 |
0 |
T132 |
20985 |
43 |
0 |
0 |
T139 |
19549 |
82 |
0 |
0 |
T140 |
7063 |
5 |
0 |
0 |
T141 |
13830 |
20 |
0 |
0 |
T142 |
98164 |
114 |
0 |
0 |
T143 |
7717 |
41 |
0 |
0 |
T145 |
7730 |
3 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2546 |
0 |
0 |
T93 |
89969 |
46 |
0 |
0 |
T111 |
180773 |
475 |
0 |
0 |
T113 |
7203 |
3 |
0 |
0 |
T132 |
20985 |
90 |
0 |
0 |
T139 |
19549 |
78 |
0 |
0 |
T140 |
7063 |
10 |
0 |
0 |
T141 |
13830 |
33 |
0 |
0 |
T142 |
98164 |
132 |
0 |
0 |
T143 |
7717 |
1 |
0 |
0 |
T145 |
7730 |
31 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2606 |
0 |
0 |
T93 |
89969 |
64 |
0 |
0 |
T111 |
180773 |
402 |
0 |
0 |
T113 |
7203 |
10 |
0 |
0 |
T132 |
20985 |
74 |
0 |
0 |
T139 |
19549 |
48 |
0 |
0 |
T140 |
7063 |
7 |
0 |
0 |
T141 |
13830 |
17 |
0 |
0 |
T142 |
98164 |
117 |
0 |
0 |
T143 |
7717 |
18 |
0 |
0 |
T145 |
7730 |
18 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2438 |
0 |
0 |
T93 |
89969 |
59 |
0 |
0 |
T111 |
180773 |
405 |
0 |
0 |
T113 |
7203 |
2 |
0 |
0 |
T132 |
20985 |
39 |
0 |
0 |
T139 |
19549 |
48 |
0 |
0 |
T140 |
7063 |
4 |
0 |
0 |
T141 |
13830 |
24 |
0 |
0 |
T142 |
98164 |
131 |
0 |
0 |
T143 |
7717 |
20 |
0 |
0 |
T145 |
7730 |
13 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
388439100 |
2544 |
0 |
0 |
T93 |
89969 |
47 |
0 |
0 |
T111 |
180773 |
498 |
0 |
0 |
T113 |
7203 |
18 |
0 |
0 |
T132 |
20985 |
86 |
0 |
0 |
T139 |
19549 |
61 |
0 |
0 |
T140 |
7063 |
12 |
0 |
0 |
T141 |
13830 |
14 |
0 |
0 |
T142 |
98164 |
113 |
0 |
0 |
T143 |
7717 |
28 |
0 |
0 |
T145 |
7730 |
13 |
0 |
0 |