Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
3264 |
0 |
0 |
T68 |
14441 |
6 |
0 |
0 |
T69 |
18382 |
284 |
0 |
0 |
T70 |
8479 |
137 |
0 |
0 |
T98 |
63923 |
3 |
0 |
0 |
T100 |
19655 |
4 |
0 |
0 |
T102 |
3518 |
5 |
0 |
0 |
T106 |
5704 |
252 |
0 |
0 |
T107 |
5649 |
190 |
0 |
0 |
T115 |
15067 |
5 |
0 |
0 |
T117 |
5922 |
2 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1059 |
0 |
0 |
T68 |
14441 |
5 |
0 |
0 |
T98 |
63923 |
28 |
0 |
0 |
T101 |
102678 |
116 |
0 |
0 |
T113 |
10077 |
31 |
0 |
0 |
T115 |
15067 |
25 |
0 |
0 |
T117 |
5922 |
13 |
0 |
0 |
T122 |
4038 |
8 |
0 |
0 |
T129 |
3597 |
1 |
0 |
0 |
T148 |
11437 |
35 |
0 |
0 |
T149 |
17658 |
26 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1182 |
0 |
0 |
T68 |
14441 |
14 |
0 |
0 |
T98 |
63923 |
38 |
0 |
0 |
T101 |
102678 |
106 |
0 |
0 |
T112 |
99363 |
145 |
0 |
0 |
T113 |
10077 |
17 |
0 |
0 |
T115 |
15067 |
34 |
0 |
0 |
T117 |
5922 |
9 |
0 |
0 |
T148 |
11437 |
22 |
0 |
0 |
T149 |
17658 |
54 |
0 |
0 |
T150 |
97222 |
95 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1753 |
0 |
0 |
T68 |
14441 |
12 |
0 |
0 |
T98 |
63923 |
67 |
0 |
0 |
T101 |
102678 |
233 |
0 |
0 |
T112 |
99363 |
168 |
0 |
0 |
T113 |
10077 |
24 |
0 |
0 |
T115 |
15067 |
30 |
0 |
0 |
T117 |
5922 |
14 |
0 |
0 |
T129 |
3597 |
4 |
0 |
0 |
T148 |
11437 |
39 |
0 |
0 |
T149 |
17658 |
67 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
9215 |
0 |
0 |
T68 |
14441 |
76 |
0 |
0 |
T98 |
63923 |
694 |
0 |
0 |
T101 |
102678 |
1523 |
0 |
0 |
T113 |
10077 |
266 |
0 |
0 |
T115 |
15067 |
26 |
0 |
0 |
T117 |
5922 |
127 |
0 |
0 |
T122 |
4038 |
4 |
0 |
0 |
T129 |
3597 |
10 |
0 |
0 |
T148 |
11437 |
8 |
0 |
0 |
T149 |
17658 |
40 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
12676 |
0 |
0 |
T68 |
14441 |
58 |
0 |
0 |
T98 |
63923 |
705 |
0 |
0 |
T101 |
102678 |
2232 |
0 |
0 |
T112 |
99363 |
2006 |
0 |
0 |
T113 |
10077 |
135 |
0 |
0 |
T115 |
15067 |
275 |
0 |
0 |
T117 |
5922 |
121 |
0 |
0 |
T122 |
4038 |
4 |
0 |
0 |
T148 |
11437 |
15 |
0 |
0 |
T149 |
17658 |
15 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
10181 |
0 |
0 |
T68 |
14441 |
71 |
0 |
0 |
T98 |
63923 |
692 |
0 |
0 |
T101 |
102678 |
2337 |
0 |
0 |
T113 |
10077 |
158 |
0 |
0 |
T115 |
15067 |
271 |
0 |
0 |
T117 |
5922 |
105 |
0 |
0 |
T122 |
4038 |
2 |
0 |
0 |
T129 |
3597 |
59 |
0 |
0 |
T148 |
11437 |
21 |
0 |
0 |
T149 |
17658 |
55 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
11043 |
0 |
0 |
T68 |
14441 |
157 |
0 |
0 |
T98 |
63923 |
704 |
0 |
0 |
T101 |
102678 |
2055 |
0 |
0 |
T113 |
10077 |
135 |
0 |
0 |
T115 |
15067 |
137 |
0 |
0 |
T117 |
5922 |
117 |
0 |
0 |
T122 |
4038 |
18 |
0 |
0 |
T129 |
3597 |
6 |
0 |
0 |
T148 |
11437 |
15 |
0 |
0 |
T149 |
17658 |
16 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
11008 |
0 |
0 |
T68 |
14441 |
130 |
0 |
0 |
T98 |
63923 |
680 |
0 |
0 |
T101 |
102678 |
2573 |
0 |
0 |
T112 |
99363 |
1761 |
0 |
0 |
T113 |
10077 |
247 |
0 |
0 |
T115 |
15067 |
319 |
0 |
0 |
T117 |
5922 |
1 |
0 |
0 |
T122 |
4038 |
5 |
0 |
0 |
T148 |
11437 |
36 |
0 |
0 |
T149 |
17658 |
42 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
10110 |
0 |
0 |
T68 |
14441 |
134 |
0 |
0 |
T98 |
63923 |
514 |
0 |
0 |
T101 |
102678 |
1510 |
0 |
0 |
T112 |
99363 |
1745 |
0 |
0 |
T113 |
10077 |
9 |
0 |
0 |
T115 |
15067 |
252 |
0 |
0 |
T117 |
5922 |
14 |
0 |
0 |
T122 |
4038 |
7 |
0 |
0 |
T148 |
11437 |
33 |
0 |
0 |
T149 |
17658 |
26 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
10934 |
0 |
0 |
T68 |
14441 |
107 |
0 |
0 |
T98 |
63923 |
832 |
0 |
0 |
T101 |
102678 |
2198 |
0 |
0 |
T113 |
10077 |
256 |
0 |
0 |
T115 |
15067 |
129 |
0 |
0 |
T117 |
5922 |
6 |
0 |
0 |
T122 |
4038 |
6 |
0 |
0 |
T129 |
3597 |
66 |
0 |
0 |
T148 |
11437 |
22 |
0 |
0 |
T149 |
17658 |
33 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
11445 |
0 |
0 |
T98 |
63923 |
820 |
0 |
0 |
T101 |
102678 |
1807 |
0 |
0 |
T112 |
99363 |
2004 |
0 |
0 |
T113 |
10077 |
5 |
0 |
0 |
T115 |
15067 |
255 |
0 |
0 |
T117 |
5922 |
121 |
0 |
0 |
T122 |
4038 |
23 |
0 |
0 |
T148 |
11437 |
10 |
0 |
0 |
T149 |
17658 |
48 |
0 |
0 |
T151 |
4643 |
142 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5080 |
0 |
0 |
T68 |
14441 |
19 |
0 |
0 |
T98 |
63923 |
325 |
0 |
0 |
T101 |
102678 |
1033 |
0 |
0 |
T113 |
10077 |
59 |
0 |
0 |
T115 |
15067 |
91 |
0 |
0 |
T117 |
5922 |
55 |
0 |
0 |
T122 |
4038 |
2 |
0 |
0 |
T129 |
3597 |
7 |
0 |
0 |
T148 |
11437 |
7 |
0 |
0 |
T149 |
17658 |
28 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4932 |
0 |
0 |
T68 |
14441 |
56 |
0 |
0 |
T98 |
63923 |
291 |
0 |
0 |
T101 |
102678 |
926 |
0 |
0 |
T113 |
10077 |
6 |
0 |
0 |
T115 |
15067 |
71 |
0 |
0 |
T117 |
5922 |
7 |
0 |
0 |
T122 |
4038 |
5 |
0 |
0 |
T129 |
3597 |
17 |
0 |
0 |
T148 |
11437 |
53 |
0 |
0 |
T149 |
17658 |
12 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4640 |
0 |
0 |
T68 |
14441 |
83 |
0 |
0 |
T98 |
63923 |
223 |
0 |
0 |
T101 |
102678 |
849 |
0 |
0 |
T112 |
99363 |
694 |
0 |
0 |
T113 |
10077 |
17 |
0 |
0 |
T115 |
15067 |
176 |
0 |
0 |
T117 |
5922 |
64 |
0 |
0 |
T122 |
4038 |
8 |
0 |
0 |
T148 |
11437 |
20 |
0 |
0 |
T149 |
17658 |
27 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5044 |
0 |
0 |
T68 |
14441 |
48 |
0 |
0 |
T98 |
63923 |
280 |
0 |
0 |
T101 |
102678 |
878 |
0 |
0 |
T113 |
10077 |
42 |
0 |
0 |
T115 |
15067 |
61 |
0 |
0 |
T117 |
5922 |
68 |
0 |
0 |
T122 |
4038 |
5 |
0 |
0 |
T129 |
3597 |
25 |
0 |
0 |
T148 |
11437 |
7 |
0 |
0 |
T149 |
17658 |
46 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4954 |
0 |
0 |
T68 |
14441 |
64 |
0 |
0 |
T98 |
63923 |
258 |
0 |
0 |
T101 |
102678 |
870 |
0 |
0 |
T112 |
99363 |
621 |
0 |
0 |
T113 |
10077 |
20 |
0 |
0 |
T115 |
15067 |
81 |
0 |
0 |
T117 |
5922 |
8 |
0 |
0 |
T122 |
4038 |
7 |
0 |
0 |
T148 |
11437 |
10 |
0 |
0 |
T149 |
17658 |
5 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4677 |
0 |
0 |
T68 |
14441 |
24 |
0 |
0 |
T98 |
63923 |
299 |
0 |
0 |
T101 |
102678 |
781 |
0 |
0 |
T112 |
99363 |
886 |
0 |
0 |
T113 |
10077 |
63 |
0 |
0 |
T115 |
15067 |
65 |
0 |
0 |
T117 |
5922 |
37 |
0 |
0 |
T129 |
3597 |
27 |
0 |
0 |
T148 |
11437 |
15 |
0 |
0 |
T149 |
17658 |
11 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5014 |
0 |
0 |
T68 |
14441 |
36 |
0 |
0 |
T98 |
63923 |
362 |
0 |
0 |
T101 |
102678 |
523 |
0 |
0 |
T113 |
10077 |
72 |
0 |
0 |
T115 |
15067 |
150 |
0 |
0 |
T117 |
5922 |
47 |
0 |
0 |
T122 |
4038 |
15 |
0 |
0 |
T129 |
3597 |
17 |
0 |
0 |
T148 |
11437 |
22 |
0 |
0 |
T149 |
17658 |
41 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4388 |
0 |
0 |
T68 |
14441 |
48 |
0 |
0 |
T98 |
63923 |
190 |
0 |
0 |
T101 |
102678 |
644 |
0 |
0 |
T113 |
10077 |
18 |
0 |
0 |
T115 |
15067 |
104 |
0 |
0 |
T117 |
5922 |
7 |
0 |
0 |
T122 |
4038 |
4 |
0 |
0 |
T129 |
3597 |
14 |
0 |
0 |
T148 |
11437 |
10 |
0 |
0 |
T149 |
17658 |
40 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4900 |
0 |
0 |
T68 |
14441 |
55 |
0 |
0 |
T98 |
63923 |
284 |
0 |
0 |
T101 |
102678 |
753 |
0 |
0 |
T113 |
10077 |
16 |
0 |
0 |
T115 |
15067 |
71 |
0 |
0 |
T117 |
5922 |
53 |
0 |
0 |
T122 |
4038 |
13 |
0 |
0 |
T129 |
3597 |
30 |
0 |
0 |
T148 |
11437 |
35 |
0 |
0 |
T149 |
17658 |
28 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4933 |
0 |
0 |
T68 |
14441 |
23 |
0 |
0 |
T98 |
63923 |
113 |
0 |
0 |
T101 |
102678 |
777 |
0 |
0 |
T112 |
99363 |
821 |
0 |
0 |
T113 |
10077 |
112 |
0 |
0 |
T115 |
15067 |
119 |
0 |
0 |
T117 |
5922 |
6 |
0 |
0 |
T122 |
4038 |
2 |
0 |
0 |
T148 |
11437 |
27 |
0 |
0 |
T149 |
17658 |
38 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4694 |
0 |
0 |
T68 |
14441 |
35 |
0 |
0 |
T70 |
8479 |
6 |
0 |
0 |
T98 |
63923 |
296 |
0 |
0 |
T101 |
102678 |
796 |
0 |
0 |
T113 |
10077 |
44 |
0 |
0 |
T115 |
15067 |
66 |
0 |
0 |
T117 |
5922 |
41 |
0 |
0 |
T122 |
4038 |
4 |
0 |
0 |
T129 |
3597 |
4 |
0 |
0 |
T149 |
17658 |
18 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5103 |
0 |
0 |
T68 |
14441 |
26 |
0 |
0 |
T98 |
63923 |
388 |
0 |
0 |
T101 |
102678 |
940 |
0 |
0 |
T113 |
10077 |
91 |
0 |
0 |
T115 |
15067 |
76 |
0 |
0 |
T117 |
5922 |
43 |
0 |
0 |
T122 |
4038 |
5 |
0 |
0 |
T129 |
3597 |
13 |
0 |
0 |
T148 |
11437 |
23 |
0 |
0 |
T149 |
17658 |
24 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4890 |
0 |
0 |
T68 |
14441 |
21 |
0 |
0 |
T98 |
63923 |
205 |
0 |
0 |
T101 |
102678 |
1031 |
0 |
0 |
T112 |
99363 |
756 |
0 |
0 |
T113 |
10077 |
64 |
0 |
0 |
T115 |
15067 |
115 |
0 |
0 |
T117 |
5922 |
52 |
0 |
0 |
T122 |
4038 |
9 |
0 |
0 |
T148 |
11437 |
26 |
0 |
0 |
T149 |
17658 |
38 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5125 |
0 |
0 |
T68 |
14441 |
62 |
0 |
0 |
T98 |
63923 |
298 |
0 |
0 |
T101 |
102678 |
748 |
0 |
0 |
T112 |
99363 |
984 |
0 |
0 |
T113 |
10077 |
63 |
0 |
0 |
T115 |
15067 |
114 |
0 |
0 |
T122 |
4038 |
9 |
0 |
0 |
T148 |
11437 |
27 |
0 |
0 |
T149 |
17658 |
24 |
0 |
0 |
T151 |
4643 |
66 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4722 |
0 |
0 |
T68 |
14441 |
26 |
0 |
0 |
T98 |
63923 |
189 |
0 |
0 |
T101 |
102678 |
757 |
0 |
0 |
T113 |
10077 |
11 |
0 |
0 |
T115 |
15067 |
126 |
0 |
0 |
T117 |
5922 |
51 |
0 |
0 |
T122 |
4038 |
14 |
0 |
0 |
T129 |
3597 |
36 |
0 |
0 |
T148 |
11437 |
31 |
0 |
0 |
T149 |
17658 |
23 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4845 |
0 |
0 |
T68 |
14441 |
60 |
0 |
0 |
T69 |
18382 |
2 |
0 |
0 |
T98 |
63923 |
236 |
0 |
0 |
T101 |
102678 |
902 |
0 |
0 |
T113 |
10077 |
69 |
0 |
0 |
T115 |
15067 |
41 |
0 |
0 |
T117 |
5922 |
48 |
0 |
0 |
T122 |
4038 |
6 |
0 |
0 |
T129 |
3597 |
5 |
0 |
0 |
T148 |
11437 |
22 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5241 |
0 |
0 |
T68 |
14441 |
63 |
0 |
0 |
T98 |
63923 |
319 |
0 |
0 |
T101 |
102678 |
854 |
0 |
0 |
T113 |
10077 |
55 |
0 |
0 |
T115 |
15067 |
145 |
0 |
0 |
T117 |
5922 |
37 |
0 |
0 |
T122 |
4038 |
8 |
0 |
0 |
T129 |
3597 |
33 |
0 |
0 |
T148 |
11437 |
33 |
0 |
0 |
T149 |
17658 |
50 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4750 |
0 |
0 |
T68 |
14441 |
24 |
0 |
0 |
T98 |
63923 |
152 |
0 |
0 |
T101 |
102678 |
584 |
0 |
0 |
T113 |
10077 |
17 |
0 |
0 |
T115 |
15067 |
111 |
0 |
0 |
T117 |
5922 |
5 |
0 |
0 |
T122 |
4038 |
7 |
0 |
0 |
T129 |
3597 |
5 |
0 |
0 |
T148 |
11437 |
37 |
0 |
0 |
T149 |
17658 |
33 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5394 |
0 |
0 |
T68 |
14441 |
64 |
0 |
0 |
T98 |
63923 |
312 |
0 |
0 |
T101 |
102678 |
910 |
0 |
0 |
T113 |
10077 |
117 |
0 |
0 |
T115 |
15067 |
114 |
0 |
0 |
T117 |
5922 |
49 |
0 |
0 |
T122 |
4038 |
8 |
0 |
0 |
T129 |
3597 |
35 |
0 |
0 |
T148 |
11437 |
34 |
0 |
0 |
T149 |
17658 |
38 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5209 |
0 |
0 |
T68 |
14441 |
35 |
0 |
0 |
T98 |
63923 |
307 |
0 |
0 |
T101 |
102678 |
920 |
0 |
0 |
T113 |
10077 |
77 |
0 |
0 |
T115 |
15067 |
156 |
0 |
0 |
T117 |
5922 |
5 |
0 |
0 |
T122 |
4038 |
12 |
0 |
0 |
T129 |
3597 |
29 |
0 |
0 |
T148 |
11437 |
17 |
0 |
0 |
T149 |
17658 |
16 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5223 |
0 |
0 |
T68 |
14441 |
33 |
0 |
0 |
T69 |
18382 |
8 |
0 |
0 |
T98 |
63923 |
243 |
0 |
0 |
T101 |
102678 |
799 |
0 |
0 |
T113 |
10077 |
16 |
0 |
0 |
T115 |
15067 |
112 |
0 |
0 |
T117 |
5922 |
11 |
0 |
0 |
T122 |
4038 |
8 |
0 |
0 |
T129 |
3597 |
29 |
0 |
0 |
T148 |
11437 |
14 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
5149 |
0 |
0 |
T68 |
14441 |
66 |
0 |
0 |
T98 |
63923 |
238 |
0 |
0 |
T101 |
102678 |
866 |
0 |
0 |
T113 |
10077 |
111 |
0 |
0 |
T115 |
15067 |
84 |
0 |
0 |
T117 |
5922 |
54 |
0 |
0 |
T122 |
4038 |
11 |
0 |
0 |
T129 |
3597 |
16 |
0 |
0 |
T148 |
11437 |
27 |
0 |
0 |
T149 |
17658 |
20 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4906 |
0 |
0 |
T68 |
14441 |
34 |
0 |
0 |
T98 |
63923 |
278 |
0 |
0 |
T101 |
102678 |
900 |
0 |
0 |
T112 |
99363 |
793 |
0 |
0 |
T113 |
10077 |
47 |
0 |
0 |
T115 |
15067 |
132 |
0 |
0 |
T117 |
5922 |
45 |
0 |
0 |
T129 |
3597 |
13 |
0 |
0 |
T148 |
11437 |
43 |
0 |
0 |
T149 |
17658 |
38 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4921 |
0 |
0 |
T68 |
14441 |
31 |
0 |
0 |
T98 |
63923 |
345 |
0 |
0 |
T101 |
102678 |
766 |
0 |
0 |
T113 |
10077 |
112 |
0 |
0 |
T115 |
15067 |
77 |
0 |
0 |
T117 |
5922 |
7 |
0 |
0 |
T122 |
4038 |
7 |
0 |
0 |
T129 |
3597 |
4 |
0 |
0 |
T148 |
11437 |
4 |
0 |
0 |
T149 |
17658 |
45 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1599 |
0 |
0 |
T68 |
14441 |
14 |
0 |
0 |
T98 |
63923 |
78 |
0 |
0 |
T101 |
102678 |
232 |
0 |
0 |
T112 |
99363 |
164 |
0 |
0 |
T113 |
10077 |
28 |
0 |
0 |
T115 |
15067 |
32 |
0 |
0 |
T117 |
5922 |
7 |
0 |
0 |
T122 |
4038 |
7 |
0 |
0 |
T149 |
17658 |
16 |
0 |
0 |
T150 |
97222 |
235 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1380 |
0 |
0 |
T68 |
14441 |
10 |
0 |
0 |
T98 |
63923 |
56 |
0 |
0 |
T101 |
102678 |
123 |
0 |
0 |
T113 |
10077 |
22 |
0 |
0 |
T115 |
15067 |
29 |
0 |
0 |
T117 |
5922 |
8 |
0 |
0 |
T122 |
4038 |
7 |
0 |
0 |
T129 |
3597 |
3 |
0 |
0 |
T148 |
11437 |
2 |
0 |
0 |
T149 |
17658 |
39 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1437 |
0 |
0 |
T68 |
14441 |
7 |
0 |
0 |
T98 |
63923 |
63 |
0 |
0 |
T101 |
102678 |
150 |
0 |
0 |
T113 |
10077 |
14 |
0 |
0 |
T115 |
15067 |
43 |
0 |
0 |
T117 |
5922 |
4 |
0 |
0 |
T122 |
4038 |
2 |
0 |
0 |
T129 |
3597 |
9 |
0 |
0 |
T148 |
11437 |
12 |
0 |
0 |
T149 |
17658 |
17 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1537 |
0 |
0 |
T68 |
14441 |
26 |
0 |
0 |
T98 |
63923 |
53 |
0 |
0 |
T101 |
102678 |
177 |
0 |
0 |
T112 |
99363 |
199 |
0 |
0 |
T113 |
10077 |
12 |
0 |
0 |
T115 |
15067 |
29 |
0 |
0 |
T117 |
5922 |
13 |
0 |
0 |
T122 |
4038 |
12 |
0 |
0 |
T148 |
11437 |
61 |
0 |
0 |
T149 |
17658 |
27 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
2227 |
0 |
0 |
T68 |
14441 |
5 |
0 |
0 |
T98 |
63923 |
83 |
0 |
0 |
T101 |
102678 |
377 |
0 |
0 |
T112 |
99363 |
313 |
0 |
0 |
T113 |
10077 |
27 |
0 |
0 |
T115 |
15067 |
58 |
0 |
0 |
T122 |
4038 |
17 |
0 |
0 |
T129 |
3597 |
6 |
0 |
0 |
T148 |
11437 |
30 |
0 |
0 |
T149 |
17658 |
47 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
4444 |
0 |
0 |
T21 |
169422 |
10 |
0 |
0 |
T22 |
608900 |
40 |
0 |
0 |
T152 |
0 |
17 |
0 |
0 |
T153 |
0 |
32 |
0 |
0 |
T154 |
0 |
15 |
0 |
0 |
T155 |
0 |
30 |
0 |
0 |
T156 |
0 |
46 |
0 |
0 |
T157 |
0 |
31 |
0 |
0 |
T158 |
0 |
10 |
0 |
0 |
T159 |
0 |
11 |
0 |
0 |
T160 |
11581 |
0 |
0 |
0 |
T161 |
140999 |
0 |
0 |
0 |
T162 |
644978 |
0 |
0 |
0 |
T163 |
64639 |
0 |
0 |
0 |
T164 |
7764 |
0 |
0 |
0 |
T165 |
236095 |
0 |
0 |
0 |
T166 |
6052 |
0 |
0 |
0 |
T167 |
15133 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1525 |
0 |
0 |
T68 |
14441 |
21 |
0 |
0 |
T98 |
63923 |
64 |
0 |
0 |
T101 |
102678 |
198 |
0 |
0 |
T112 |
99363 |
202 |
0 |
0 |
T113 |
10077 |
12 |
0 |
0 |
T115 |
15067 |
28 |
0 |
0 |
T117 |
5922 |
9 |
0 |
0 |
T122 |
4038 |
9 |
0 |
0 |
T148 |
11437 |
40 |
0 |
0 |
T149 |
17658 |
37 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1449 |
0 |
0 |
T68 |
14441 |
13 |
0 |
0 |
T98 |
63923 |
68 |
0 |
0 |
T101 |
102678 |
192 |
0 |
0 |
T112 |
99363 |
201 |
0 |
0 |
T113 |
10077 |
26 |
0 |
0 |
T115 |
15067 |
31 |
0 |
0 |
T117 |
5922 |
10 |
0 |
0 |
T122 |
4038 |
6 |
0 |
0 |
T148 |
11437 |
16 |
0 |
0 |
T149 |
17658 |
21 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1231 |
0 |
0 |
T68 |
14441 |
2 |
0 |
0 |
T98 |
63923 |
33 |
0 |
0 |
T101 |
102678 |
120 |
0 |
0 |
T112 |
99363 |
122 |
0 |
0 |
T113 |
10077 |
15 |
0 |
0 |
T115 |
15067 |
21 |
0 |
0 |
T117 |
5922 |
4 |
0 |
0 |
T122 |
4038 |
10 |
0 |
0 |
T148 |
11437 |
25 |
0 |
0 |
T149 |
17658 |
61 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1137 |
0 |
0 |
T68 |
14441 |
7 |
0 |
0 |
T98 |
63923 |
43 |
0 |
0 |
T101 |
102678 |
121 |
0 |
0 |
T113 |
10077 |
19 |
0 |
0 |
T115 |
15067 |
13 |
0 |
0 |
T117 |
5922 |
7 |
0 |
0 |
T122 |
4038 |
5 |
0 |
0 |
T129 |
3597 |
2 |
0 |
0 |
T148 |
11437 |
9 |
0 |
0 |
T149 |
17658 |
32 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1079 |
0 |
0 |
T68 |
14441 |
17 |
0 |
0 |
T98 |
63923 |
43 |
0 |
0 |
T101 |
102678 |
99 |
0 |
0 |
T112 |
99363 |
118 |
0 |
0 |
T113 |
10077 |
15 |
0 |
0 |
T115 |
15067 |
14 |
0 |
0 |
T117 |
5922 |
11 |
0 |
0 |
T122 |
4038 |
4 |
0 |
0 |
T148 |
11437 |
19 |
0 |
0 |
T149 |
17658 |
48 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1124 |
0 |
0 |
T68 |
14441 |
9 |
0 |
0 |
T98 |
63923 |
28 |
0 |
0 |
T101 |
102678 |
128 |
0 |
0 |
T112 |
99363 |
135 |
0 |
0 |
T113 |
10077 |
15 |
0 |
0 |
T115 |
15067 |
9 |
0 |
0 |
T117 |
5922 |
2 |
0 |
0 |
T129 |
3597 |
3 |
0 |
0 |
T148 |
11437 |
33 |
0 |
0 |
T149 |
17658 |
33 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
2124 |
0 |
0 |
T68 |
14441 |
22 |
0 |
0 |
T98 |
63923 |
92 |
0 |
0 |
T101 |
102678 |
338 |
0 |
0 |
T113 |
10077 |
57 |
0 |
0 |
T115 |
15067 |
20 |
0 |
0 |
T117 |
5922 |
22 |
0 |
0 |
T122 |
4038 |
12 |
0 |
0 |
T129 |
3597 |
11 |
0 |
0 |
T148 |
11437 |
32 |
0 |
0 |
T149 |
17658 |
19 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1200 |
0 |
0 |
T68 |
14441 |
1 |
0 |
0 |
T98 |
63923 |
56 |
0 |
0 |
T101 |
102678 |
100 |
0 |
0 |
T112 |
99363 |
106 |
0 |
0 |
T113 |
10077 |
19 |
0 |
0 |
T115 |
15067 |
26 |
0 |
0 |
T117 |
5922 |
11 |
0 |
0 |
T122 |
4038 |
10 |
0 |
0 |
T148 |
11437 |
39 |
0 |
0 |
T149 |
17658 |
63 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
2395 |
0 |
0 |
T68 |
14441 |
17 |
0 |
0 |
T98 |
63923 |
172 |
0 |
0 |
T101 |
102678 |
380 |
0 |
0 |
T113 |
10077 |
8 |
0 |
0 |
T115 |
15067 |
41 |
0 |
0 |
T117 |
5922 |
17 |
0 |
0 |
T122 |
4038 |
14 |
0 |
0 |
T129 |
3597 |
2 |
0 |
0 |
T148 |
11437 |
33 |
0 |
0 |
T149 |
17658 |
18 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1480 |
0 |
0 |
T68 |
14441 |
33 |
0 |
0 |
T98 |
63923 |
54 |
0 |
0 |
T101 |
102678 |
179 |
0 |
0 |
T113 |
10077 |
24 |
0 |
0 |
T115 |
15067 |
24 |
0 |
0 |
T117 |
5922 |
6 |
0 |
0 |
T122 |
4038 |
4 |
0 |
0 |
T129 |
3597 |
4 |
0 |
0 |
T148 |
11437 |
24 |
0 |
0 |
T149 |
17658 |
51 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1213 |
0 |
0 |
T68 |
14441 |
14 |
0 |
0 |
T69 |
18382 |
5 |
0 |
0 |
T98 |
63923 |
43 |
0 |
0 |
T101 |
102678 |
132 |
0 |
0 |
T112 |
99363 |
128 |
0 |
0 |
T113 |
10077 |
11 |
0 |
0 |
T115 |
15067 |
24 |
0 |
0 |
T117 |
5922 |
5 |
0 |
0 |
T148 |
11437 |
21 |
0 |
0 |
T149 |
17658 |
50 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1134 |
0 |
0 |
T68 |
14441 |
11 |
0 |
0 |
T98 |
63923 |
31 |
0 |
0 |
T101 |
102678 |
132 |
0 |
0 |
T112 |
99363 |
115 |
0 |
0 |
T113 |
10077 |
13 |
0 |
0 |
T115 |
15067 |
31 |
0 |
0 |
T117 |
5922 |
9 |
0 |
0 |
T129 |
3597 |
1 |
0 |
0 |
T148 |
11437 |
37 |
0 |
0 |
T149 |
17658 |
33 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1215 |
0 |
0 |
T98 |
63923 |
39 |
0 |
0 |
T101 |
102678 |
122 |
0 |
0 |
T112 |
99363 |
145 |
0 |
0 |
T113 |
10077 |
10 |
0 |
0 |
T115 |
15067 |
32 |
0 |
0 |
T117 |
5922 |
3 |
0 |
0 |
T148 |
11437 |
32 |
0 |
0 |
T149 |
17658 |
72 |
0 |
0 |
T150 |
97222 |
110 |
0 |
0 |
T151 |
4643 |
6 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1183 |
0 |
0 |
T68 |
14441 |
16 |
0 |
0 |
T98 |
63923 |
37 |
0 |
0 |
T101 |
102678 |
138 |
0 |
0 |
T112 |
99363 |
126 |
0 |
0 |
T113 |
10077 |
21 |
0 |
0 |
T115 |
15067 |
15 |
0 |
0 |
T122 |
4038 |
11 |
0 |
0 |
T129 |
3597 |
5 |
0 |
0 |
T148 |
11437 |
12 |
0 |
0 |
T149 |
17658 |
78 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1175 |
0 |
0 |
T68 |
14441 |
7 |
0 |
0 |
T69 |
18382 |
6 |
0 |
0 |
T98 |
63923 |
52 |
0 |
0 |
T101 |
102678 |
83 |
0 |
0 |
T113 |
10077 |
14 |
0 |
0 |
T115 |
15067 |
20 |
0 |
0 |
T117 |
5922 |
6 |
0 |
0 |
T122 |
4038 |
12 |
0 |
0 |
T129 |
3597 |
3 |
0 |
0 |
T148 |
11437 |
19 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
481283554 |
1132 |
0 |
0 |
T68 |
14441 |
18 |
0 |
0 |
T98 |
63923 |
48 |
0 |
0 |
T101 |
102678 |
129 |
0 |
0 |
T112 |
99363 |
96 |
0 |
0 |
T113 |
10077 |
6 |
0 |
0 |
T115 |
15067 |
28 |
0 |
0 |
T117 |
5922 |
8 |
0 |
0 |
T122 |
4038 |
1 |
0 |
0 |
T148 |
11437 |
29 |
0 |
0 |
T149 |
17658 |
69 |
0 |
0 |