Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
3226 |
0 |
0 |
T64 |
26724 |
2 |
0 |
0 |
T65 |
7654 |
379 |
0 |
0 |
T66 |
11000 |
2 |
0 |
0 |
T91 |
13155 |
224 |
0 |
0 |
T92 |
5601 |
3 |
0 |
0 |
T93 |
29083 |
4 |
0 |
0 |
T94 |
4900 |
107 |
0 |
0 |
T98 |
14891 |
7 |
0 |
0 |
T99 |
5524 |
70 |
0 |
0 |
T103 |
2090 |
4 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2166 |
0 |
0 |
T92 |
5601 |
16 |
0 |
0 |
T98 |
14891 |
9 |
0 |
0 |
T105 |
13693 |
2 |
0 |
0 |
T137 |
13434 |
21 |
0 |
0 |
T141 |
18900 |
87 |
0 |
0 |
T142 |
6825 |
8 |
0 |
0 |
T143 |
8247 |
12 |
0 |
0 |
T144 |
67493 |
84 |
0 |
0 |
T145 |
12755 |
18 |
0 |
0 |
T146 |
11849 |
28 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2323 |
0 |
0 |
T92 |
5601 |
14 |
0 |
0 |
T98 |
14891 |
13 |
0 |
0 |
T105 |
13693 |
13 |
0 |
0 |
T137 |
13434 |
63 |
0 |
0 |
T141 |
18900 |
56 |
0 |
0 |
T142 |
6825 |
8 |
0 |
0 |
T143 |
8247 |
15 |
0 |
0 |
T144 |
67493 |
69 |
0 |
0 |
T145 |
12755 |
30 |
0 |
0 |
T146 |
11849 |
44 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2871 |
0 |
0 |
T92 |
5601 |
29 |
0 |
0 |
T98 |
14891 |
9 |
0 |
0 |
T105 |
13693 |
11 |
0 |
0 |
T137 |
13434 |
21 |
0 |
0 |
T141 |
18900 |
46 |
0 |
0 |
T142 |
6825 |
16 |
0 |
0 |
T143 |
8247 |
12 |
0 |
0 |
T144 |
67493 |
153 |
0 |
0 |
T145 |
12755 |
46 |
0 |
0 |
T146 |
11849 |
42 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
11696 |
0 |
0 |
T92 |
5601 |
12 |
0 |
0 |
T98 |
14891 |
240 |
0 |
0 |
T105 |
13693 |
14 |
0 |
0 |
T137 |
13434 |
52 |
0 |
0 |
T141 |
18900 |
96 |
0 |
0 |
T142 |
6825 |
9 |
0 |
0 |
T143 |
8247 |
153 |
0 |
0 |
T144 |
67493 |
1646 |
0 |
0 |
T145 |
12755 |
13 |
0 |
0 |
T146 |
11849 |
27 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
12767 |
0 |
0 |
T92 |
5601 |
4 |
0 |
0 |
T98 |
14891 |
132 |
0 |
0 |
T105 |
13693 |
141 |
0 |
0 |
T137 |
13434 |
33 |
0 |
0 |
T141 |
18900 |
59 |
0 |
0 |
T142 |
6825 |
155 |
0 |
0 |
T143 |
8247 |
7 |
0 |
0 |
T144 |
67493 |
1545 |
0 |
0 |
T145 |
12755 |
23 |
0 |
0 |
T146 |
11849 |
33 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
11161 |
0 |
0 |
T92 |
5601 |
11 |
0 |
0 |
T98 |
14891 |
149 |
0 |
0 |
T105 |
13693 |
183 |
0 |
0 |
T137 |
13434 |
52 |
0 |
0 |
T141 |
18900 |
94 |
0 |
0 |
T142 |
6825 |
2 |
0 |
0 |
T143 |
8247 |
118 |
0 |
0 |
T144 |
67493 |
1515 |
0 |
0 |
T145 |
12755 |
6 |
0 |
0 |
T146 |
11849 |
32 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
10654 |
0 |
0 |
T92 |
5601 |
10 |
0 |
0 |
T98 |
14891 |
193 |
0 |
0 |
T105 |
13693 |
12 |
0 |
0 |
T137 |
13434 |
32 |
0 |
0 |
T141 |
18900 |
55 |
0 |
0 |
T142 |
6825 |
12 |
0 |
0 |
T143 |
8247 |
100 |
0 |
0 |
T144 |
67493 |
1257 |
0 |
0 |
T145 |
12755 |
403 |
0 |
0 |
T146 |
11849 |
35 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
9973 |
0 |
0 |
T92 |
5601 |
10 |
0 |
0 |
T98 |
14891 |
80 |
0 |
0 |
T105 |
13693 |
62 |
0 |
0 |
T137 |
13434 |
55 |
0 |
0 |
T141 |
18900 |
51 |
0 |
0 |
T142 |
6825 |
283 |
0 |
0 |
T143 |
8247 |
2 |
0 |
0 |
T144 |
67493 |
862 |
0 |
0 |
T145 |
12755 |
219 |
0 |
0 |
T146 |
11849 |
41 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
11522 |
0 |
0 |
T92 |
5601 |
129 |
0 |
0 |
T98 |
14891 |
187 |
0 |
0 |
T105 |
13693 |
180 |
0 |
0 |
T137 |
13434 |
53 |
0 |
0 |
T141 |
18900 |
86 |
0 |
0 |
T142 |
6825 |
143 |
0 |
0 |
T143 |
8247 |
259 |
0 |
0 |
T144 |
67493 |
1143 |
0 |
0 |
T145 |
12755 |
264 |
0 |
0 |
T146 |
11849 |
23 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
11028 |
0 |
0 |
T92 |
5601 |
163 |
0 |
0 |
T98 |
14891 |
86 |
0 |
0 |
T105 |
13693 |
160 |
0 |
0 |
T106 |
4444 |
3 |
0 |
0 |
T137 |
13434 |
33 |
0 |
0 |
T141 |
18900 |
41 |
0 |
0 |
T142 |
6825 |
153 |
0 |
0 |
T143 |
8247 |
263 |
0 |
0 |
T144 |
67493 |
1056 |
0 |
0 |
T145 |
12755 |
41 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
11623 |
0 |
0 |
T92 |
5601 |
152 |
0 |
0 |
T98 |
14891 |
150 |
0 |
0 |
T105 |
13693 |
68 |
0 |
0 |
T137 |
13434 |
8 |
0 |
0 |
T141 |
18900 |
68 |
0 |
0 |
T142 |
6825 |
295 |
0 |
0 |
T143 |
8247 |
274 |
0 |
0 |
T144 |
67493 |
814 |
0 |
0 |
T145 |
12755 |
7 |
0 |
0 |
T146 |
11849 |
32 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5749 |
0 |
0 |
T92 |
5601 |
35 |
0 |
0 |
T98 |
14891 |
19 |
0 |
0 |
T105 |
13693 |
23 |
0 |
0 |
T137 |
13434 |
63 |
0 |
0 |
T141 |
18900 |
99 |
0 |
0 |
T142 |
6825 |
8 |
0 |
0 |
T143 |
8247 |
11 |
0 |
0 |
T144 |
67493 |
664 |
0 |
0 |
T145 |
12755 |
120 |
0 |
0 |
T146 |
11849 |
53 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5917 |
0 |
0 |
T92 |
5601 |
50 |
0 |
0 |
T98 |
14891 |
34 |
0 |
0 |
T105 |
13693 |
15 |
0 |
0 |
T137 |
13434 |
34 |
0 |
0 |
T141 |
18900 |
59 |
0 |
0 |
T142 |
6825 |
69 |
0 |
0 |
T143 |
8247 |
104 |
0 |
0 |
T144 |
67493 |
610 |
0 |
0 |
T145 |
12755 |
61 |
0 |
0 |
T146 |
11849 |
34 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
6193 |
0 |
0 |
T92 |
5601 |
49 |
0 |
0 |
T98 |
14891 |
34 |
0 |
0 |
T105 |
13693 |
10 |
0 |
0 |
T137 |
13434 |
47 |
0 |
0 |
T141 |
18900 |
109 |
0 |
0 |
T142 |
6825 |
7 |
0 |
0 |
T143 |
8247 |
59 |
0 |
0 |
T144 |
67493 |
651 |
0 |
0 |
T145 |
12755 |
81 |
0 |
0 |
T146 |
11849 |
70 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5924 |
0 |
0 |
T92 |
5601 |
67 |
0 |
0 |
T98 |
14891 |
43 |
0 |
0 |
T105 |
13693 |
86 |
0 |
0 |
T137 |
13434 |
29 |
0 |
0 |
T141 |
18900 |
42 |
0 |
0 |
T142 |
6825 |
60 |
0 |
0 |
T143 |
8247 |
58 |
0 |
0 |
T144 |
67493 |
598 |
0 |
0 |
T145 |
12755 |
66 |
0 |
0 |
T146 |
11849 |
46 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5473 |
0 |
0 |
T92 |
5601 |
18 |
0 |
0 |
T98 |
14891 |
55 |
0 |
0 |
T105 |
13693 |
39 |
0 |
0 |
T137 |
13434 |
28 |
0 |
0 |
T141 |
18900 |
85 |
0 |
0 |
T142 |
6825 |
9 |
0 |
0 |
T143 |
8247 |
38 |
0 |
0 |
T144 |
67493 |
630 |
0 |
0 |
T145 |
12755 |
73 |
0 |
0 |
T146 |
11849 |
29 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
6002 |
0 |
0 |
T92 |
5601 |
13 |
0 |
0 |
T98 |
14891 |
28 |
0 |
0 |
T105 |
13693 |
48 |
0 |
0 |
T137 |
13434 |
48 |
0 |
0 |
T141 |
18900 |
42 |
0 |
0 |
T142 |
6825 |
4 |
0 |
0 |
T143 |
8247 |
92 |
0 |
0 |
T144 |
67493 |
504 |
0 |
0 |
T145 |
12755 |
43 |
0 |
0 |
T146 |
11849 |
55 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5876 |
0 |
0 |
T92 |
5601 |
72 |
0 |
0 |
T98 |
14891 |
57 |
0 |
0 |
T105 |
13693 |
25 |
0 |
0 |
T137 |
13434 |
18 |
0 |
0 |
T141 |
18900 |
69 |
0 |
0 |
T142 |
6825 |
53 |
0 |
0 |
T143 |
8247 |
51 |
0 |
0 |
T144 |
67493 |
518 |
0 |
0 |
T145 |
12755 |
59 |
0 |
0 |
T146 |
11849 |
38 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
6019 |
0 |
0 |
T92 |
5601 |
62 |
0 |
0 |
T98 |
14891 |
64 |
0 |
0 |
T105 |
13693 |
6 |
0 |
0 |
T137 |
13434 |
24 |
0 |
0 |
T141 |
18900 |
76 |
0 |
0 |
T142 |
6825 |
8 |
0 |
0 |
T143 |
8247 |
7 |
0 |
0 |
T144 |
67493 |
518 |
0 |
0 |
T145 |
12755 |
91 |
0 |
0 |
T146 |
11849 |
39 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5750 |
0 |
0 |
T92 |
5601 |
7 |
0 |
0 |
T98 |
14891 |
78 |
0 |
0 |
T105 |
13693 |
67 |
0 |
0 |
T137 |
13434 |
72 |
0 |
0 |
T141 |
18900 |
67 |
0 |
0 |
T142 |
6825 |
50 |
0 |
0 |
T143 |
8247 |
128 |
0 |
0 |
T144 |
67493 |
305 |
0 |
0 |
T145 |
12755 |
97 |
0 |
0 |
T146 |
11849 |
86 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5628 |
0 |
0 |
T91 |
13155 |
7 |
0 |
0 |
T92 |
5601 |
4 |
0 |
0 |
T98 |
14891 |
19 |
0 |
0 |
T105 |
13693 |
51 |
0 |
0 |
T137 |
13434 |
87 |
0 |
0 |
T141 |
18900 |
41 |
0 |
0 |
T142 |
6825 |
106 |
0 |
0 |
T143 |
8247 |
11 |
0 |
0 |
T144 |
67493 |
457 |
0 |
0 |
T145 |
12755 |
123 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5479 |
0 |
0 |
T92 |
5601 |
38 |
0 |
0 |
T98 |
14891 |
61 |
0 |
0 |
T105 |
13693 |
18 |
0 |
0 |
T137 |
13434 |
29 |
0 |
0 |
T141 |
18900 |
14 |
0 |
0 |
T142 |
6825 |
62 |
0 |
0 |
T143 |
8247 |
55 |
0 |
0 |
T144 |
67493 |
599 |
0 |
0 |
T145 |
12755 |
121 |
0 |
0 |
T146 |
11849 |
58 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
6170 |
0 |
0 |
T92 |
5601 |
4 |
0 |
0 |
T98 |
14891 |
26 |
0 |
0 |
T105 |
13693 |
55 |
0 |
0 |
T137 |
13434 |
36 |
0 |
0 |
T141 |
18900 |
41 |
0 |
0 |
T142 |
6825 |
121 |
0 |
0 |
T143 |
8247 |
77 |
0 |
0 |
T144 |
67493 |
801 |
0 |
0 |
T145 |
12755 |
54 |
0 |
0 |
T146 |
11849 |
72 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5212 |
0 |
0 |
T92 |
5601 |
6 |
0 |
0 |
T98 |
14891 |
90 |
0 |
0 |
T105 |
13693 |
80 |
0 |
0 |
T137 |
13434 |
27 |
0 |
0 |
T141 |
18900 |
69 |
0 |
0 |
T142 |
6825 |
117 |
0 |
0 |
T143 |
8247 |
118 |
0 |
0 |
T144 |
67493 |
499 |
0 |
0 |
T145 |
12755 |
25 |
0 |
0 |
T146 |
11849 |
12 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5529 |
0 |
0 |
T92 |
5601 |
56 |
0 |
0 |
T98 |
14891 |
20 |
0 |
0 |
T105 |
13693 |
83 |
0 |
0 |
T137 |
13434 |
25 |
0 |
0 |
T141 |
18900 |
38 |
0 |
0 |
T142 |
6825 |
46 |
0 |
0 |
T143 |
8247 |
106 |
0 |
0 |
T144 |
67493 |
328 |
0 |
0 |
T145 |
12755 |
19 |
0 |
0 |
T146 |
11849 |
28 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
6347 |
0 |
0 |
T92 |
5601 |
10 |
0 |
0 |
T98 |
14891 |
53 |
0 |
0 |
T105 |
13693 |
31 |
0 |
0 |
T137 |
13434 |
43 |
0 |
0 |
T141 |
18900 |
63 |
0 |
0 |
T142 |
6825 |
17 |
0 |
0 |
T143 |
8247 |
13 |
0 |
0 |
T144 |
67493 |
624 |
0 |
0 |
T145 |
12755 |
130 |
0 |
0 |
T146 |
11849 |
17 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
6005 |
0 |
0 |
T92 |
5601 |
11 |
0 |
0 |
T98 |
14891 |
37 |
0 |
0 |
T100 |
19192 |
6 |
0 |
0 |
T105 |
13693 |
84 |
0 |
0 |
T137 |
13434 |
51 |
0 |
0 |
T141 |
18900 |
121 |
0 |
0 |
T142 |
6825 |
57 |
0 |
0 |
T143 |
8247 |
45 |
0 |
0 |
T144 |
67493 |
397 |
0 |
0 |
T145 |
12755 |
55 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
4930 |
0 |
0 |
T92 |
5601 |
15 |
0 |
0 |
T98 |
14891 |
53 |
0 |
0 |
T105 |
13693 |
55 |
0 |
0 |
T137 |
13434 |
22 |
0 |
0 |
T141 |
18900 |
23 |
0 |
0 |
T142 |
6825 |
6 |
0 |
0 |
T143 |
8247 |
5 |
0 |
0 |
T144 |
67493 |
351 |
0 |
0 |
T145 |
12755 |
30 |
0 |
0 |
T146 |
11849 |
26 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5519 |
0 |
0 |
T92 |
5601 |
65 |
0 |
0 |
T98 |
14891 |
69 |
0 |
0 |
T105 |
13693 |
66 |
0 |
0 |
T137 |
13434 |
70 |
0 |
0 |
T141 |
18900 |
55 |
0 |
0 |
T142 |
6825 |
68 |
0 |
0 |
T143 |
8247 |
6 |
0 |
0 |
T144 |
67493 |
534 |
0 |
0 |
T145 |
12755 |
78 |
0 |
0 |
T146 |
11849 |
8 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5506 |
0 |
0 |
T92 |
5601 |
10 |
0 |
0 |
T98 |
14891 |
37 |
0 |
0 |
T105 |
13693 |
27 |
0 |
0 |
T137 |
13434 |
35 |
0 |
0 |
T141 |
18900 |
84 |
0 |
0 |
T142 |
6825 |
46 |
0 |
0 |
T143 |
8247 |
38 |
0 |
0 |
T144 |
67493 |
593 |
0 |
0 |
T145 |
12755 |
61 |
0 |
0 |
T146 |
11849 |
42 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5266 |
0 |
0 |
T92 |
5601 |
9 |
0 |
0 |
T98 |
14891 |
89 |
0 |
0 |
T105 |
13693 |
105 |
0 |
0 |
T106 |
4444 |
9 |
0 |
0 |
T137 |
13434 |
73 |
0 |
0 |
T141 |
18900 |
130 |
0 |
0 |
T142 |
6825 |
67 |
0 |
0 |
T143 |
8247 |
82 |
0 |
0 |
T144 |
67493 |
537 |
0 |
0 |
T145 |
12755 |
21 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5985 |
0 |
0 |
T91 |
13155 |
4 |
0 |
0 |
T92 |
5601 |
68 |
0 |
0 |
T98 |
14891 |
24 |
0 |
0 |
T105 |
13693 |
39 |
0 |
0 |
T137 |
13434 |
18 |
0 |
0 |
T141 |
18900 |
20 |
0 |
0 |
T142 |
6825 |
49 |
0 |
0 |
T143 |
8247 |
38 |
0 |
0 |
T144 |
67493 |
582 |
0 |
0 |
T145 |
12755 |
155 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5526 |
0 |
0 |
T92 |
5601 |
1 |
0 |
0 |
T98 |
14891 |
31 |
0 |
0 |
T101 |
8271 |
1 |
0 |
0 |
T105 |
13693 |
31 |
0 |
0 |
T137 |
13434 |
29 |
0 |
0 |
T141 |
18900 |
69 |
0 |
0 |
T142 |
6825 |
116 |
0 |
0 |
T143 |
8247 |
115 |
0 |
0 |
T144 |
67493 |
474 |
0 |
0 |
T145 |
12755 |
55 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5666 |
0 |
0 |
T92 |
5601 |
49 |
0 |
0 |
T98 |
14891 |
56 |
0 |
0 |
T100 |
19192 |
9 |
0 |
0 |
T105 |
13693 |
43 |
0 |
0 |
T137 |
13434 |
77 |
0 |
0 |
T141 |
18900 |
48 |
0 |
0 |
T142 |
6825 |
7 |
0 |
0 |
T143 |
8247 |
9 |
0 |
0 |
T144 |
67493 |
400 |
0 |
0 |
T145 |
12755 |
13 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
5650 |
0 |
0 |
T92 |
5601 |
3 |
0 |
0 |
T98 |
14891 |
78 |
0 |
0 |
T105 |
13693 |
91 |
0 |
0 |
T137 |
13434 |
26 |
0 |
0 |
T141 |
18900 |
62 |
0 |
0 |
T142 |
6825 |
74 |
0 |
0 |
T143 |
8247 |
44 |
0 |
0 |
T144 |
67493 |
524 |
0 |
0 |
T145 |
12755 |
68 |
0 |
0 |
T146 |
11849 |
21 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2532 |
0 |
0 |
T92 |
5601 |
4 |
0 |
0 |
T98 |
14891 |
16 |
0 |
0 |
T105 |
13693 |
19 |
0 |
0 |
T137 |
13434 |
46 |
0 |
0 |
T141 |
18900 |
74 |
0 |
0 |
T142 |
6825 |
11 |
0 |
0 |
T143 |
8247 |
5 |
0 |
0 |
T144 |
67493 |
122 |
0 |
0 |
T145 |
12755 |
25 |
0 |
0 |
T146 |
11849 |
51 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2627 |
0 |
0 |
T92 |
5601 |
7 |
0 |
0 |
T98 |
14891 |
11 |
0 |
0 |
T105 |
13693 |
34 |
0 |
0 |
T137 |
13434 |
72 |
0 |
0 |
T141 |
18900 |
92 |
0 |
0 |
T142 |
6825 |
5 |
0 |
0 |
T143 |
8247 |
12 |
0 |
0 |
T144 |
67493 |
126 |
0 |
0 |
T145 |
12755 |
30 |
0 |
0 |
T146 |
11849 |
32 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2577 |
0 |
0 |
T92 |
5601 |
8 |
0 |
0 |
T98 |
14891 |
7 |
0 |
0 |
T105 |
13693 |
7 |
0 |
0 |
T137 |
13434 |
31 |
0 |
0 |
T141 |
18900 |
67 |
0 |
0 |
T142 |
6825 |
15 |
0 |
0 |
T143 |
8247 |
22 |
0 |
0 |
T144 |
67493 |
123 |
0 |
0 |
T145 |
12755 |
35 |
0 |
0 |
T146 |
11849 |
16 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2468 |
0 |
0 |
T92 |
5601 |
7 |
0 |
0 |
T98 |
14891 |
10 |
0 |
0 |
T105 |
13693 |
18 |
0 |
0 |
T137 |
13434 |
66 |
0 |
0 |
T141 |
18900 |
35 |
0 |
0 |
T142 |
6825 |
8 |
0 |
0 |
T143 |
8247 |
4 |
0 |
0 |
T144 |
67493 |
94 |
0 |
0 |
T145 |
12755 |
28 |
0 |
0 |
T146 |
11849 |
24 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
3142 |
0 |
0 |
T92 |
5601 |
23 |
0 |
0 |
T98 |
14891 |
13 |
0 |
0 |
T105 |
13693 |
28 |
0 |
0 |
T137 |
13434 |
7 |
0 |
0 |
T141 |
18900 |
114 |
0 |
0 |
T142 |
6825 |
8 |
0 |
0 |
T143 |
8247 |
36 |
0 |
0 |
T144 |
67493 |
206 |
0 |
0 |
T145 |
12755 |
20 |
0 |
0 |
T146 |
11849 |
34 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
4962 |
0 |
0 |
T17 |
82711 |
28 |
0 |
0 |
T18 |
507005 |
0 |
0 |
0 |
T19 |
6592 |
0 |
0 |
0 |
T20 |
0 |
14 |
0 |
0 |
T21 |
0 |
40 |
0 |
0 |
T23 |
0 |
23 |
0 |
0 |
T44 |
442070 |
0 |
0 |
0 |
T46 |
193908 |
0 |
0 |
0 |
T62 |
1157 |
0 |
0 |
0 |
T133 |
0 |
53 |
0 |
0 |
T147 |
0 |
44 |
0 |
0 |
T148 |
0 |
10 |
0 |
0 |
T149 |
0 |
8 |
0 |
0 |
T150 |
0 |
9 |
0 |
0 |
T151 |
0 |
12 |
0 |
0 |
T152 |
220788 |
0 |
0 |
0 |
T153 |
530878 |
0 |
0 |
0 |
T154 |
6110 |
0 |
0 |
0 |
T155 |
38956 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2502 |
0 |
0 |
T92 |
5601 |
1 |
0 |
0 |
T98 |
14891 |
6 |
0 |
0 |
T105 |
13693 |
12 |
0 |
0 |
T137 |
13434 |
87 |
0 |
0 |
T141 |
18900 |
102 |
0 |
0 |
T142 |
6825 |
8 |
0 |
0 |
T143 |
8247 |
17 |
0 |
0 |
T144 |
67493 |
99 |
0 |
0 |
T145 |
12755 |
44 |
0 |
0 |
T146 |
11849 |
30 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2326 |
0 |
0 |
T92 |
5601 |
1 |
0 |
0 |
T100 |
19192 |
5 |
0 |
0 |
T105 |
13693 |
18 |
0 |
0 |
T137 |
13434 |
28 |
0 |
0 |
T141 |
18900 |
55 |
0 |
0 |
T142 |
6825 |
16 |
0 |
0 |
T143 |
8247 |
7 |
0 |
0 |
T144 |
67493 |
130 |
0 |
0 |
T145 |
12755 |
17 |
0 |
0 |
T146 |
11849 |
80 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2350 |
0 |
0 |
T92 |
5601 |
12 |
0 |
0 |
T97 |
12580 |
7 |
0 |
0 |
T98 |
14891 |
10 |
0 |
0 |
T105 |
13693 |
3 |
0 |
0 |
T137 |
13434 |
70 |
0 |
0 |
T141 |
18900 |
68 |
0 |
0 |
T142 |
6825 |
10 |
0 |
0 |
T143 |
8247 |
6 |
0 |
0 |
T144 |
67493 |
60 |
0 |
0 |
T145 |
12755 |
18 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2283 |
0 |
0 |
T92 |
5601 |
18 |
0 |
0 |
T98 |
14891 |
10 |
0 |
0 |
T105 |
13693 |
6 |
0 |
0 |
T137 |
13434 |
39 |
0 |
0 |
T141 |
18900 |
26 |
0 |
0 |
T142 |
6825 |
14 |
0 |
0 |
T143 |
8247 |
2 |
0 |
0 |
T144 |
67493 |
103 |
0 |
0 |
T145 |
12755 |
14 |
0 |
0 |
T146 |
11849 |
25 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2119 |
0 |
0 |
T98 |
14891 |
5 |
0 |
0 |
T105 |
13693 |
16 |
0 |
0 |
T137 |
13434 |
25 |
0 |
0 |
T141 |
18900 |
44 |
0 |
0 |
T142 |
6825 |
6 |
0 |
0 |
T143 |
8247 |
12 |
0 |
0 |
T144 |
67493 |
85 |
0 |
0 |
T145 |
12755 |
28 |
0 |
0 |
T146 |
11849 |
20 |
0 |
0 |
T156 |
4866 |
9 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2104 |
0 |
0 |
T92 |
5601 |
10 |
0 |
0 |
T98 |
14891 |
16 |
0 |
0 |
T105 |
13693 |
6 |
0 |
0 |
T137 |
13434 |
46 |
0 |
0 |
T141 |
18900 |
59 |
0 |
0 |
T142 |
6825 |
4 |
0 |
0 |
T144 |
67493 |
70 |
0 |
0 |
T145 |
12755 |
16 |
0 |
0 |
T146 |
11849 |
68 |
0 |
0 |
T156 |
4866 |
2 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
3175 |
0 |
0 |
T92 |
5601 |
8 |
0 |
0 |
T98 |
14891 |
9 |
0 |
0 |
T105 |
13693 |
59 |
0 |
0 |
T137 |
13434 |
17 |
0 |
0 |
T141 |
18900 |
44 |
0 |
0 |
T142 |
6825 |
17 |
0 |
0 |
T143 |
8247 |
18 |
0 |
0 |
T144 |
67493 |
172 |
0 |
0 |
T145 |
12755 |
53 |
0 |
0 |
T146 |
11849 |
60 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2273 |
0 |
0 |
T92 |
5601 |
15 |
0 |
0 |
T98 |
14891 |
12 |
0 |
0 |
T105 |
13693 |
13 |
0 |
0 |
T137 |
13434 |
53 |
0 |
0 |
T141 |
18900 |
101 |
0 |
0 |
T142 |
6825 |
10 |
0 |
0 |
T143 |
8247 |
3 |
0 |
0 |
T144 |
67493 |
91 |
0 |
0 |
T145 |
12755 |
38 |
0 |
0 |
T146 |
11849 |
80 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
3529 |
0 |
0 |
T92 |
5601 |
7 |
0 |
0 |
T98 |
14891 |
29 |
0 |
0 |
T100 |
19192 |
5 |
0 |
0 |
T105 |
13693 |
18 |
0 |
0 |
T137 |
13434 |
29 |
0 |
0 |
T141 |
18900 |
104 |
0 |
0 |
T142 |
6825 |
10 |
0 |
0 |
T143 |
8247 |
26 |
0 |
0 |
T144 |
67493 |
263 |
0 |
0 |
T145 |
12755 |
31 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2489 |
0 |
0 |
T92 |
5601 |
5 |
0 |
0 |
T98 |
14891 |
14 |
0 |
0 |
T105 |
13693 |
5 |
0 |
0 |
T137 |
13434 |
40 |
0 |
0 |
T141 |
18900 |
65 |
0 |
0 |
T142 |
6825 |
18 |
0 |
0 |
T143 |
8247 |
7 |
0 |
0 |
T144 |
67493 |
142 |
0 |
0 |
T145 |
12755 |
22 |
0 |
0 |
T146 |
11849 |
34 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2292 |
0 |
0 |
T92 |
5601 |
6 |
0 |
0 |
T98 |
14891 |
19 |
0 |
0 |
T105 |
13693 |
18 |
0 |
0 |
T137 |
13434 |
27 |
0 |
0 |
T141 |
18900 |
66 |
0 |
0 |
T142 |
6825 |
6 |
0 |
0 |
T143 |
8247 |
14 |
0 |
0 |
T144 |
67493 |
95 |
0 |
0 |
T145 |
12755 |
22 |
0 |
0 |
T146 |
11849 |
82 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2031 |
0 |
0 |
T92 |
5601 |
2 |
0 |
0 |
T98 |
14891 |
7 |
0 |
0 |
T105 |
13693 |
11 |
0 |
0 |
T137 |
13434 |
17 |
0 |
0 |
T141 |
18900 |
23 |
0 |
0 |
T142 |
6825 |
16 |
0 |
0 |
T143 |
8247 |
5 |
0 |
0 |
T144 |
67493 |
62 |
0 |
0 |
T145 |
12755 |
35 |
0 |
0 |
T146 |
11849 |
21 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2227 |
0 |
0 |
T92 |
5601 |
10 |
0 |
0 |
T98 |
14891 |
18 |
0 |
0 |
T105 |
13693 |
5 |
0 |
0 |
T137 |
13434 |
70 |
0 |
0 |
T141 |
18900 |
13 |
0 |
0 |
T142 |
6825 |
2 |
0 |
0 |
T143 |
8247 |
14 |
0 |
0 |
T144 |
67493 |
59 |
0 |
0 |
T145 |
12755 |
20 |
0 |
0 |
T146 |
11849 |
13 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2355 |
0 |
0 |
T92 |
5601 |
15 |
0 |
0 |
T98 |
14891 |
12 |
0 |
0 |
T105 |
13693 |
12 |
0 |
0 |
T137 |
13434 |
56 |
0 |
0 |
T141 |
18900 |
107 |
0 |
0 |
T142 |
6825 |
5 |
0 |
0 |
T143 |
8247 |
8 |
0 |
0 |
T144 |
67493 |
85 |
0 |
0 |
T145 |
12755 |
11 |
0 |
0 |
T146 |
11849 |
83 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2085 |
0 |
0 |
T92 |
5601 |
4 |
0 |
0 |
T98 |
14891 |
18 |
0 |
0 |
T105 |
13693 |
9 |
0 |
0 |
T137 |
13434 |
27 |
0 |
0 |
T141 |
18900 |
45 |
0 |
0 |
T142 |
6825 |
4 |
0 |
0 |
T143 |
8247 |
4 |
0 |
0 |
T144 |
67493 |
78 |
0 |
0 |
T145 |
12755 |
31 |
0 |
0 |
T146 |
11849 |
34 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
416860535 |
2192 |
0 |
0 |
T91 |
13155 |
4 |
0 |
0 |
T92 |
5601 |
12 |
0 |
0 |
T98 |
14891 |
14 |
0 |
0 |
T100 |
19192 |
7 |
0 |
0 |
T105 |
13693 |
9 |
0 |
0 |
T137 |
13434 |
19 |
0 |
0 |
T141 |
18900 |
32 |
0 |
0 |
T142 |
6825 |
7 |
0 |
0 |
T143 |
8247 |
5 |
0 |
0 |
T144 |
67493 |
88 |
0 |
0 |