Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3431 |
0 |
0 |
T53 |
56084 |
1 |
0 |
0 |
T54 |
2508 |
7 |
0 |
0 |
T55 |
15040 |
13 |
0 |
0 |
T87 |
28958 |
1 |
0 |
0 |
T88 |
8088 |
117 |
0 |
0 |
T89 |
11035 |
3 |
0 |
0 |
T90 |
10259 |
182 |
0 |
0 |
T99 |
4970 |
8 |
0 |
0 |
T103 |
53211 |
4 |
0 |
0 |
T104 |
4767 |
2 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3038 |
0 |
0 |
T55 |
15040 |
7 |
0 |
0 |
T75 |
4281 |
4 |
0 |
0 |
T105 |
15934 |
32 |
0 |
0 |
T107 |
5696 |
4 |
0 |
0 |
T113 |
112928 |
685 |
0 |
0 |
T133 |
2008 |
4 |
0 |
0 |
T134 |
271109 |
619 |
0 |
0 |
T135 |
6970 |
12 |
0 |
0 |
T136 |
14471 |
66 |
0 |
0 |
T137 |
16640 |
41 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3173 |
0 |
0 |
T55 |
15040 |
18 |
0 |
0 |
T75 |
4281 |
17 |
0 |
0 |
T105 |
15934 |
28 |
0 |
0 |
T107 |
5696 |
1 |
0 |
0 |
T113 |
112928 |
827 |
0 |
0 |
T133 |
2008 |
3 |
0 |
0 |
T134 |
271109 |
681 |
0 |
0 |
T135 |
6970 |
15 |
0 |
0 |
T136 |
14471 |
57 |
0 |
0 |
T137 |
16640 |
69 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3608 |
0 |
0 |
T55 |
15040 |
31 |
0 |
0 |
T75 |
4281 |
17 |
0 |
0 |
T105 |
15934 |
36 |
0 |
0 |
T107 |
5696 |
15 |
0 |
0 |
T113 |
112928 |
802 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
635 |
0 |
0 |
T136 |
14471 |
33 |
0 |
0 |
T137 |
16640 |
38 |
0 |
0 |
T138 |
103389 |
416 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
11211 |
0 |
0 |
T55 |
15040 |
205 |
0 |
0 |
T75 |
4281 |
13 |
0 |
0 |
T105 |
15934 |
163 |
0 |
0 |
T107 |
5696 |
98 |
0 |
0 |
T113 |
112928 |
837 |
0 |
0 |
T133 |
2008 |
4 |
0 |
0 |
T134 |
271109 |
668 |
0 |
0 |
T135 |
6970 |
29 |
0 |
0 |
T136 |
14471 |
35 |
0 |
0 |
T137 |
16640 |
30 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
11236 |
0 |
0 |
T55 |
15040 |
96 |
0 |
0 |
T75 |
4281 |
10 |
0 |
0 |
T105 |
15934 |
244 |
0 |
0 |
T107 |
5696 |
121 |
0 |
0 |
T113 |
112928 |
750 |
0 |
0 |
T133 |
2008 |
3 |
0 |
0 |
T134 |
271109 |
673 |
0 |
0 |
T135 |
6970 |
3 |
0 |
0 |
T136 |
14471 |
40 |
0 |
0 |
T137 |
16640 |
12 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
10809 |
0 |
0 |
T55 |
15040 |
150 |
0 |
0 |
T75 |
4281 |
13 |
0 |
0 |
T105 |
15934 |
252 |
0 |
0 |
T107 |
5696 |
17 |
0 |
0 |
T113 |
112928 |
794 |
0 |
0 |
T133 |
2008 |
5 |
0 |
0 |
T134 |
271109 |
601 |
0 |
0 |
T135 |
6970 |
10 |
0 |
0 |
T136 |
14471 |
103 |
0 |
0 |
T137 |
16640 |
37 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
10340 |
0 |
0 |
T55 |
15040 |
62 |
0 |
0 |
T75 |
4281 |
12 |
0 |
0 |
T105 |
15934 |
18 |
0 |
0 |
T107 |
5696 |
109 |
0 |
0 |
T113 |
112928 |
780 |
0 |
0 |
T133 |
2008 |
9 |
0 |
0 |
T134 |
271109 |
604 |
0 |
0 |
T135 |
6970 |
19 |
0 |
0 |
T136 |
14471 |
48 |
0 |
0 |
T137 |
16640 |
59 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
11194 |
0 |
0 |
T55 |
15040 |
62 |
0 |
0 |
T75 |
4281 |
18 |
0 |
0 |
T105 |
15934 |
289 |
0 |
0 |
T107 |
5696 |
9 |
0 |
0 |
T113 |
112928 |
784 |
0 |
0 |
T133 |
2008 |
3 |
0 |
0 |
T134 |
271109 |
659 |
0 |
0 |
T135 |
6970 |
2 |
0 |
0 |
T136 |
14471 |
31 |
0 |
0 |
T137 |
16640 |
57 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
11121 |
0 |
0 |
T55 |
15040 |
236 |
0 |
0 |
T75 |
4281 |
16 |
0 |
0 |
T105 |
15934 |
348 |
0 |
0 |
T107 |
5696 |
136 |
0 |
0 |
T113 |
112928 |
779 |
0 |
0 |
T133 |
2008 |
3 |
0 |
0 |
T134 |
271109 |
647 |
0 |
0 |
T135 |
6970 |
14 |
0 |
0 |
T136 |
14471 |
72 |
0 |
0 |
T137 |
16640 |
41 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
10812 |
0 |
0 |
T55 |
15040 |
92 |
0 |
0 |
T75 |
4281 |
8 |
0 |
0 |
T105 |
15934 |
137 |
0 |
0 |
T107 |
5696 |
111 |
0 |
0 |
T113 |
112928 |
735 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
682 |
0 |
0 |
T135 |
6970 |
9 |
0 |
0 |
T136 |
14471 |
33 |
0 |
0 |
T137 |
16640 |
46 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
9860 |
0 |
0 |
T55 |
15040 |
168 |
0 |
0 |
T75 |
4281 |
8 |
0 |
0 |
T105 |
15934 |
153 |
0 |
0 |
T107 |
5696 |
8 |
0 |
0 |
T113 |
112928 |
732 |
0 |
0 |
T133 |
2008 |
5 |
0 |
0 |
T134 |
271109 |
699 |
0 |
0 |
T135 |
6970 |
5 |
0 |
0 |
T136 |
14471 |
30 |
0 |
0 |
T137 |
16640 |
22 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5965 |
0 |
0 |
T55 |
15040 |
86 |
0 |
0 |
T75 |
4281 |
2 |
0 |
0 |
T105 |
15934 |
88 |
0 |
0 |
T107 |
5696 |
6 |
0 |
0 |
T113 |
112928 |
786 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
670 |
0 |
0 |
T135 |
6970 |
30 |
0 |
0 |
T136 |
14471 |
34 |
0 |
0 |
T137 |
16640 |
23 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5833 |
0 |
0 |
T55 |
15040 |
92 |
0 |
0 |
T75 |
4281 |
16 |
0 |
0 |
T105 |
15934 |
20 |
0 |
0 |
T107 |
5696 |
49 |
0 |
0 |
T113 |
112928 |
822 |
0 |
0 |
T133 |
2008 |
7 |
0 |
0 |
T134 |
271109 |
651 |
0 |
0 |
T135 |
6970 |
43 |
0 |
0 |
T136 |
14471 |
37 |
0 |
0 |
T137 |
16640 |
30 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6183 |
0 |
0 |
T55 |
15040 |
30 |
0 |
0 |
T75 |
4281 |
12 |
0 |
0 |
T105 |
15934 |
76 |
0 |
0 |
T107 |
5696 |
10 |
0 |
0 |
T113 |
112928 |
680 |
0 |
0 |
T133 |
2008 |
3 |
0 |
0 |
T134 |
271109 |
712 |
0 |
0 |
T135 |
6970 |
1 |
0 |
0 |
T136 |
14471 |
40 |
0 |
0 |
T137 |
16640 |
30 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6547 |
0 |
0 |
T55 |
15040 |
23 |
0 |
0 |
T75 |
4281 |
18 |
0 |
0 |
T105 |
15934 |
114 |
0 |
0 |
T107 |
5696 |
8 |
0 |
0 |
T113 |
112928 |
796 |
0 |
0 |
T134 |
271109 |
673 |
0 |
0 |
T135 |
6970 |
18 |
0 |
0 |
T136 |
14471 |
2 |
0 |
0 |
T137 |
16640 |
26 |
0 |
0 |
T138 |
103389 |
396 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6051 |
0 |
0 |
T55 |
15040 |
6 |
0 |
0 |
T75 |
4281 |
9 |
0 |
0 |
T105 |
15934 |
57 |
0 |
0 |
T107 |
5696 |
10 |
0 |
0 |
T113 |
112928 |
769 |
0 |
0 |
T133 |
2008 |
9 |
0 |
0 |
T134 |
271109 |
689 |
0 |
0 |
T135 |
6970 |
7 |
0 |
0 |
T136 |
14471 |
30 |
0 |
0 |
T137 |
16640 |
25 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5805 |
0 |
0 |
T55 |
15040 |
24 |
0 |
0 |
T75 |
4281 |
11 |
0 |
0 |
T105 |
15934 |
21 |
0 |
0 |
T107 |
5696 |
8 |
0 |
0 |
T113 |
112928 |
816 |
0 |
0 |
T133 |
2008 |
4 |
0 |
0 |
T134 |
271109 |
668 |
0 |
0 |
T136 |
14471 |
45 |
0 |
0 |
T137 |
16640 |
37 |
0 |
0 |
T138 |
103389 |
404 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5882 |
0 |
0 |
T55 |
15040 |
7 |
0 |
0 |
T75 |
4281 |
16 |
0 |
0 |
T105 |
15934 |
95 |
0 |
0 |
T107 |
5696 |
58 |
0 |
0 |
T113 |
112928 |
771 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
746 |
0 |
0 |
T135 |
6970 |
1 |
0 |
0 |
T136 |
14471 |
44 |
0 |
0 |
T137 |
16640 |
15 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6321 |
0 |
0 |
T55 |
15040 |
74 |
0 |
0 |
T75 |
4281 |
14 |
0 |
0 |
T93 |
14994 |
8 |
0 |
0 |
T105 |
15934 |
116 |
0 |
0 |
T107 |
5696 |
42 |
0 |
0 |
T113 |
112928 |
789 |
0 |
0 |
T133 |
2008 |
5 |
0 |
0 |
T134 |
271109 |
721 |
0 |
0 |
T136 |
14471 |
54 |
0 |
0 |
T137 |
16640 |
16 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6002 |
0 |
0 |
T55 |
15040 |
69 |
0 |
0 |
T75 |
4281 |
9 |
0 |
0 |
T105 |
15934 |
111 |
0 |
0 |
T107 |
5696 |
8 |
0 |
0 |
T113 |
112928 |
763 |
0 |
0 |
T133 |
2008 |
8 |
0 |
0 |
T134 |
271109 |
675 |
0 |
0 |
T135 |
6970 |
3 |
0 |
0 |
T136 |
14471 |
6 |
0 |
0 |
T137 |
16640 |
22 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6255 |
0 |
0 |
T55 |
15040 |
37 |
0 |
0 |
T75 |
4281 |
9 |
0 |
0 |
T105 |
15934 |
72 |
0 |
0 |
T107 |
5696 |
45 |
0 |
0 |
T113 |
112928 |
829 |
0 |
0 |
T133 |
2008 |
7 |
0 |
0 |
T134 |
271109 |
654 |
0 |
0 |
T135 |
6970 |
9 |
0 |
0 |
T136 |
14471 |
70 |
0 |
0 |
T137 |
16640 |
32 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5830 |
0 |
0 |
T55 |
15040 |
61 |
0 |
0 |
T75 |
4281 |
17 |
0 |
0 |
T105 |
15934 |
75 |
0 |
0 |
T107 |
5696 |
44 |
0 |
0 |
T113 |
112928 |
806 |
0 |
0 |
T133 |
2008 |
4 |
0 |
0 |
T134 |
271109 |
686 |
0 |
0 |
T135 |
6970 |
37 |
0 |
0 |
T136 |
14471 |
42 |
0 |
0 |
T137 |
16640 |
14 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6111 |
0 |
0 |
T55 |
15040 |
56 |
0 |
0 |
T75 |
4281 |
5 |
0 |
0 |
T105 |
15934 |
157 |
0 |
0 |
T107 |
5696 |
60 |
0 |
0 |
T113 |
112928 |
779 |
0 |
0 |
T133 |
2008 |
4 |
0 |
0 |
T134 |
271109 |
684 |
0 |
0 |
T135 |
6970 |
19 |
0 |
0 |
T136 |
14471 |
37 |
0 |
0 |
T137 |
16640 |
58 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6347 |
0 |
0 |
T55 |
15040 |
38 |
0 |
0 |
T75 |
4281 |
15 |
0 |
0 |
T105 |
15934 |
124 |
0 |
0 |
T107 |
5696 |
2 |
0 |
0 |
T113 |
112928 |
761 |
0 |
0 |
T133 |
2008 |
7 |
0 |
0 |
T134 |
271109 |
686 |
0 |
0 |
T135 |
6970 |
4 |
0 |
0 |
T136 |
14471 |
47 |
0 |
0 |
T137 |
16640 |
63 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6540 |
0 |
0 |
T55 |
15040 |
14 |
0 |
0 |
T75 |
4281 |
11 |
0 |
0 |
T105 |
15934 |
156 |
0 |
0 |
T107 |
5696 |
48 |
0 |
0 |
T113 |
112928 |
806 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
716 |
0 |
0 |
T135 |
6970 |
2 |
0 |
0 |
T136 |
14471 |
51 |
0 |
0 |
T137 |
16640 |
29 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5989 |
0 |
0 |
T55 |
15040 |
7 |
0 |
0 |
T75 |
4281 |
15 |
0 |
0 |
T105 |
15934 |
64 |
0 |
0 |
T107 |
5696 |
26 |
0 |
0 |
T113 |
112928 |
734 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
702 |
0 |
0 |
T135 |
6970 |
12 |
0 |
0 |
T136 |
14471 |
29 |
0 |
0 |
T137 |
16640 |
10 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6381 |
0 |
0 |
T55 |
15040 |
36 |
0 |
0 |
T75 |
4281 |
14 |
0 |
0 |
T96 |
14720 |
9 |
0 |
0 |
T105 |
15934 |
157 |
0 |
0 |
T107 |
5696 |
4 |
0 |
0 |
T113 |
112928 |
854 |
0 |
0 |
T133 |
2008 |
7 |
0 |
0 |
T134 |
271109 |
643 |
0 |
0 |
T135 |
6970 |
24 |
0 |
0 |
T136 |
14471 |
47 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5776 |
0 |
0 |
T55 |
15040 |
29 |
0 |
0 |
T75 |
4281 |
7 |
0 |
0 |
T105 |
15934 |
57 |
0 |
0 |
T107 |
5696 |
8 |
0 |
0 |
T113 |
112928 |
689 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
636 |
0 |
0 |
T135 |
6970 |
7 |
0 |
0 |
T136 |
14471 |
76 |
0 |
0 |
T137 |
16640 |
25 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6481 |
0 |
0 |
T55 |
15040 |
72 |
0 |
0 |
T75 |
4281 |
7 |
0 |
0 |
T105 |
15934 |
52 |
0 |
0 |
T107 |
5696 |
11 |
0 |
0 |
T113 |
112928 |
787 |
0 |
0 |
T133 |
2008 |
5 |
0 |
0 |
T134 |
271109 |
739 |
0 |
0 |
T136 |
14471 |
54 |
0 |
0 |
T137 |
16640 |
13 |
0 |
0 |
T138 |
103389 |
384 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6135 |
0 |
0 |
T55 |
15040 |
31 |
0 |
0 |
T75 |
4281 |
9 |
0 |
0 |
T105 |
15934 |
59 |
0 |
0 |
T107 |
5696 |
49 |
0 |
0 |
T113 |
112928 |
805 |
0 |
0 |
T134 |
271109 |
672 |
0 |
0 |
T135 |
6970 |
39 |
0 |
0 |
T136 |
14471 |
31 |
0 |
0 |
T137 |
16640 |
16 |
0 |
0 |
T138 |
103389 |
417 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5914 |
0 |
0 |
T55 |
15040 |
78 |
0 |
0 |
T75 |
4281 |
12 |
0 |
0 |
T105 |
15934 |
107 |
0 |
0 |
T107 |
5696 |
5 |
0 |
0 |
T113 |
112928 |
781 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
672 |
0 |
0 |
T135 |
6970 |
14 |
0 |
0 |
T136 |
14471 |
50 |
0 |
0 |
T137 |
16640 |
44 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6298 |
0 |
0 |
T55 |
15040 |
67 |
0 |
0 |
T75 |
4281 |
17 |
0 |
0 |
T105 |
15934 |
134 |
0 |
0 |
T107 |
5696 |
8 |
0 |
0 |
T113 |
112928 |
793 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
732 |
0 |
0 |
T136 |
14471 |
79 |
0 |
0 |
T137 |
16640 |
49 |
0 |
0 |
T138 |
103389 |
522 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6092 |
0 |
0 |
T55 |
15040 |
82 |
0 |
0 |
T75 |
4281 |
9 |
0 |
0 |
T105 |
15934 |
50 |
0 |
0 |
T107 |
5696 |
10 |
0 |
0 |
T113 |
112928 |
827 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
702 |
0 |
0 |
T135 |
6970 |
27 |
0 |
0 |
T136 |
14471 |
36 |
0 |
0 |
T137 |
16640 |
28 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
6158 |
0 |
0 |
T55 |
15040 |
90 |
0 |
0 |
T75 |
4281 |
8 |
0 |
0 |
T105 |
15934 |
132 |
0 |
0 |
T107 |
5696 |
9 |
0 |
0 |
T113 |
112928 |
828 |
0 |
0 |
T133 |
2008 |
9 |
0 |
0 |
T134 |
271109 |
733 |
0 |
0 |
T135 |
6970 |
10 |
0 |
0 |
T136 |
14471 |
28 |
0 |
0 |
T137 |
16640 |
45 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5857 |
0 |
0 |
T55 |
15040 |
80 |
0 |
0 |
T75 |
4281 |
7 |
0 |
0 |
T96 |
14720 |
4 |
0 |
0 |
T105 |
15934 |
126 |
0 |
0 |
T107 |
5696 |
6 |
0 |
0 |
T113 |
112928 |
742 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
722 |
0 |
0 |
T135 |
6970 |
40 |
0 |
0 |
T136 |
14471 |
12 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3372 |
0 |
0 |
T55 |
15040 |
4 |
0 |
0 |
T75 |
4281 |
12 |
0 |
0 |
T93 |
14994 |
1 |
0 |
0 |
T105 |
15934 |
28 |
0 |
0 |
T107 |
5696 |
7 |
0 |
0 |
T113 |
112928 |
668 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
675 |
0 |
0 |
T136 |
14471 |
51 |
0 |
0 |
T137 |
16640 |
49 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3549 |
0 |
0 |
T55 |
15040 |
6 |
0 |
0 |
T75 |
4281 |
5 |
0 |
0 |
T105 |
15934 |
24 |
0 |
0 |
T107 |
5696 |
17 |
0 |
0 |
T113 |
112928 |
795 |
0 |
0 |
T134 |
271109 |
750 |
0 |
0 |
T135 |
6970 |
8 |
0 |
0 |
T136 |
14471 |
79 |
0 |
0 |
T137 |
16640 |
24 |
0 |
0 |
T138 |
103389 |
476 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3617 |
0 |
0 |
T55 |
15040 |
20 |
0 |
0 |
T75 |
4281 |
18 |
0 |
0 |
T105 |
15934 |
31 |
0 |
0 |
T107 |
5696 |
17 |
0 |
0 |
T113 |
112928 |
785 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
701 |
0 |
0 |
T135 |
6970 |
4 |
0 |
0 |
T136 |
14471 |
53 |
0 |
0 |
T137 |
16640 |
37 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3354 |
0 |
0 |
T55 |
15040 |
11 |
0 |
0 |
T75 |
4281 |
12 |
0 |
0 |
T105 |
15934 |
32 |
0 |
0 |
T107 |
5696 |
6 |
0 |
0 |
T113 |
112928 |
784 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
683 |
0 |
0 |
T135 |
6970 |
3 |
0 |
0 |
T136 |
14471 |
34 |
0 |
0 |
T137 |
16640 |
3 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3913 |
0 |
0 |
T55 |
15040 |
29 |
0 |
0 |
T75 |
4281 |
8 |
0 |
0 |
T105 |
15934 |
46 |
0 |
0 |
T107 |
5696 |
6 |
0 |
0 |
T113 |
112928 |
721 |
0 |
0 |
T133 |
2008 |
7 |
0 |
0 |
T134 |
271109 |
669 |
0 |
0 |
T135 |
6970 |
34 |
0 |
0 |
T136 |
14471 |
33 |
0 |
0 |
T137 |
16640 |
38 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
5265 |
0 |
0 |
T14 |
586905 |
19 |
0 |
0 |
T15 |
0 |
14 |
0 |
0 |
T18 |
0 |
66 |
0 |
0 |
T19 |
0 |
5 |
0 |
0 |
T31 |
107643 |
0 |
0 |
0 |
T36 |
56179 |
0 |
0 |
0 |
T37 |
179698 |
0 |
0 |
0 |
T38 |
630790 |
0 |
0 |
0 |
T44 |
1031 |
0 |
0 |
0 |
T45 |
118222 |
0 |
0 |
0 |
T46 |
1897 |
0 |
0 |
0 |
T47 |
17215 |
0 |
0 |
0 |
T48 |
40758 |
0 |
0 |
0 |
T139 |
0 |
29 |
0 |
0 |
T140 |
0 |
12 |
0 |
0 |
T141 |
0 |
7 |
0 |
0 |
T142 |
0 |
20 |
0 |
0 |
T143 |
0 |
29 |
0 |
0 |
T144 |
0 |
34 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3340 |
0 |
0 |
T55 |
15040 |
28 |
0 |
0 |
T75 |
4281 |
14 |
0 |
0 |
T105 |
15934 |
36 |
0 |
0 |
T107 |
5696 |
6 |
0 |
0 |
T113 |
112928 |
761 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
654 |
0 |
0 |
T135 |
6970 |
23 |
0 |
0 |
T136 |
14471 |
16 |
0 |
0 |
T137 |
16640 |
55 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3334 |
0 |
0 |
T55 |
15040 |
22 |
0 |
0 |
T75 |
4281 |
11 |
0 |
0 |
T105 |
15934 |
31 |
0 |
0 |
T107 |
5696 |
2 |
0 |
0 |
T113 |
112928 |
759 |
0 |
0 |
T133 |
2008 |
5 |
0 |
0 |
T134 |
271109 |
695 |
0 |
0 |
T135 |
6970 |
17 |
0 |
0 |
T136 |
14471 |
49 |
0 |
0 |
T137 |
16640 |
27 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3217 |
0 |
0 |
T55 |
15040 |
15 |
0 |
0 |
T75 |
4281 |
17 |
0 |
0 |
T105 |
15934 |
20 |
0 |
0 |
T107 |
5696 |
14 |
0 |
0 |
T113 |
112928 |
741 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
693 |
0 |
0 |
T135 |
6970 |
11 |
0 |
0 |
T136 |
14471 |
59 |
0 |
0 |
T137 |
16640 |
13 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3163 |
0 |
0 |
T55 |
15040 |
12 |
0 |
0 |
T75 |
4281 |
14 |
0 |
0 |
T105 |
15934 |
24 |
0 |
0 |
T107 |
5696 |
5 |
0 |
0 |
T113 |
112928 |
723 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
655 |
0 |
0 |
T135 |
6970 |
6 |
0 |
0 |
T136 |
14471 |
44 |
0 |
0 |
T137 |
16640 |
22 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3038 |
0 |
0 |
T55 |
15040 |
18 |
0 |
0 |
T75 |
4281 |
11 |
0 |
0 |
T105 |
15934 |
33 |
0 |
0 |
T107 |
5696 |
3 |
0 |
0 |
T113 |
112928 |
689 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
625 |
0 |
0 |
T135 |
6970 |
17 |
0 |
0 |
T136 |
14471 |
25 |
0 |
0 |
T137 |
16640 |
24 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3144 |
0 |
0 |
T55 |
15040 |
25 |
0 |
0 |
T75 |
4281 |
4 |
0 |
0 |
T105 |
15934 |
41 |
0 |
0 |
T107 |
5696 |
4 |
0 |
0 |
T113 |
112928 |
767 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
647 |
0 |
0 |
T135 |
6970 |
3 |
0 |
0 |
T136 |
14471 |
81 |
0 |
0 |
T137 |
16640 |
37 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3839 |
0 |
0 |
T55 |
15040 |
21 |
0 |
0 |
T75 |
4281 |
10 |
0 |
0 |
T105 |
15934 |
26 |
0 |
0 |
T107 |
5696 |
8 |
0 |
0 |
T113 |
112928 |
774 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
736 |
0 |
0 |
T135 |
6970 |
14 |
0 |
0 |
T136 |
14471 |
51 |
0 |
0 |
T137 |
16640 |
53 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3125 |
0 |
0 |
T55 |
15040 |
12 |
0 |
0 |
T75 |
4281 |
7 |
0 |
0 |
T105 |
15934 |
16 |
0 |
0 |
T107 |
5696 |
3 |
0 |
0 |
T113 |
112928 |
743 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
650 |
0 |
0 |
T135 |
6970 |
4 |
0 |
0 |
T136 |
14471 |
74 |
0 |
0 |
T137 |
16640 |
37 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
4143 |
0 |
0 |
T55 |
15040 |
37 |
0 |
0 |
T75 |
4281 |
4 |
0 |
0 |
T105 |
15934 |
61 |
0 |
0 |
T107 |
5696 |
38 |
0 |
0 |
T113 |
112928 |
741 |
0 |
0 |
T134 |
271109 |
662 |
0 |
0 |
T135 |
6970 |
1 |
0 |
0 |
T136 |
14471 |
66 |
0 |
0 |
T137 |
16640 |
29 |
0 |
0 |
T138 |
103389 |
374 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3321 |
0 |
0 |
T55 |
15040 |
7 |
0 |
0 |
T75 |
4281 |
8 |
0 |
0 |
T105 |
15934 |
31 |
0 |
0 |
T107 |
5696 |
1 |
0 |
0 |
T113 |
112928 |
787 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
604 |
0 |
0 |
T135 |
6970 |
16 |
0 |
0 |
T136 |
14471 |
26 |
0 |
0 |
T137 |
16640 |
40 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3038 |
0 |
0 |
T55 |
15040 |
6 |
0 |
0 |
T75 |
4281 |
21 |
0 |
0 |
T105 |
15934 |
26 |
0 |
0 |
T107 |
5696 |
3 |
0 |
0 |
T113 |
112928 |
754 |
0 |
0 |
T133 |
2008 |
2 |
0 |
0 |
T134 |
271109 |
654 |
0 |
0 |
T135 |
6970 |
9 |
0 |
0 |
T136 |
14471 |
14 |
0 |
0 |
T137 |
16640 |
13 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3225 |
0 |
0 |
T55 |
15040 |
18 |
0 |
0 |
T75 |
4281 |
12 |
0 |
0 |
T105 |
15934 |
23 |
0 |
0 |
T107 |
5696 |
5 |
0 |
0 |
T113 |
112928 |
800 |
0 |
0 |
T133 |
2008 |
6 |
0 |
0 |
T134 |
271109 |
745 |
0 |
0 |
T135 |
6970 |
11 |
0 |
0 |
T136 |
14471 |
41 |
0 |
0 |
T137 |
16640 |
46 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3239 |
0 |
0 |
T55 |
15040 |
15 |
0 |
0 |
T75 |
4281 |
23 |
0 |
0 |
T105 |
15934 |
18 |
0 |
0 |
T107 |
5696 |
10 |
0 |
0 |
T113 |
112928 |
817 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
663 |
0 |
0 |
T135 |
6970 |
25 |
0 |
0 |
T136 |
14471 |
36 |
0 |
0 |
T137 |
16640 |
19 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3248 |
0 |
0 |
T55 |
15040 |
6 |
0 |
0 |
T75 |
4281 |
10 |
0 |
0 |
T105 |
15934 |
22 |
0 |
0 |
T107 |
5696 |
4 |
0 |
0 |
T113 |
112928 |
831 |
0 |
0 |
T133 |
2008 |
1 |
0 |
0 |
T134 |
271109 |
593 |
0 |
0 |
T135 |
6970 |
38 |
0 |
0 |
T136 |
14471 |
62 |
0 |
0 |
T137 |
16640 |
26 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3063 |
0 |
0 |
T55 |
15040 |
14 |
0 |
0 |
T75 |
4281 |
10 |
0 |
0 |
T96 |
14720 |
1 |
0 |
0 |
T105 |
15934 |
25 |
0 |
0 |
T107 |
5696 |
13 |
0 |
0 |
T113 |
112928 |
760 |
0 |
0 |
T133 |
2008 |
7 |
0 |
0 |
T134 |
271109 |
652 |
0 |
0 |
T135 |
6970 |
18 |
0 |
0 |
T136 |
14471 |
17 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
500117165 |
3104 |
0 |
0 |
T55 |
15040 |
18 |
0 |
0 |
T75 |
4281 |
4 |
0 |
0 |
T105 |
15934 |
34 |
0 |
0 |
T107 |
5696 |
15 |
0 |
0 |
T113 |
112928 |
770 |
0 |
0 |
T133 |
2008 |
5 |
0 |
0 |
T134 |
271109 |
677 |
0 |
0 |
T136 |
14471 |
50 |
0 |
0 |
T137 |
16640 |
16 |
0 |
0 |
T138 |
103389 |
452 |
0 |
0 |