Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
3480 |
0 |
0 |
T67 |
58382 |
3 |
0 |
0 |
T68 |
2741 |
2 |
0 |
0 |
T69 |
7698 |
91 |
0 |
0 |
T100 |
16056 |
7 |
0 |
0 |
T101 |
97025 |
2 |
0 |
0 |
T103 |
5341 |
10 |
0 |
0 |
T115 |
10279 |
6 |
0 |
0 |
T117 |
15582 |
5 |
0 |
0 |
T118 |
2572 |
4 |
0 |
0 |
T119 |
11788 |
9 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1722 |
0 |
0 |
T100 |
16056 |
20 |
0 |
0 |
T101 |
97025 |
90 |
0 |
0 |
T102 |
96756 |
115 |
0 |
0 |
T115 |
10279 |
15 |
0 |
0 |
T117 |
15582 |
19 |
0 |
0 |
T119 |
11788 |
12 |
0 |
0 |
T129 |
6994 |
4 |
0 |
0 |
T149 |
7112 |
19 |
0 |
0 |
T150 |
18871 |
50 |
0 |
0 |
T158 |
14354 |
15 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1859 |
0 |
0 |
T100 |
16056 |
30 |
0 |
0 |
T101 |
97025 |
137 |
0 |
0 |
T102 |
96756 |
87 |
0 |
0 |
T115 |
10279 |
10 |
0 |
0 |
T117 |
15582 |
29 |
0 |
0 |
T119 |
11788 |
13 |
0 |
0 |
T129 |
6994 |
18 |
0 |
0 |
T149 |
7112 |
26 |
0 |
0 |
T150 |
18871 |
42 |
0 |
0 |
T158 |
14354 |
44 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2922 |
0 |
0 |
T100 |
16056 |
37 |
0 |
0 |
T101 |
97025 |
214 |
0 |
0 |
T102 |
96756 |
210 |
0 |
0 |
T115 |
10279 |
22 |
0 |
0 |
T117 |
15582 |
21 |
0 |
0 |
T119 |
11788 |
23 |
0 |
0 |
T129 |
6994 |
32 |
0 |
0 |
T149 |
7112 |
28 |
0 |
0 |
T150 |
18871 |
16 |
0 |
0 |
T158 |
14354 |
42 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
15620 |
0 |
0 |
T100 |
16056 |
238 |
0 |
0 |
T101 |
97025 |
1703 |
0 |
0 |
T102 |
96756 |
1526 |
0 |
0 |
T115 |
10279 |
103 |
0 |
0 |
T117 |
15582 |
144 |
0 |
0 |
T119 |
11788 |
139 |
0 |
0 |
T129 |
6994 |
15 |
0 |
0 |
T149 |
7112 |
45 |
0 |
0 |
T150 |
18871 |
48 |
0 |
0 |
T158 |
14354 |
51 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
19327 |
0 |
0 |
T100 |
16056 |
166 |
0 |
0 |
T101 |
97025 |
1831 |
0 |
0 |
T102 |
96756 |
2015 |
0 |
0 |
T115 |
10279 |
129 |
0 |
0 |
T117 |
15582 |
320 |
0 |
0 |
T119 |
11788 |
147 |
0 |
0 |
T129 |
6994 |
257 |
0 |
0 |
T149 |
7112 |
44 |
0 |
0 |
T150 |
18871 |
30 |
0 |
0 |
T158 |
14354 |
44 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
17129 |
0 |
0 |
T100 |
16056 |
219 |
0 |
0 |
T101 |
97025 |
1969 |
0 |
0 |
T102 |
96756 |
1152 |
0 |
0 |
T115 |
10279 |
133 |
0 |
0 |
T117 |
15582 |
335 |
0 |
0 |
T119 |
11788 |
277 |
0 |
0 |
T129 |
6994 |
120 |
0 |
0 |
T149 |
7112 |
35 |
0 |
0 |
T150 |
18871 |
41 |
0 |
0 |
T158 |
14354 |
50 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
15816 |
0 |
0 |
T100 |
16056 |
392 |
0 |
0 |
T101 |
97025 |
1964 |
0 |
0 |
T102 |
96756 |
1857 |
0 |
0 |
T115 |
10279 |
141 |
0 |
0 |
T117 |
15582 |
245 |
0 |
0 |
T119 |
11788 |
133 |
0 |
0 |
T129 |
6994 |
102 |
0 |
0 |
T149 |
7112 |
7 |
0 |
0 |
T150 |
18871 |
43 |
0 |
0 |
T158 |
14354 |
32 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
18424 |
0 |
0 |
T100 |
16056 |
232 |
0 |
0 |
T101 |
97025 |
1550 |
0 |
0 |
T102 |
96756 |
1811 |
0 |
0 |
T115 |
10279 |
248 |
0 |
0 |
T117 |
15582 |
131 |
0 |
0 |
T119 |
11788 |
254 |
0 |
0 |
T129 |
6994 |
254 |
0 |
0 |
T149 |
7112 |
4 |
0 |
0 |
T150 |
18871 |
46 |
0 |
0 |
T158 |
14354 |
56 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
14929 |
0 |
0 |
T100 |
16056 |
263 |
0 |
0 |
T101 |
97025 |
1010 |
0 |
0 |
T102 |
96756 |
2069 |
0 |
0 |
T115 |
10279 |
149 |
0 |
0 |
T117 |
15582 |
243 |
0 |
0 |
T119 |
11788 |
132 |
0 |
0 |
T129 |
6994 |
13 |
0 |
0 |
T149 |
7112 |
23 |
0 |
0 |
T150 |
18871 |
31 |
0 |
0 |
T158 |
14354 |
21 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
15007 |
0 |
0 |
T100 |
16056 |
140 |
0 |
0 |
T101 |
97025 |
1328 |
0 |
0 |
T102 |
96756 |
2035 |
0 |
0 |
T115 |
10279 |
248 |
0 |
0 |
T117 |
15582 |
232 |
0 |
0 |
T119 |
11788 |
119 |
0 |
0 |
T129 |
6994 |
11 |
0 |
0 |
T149 |
7112 |
23 |
0 |
0 |
T150 |
18871 |
44 |
0 |
0 |
T158 |
14354 |
52 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
17784 |
0 |
0 |
T100 |
16056 |
291 |
0 |
0 |
T101 |
97025 |
2339 |
0 |
0 |
T102 |
96756 |
2245 |
0 |
0 |
T115 |
10279 |
118 |
0 |
0 |
T117 |
15582 |
213 |
0 |
0 |
T119 |
11788 |
26 |
0 |
0 |
T129 |
6994 |
120 |
0 |
0 |
T149 |
7112 |
31 |
0 |
0 |
T150 |
18871 |
34 |
0 |
0 |
T158 |
14354 |
44 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7598 |
0 |
0 |
T100 |
16056 |
112 |
0 |
0 |
T101 |
97025 |
901 |
0 |
0 |
T102 |
96756 |
682 |
0 |
0 |
T115 |
10279 |
15 |
0 |
0 |
T117 |
15582 |
127 |
0 |
0 |
T119 |
11788 |
93 |
0 |
0 |
T129 |
6994 |
4 |
0 |
0 |
T149 |
7112 |
31 |
0 |
0 |
T150 |
18871 |
36 |
0 |
0 |
T158 |
14354 |
51 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7711 |
0 |
0 |
T100 |
16056 |
138 |
0 |
0 |
T101 |
97025 |
749 |
0 |
0 |
T102 |
96756 |
738 |
0 |
0 |
T115 |
10279 |
14 |
0 |
0 |
T117 |
15582 |
97 |
0 |
0 |
T119 |
11788 |
70 |
0 |
0 |
T129 |
6994 |
108 |
0 |
0 |
T149 |
7112 |
18 |
0 |
0 |
T150 |
18871 |
37 |
0 |
0 |
T158 |
14354 |
63 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7349 |
0 |
0 |
T100 |
16056 |
120 |
0 |
0 |
T101 |
97025 |
842 |
0 |
0 |
T102 |
96756 |
652 |
0 |
0 |
T115 |
10279 |
87 |
0 |
0 |
T117 |
15582 |
16 |
0 |
0 |
T119 |
11788 |
70 |
0 |
0 |
T129 |
6994 |
61 |
0 |
0 |
T149 |
7112 |
11 |
0 |
0 |
T150 |
18871 |
50 |
0 |
0 |
T158 |
14354 |
36 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7980 |
0 |
0 |
T100 |
16056 |
83 |
0 |
0 |
T101 |
97025 |
1036 |
0 |
0 |
T102 |
96756 |
868 |
0 |
0 |
T115 |
10279 |
61 |
0 |
0 |
T117 |
15582 |
14 |
0 |
0 |
T119 |
11788 |
81 |
0 |
0 |
T129 |
6994 |
36 |
0 |
0 |
T149 |
7112 |
30 |
0 |
0 |
T150 |
18871 |
51 |
0 |
0 |
T158 |
14354 |
34 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7332 |
0 |
0 |
T100 |
16056 |
113 |
0 |
0 |
T101 |
97025 |
467 |
0 |
0 |
T102 |
96756 |
772 |
0 |
0 |
T115 |
10279 |
67 |
0 |
0 |
T117 |
15582 |
93 |
0 |
0 |
T119 |
11788 |
129 |
0 |
0 |
T129 |
6994 |
57 |
0 |
0 |
T149 |
7112 |
36 |
0 |
0 |
T150 |
18871 |
32 |
0 |
0 |
T158 |
14354 |
49 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7433 |
0 |
0 |
T100 |
16056 |
118 |
0 |
0 |
T101 |
97025 |
736 |
0 |
0 |
T102 |
96756 |
760 |
0 |
0 |
T115 |
10279 |
63 |
0 |
0 |
T117 |
15582 |
19 |
0 |
0 |
T119 |
11788 |
71 |
0 |
0 |
T129 |
6994 |
39 |
0 |
0 |
T149 |
7112 |
42 |
0 |
0 |
T150 |
18871 |
33 |
0 |
0 |
T158 |
14354 |
6 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7614 |
0 |
0 |
T100 |
16056 |
107 |
0 |
0 |
T101 |
97025 |
821 |
0 |
0 |
T102 |
96756 |
497 |
0 |
0 |
T115 |
10279 |
120 |
0 |
0 |
T117 |
15582 |
61 |
0 |
0 |
T119 |
11788 |
14 |
0 |
0 |
T129 |
6994 |
68 |
0 |
0 |
T149 |
7112 |
9 |
0 |
0 |
T150 |
18871 |
45 |
0 |
0 |
T158 |
14354 |
22 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7976 |
0 |
0 |
T100 |
16056 |
115 |
0 |
0 |
T101 |
97025 |
704 |
0 |
0 |
T102 |
96756 |
999 |
0 |
0 |
T115 |
10279 |
62 |
0 |
0 |
T117 |
15582 |
116 |
0 |
0 |
T119 |
11788 |
64 |
0 |
0 |
T129 |
6994 |
66 |
0 |
0 |
T149 |
7112 |
10 |
0 |
0 |
T150 |
18871 |
55 |
0 |
0 |
T158 |
14354 |
11 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7725 |
0 |
0 |
T100 |
16056 |
105 |
0 |
0 |
T101 |
97025 |
808 |
0 |
0 |
T102 |
96756 |
767 |
0 |
0 |
T115 |
10279 |
56 |
0 |
0 |
T117 |
15582 |
111 |
0 |
0 |
T119 |
11788 |
109 |
0 |
0 |
T129 |
6994 |
108 |
0 |
0 |
T149 |
7112 |
4 |
0 |
0 |
T150 |
18871 |
23 |
0 |
0 |
T158 |
14354 |
37 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7773 |
0 |
0 |
T100 |
16056 |
93 |
0 |
0 |
T101 |
97025 |
809 |
0 |
0 |
T102 |
96756 |
795 |
0 |
0 |
T115 |
10279 |
15 |
0 |
0 |
T117 |
15582 |
169 |
0 |
0 |
T119 |
11788 |
61 |
0 |
0 |
T129 |
6994 |
51 |
0 |
0 |
T149 |
7112 |
9 |
0 |
0 |
T150 |
18871 |
52 |
0 |
0 |
T158 |
14354 |
42 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7604 |
0 |
0 |
T100 |
16056 |
160 |
0 |
0 |
T101 |
97025 |
889 |
0 |
0 |
T102 |
96756 |
782 |
0 |
0 |
T115 |
10279 |
70 |
0 |
0 |
T117 |
15582 |
121 |
0 |
0 |
T119 |
11788 |
66 |
0 |
0 |
T129 |
6994 |
103 |
0 |
0 |
T149 |
7112 |
17 |
0 |
0 |
T150 |
18871 |
9 |
0 |
0 |
T158 |
14354 |
101 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7589 |
0 |
0 |
T100 |
16056 |
66 |
0 |
0 |
T101 |
97025 |
825 |
0 |
0 |
T102 |
96756 |
561 |
0 |
0 |
T115 |
10279 |
66 |
0 |
0 |
T117 |
15582 |
103 |
0 |
0 |
T119 |
11788 |
90 |
0 |
0 |
T129 |
6994 |
33 |
0 |
0 |
T149 |
7112 |
18 |
0 |
0 |
T150 |
18871 |
40 |
0 |
0 |
T158 |
14354 |
37 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
8114 |
0 |
0 |
T100 |
16056 |
138 |
0 |
0 |
T101 |
97025 |
998 |
0 |
0 |
T102 |
96756 |
1007 |
0 |
0 |
T115 |
10279 |
21 |
0 |
0 |
T117 |
15582 |
90 |
0 |
0 |
T119 |
11788 |
9 |
0 |
0 |
T129 |
6994 |
48 |
0 |
0 |
T149 |
7112 |
26 |
0 |
0 |
T150 |
18871 |
61 |
0 |
0 |
T158 |
14354 |
67 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7219 |
0 |
0 |
T100 |
16056 |
121 |
0 |
0 |
T101 |
97025 |
989 |
0 |
0 |
T102 |
96756 |
829 |
0 |
0 |
T115 |
10279 |
17 |
0 |
0 |
T117 |
15582 |
68 |
0 |
0 |
T119 |
11788 |
73 |
0 |
0 |
T129 |
6994 |
56 |
0 |
0 |
T149 |
7112 |
13 |
0 |
0 |
T150 |
18871 |
23 |
0 |
0 |
T158 |
14354 |
95 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7621 |
0 |
0 |
T100 |
16056 |
108 |
0 |
0 |
T101 |
97025 |
482 |
0 |
0 |
T102 |
96756 |
644 |
0 |
0 |
T115 |
10279 |
23 |
0 |
0 |
T117 |
15582 |
82 |
0 |
0 |
T119 |
11788 |
62 |
0 |
0 |
T129 |
6994 |
106 |
0 |
0 |
T149 |
7112 |
10 |
0 |
0 |
T150 |
18871 |
23 |
0 |
0 |
T158 |
14354 |
56 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7634 |
0 |
0 |
T100 |
16056 |
73 |
0 |
0 |
T101 |
97025 |
863 |
0 |
0 |
T102 |
96756 |
695 |
0 |
0 |
T115 |
10279 |
88 |
0 |
0 |
T117 |
15582 |
91 |
0 |
0 |
T119 |
11788 |
62 |
0 |
0 |
T129 |
6994 |
44 |
0 |
0 |
T149 |
7112 |
50 |
0 |
0 |
T150 |
18871 |
30 |
0 |
0 |
T158 |
14354 |
17 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7065 |
0 |
0 |
T100 |
16056 |
24 |
0 |
0 |
T101 |
97025 |
823 |
0 |
0 |
T102 |
96756 |
625 |
0 |
0 |
T115 |
10279 |
47 |
0 |
0 |
T117 |
15582 |
51 |
0 |
0 |
T119 |
11788 |
8 |
0 |
0 |
T129 |
6994 |
8 |
0 |
0 |
T149 |
7112 |
4 |
0 |
0 |
T150 |
18871 |
39 |
0 |
0 |
T158 |
14354 |
55 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7729 |
0 |
0 |
T100 |
16056 |
113 |
0 |
0 |
T101 |
97025 |
664 |
0 |
0 |
T102 |
96756 |
794 |
0 |
0 |
T115 |
10279 |
13 |
0 |
0 |
T117 |
15582 |
111 |
0 |
0 |
T119 |
11788 |
15 |
0 |
0 |
T129 |
6994 |
117 |
0 |
0 |
T149 |
7112 |
6 |
0 |
0 |
T150 |
18871 |
38 |
0 |
0 |
T158 |
14354 |
7 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7281 |
0 |
0 |
T100 |
16056 |
19 |
0 |
0 |
T101 |
97025 |
747 |
0 |
0 |
T102 |
96756 |
761 |
0 |
0 |
T115 |
10279 |
4 |
0 |
0 |
T117 |
15582 |
52 |
0 |
0 |
T119 |
11788 |
90 |
0 |
0 |
T129 |
6994 |
1 |
0 |
0 |
T149 |
7112 |
44 |
0 |
0 |
T150 |
18871 |
39 |
0 |
0 |
T158 |
14354 |
21 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
6956 |
0 |
0 |
T100 |
16056 |
17 |
0 |
0 |
T101 |
97025 |
521 |
0 |
0 |
T102 |
96756 |
798 |
0 |
0 |
T115 |
10279 |
14 |
0 |
0 |
T117 |
15582 |
60 |
0 |
0 |
T119 |
11788 |
70 |
0 |
0 |
T129 |
6994 |
4 |
0 |
0 |
T149 |
7112 |
26 |
0 |
0 |
T150 |
18871 |
36 |
0 |
0 |
T158 |
14354 |
60 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
8225 |
0 |
0 |
T100 |
16056 |
94 |
0 |
0 |
T101 |
97025 |
798 |
0 |
0 |
T102 |
96756 |
826 |
0 |
0 |
T115 |
10279 |
59 |
0 |
0 |
T117 |
15582 |
35 |
0 |
0 |
T119 |
11788 |
103 |
0 |
0 |
T129 |
6994 |
52 |
0 |
0 |
T149 |
7112 |
39 |
0 |
0 |
T150 |
18871 |
46 |
0 |
0 |
T158 |
14354 |
19 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
8443 |
0 |
0 |
T100 |
16056 |
58 |
0 |
0 |
T101 |
97025 |
995 |
0 |
0 |
T102 |
96756 |
929 |
0 |
0 |
T115 |
10279 |
45 |
0 |
0 |
T117 |
15582 |
96 |
0 |
0 |
T119 |
11788 |
121 |
0 |
0 |
T129 |
6994 |
7 |
0 |
0 |
T149 |
7112 |
26 |
0 |
0 |
T150 |
18871 |
17 |
0 |
0 |
T158 |
14354 |
42 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7647 |
0 |
0 |
T100 |
16056 |
54 |
0 |
0 |
T101 |
97025 |
1173 |
0 |
0 |
T102 |
96756 |
773 |
0 |
0 |
T115 |
10279 |
68 |
0 |
0 |
T117 |
15582 |
45 |
0 |
0 |
T119 |
11788 |
97 |
0 |
0 |
T129 |
6994 |
32 |
0 |
0 |
T149 |
7112 |
24 |
0 |
0 |
T150 |
18871 |
48 |
0 |
0 |
T158 |
14354 |
37 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
7298 |
0 |
0 |
T100 |
16056 |
68 |
0 |
0 |
T101 |
97025 |
790 |
0 |
0 |
T102 |
96756 |
673 |
0 |
0 |
T115 |
10279 |
66 |
0 |
0 |
T117 |
15582 |
139 |
0 |
0 |
T119 |
11788 |
62 |
0 |
0 |
T129 |
6994 |
36 |
0 |
0 |
T149 |
7112 |
11 |
0 |
0 |
T150 |
18871 |
52 |
0 |
0 |
T158 |
14354 |
45 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2350 |
0 |
0 |
T100 |
16056 |
34 |
0 |
0 |
T101 |
97025 |
134 |
0 |
0 |
T102 |
96756 |
174 |
0 |
0 |
T115 |
10279 |
22 |
0 |
0 |
T117 |
15582 |
32 |
0 |
0 |
T119 |
11788 |
20 |
0 |
0 |
T129 |
6994 |
3 |
0 |
0 |
T149 |
7112 |
25 |
0 |
0 |
T150 |
18871 |
70 |
0 |
0 |
T158 |
14354 |
35 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2224 |
0 |
0 |
T100 |
16056 |
33 |
0 |
0 |
T101 |
97025 |
176 |
0 |
0 |
T102 |
96756 |
156 |
0 |
0 |
T115 |
10279 |
25 |
0 |
0 |
T117 |
15582 |
42 |
0 |
0 |
T119 |
11788 |
20 |
0 |
0 |
T129 |
6994 |
4 |
0 |
0 |
T149 |
7112 |
4 |
0 |
0 |
T150 |
18871 |
22 |
0 |
0 |
T158 |
14354 |
31 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2375 |
0 |
0 |
T100 |
16056 |
21 |
0 |
0 |
T101 |
97025 |
212 |
0 |
0 |
T102 |
96756 |
178 |
0 |
0 |
T115 |
10279 |
20 |
0 |
0 |
T117 |
15582 |
28 |
0 |
0 |
T119 |
11788 |
19 |
0 |
0 |
T129 |
6994 |
7 |
0 |
0 |
T149 |
7112 |
21 |
0 |
0 |
T150 |
18871 |
33 |
0 |
0 |
T158 |
14354 |
47 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2376 |
0 |
0 |
T100 |
16056 |
39 |
0 |
0 |
T101 |
97025 |
186 |
0 |
0 |
T102 |
96756 |
231 |
0 |
0 |
T115 |
10279 |
14 |
0 |
0 |
T117 |
15582 |
29 |
0 |
0 |
T119 |
11788 |
37 |
0 |
0 |
T129 |
6994 |
6 |
0 |
0 |
T149 |
7112 |
49 |
0 |
0 |
T150 |
18871 |
49 |
0 |
0 |
T158 |
14354 |
86 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
3208 |
0 |
0 |
T100 |
16056 |
48 |
0 |
0 |
T101 |
97025 |
263 |
0 |
0 |
T102 |
96756 |
277 |
0 |
0 |
T115 |
10279 |
30 |
0 |
0 |
T117 |
15582 |
45 |
0 |
0 |
T119 |
11788 |
20 |
0 |
0 |
T129 |
6994 |
7 |
0 |
0 |
T149 |
7112 |
51 |
0 |
0 |
T150 |
18871 |
43 |
0 |
0 |
T158 |
14354 |
45 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
6183 |
0 |
0 |
T14 |
246680 |
19 |
0 |
0 |
T15 |
169298 |
0 |
0 |
0 |
T41 |
455149 |
0 |
0 |
0 |
T43 |
259343 |
0 |
0 |
0 |
T49 |
0 |
13 |
0 |
0 |
T63 |
1645 |
0 |
0 |
0 |
T82 |
606738 |
0 |
0 |
0 |
T89 |
10514 |
0 |
0 |
0 |
T96 |
344393 |
0 |
0 |
0 |
T100 |
0 |
81 |
0 |
0 |
T101 |
0 |
526 |
0 |
0 |
T122 |
329926 |
0 |
0 |
0 |
T159 |
0 |
23 |
0 |
0 |
T160 |
0 |
13 |
0 |
0 |
T161 |
0 |
33 |
0 |
0 |
T162 |
0 |
36 |
0 |
0 |
T163 |
0 |
55 |
0 |
0 |
T164 |
0 |
51 |
0 |
0 |
T165 |
204883 |
0 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2268 |
0 |
0 |
T100 |
16056 |
42 |
0 |
0 |
T101 |
97025 |
132 |
0 |
0 |
T102 |
96756 |
205 |
0 |
0 |
T115 |
10279 |
17 |
0 |
0 |
T117 |
15582 |
35 |
0 |
0 |
T119 |
11788 |
19 |
0 |
0 |
T129 |
6994 |
11 |
0 |
0 |
T149 |
7112 |
33 |
0 |
0 |
T150 |
18871 |
29 |
0 |
0 |
T158 |
14354 |
37 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2587 |
0 |
0 |
T100 |
16056 |
38 |
0 |
0 |
T101 |
97025 |
191 |
0 |
0 |
T102 |
96756 |
170 |
0 |
0 |
T115 |
10279 |
14 |
0 |
0 |
T117 |
15582 |
36 |
0 |
0 |
T119 |
11788 |
28 |
0 |
0 |
T129 |
6994 |
12 |
0 |
0 |
T149 |
7112 |
33 |
0 |
0 |
T150 |
18871 |
48 |
0 |
0 |
T158 |
14354 |
58 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1867 |
0 |
0 |
T100 |
16056 |
29 |
0 |
0 |
T101 |
97025 |
95 |
0 |
0 |
T102 |
96756 |
103 |
0 |
0 |
T115 |
10279 |
23 |
0 |
0 |
T117 |
15582 |
15 |
0 |
0 |
T119 |
11788 |
22 |
0 |
0 |
T129 |
6994 |
8 |
0 |
0 |
T149 |
7112 |
31 |
0 |
0 |
T150 |
18871 |
37 |
0 |
0 |
T158 |
14354 |
68 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1846 |
0 |
0 |
T100 |
16056 |
23 |
0 |
0 |
T101 |
97025 |
139 |
0 |
0 |
T102 |
96756 |
120 |
0 |
0 |
T115 |
10279 |
12 |
0 |
0 |
T117 |
15582 |
25 |
0 |
0 |
T119 |
11788 |
18 |
0 |
0 |
T129 |
6994 |
3 |
0 |
0 |
T149 |
7112 |
10 |
0 |
0 |
T150 |
18871 |
22 |
0 |
0 |
T158 |
14354 |
22 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1952 |
0 |
0 |
T100 |
16056 |
13 |
0 |
0 |
T101 |
97025 |
159 |
0 |
0 |
T102 |
96756 |
135 |
0 |
0 |
T115 |
10279 |
26 |
0 |
0 |
T117 |
15582 |
31 |
0 |
0 |
T119 |
11788 |
21 |
0 |
0 |
T129 |
6994 |
11 |
0 |
0 |
T149 |
7112 |
17 |
0 |
0 |
T150 |
18871 |
20 |
0 |
0 |
T158 |
14354 |
64 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1693 |
0 |
0 |
T100 |
16056 |
20 |
0 |
0 |
T101 |
97025 |
111 |
0 |
0 |
T102 |
96756 |
111 |
0 |
0 |
T115 |
10279 |
15 |
0 |
0 |
T117 |
15582 |
12 |
0 |
0 |
T119 |
11788 |
17 |
0 |
0 |
T129 |
6994 |
4 |
0 |
0 |
T149 |
7112 |
10 |
0 |
0 |
T150 |
18871 |
5 |
0 |
0 |
T158 |
14354 |
54 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
3211 |
0 |
0 |
T100 |
16056 |
25 |
0 |
0 |
T101 |
97025 |
208 |
0 |
0 |
T102 |
96756 |
333 |
0 |
0 |
T115 |
10279 |
31 |
0 |
0 |
T117 |
15582 |
39 |
0 |
0 |
T119 |
11788 |
53 |
0 |
0 |
T129 |
6994 |
17 |
0 |
0 |
T149 |
7112 |
24 |
0 |
0 |
T150 |
18871 |
40 |
0 |
0 |
T158 |
14354 |
16 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1854 |
0 |
0 |
T100 |
16056 |
10 |
0 |
0 |
T101 |
97025 |
131 |
0 |
0 |
T102 |
96756 |
126 |
0 |
0 |
T115 |
10279 |
21 |
0 |
0 |
T117 |
15582 |
20 |
0 |
0 |
T119 |
11788 |
13 |
0 |
0 |
T129 |
6994 |
9 |
0 |
0 |
T149 |
7112 |
6 |
0 |
0 |
T150 |
18871 |
15 |
0 |
0 |
T158 |
14354 |
54 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
4132 |
0 |
0 |
T100 |
16056 |
29 |
0 |
0 |
T101 |
97025 |
375 |
0 |
0 |
T102 |
96756 |
355 |
0 |
0 |
T115 |
10279 |
21 |
0 |
0 |
T117 |
15582 |
18 |
0 |
0 |
T119 |
11788 |
37 |
0 |
0 |
T129 |
6994 |
27 |
0 |
0 |
T149 |
7112 |
24 |
0 |
0 |
T150 |
18871 |
44 |
0 |
0 |
T158 |
14354 |
22 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
2396 |
0 |
0 |
T100 |
16056 |
32 |
0 |
0 |
T101 |
97025 |
178 |
0 |
0 |
T102 |
96756 |
173 |
0 |
0 |
T115 |
10279 |
22 |
0 |
0 |
T117 |
15582 |
7 |
0 |
0 |
T119 |
11788 |
19 |
0 |
0 |
T129 |
6994 |
19 |
0 |
0 |
T149 |
7112 |
16 |
0 |
0 |
T150 |
18871 |
55 |
0 |
0 |
T158 |
14354 |
54 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1853 |
0 |
0 |
T100 |
16056 |
23 |
0 |
0 |
T101 |
97025 |
109 |
0 |
0 |
T102 |
96756 |
160 |
0 |
0 |
T115 |
10279 |
12 |
0 |
0 |
T117 |
15582 |
16 |
0 |
0 |
T119 |
11788 |
25 |
0 |
0 |
T129 |
6994 |
11 |
0 |
0 |
T149 |
7112 |
25 |
0 |
0 |
T150 |
18871 |
12 |
0 |
0 |
T158 |
14354 |
45 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1790 |
0 |
0 |
T100 |
16056 |
32 |
0 |
0 |
T101 |
97025 |
135 |
0 |
0 |
T102 |
96756 |
115 |
0 |
0 |
T115 |
10279 |
15 |
0 |
0 |
T117 |
15582 |
13 |
0 |
0 |
T119 |
11788 |
10 |
0 |
0 |
T129 |
6994 |
8 |
0 |
0 |
T149 |
7112 |
8 |
0 |
0 |
T150 |
18871 |
18 |
0 |
0 |
T158 |
14354 |
34 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1832 |
0 |
0 |
T100 |
16056 |
11 |
0 |
0 |
T101 |
97025 |
101 |
0 |
0 |
T102 |
96756 |
96 |
0 |
0 |
T115 |
10279 |
11 |
0 |
0 |
T117 |
15582 |
28 |
0 |
0 |
T119 |
11788 |
8 |
0 |
0 |
T129 |
6994 |
8 |
0 |
0 |
T149 |
7112 |
5 |
0 |
0 |
T150 |
18871 |
26 |
0 |
0 |
T158 |
14354 |
77 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1834 |
0 |
0 |
T100 |
16056 |
15 |
0 |
0 |
T101 |
97025 |
138 |
0 |
0 |
T102 |
96756 |
127 |
0 |
0 |
T115 |
10279 |
10 |
0 |
0 |
T117 |
15582 |
27 |
0 |
0 |
T119 |
11788 |
14 |
0 |
0 |
T129 |
6994 |
5 |
0 |
0 |
T149 |
7112 |
28 |
0 |
0 |
T150 |
18871 |
47 |
0 |
0 |
T158 |
14354 |
54 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1760 |
0 |
0 |
T100 |
16056 |
23 |
0 |
0 |
T101 |
97025 |
125 |
0 |
0 |
T102 |
96756 |
75 |
0 |
0 |
T115 |
10279 |
29 |
0 |
0 |
T117 |
15582 |
20 |
0 |
0 |
T119 |
11788 |
16 |
0 |
0 |
T129 |
6994 |
7 |
0 |
0 |
T149 |
7112 |
3 |
0 |
0 |
T150 |
18871 |
15 |
0 |
0 |
T158 |
14354 |
43 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
458632914 |
1863 |
0 |
0 |
T100 |
16056 |
13 |
0 |
0 |
T101 |
97025 |
115 |
0 |
0 |
T102 |
96756 |
89 |
0 |
0 |
T115 |
10279 |
23 |
0 |
0 |
T117 |
15582 |
26 |
0 |
0 |
T119 |
11788 |
16 |
0 |
0 |
T129 |
6994 |
12 |
0 |
0 |
T149 |
7112 |
3 |
0 |
0 |
T150 |
18871 |
38 |
0 |
0 |
T158 |
14354 |
85 |
0 |
0 |