Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	455444363	3704	0	0
addr_swap_data_rd_A	455444363	1268	0	0
addr_swap_mask_rd_A	455444363	1226	0	0
cfg_rd_A	455444363	1694	0	0
cmd_filter_0_rd_A	455444363	8501	0	0
cmd_filter_1_rd_A	455444363	8444	0	0
cmd_filter_2_rd_A	455444363	7474	0	0
cmd_filter_3_rd_A	455444363	7694	0	0
cmd_filter_4_rd_A	455444363	7587	0	0
cmd_filter_5_rd_A	455444363	8121	0	0
cmd_filter_6_rd_A	455444363	7174	0	0
cmd_filter_7_rd_A	455444363	8566	0	0
cmd_info_0_rd_A	455444363	4302	0	0
cmd_info_10_rd_A	455444363	4448	0	0
cmd_info_11_rd_A	455444363	3650	0	0
cmd_info_12_rd_A	455444363	3458	0	0
cmd_info_13_rd_A	455444363	3738	0	0
cmd_info_14_rd_A	455444363	4382	0	0
cmd_info_15_rd_A	455444363	3521	0	0
cmd_info_16_rd_A	455444363	3848	0	0
cmd_info_17_rd_A	455444363	4330	0	0
cmd_info_18_rd_A	455444363	4038	0	0
cmd_info_19_rd_A	455444363	4008	0	0
cmd_info_1_rd_A	455444363	3877	0	0
cmd_info_20_rd_A	455444363	4314	0	0
cmd_info_21_rd_A	455444363	3563	0	0
cmd_info_22_rd_A	455444363	3996	0	0
cmd_info_23_rd_A	455444363	3775	0	0
cmd_info_2_rd_A	455444363	4110	0	0
cmd_info_3_rd_A	455444363	3912	0	0
cmd_info_4_rd_A	455444363	3295	0	0
cmd_info_5_rd_A	455444363	3509	0	0
cmd_info_6_rd_A	455444363	3921	0	0
cmd_info_7_rd_A	455444363	4124	0	0
cmd_info_8_rd_A	455444363	4623	0	0
cmd_info_9_rd_A	455444363	3803	0	0
cmd_info_en4b_rd_A	455444363	1458	0	0
cmd_info_ex4b_rd_A	455444363	1555	0	0
cmd_info_wrdi_rd_A	455444363	1494	0	0
cmd_info_wren_rd_A	455444363	1515	0	0
intercept_en_rd_A	455444363	1836	0	0
intr_enable_rd_A	455444363	3974	0	0
jedec_cc_rd_A	455444363	1615	0	0
jedec_id_rd_A	455444363	1419	0	0
mailbox_addr_rd_A	455444363	1264	0	0
payload_swap_data_rd_A	455444363	1219	0	0
payload_swap_mask_rd_A	455444363	1177	0	0
read_threshold_rd_A	455444363	1201	0	0
tpm_access_0_rd_A	455444363	1966	0	0
tpm_access_1_rd_A	455444363	1302	0	0
tpm_cfg_rd_A	455444363	2244	0	0
tpm_did_vid_rd_A	455444363	1432	0	0
tpm_int_enable_rd_A	455444363	1319	0	0
tpm_int_status_rd_A	455444363	1289	0	0
tpm_int_vector_rd_A	455444363	1218	0	0
tpm_intf_capability_rd_A	455444363	1187	0	0
tpm_rid_rd_A	455444363	1396	0	0
tpm_sts_rd_A	455444363	1253	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3704	0	0
T50	3388	65	0	0
T51	18647	2	0	0
T52	14566	217	0	0
T81	16216	204	0	0
T82	53766	2	0	0
T83	37671	2	0	0
T84	8351	82	0	0
T86	6023	276	0	0
T95	2678	6	0	0
T96	9298	3	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1268	0	0
T69	3111	10	0	0
T83	37671	30	0	0
T96	9298	8	0	0
T107	90333	215	0	0
T126	18053	59	0	0
T136	109370	444	0	0
T137	4082	6	0	0
T138	3586	4	0	0
T139	17728	9	0	0
T140	4168	5	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1226	0	0
T69	3111	2	0	0
T83	37671	28	0	0
T96	9298	7	0	0
T107	90333	228	0	0
T126	18053	55	0	0
T136	109370	460	0	0
T137	4082	1	0	0
T138	3586	1	0	0
T139	17728	16	0	0
T140	4168	1	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1694	0	0
T69	3111	19	0	0
T83	37671	80	0	0
T96	9298	11	0	0
T107	90333	218	0	0
T126	18053	35	0	0
T136	109370	384	0	0
T137	4082	10	0	0
T138	3586	18	0	0
T139	17728	22	0	0
T140	4168	5	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	8501	0	0
T69	3111	2	0	0
T83	37671	626	0	0
T97	14788	299	0	0
T107	90333	235	0	0
T126	18053	66	0	0
T136	109370	446	0	0
T137	4082	48	0	0
T138	3586	3	0	0
T139	17728	35	0	0
T140	4168	9	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	8444	0	0
T69	3111	3	0	0
T83	37671	574	0	0
T96	9298	66	0	0
T97	14788	290	0	0
T107	90333	221	0	0
T126	18053	21	0	0
T136	109370	386	0	0
T138	3586	1	0	0
T139	17728	13	0	0
T140	4168	121	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	7474	0	0
T69	3111	2	0	0
T83	37671	404	0	0
T96	9298	103	0	0
T107	90333	207	0	0
T126	18053	48	0	0
T136	109370	384	0	0
T137	4082	58	0	0
T138	3586	5	0	0
T139	17728	22	0	0
T140	4168	2	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	7694	0	0
T69	3111	1	0	0
T83	37671	897	0	0
T96	9298	101	0	0
T97	14788	167	0	0
T107	90333	249	0	0
T126	18053	18	0	0
T136	109370	417	0	0
T137	4082	66	0	0
T139	17728	45	0	0
T140	4168	5	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	7587	0	0
T69	3111	2	0	0
T83	37671	828	0	0
T96	9298	58	0	0
T107	90333	190	0	0
T126	18053	44	0	0
T136	109370	345	0	0
T137	4082	60	0	0
T138	3586	6	0	0
T139	17728	11	0	0
T140	4168	1	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	8121	0	0
T69	3111	7	0	0
T83	37671	804	0	0
T96	9298	76	0	0
T97	14788	263	0	0
T107	90333	187	0	0
T126	18053	19	0	0
T136	109370	376	0	0
T137	4082	64	0	0
T139	17728	61	0	0
T141	14175	274	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	7174	0	0
T69	3111	11	0	0
T83	37671	660	0	0
T96	9298	6	0	0
T97	14788	250	0	0
T107	90333	242	0	0
T126	18053	32	0	0
T136	109370	403	0	0
T138	3586	4	0	0
T139	17728	17	0	0
T140	4168	94	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	8566	0	0
T69	3111	8	0	0
T83	37671	910	0	0
T96	9298	6	0	0
T107	90333	225	0	0
T126	18053	44	0	0
T136	109370	375	0	0
T137	4082	71	0	0
T138	3586	5	0	0
T139	17728	37	0	0
T140	4168	4	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4302	0	0
T69	3111	3	0	0
T83	37671	237	0	0
T96	9298	10	0	0
T107	90333	207	0	0
T126	18053	16	0	0
T136	109370	375	0	0
T137	4082	29	0	0
T138	3586	60	0	0
T139	17728	14	0	0
T140	4168	65	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4448	0	0
T69	3111	6	0	0
T83	37671	330	0	0
T96	9298	56	0	0
T107	90333	250	0	0
T126	18053	42	0	0
T136	109370	430	0	0
T137	4082	2	0	0
T138	3586	1	0	0
T139	17728	81	0	0
T140	4168	63	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3650	0	0
T69	3111	1	0	0
T83	37671	374	0	0
T96	9298	12	0	0
T97	14788	84	0	0
T107	90333	178	0	0
T126	18053	101	0	0
T136	109370	445	0	0
T137	4082	9	0	0
T139	17728	21	0	0
T140	4168	51	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3458	0	0
T69	3111	7	0	0
T83	37671	90	0	0
T96	9298	47	0	0
T107	90333	223	0	0
T126	18053	26	0	0
T136	109370	387	0	0
T137	4082	42	0	0
T138	3586	46	0	0
T139	17728	20	0	0
T140	4168	5	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3738	0	0
T69	3111	11	0	0
T83	37671	317	0	0
T96	9298	69	0	0
T107	90333	235	0	0
T126	18053	47	0	0
T136	109370	381	0	0
T137	4082	28	0	0
T138	3586	7	0	0
T139	17728	71	0	0
T140	4168	4	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4382	0	0
T69	3111	8	0	0
T83	37671	295	0	0
T96	9298	38	0	0
T107	90333	241	0	0
T126	18053	24	0	0
T136	109370	464	0	0
T137	4082	1	0	0
T138	3586	43	0	0
T139	17728	55	0	0
T140	4168	52	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3521	0	0
T69	3111	2	0	0
T83	37671	191	0	0
T96	9298	7	0	0
T107	90333	201	0	0
T126	18053	25	0	0
T136	109370	416	0	0
T137	4082	41	0	0
T138	3586	1	0	0
T139	17728	36	0	0
T140	4168	7	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3848	0	0
T69	3111	7	0	0
T83	37671	260	0	0
T97	14788	123	0	0
T107	90333	219	0	0
T126	18053	26	0	0
T136	109370	349	0	0
T138	3586	54	0	0
T139	17728	13	0	0
T140	4168	6	0	0
T141	14175	121	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4330	0	0
T69	3111	10	0	0
T83	37671	392	0	0
T96	9298	37	0	0
T107	90333	265	0	0
T126	18053	11	0	0
T136	109370	387	0	0
T137	4082	21	0	0
T138	3586	63	0	0
T139	17728	41	0	0
T140	4168	4	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4038	0	0
T69	3111	8	0	0
T83	37671	329	0	0
T96	9298	28	0	0
T97	14788	108	0	0
T107	90333	234	0	0
T126	18053	18	0	0
T136	109370	457	0	0
T137	4082	1	0	0
T139	17728	24	0	0
T140	4168	43	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4008	0	0
T69	3111	6	0	0
T83	37671	217	0	0
T96	9298	7	0	0
T97	14788	110	0	0
T107	90333	208	0	0
T126	18053	29	0	0
T136	109370	426	0	0
T137	4082	15	0	0
T138	3586	39	0	0
T139	17728	56	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3877	0	0
T69	3111	4	0	0
T83	37671	164	0	0
T96	9298	11	0	0
T97	14788	21	0	0
T107	90333	171	0	0
T126	18053	4	0	0
T136	109370	424	0	0
T138	3586	9	0	0
T139	17728	32	0	0
T140	4168	60	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4314	0	0
T69	3111	5	0	0
T83	37671	280	0	0
T96	9298	56	0	0
T97	14788	117	0	0
T107	90333	214	0	0
T126	18053	29	0	0
T136	109370	397	0	0
T138	3586	51	0	0
T139	17728	36	0	0
T140	4168	1	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3563	0	0
T69	3111	4	0	0
T83	37671	161	0	0
T96	9298	42	0	0
T97	14788	23	0	0
T107	90333	223	0	0
T126	18053	25	0	0
T136	109370	394	0	0
T138	3586	46	0	0
T139	17728	39	0	0
T140	4168	34	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3996	0	0
T83	37671	330	0	0
T96	9298	26	0	0
T97	14788	43	0	0
T107	90333	262	0	0
T126	18053	38	0	0
T136	109370	479	0	0
T137	4082	6	0	0
T138	3586	48	0	0
T139	17728	47	0	0
T140	4168	43	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3775	0	0
T69	3111	3	0	0
T83	37671	268	0	0
T96	9298	63	0	0
T97	14788	124	0	0
T107	90333	257	0	0
T126	18053	27	0	0
T136	109370	443	0	0
T138	3586	47	0	0
T139	17728	13	0	0
T140	4168	51	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4110	0	0
T69	3111	13	0	0
T83	37671	305	0	0
T96	9298	34	0	0
T97	14788	82	0	0
T107	90333	240	0	0
T126	18053	53	0	0
T136	109370	440	0	0
T138	3586	2	0	0
T139	17728	53	0	0
T140	4168	44	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3912	0	0
T69	3111	11	0	0
T83	37671	217	0	0
T96	9298	13	0	0
T107	90333	223	0	0
T126	18053	27	0	0
T136	109370	433	0	0
T137	4082	28	0	0
T138	3586	58	0	0
T139	17728	53	0	0
T140	4168	57	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3295	0	0
T69	3111	10	0	0
T83	37671	83	0	0
T96	9298	9	0	0
T97	14788	109	0	0
T107	90333	195	0	0
T126	18053	25	0	0
T136	109370	449	0	0
T137	4082	9	0	0
T139	17728	43	0	0
T140	4168	52	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3509	0	0
T69	3111	5	0	0
T83	37671	218	0	0
T96	9298	2	0	0
T107	90333	216	0	0
T126	18053	42	0	0
T136	109370	411	0	0
T137	4082	26	0	0
T138	3586	39	0	0
T139	17728	29	0	0
T140	4168	47	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3921	0	0
T69	3111	15	0	0
T83	37671	315	0	0
T97	14788	147	0	0
T107	90333	224	0	0
T126	18053	11	0	0
T136	109370	338	0	0
T137	4082	1	0	0
T138	3586	4	0	0
T139	17728	30	0	0
T140	4168	73	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4124	0	0
T69	3111	10	0	0
T83	37671	321	0	0
T96	9298	1	0	0
T107	90333	220	0	0
T126	18053	21	0	0
T136	109370	394	0	0
T137	4082	8	0	0
T138	3586	39	0	0
T139	17728	31	0	0
T140	4168	2	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	4623	0	0
T69	3111	10	0	0
T83	37671	270	0	0
T96	9298	46	0	0
T107	90333	228	0	0
T126	18053	26	0	0
T136	109370	448	0	0
T137	4082	16	0	0
T138	3586	1	0	0
T139	17728	7	0	0
T140	4168	47	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3803	0	0
T69	3111	7	0	0
T83	37671	271	0	0
T96	9298	47	0	0
T107	90333	193	0	0
T126	18053	33	0	0
T136	109370	419	0	0
T137	4082	1	0	0
T138	3586	68	0	0
T139	17728	41	0	0
T140	4168	45	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1458	0	0
T69	3111	10	0	0
T83	37671	71	0	0
T96	9298	21	0	0
T107	90333	213	0	0
T126	18053	35	0	0
T136	109370	338	0	0
T137	4082	5	0	0
T138	3586	6	0	0
T139	17728	24	0	0
T140	4168	4	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1555	0	0
T69	3111	4	0	0
T83	37671	48	0	0
T96	9298	4	0	0
T97	14788	29	0	0
T107	90333	216	0	0
T126	18053	47	0	0
T136	109370	499	0	0
T138	3586	14	0	0
T139	17728	32	0	0
T140	4168	6	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1494	0	0
T69	3111	12	0	0
T83	37671	37	0	0
T96	9298	10	0	0
T107	90333	213	0	0
T126	18053	79	0	0
T136	109370	444	0	0
T137	4082	2	0	0
T138	3586	6	0	0
T139	17728	38	0	0
T140	4168	14	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1515	0	0
T69	3111	5	0	0
T83	37671	53	0	0
T96	9298	22	0	0
T97	14788	13	0	0
T107	90333	253	0	0
T126	18053	19	0	0
T136	109370	415	0	0
T138	3586	9	0	0
T139	17728	23	0	0
T140	4168	7	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1836	0	0
T69	3111	2	0	0
T83	37671	151	0	0
T96	9298	24	0	0
T107	90333	215	0	0
T126	18053	27	0	0
T136	109370	380	0	0
T137	4082	5	0	0
T138	3586	3	0	0
T139	17728	17	0	0
T140	4168	5	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	3974	0	0
T1	961172	30	0	0
T2	570710	0	0	0
T3	22474	0	0	0
T4	312344	0	0	0
T5	2947	0	0	0
T6	182627	0	0	0
T7	1460	0	0	0
T8	373899	0	0	0
T9	507490	96	0	0
T10	7222	0	0	0
T18	0	18	0	0
T22	0	19	0	0
T142	0	18	0	0
T143	0	7	0	0
T144	0	77	0	0
T145	0	47	0	0
T146	0	34	0	0
T147	0	10	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1615	0	0
T69	3111	2	0	0
T83	37671	47	0	0
T97	14788	18	0	0
T107	90333	232	0	0
T126	18053	21	0	0
T136	109370	533	0	0
T137	4082	1	0	0
T139	17728	40	0	0
T140	4168	5	0	0
T141	14175	34	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1419	0	0
T69	3111	11	0	0
T83	37671	57	0	0
T96	9298	6	0	0
T107	90333	203	0	0
T126	18053	22	0	0
T136	109370	406	0	0
T137	4082	2	0	0
T138	3586	8	0	0
T139	17728	22	0	0
T140	4168	3	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1264	0	0
T69	3111	11	0	0
T83	37671	33	0	0
T96	9298	5	0	0
T107	90333	231	0	0
T126	18053	9	0	0
T136	109370	402	0	0
T137	4082	6	0	0
T138	3586	2	0	0
T139	17728	86	0	0
T140	4168	7	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1219	0	0
T69	3111	9	0	0
T83	37671	36	0	0
T96	9298	4	0	0
T97	14788	24	0	0
T107	90333	169	0	0
T126	18053	60	0	0
T136	109370	383	0	0
T138	3586	4	0	0
T139	17728	59	0	0
T140	4168	5	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1177	0	0
T69	3111	7	0	0
T83	37671	13	0	0
T96	9298	9	0	0
T107	90333	247	0	0
T126	18053	39	0	0
T136	109370	362	0	0
T137	4082	4	0	0
T138	3586	7	0	0
T139	17728	45	0	0
T140	4168	4	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1201	0	0
T69	3111	10	0	0
T83	37671	26	0	0
T96	9298	4	0	0
T107	90333	220	0	0
T126	18053	25	0	0
T136	109370	402	0	0
T137	4082	5	0	0
T138	3586	4	0	0
T139	17728	16	0	0
T140	4168	2	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1966	0	0
T69	3111	7	0	0
T83	37671	78	0	0
T96	9298	16	0	0
T97	14788	35	0	0
T107	90333	250	0	0
T126	18053	12	0	0
T136	109370	451	0	0
T138	3586	15	0	0
T139	17728	35	0	0
T140	4168	1	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1302	0	0
T69	3111	1	0	0
T83	37671	47	0	0
T96	9298	13	0	0
T107	90333	218	0	0
T126	18053	34	0	0
T136	109370	394	0	0
T137	4082	8	0	0
T138	3586	2	0	0
T139	17728	31	0	0
T140	4168	1	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	2244	0	0
T69	3111	7	0	0
T83	37671	133	0	0
T96	9298	2	0	0
T107	90333	210	0	0
T126	18053	37	0	0
T136	109370	466	0	0
T137	4082	12	0	0
T138	3586	3	0	0
T139	17728	53	0	0
T140	4168	3	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1432	0	0
T69	3111	10	0	0
T83	37671	43	0	0
T96	9298	1	0	0
T97	14788	33	0	0
T107	90333	167	0	0
T126	18053	54	0	0
T136	109370	466	0	0
T138	3586	3	0	0
T139	17728	14	0	0
T140	4168	7	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1319	0	0
T69	3111	2	0	0
T83	37671	34	0	0
T96	9298	19	0	0
T97	14788	15	0	0
T107	90333	235	0	0
T126	18053	18	0	0
T136	109370	422	0	0
T138	3586	7	0	0
T139	17728	44	0	0
T140	4168	8	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1289	0	0
T69	3111	11	0	0
T83	37671	33	0	0
T96	9298	3	0	0
T107	90333	190	0	0
T126	18053	66	0	0
T136	109370	464	0	0
T137	4082	6	0	0
T138	3586	6	0	0
T139	17728	12	0	0
T140	4168	3	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1218	0	0
T69	3111	3	0	0
T83	37671	46	0	0
T96	9298	10	0	0
T107	90333	199	0	0
T126	18053	29	0	0
T136	109370	377	0	0
T137	4082	1	0	0
T138	3586	1	0	0
T139	17728	23	0	0
T140	4168	1	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1187	0	0
T69	3111	9	0	0
T83	37671	34	0	0
T96	9298	7	0	0
T97	14788	23	0	0
T107	90333	220	0	0
T126	18053	25	0	0
T136	109370	379	0	0
T138	3586	7	0	0
T139	17728	23	0	0
T140	4168	6	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1396	0	0
T69	3111	4	0	0
T83	37671	49	0	0
T96	9298	12	0	0
T97	14788	29	0	0
T107	90333	219	0	0
T126	18053	51	0	0
T136	109370	436	0	0
T138	3586	4	0	0
T139	17728	75	0	0
T140	4168	4	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	455444363	1253	0	0
T69	3111	9	0	0
T83	37671	37	0	0
T96	9298	9	0	0
T107	90333	212	0	0
T126	18053	53	0	0
T136	109370	398	0	0
T137	4082	3	0	0
T138	3586	5	0	0
T139	17728	28	0	0
T140	4168	3	0	0