Assert Coverage for Module : 
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
3016 | 
0 | 
0 | 
| T66 | 
5451 | 
13 | 
0 | 
0 | 
| T67 | 
4041 | 
12 | 
0 | 
0 | 
| T68 | 
2578 | 
1 | 
0 | 
0 | 
| T98 | 
6378 | 
163 | 
0 | 
0 | 
| T99 | 
32944 | 
2 | 
0 | 
0 | 
| T100 | 
54814 | 
1 | 
0 | 
0 | 
| T102 | 
10257 | 
115 | 
0 | 
0 | 
| T103 | 
5547 | 
86 | 
0 | 
0 | 
| T112 | 
4311 | 
3 | 
0 | 
0 | 
| T117 | 
2267 | 
8 | 
0 | 
0 | 
addr_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1094 | 
0 | 
0 | 
| T99 | 
32944 | 
26 | 
0 | 
0 | 
| T122 | 
11334 | 
8 | 
0 | 
0 | 
| T151 | 
16449 | 
80 | 
0 | 
0 | 
| T163 | 
90466 | 
198 | 
0 | 
0 | 
| T164 | 
64513 | 
80 | 
0 | 
0 | 
| T165 | 
3771 | 
5 | 
0 | 
0 | 
| T166 | 
5931 | 
6 | 
0 | 
0 | 
| T167 | 
13219 | 
9 | 
0 | 
0 | 
| T168 | 
12566 | 
15 | 
0 | 
0 | 
| T169 | 
19584 | 
72 | 
0 | 
0 | 
addr_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1129 | 
0 | 
0 | 
| T99 | 
32944 | 
36 | 
0 | 
0 | 
| T122 | 
11334 | 
12 | 
0 | 
0 | 
| T151 | 
16449 | 
69 | 
0 | 
0 | 
| T163 | 
90466 | 
246 | 
0 | 
0 | 
| T164 | 
64513 | 
79 | 
0 | 
0 | 
| T165 | 
3771 | 
6 | 
0 | 
0 | 
| T166 | 
5931 | 
5 | 
0 | 
0 | 
| T167 | 
13219 | 
3 | 
0 | 
0 | 
| T168 | 
12566 | 
28 | 
0 | 
0 | 
| T169 | 
19584 | 
93 | 
0 | 
0 | 
cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1375 | 
0 | 
0 | 
| T99 | 
32944 | 
88 | 
0 | 
0 | 
| T122 | 
11334 | 
11 | 
0 | 
0 | 
| T151 | 
16449 | 
31 | 
0 | 
0 | 
| T163 | 
90466 | 
266 | 
0 | 
0 | 
| T164 | 
64513 | 
133 | 
0 | 
0 | 
| T165 | 
3771 | 
1 | 
0 | 
0 | 
| T166 | 
5931 | 
10 | 
0 | 
0 | 
| T167 | 
13219 | 
12 | 
0 | 
0 | 
| T168 | 
12566 | 
19 | 
0 | 
0 | 
| T169 | 
19584 | 
85 | 
0 | 
0 | 
cmd_filter_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
5097 | 
0 | 
0 | 
| T99 | 
32944 | 
402 | 
0 | 
0 | 
| T122 | 
11334 | 
359 | 
0 | 
0 | 
| T151 | 
16449 | 
59 | 
0 | 
0 | 
| T163 | 
90466 | 
191 | 
0 | 
0 | 
| T164 | 
64513 | 
1240 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
5 | 
0 | 
0 | 
| T167 | 
13219 | 
11 | 
0 | 
0 | 
| T168 | 
12566 | 
14 | 
0 | 
0 | 
| T169 | 
19584 | 
45 | 
0 | 
0 | 
cmd_filter_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
4973 | 
0 | 
0 | 
| T99 | 
32944 | 
285 | 
0 | 
0 | 
| T122 | 
11334 | 
246 | 
0 | 
0 | 
| T151 | 
16449 | 
30 | 
0 | 
0 | 
| T163 | 
90466 | 
267 | 
0 | 
0 | 
| T164 | 
64513 | 
1167 | 
0 | 
0 | 
| T165 | 
3771 | 
110 | 
0 | 
0 | 
| T166 | 
5931 | 
135 | 
0 | 
0 | 
| T167 | 
13219 | 
48 | 
0 | 
0 | 
| T168 | 
12566 | 
58 | 
0 | 
0 | 
| T169 | 
19584 | 
77 | 
0 | 
0 | 
cmd_filter_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
5040 | 
0 | 
0 | 
| T99 | 
32944 | 
733 | 
0 | 
0 | 
| T122 | 
11334 | 
330 | 
0 | 
0 | 
| T151 | 
16449 | 
44 | 
0 | 
0 | 
| T163 | 
90466 | 
257 | 
0 | 
0 | 
| T164 | 
64513 | 
943 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
116 | 
0 | 
0 | 
| T167 | 
13219 | 
20 | 
0 | 
0 | 
| T168 | 
12566 | 
19 | 
0 | 
0 | 
| T169 | 
19584 | 
8 | 
0 | 
0 | 
cmd_filter_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
5327 | 
0 | 
0 | 
| T85 | 
4729 | 
18 | 
0 | 
0 | 
| T99 | 
32944 | 
664 | 
0 | 
0 | 
| T122 | 
11334 | 
194 | 
0 | 
0 | 
| T151 | 
16449 | 
78 | 
0 | 
0 | 
| T163 | 
90466 | 
234 | 
0 | 
0 | 
| T164 | 
64513 | 
1120 | 
0 | 
0 | 
| T166 | 
5931 | 
121 | 
0 | 
0 | 
| T167 | 
13219 | 
31 | 
0 | 
0 | 
| T168 | 
12566 | 
29 | 
0 | 
0 | 
| T169 | 
19584 | 
86 | 
0 | 
0 | 
cmd_filter_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
4536 | 
0 | 
0 | 
| T99 | 
32944 | 
582 | 
0 | 
0 | 
| T122 | 
11334 | 
12 | 
0 | 
0 | 
| T151 | 
16449 | 
41 | 
0 | 
0 | 
| T163 | 
90466 | 
205 | 
0 | 
0 | 
| T164 | 
64513 | 
815 | 
0 | 
0 | 
| T165 | 
3771 | 
8 | 
0 | 
0 | 
| T166 | 
5931 | 
8 | 
0 | 
0 | 
| T167 | 
13219 | 
9 | 
0 | 
0 | 
| T168 | 
12566 | 
25 | 
0 | 
0 | 
| T169 | 
19584 | 
63 | 
0 | 
0 | 
cmd_filter_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
4730 | 
0 | 
0 | 
| T99 | 
32944 | 
305 | 
0 | 
0 | 
| T122 | 
11334 | 
169 | 
0 | 
0 | 
| T151 | 
16449 | 
32 | 
0 | 
0 | 
| T163 | 
90466 | 
186 | 
0 | 
0 | 
| T164 | 
64513 | 
1154 | 
0 | 
0 | 
| T165 | 
3771 | 
87 | 
0 | 
0 | 
| T166 | 
5931 | 
14 | 
0 | 
0 | 
| T167 | 
13219 | 
16 | 
0 | 
0 | 
| T168 | 
12566 | 
30 | 
0 | 
0 | 
| T169 | 
19584 | 
73 | 
0 | 
0 | 
cmd_filter_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
5170 | 
0 | 
0 | 
| T99 | 
32944 | 
735 | 
0 | 
0 | 
| T122 | 
11334 | 
254 | 
0 | 
0 | 
| T151 | 
16449 | 
63 | 
0 | 
0 | 
| T163 | 
90466 | 
239 | 
0 | 
0 | 
| T164 | 
64513 | 
1241 | 
0 | 
0 | 
| T165 | 
3771 | 
4 | 
0 | 
0 | 
| T166 | 
5931 | 
11 | 
0 | 
0 | 
| T167 | 
13219 | 
17 | 
0 | 
0 | 
| T168 | 
12566 | 
8 | 
0 | 
0 | 
| T169 | 
19584 | 
20 | 
0 | 
0 | 
cmd_filter_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
5594 | 
0 | 
0 | 
| T99 | 
32944 | 
684 | 
0 | 
0 | 
| T122 | 
11334 | 
114 | 
0 | 
0 | 
| T151 | 
16449 | 
52 | 
0 | 
0 | 
| T163 | 
90466 | 
203 | 
0 | 
0 | 
| T164 | 
64513 | 
1237 | 
0 | 
0 | 
| T165 | 
3771 | 
131 | 
0 | 
0 | 
| T166 | 
5931 | 
9 | 
0 | 
0 | 
| T167 | 
13219 | 
27 | 
0 | 
0 | 
| T168 | 
12566 | 
24 | 
0 | 
0 | 
| T169 | 
19584 | 
53 | 
0 | 
0 | 
cmd_info_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2702 | 
0 | 
0 | 
| T99 | 
32944 | 
154 | 
0 | 
0 | 
| T122 | 
11334 | 
102 | 
0 | 
0 | 
| T151 | 
16449 | 
59 | 
0 | 
0 | 
| T163 | 
90466 | 
260 | 
0 | 
0 | 
| T164 | 
64513 | 
494 | 
0 | 
0 | 
| T165 | 
3771 | 
5 | 
0 | 
0 | 
| T166 | 
5931 | 
51 | 
0 | 
0 | 
| T167 | 
13219 | 
31 | 
0 | 
0 | 
| T168 | 
12566 | 
30 | 
0 | 
0 | 
| T169 | 
19584 | 
26 | 
0 | 
0 | 
cmd_info_10_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2519 | 
0 | 
0 | 
| T99 | 
32944 | 
249 | 
0 | 
0 | 
| T122 | 
11334 | 
69 | 
0 | 
0 | 
| T151 | 
16449 | 
37 | 
0 | 
0 | 
| T163 | 
90466 | 
207 | 
0 | 
0 | 
| T164 | 
64513 | 
559 | 
0 | 
0 | 
| T165 | 
3771 | 
7 | 
0 | 
0 | 
| T166 | 
5931 | 
40 | 
0 | 
0 | 
| T167 | 
13219 | 
16 | 
0 | 
0 | 
| T168 | 
12566 | 
19 | 
0 | 
0 | 
| T169 | 
19584 | 
16 | 
0 | 
0 | 
cmd_info_11_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2644 | 
0 | 
0 | 
| T99 | 
32944 | 
278 | 
0 | 
0 | 
| T122 | 
11334 | 
104 | 
0 | 
0 | 
| T151 | 
16449 | 
73 | 
0 | 
0 | 
| T163 | 
90466 | 
216 | 
0 | 
0 | 
| T164 | 
64513 | 
586 | 
0 | 
0 | 
| T165 | 
3771 | 
7 | 
0 | 
0 | 
| T166 | 
5931 | 
4 | 
0 | 
0 | 
| T167 | 
13219 | 
22 | 
0 | 
0 | 
| T168 | 
12566 | 
20 | 
0 | 
0 | 
| T169 | 
19584 | 
92 | 
0 | 
0 | 
cmd_info_12_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
3012 | 
0 | 
0 | 
| T85 | 
4729 | 
16 | 
0 | 
0 | 
| T99 | 
32944 | 
400 | 
0 | 
0 | 
| T122 | 
11334 | 
92 | 
0 | 
0 | 
| T151 | 
16449 | 
44 | 
0 | 
0 | 
| T163 | 
90466 | 
247 | 
0 | 
0 | 
| T164 | 
64513 | 
625 | 
0 | 
0 | 
| T166 | 
5931 | 
61 | 
0 | 
0 | 
| T167 | 
13219 | 
26 | 
0 | 
0 | 
| T168 | 
12566 | 
5 | 
0 | 
0 | 
| T169 | 
19584 | 
43 | 
0 | 
0 | 
cmd_info_13_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2879 | 
0 | 
0 | 
| T99 | 
32944 | 
328 | 
0 | 
0 | 
| T122 | 
11334 | 
71 | 
0 | 
0 | 
| T151 | 
16449 | 
59 | 
0 | 
0 | 
| T163 | 
90466 | 
221 | 
0 | 
0 | 
| T164 | 
64513 | 
436 | 
0 | 
0 | 
| T165 | 
3771 | 
50 | 
0 | 
0 | 
| T166 | 
5931 | 
65 | 
0 | 
0 | 
| T167 | 
13219 | 
25 | 
0 | 
0 | 
| T168 | 
12566 | 
9 | 
0 | 
0 | 
| T169 | 
19584 | 
41 | 
0 | 
0 | 
cmd_info_14_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2804 | 
0 | 
0 | 
| T99 | 
32944 | 
252 | 
0 | 
0 | 
| T122 | 
11334 | 
14 | 
0 | 
0 | 
| T151 | 
16449 | 
42 | 
0 | 
0 | 
| T163 | 
90466 | 
212 | 
0 | 
0 | 
| T164 | 
64513 | 
553 | 
0 | 
0 | 
| T165 | 
3771 | 
40 | 
0 | 
0 | 
| T166 | 
5931 | 
7 | 
0 | 
0 | 
| T167 | 
13219 | 
34 | 
0 | 
0 | 
| T168 | 
12566 | 
21 | 
0 | 
0 | 
| T169 | 
19584 | 
78 | 
0 | 
0 | 
cmd_info_15_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2577 | 
0 | 
0 | 
| T99 | 
32944 | 
268 | 
0 | 
0 | 
| T122 | 
11334 | 
53 | 
0 | 
0 | 
| T151 | 
16449 | 
59 | 
0 | 
0 | 
| T163 | 
90466 | 
202 | 
0 | 
0 | 
| T164 | 
64513 | 
383 | 
0 | 
0 | 
| T165 | 
3771 | 
5 | 
0 | 
0 | 
| T166 | 
5931 | 
62 | 
0 | 
0 | 
| T167 | 
13219 | 
19 | 
0 | 
0 | 
| T168 | 
12566 | 
5 | 
0 | 
0 | 
| T169 | 
19584 | 
101 | 
0 | 
0 | 
cmd_info_16_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2843 | 
0 | 
0 | 
| T99 | 
32944 | 
306 | 
0 | 
0 | 
| T122 | 
11334 | 
40 | 
0 | 
0 | 
| T151 | 
16449 | 
22 | 
0 | 
0 | 
| T163 | 
90466 | 
231 | 
0 | 
0 | 
| T164 | 
64513 | 
600 | 
0 | 
0 | 
| T165 | 
3771 | 
6 | 
0 | 
0 | 
| T166 | 
5931 | 
58 | 
0 | 
0 | 
| T167 | 
13219 | 
38 | 
0 | 
0 | 
| T168 | 
12566 | 
16 | 
0 | 
0 | 
| T169 | 
19584 | 
50 | 
0 | 
0 | 
cmd_info_17_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2998 | 
0 | 
0 | 
| T99 | 
32944 | 
333 | 
0 | 
0 | 
| T122 | 
11334 | 
135 | 
0 | 
0 | 
| T151 | 
16449 | 
31 | 
0 | 
0 | 
| T163 | 
90466 | 
202 | 
0 | 
0 | 
| T164 | 
64513 | 
582 | 
0 | 
0 | 
| T165 | 
3771 | 
1 | 
0 | 
0 | 
| T166 | 
5931 | 
59 | 
0 | 
0 | 
| T167 | 
13219 | 
20 | 
0 | 
0 | 
| T168 | 
12566 | 
1 | 
0 | 
0 | 
| T169 | 
19584 | 
134 | 
0 | 
0 | 
cmd_info_18_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2769 | 
0 | 
0 | 
| T99 | 
32944 | 
272 | 
0 | 
0 | 
| T122 | 
11334 | 
93 | 
0 | 
0 | 
| T151 | 
16449 | 
65 | 
0 | 
0 | 
| T163 | 
90466 | 
218 | 
0 | 
0 | 
| T164 | 
64513 | 
564 | 
0 | 
0 | 
| T165 | 
3771 | 
6 | 
0 | 
0 | 
| T166 | 
5931 | 
55 | 
0 | 
0 | 
| T167 | 
13219 | 
18 | 
0 | 
0 | 
| T168 | 
12566 | 
22 | 
0 | 
0 | 
| T169 | 
19584 | 
95 | 
0 | 
0 | 
cmd_info_19_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
3078 | 
0 | 
0 | 
| T99 | 
32944 | 
266 | 
0 | 
0 | 
| T122 | 
11334 | 
94 | 
0 | 
0 | 
| T151 | 
16449 | 
24 | 
0 | 
0 | 
| T163 | 
90466 | 
223 | 
0 | 
0 | 
| T164 | 
64513 | 
450 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
66 | 
0 | 
0 | 
| T167 | 
13219 | 
6 | 
0 | 
0 | 
| T168 | 
12566 | 
27 | 
0 | 
0 | 
| T169 | 
19584 | 
65 | 
0 | 
0 | 
cmd_info_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2779 | 
0 | 
0 | 
| T99 | 
32944 | 
272 | 
0 | 
0 | 
| T122 | 
11334 | 
118 | 
0 | 
0 | 
| T151 | 
16449 | 
24 | 
0 | 
0 | 
| T163 | 
90466 | 
242 | 
0 | 
0 | 
| T164 | 
64513 | 
455 | 
0 | 
0 | 
| T165 | 
3771 | 
10 | 
0 | 
0 | 
| T166 | 
5931 | 
11 | 
0 | 
0 | 
| T167 | 
13219 | 
61 | 
0 | 
0 | 
| T168 | 
12566 | 
50 | 
0 | 
0 | 
| T169 | 
19584 | 
25 | 
0 | 
0 | 
cmd_info_20_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2659 | 
0 | 
0 | 
| T99 | 
32944 | 
336 | 
0 | 
0 | 
| T122 | 
11334 | 
105 | 
0 | 
0 | 
| T151 | 
16449 | 
83 | 
0 | 
0 | 
| T163 | 
90466 | 
188 | 
0 | 
0 | 
| T164 | 
64513 | 
370 | 
0 | 
0 | 
| T165 | 
3771 | 
61 | 
0 | 
0 | 
| T166 | 
5931 | 
48 | 
0 | 
0 | 
| T167 | 
13219 | 
3 | 
0 | 
0 | 
| T168 | 
12566 | 
35 | 
0 | 
0 | 
| T169 | 
19584 | 
140 | 
0 | 
0 | 
cmd_info_21_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
3050 | 
0 | 
0 | 
| T99 | 
32944 | 
318 | 
0 | 
0 | 
| T122 | 
11334 | 
146 | 
0 | 
0 | 
| T151 | 
16449 | 
26 | 
0 | 
0 | 
| T163 | 
90466 | 
266 | 
0 | 
0 | 
| T164 | 
64513 | 
545 | 
0 | 
0 | 
| T165 | 
3771 | 
48 | 
0 | 
0 | 
| T166 | 
5931 | 
52 | 
0 | 
0 | 
| T167 | 
13219 | 
16 | 
0 | 
0 | 
| T168 | 
12566 | 
22 | 
0 | 
0 | 
| T169 | 
19584 | 
62 | 
0 | 
0 | 
cmd_info_22_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2818 | 
0 | 
0 | 
| T99 | 
32944 | 
312 | 
0 | 
0 | 
| T122 | 
11334 | 
117 | 
0 | 
0 | 
| T151 | 
16449 | 
41 | 
0 | 
0 | 
| T163 | 
90466 | 
251 | 
0 | 
0 | 
| T164 | 
64513 | 
654 | 
0 | 
0 | 
| T165 | 
3771 | 
44 | 
0 | 
0 | 
| T166 | 
5931 | 
39 | 
0 | 
0 | 
| T167 | 
13219 | 
26 | 
0 | 
0 | 
| T168 | 
12566 | 
34 | 
0 | 
0 | 
| T169 | 
19584 | 
42 | 
0 | 
0 | 
cmd_info_23_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
3161 | 
0 | 
0 | 
| T99 | 
32944 | 
259 | 
0 | 
0 | 
| T122 | 
11334 | 
45 | 
0 | 
0 | 
| T151 | 
16449 | 
52 | 
0 | 
0 | 
| T163 | 
90466 | 
233 | 
0 | 
0 | 
| T164 | 
64513 | 
789 | 
0 | 
0 | 
| T165 | 
3771 | 
50 | 
0 | 
0 | 
| T166 | 
5931 | 
9 | 
0 | 
0 | 
| T167 | 
13219 | 
29 | 
0 | 
0 | 
| T168 | 
12566 | 
24 | 
0 | 
0 | 
| T169 | 
19584 | 
42 | 
0 | 
0 | 
cmd_info_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2943 | 
0 | 
0 | 
| T99 | 
32944 | 
212 | 
0 | 
0 | 
| T122 | 
11334 | 
99 | 
0 | 
0 | 
| T151 | 
16449 | 
97 | 
0 | 
0 | 
| T163 | 
90466 | 
194 | 
0 | 
0 | 
| T164 | 
64513 | 
499 | 
0 | 
0 | 
| T165 | 
3771 | 
8 | 
0 | 
0 | 
| T166 | 
5931 | 
75 | 
0 | 
0 | 
| T167 | 
13219 | 
26 | 
0 | 
0 | 
| T168 | 
12566 | 
29 | 
0 | 
0 | 
| T169 | 
19584 | 
59 | 
0 | 
0 | 
cmd_info_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2563 | 
0 | 
0 | 
| T99 | 
32944 | 
249 | 
0 | 
0 | 
| T122 | 
11334 | 
94 | 
0 | 
0 | 
| T151 | 
16449 | 
52 | 
0 | 
0 | 
| T163 | 
90466 | 
214 | 
0 | 
0 | 
| T164 | 
64513 | 
460 | 
0 | 
0 | 
| T165 | 
3771 | 
1 | 
0 | 
0 | 
| T166 | 
5931 | 
2 | 
0 | 
0 | 
| T167 | 
13219 | 
9 | 
0 | 
0 | 
| T168 | 
12566 | 
35 | 
0 | 
0 | 
| T169 | 
19584 | 
99 | 
0 | 
0 | 
cmd_info_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2400 | 
0 | 
0 | 
| T99 | 
32944 | 
96 | 
0 | 
0 | 
| T122 | 
11334 | 
105 | 
0 | 
0 | 
| T151 | 
16449 | 
22 | 
0 | 
0 | 
| T163 | 
90466 | 
210 | 
0 | 
0 | 
| T164 | 
64513 | 
523 | 
0 | 
0 | 
| T165 | 
3771 | 
7 | 
0 | 
0 | 
| T166 | 
5931 | 
11 | 
0 | 
0 | 
| T167 | 
13219 | 
10 | 
0 | 
0 | 
| T168 | 
12566 | 
22 | 
0 | 
0 | 
| T169 | 
19584 | 
47 | 
0 | 
0 | 
cmd_info_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2631 | 
0 | 
0 | 
| T99 | 
32944 | 
413 | 
0 | 
0 | 
| T122 | 
11334 | 
98 | 
0 | 
0 | 
| T151 | 
16449 | 
19 | 
0 | 
0 | 
| T163 | 
90466 | 
254 | 
0 | 
0 | 
| T164 | 
64513 | 
373 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
49 | 
0 | 
0 | 
| T167 | 
13219 | 
25 | 
0 | 
0 | 
| T168 | 
12566 | 
13 | 
0 | 
0 | 
| T169 | 
19584 | 
22 | 
0 | 
0 | 
cmd_info_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2778 | 
0 | 
0 | 
| T99 | 
32944 | 
219 | 
0 | 
0 | 
| T122 | 
11334 | 
131 | 
0 | 
0 | 
| T151 | 
16449 | 
54 | 
0 | 
0 | 
| T163 | 
90466 | 
230 | 
0 | 
0 | 
| T164 | 
64513 | 
451 | 
0 | 
0 | 
| T165 | 
3771 | 
56 | 
0 | 
0 | 
| T166 | 
5931 | 
13 | 
0 | 
0 | 
| T167 | 
13219 | 
42 | 
0 | 
0 | 
| T168 | 
12566 | 
8 | 
0 | 
0 | 
| T169 | 
19584 | 
56 | 
0 | 
0 | 
cmd_info_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
3038 | 
0 | 
0 | 
| T99 | 
32944 | 
323 | 
0 | 
0 | 
| T122 | 
11334 | 
65 | 
0 | 
0 | 
| T151 | 
16449 | 
47 | 
0 | 
0 | 
| T163 | 
90466 | 
232 | 
0 | 
0 | 
| T164 | 
64513 | 
660 | 
0 | 
0 | 
| T165 | 
3771 | 
47 | 
0 | 
0 | 
| T166 | 
5931 | 
13 | 
0 | 
0 | 
| T167 | 
13219 | 
18 | 
0 | 
0 | 
| T168 | 
12566 | 
7 | 
0 | 
0 | 
| T169 | 
19584 | 
64 | 
0 | 
0 | 
cmd_info_8_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2876 | 
0 | 
0 | 
| T99 | 
32944 | 
365 | 
0 | 
0 | 
| T122 | 
11334 | 
10 | 
0 | 
0 | 
| T151 | 
16449 | 
30 | 
0 | 
0 | 
| T163 | 
90466 | 
218 | 
0 | 
0 | 
| T164 | 
64513 | 
533 | 
0 | 
0 | 
| T165 | 
3771 | 
53 | 
0 | 
0 | 
| T166 | 
5931 | 
9 | 
0 | 
0 | 
| T167 | 
13219 | 
10 | 
0 | 
0 | 
| T168 | 
12566 | 
26 | 
0 | 
0 | 
| T169 | 
19584 | 
21 | 
0 | 
0 | 
cmd_info_9_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2687 | 
0 | 
0 | 
| T85 | 
4729 | 
15 | 
0 | 
0 | 
| T99 | 
32944 | 
193 | 
0 | 
0 | 
| T122 | 
11334 | 
97 | 
0 | 
0 | 
| T151 | 
16449 | 
84 | 
0 | 
0 | 
| T163 | 
90466 | 
224 | 
0 | 
0 | 
| T164 | 
64513 | 
494 | 
0 | 
0 | 
| T165 | 
3771 | 
7 | 
0 | 
0 | 
| T167 | 
13219 | 
18 | 
0 | 
0 | 
| T168 | 
12566 | 
28 | 
0 | 
0 | 
| T169 | 
19584 | 
107 | 
0 | 
0 | 
cmd_info_en4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1221 | 
0 | 
0 | 
| T99 | 
32944 | 
51 | 
0 | 
0 | 
| T122 | 
11334 | 
3 | 
0 | 
0 | 
| T151 | 
16449 | 
39 | 
0 | 
0 | 
| T163 | 
90466 | 
265 | 
0 | 
0 | 
| T164 | 
64513 | 
91 | 
0 | 
0 | 
| T165 | 
3771 | 
3 | 
0 | 
0 | 
| T166 | 
5931 | 
5 | 
0 | 
0 | 
| T167 | 
13219 | 
28 | 
0 | 
0 | 
| T168 | 
12566 | 
32 | 
0 | 
0 | 
| T169 | 
19584 | 
39 | 
0 | 
0 | 
cmd_info_ex4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1216 | 
0 | 
0 | 
| T99 | 
32944 | 
54 | 
0 | 
0 | 
| T122 | 
11334 | 
16 | 
0 | 
0 | 
| T151 | 
16449 | 
84 | 
0 | 
0 | 
| T163 | 
90466 | 
229 | 
0 | 
0 | 
| T164 | 
64513 | 
100 | 
0 | 
0 | 
| T165 | 
3771 | 
9 | 
0 | 
0 | 
| T166 | 
5931 | 
2 | 
0 | 
0 | 
| T167 | 
13219 | 
54 | 
0 | 
0 | 
| T168 | 
12566 | 
20 | 
0 | 
0 | 
| T169 | 
19584 | 
50 | 
0 | 
0 | 
cmd_info_wrdi_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1209 | 
0 | 
0 | 
| T99 | 
32944 | 
49 | 
0 | 
0 | 
| T122 | 
11334 | 
11 | 
0 | 
0 | 
| T151 | 
16449 | 
30 | 
0 | 
0 | 
| T163 | 
90466 | 
219 | 
0 | 
0 | 
| T164 | 
64513 | 
124 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
7 | 
0 | 
0 | 
| T167 | 
13219 | 
41 | 
0 | 
0 | 
| T168 | 
12566 | 
37 | 
0 | 
0 | 
| T169 | 
19584 | 
88 | 
0 | 
0 | 
cmd_info_wren_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1288 | 
0 | 
0 | 
| T99 | 
32944 | 
56 | 
0 | 
0 | 
| T122 | 
11334 | 
20 | 
0 | 
0 | 
| T151 | 
16449 | 
36 | 
0 | 
0 | 
| T163 | 
90466 | 
188 | 
0 | 
0 | 
| T164 | 
64513 | 
121 | 
0 | 
0 | 
| T165 | 
3771 | 
16 | 
0 | 
0 | 
| T166 | 
5931 | 
5 | 
0 | 
0 | 
| T167 | 
13219 | 
9 | 
0 | 
0 | 
| T168 | 
12566 | 
46 | 
0 | 
0 | 
| T169 | 
19584 | 
114 | 
0 | 
0 | 
intercept_en_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1483 | 
0 | 
0 | 
| T99 | 
32944 | 
139 | 
0 | 
0 | 
| T122 | 
11334 | 
16 | 
0 | 
0 | 
| T151 | 
16449 | 
45 | 
0 | 
0 | 
| T163 | 
90466 | 
200 | 
0 | 
0 | 
| T164 | 
64513 | 
180 | 
0 | 
0 | 
| T165 | 
3771 | 
7 | 
0 | 
0 | 
| T166 | 
5931 | 
27 | 
0 | 
0 | 
| T167 | 
13219 | 
36 | 
0 | 
0 | 
| T168 | 
12566 | 
27 | 
0 | 
0 | 
| T169 | 
19584 | 
28 | 
0 | 
0 | 
intr_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
2913 | 
0 | 
0 | 
| T15 | 
762321 | 
37 | 
0 | 
0 | 
| T16 | 
0 | 
7 | 
0 | 
0 | 
| T19 | 
0 | 
57 | 
0 | 
0 | 
| T21 | 
0 | 
4 | 
0 | 
0 | 
| T30 | 
0 | 
26 | 
0 | 
0 | 
| T39 | 
130403 | 
0 | 
0 | 
0 | 
| T144 | 
0 | 
30 | 
0 | 
0 | 
| T152 | 
102913 | 
0 | 
0 | 
0 | 
| T170 | 
0 | 
23 | 
0 | 
0 | 
| T171 | 
0 | 
78 | 
0 | 
0 | 
| T172 | 
0 | 
55 | 
0 | 
0 | 
| T173 | 
0 | 
13 | 
0 | 
0 | 
| T174 | 
287430 | 
0 | 
0 | 
0 | 
| T175 | 
291123 | 
0 | 
0 | 
0 | 
| T176 | 
6855 | 
0 | 
0 | 
0 | 
| T177 | 
155714 | 
0 | 
0 | 
0 | 
| T178 | 
325569 | 
0 | 
0 | 
0 | 
| T179 | 
19756 | 
0 | 
0 | 
0 | 
| T180 | 
3149 | 
0 | 
0 | 
0 | 
jedec_cc_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1230 | 
0 | 
0 | 
| T99 | 
32944 | 
56 | 
0 | 
0 | 
| T122 | 
11334 | 
14 | 
0 | 
0 | 
| T151 | 
16449 | 
44 | 
0 | 
0 | 
| T163 | 
90466 | 
240 | 
0 | 
0 | 
| T164 | 
64513 | 
108 | 
0 | 
0 | 
| T165 | 
3771 | 
6 | 
0 | 
0 | 
| T166 | 
5931 | 
8 | 
0 | 
0 | 
| T167 | 
13219 | 
15 | 
0 | 
0 | 
| T168 | 
12566 | 
7 | 
0 | 
0 | 
| T169 | 
19584 | 
55 | 
0 | 
0 | 
jedec_id_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1320 | 
0 | 
0 | 
| T99 | 
32944 | 
81 | 
0 | 
0 | 
| T122 | 
11334 | 
23 | 
0 | 
0 | 
| T151 | 
16449 | 
40 | 
0 | 
0 | 
| T163 | 
90466 | 
209 | 
0 | 
0 | 
| T164 | 
64513 | 
153 | 
0 | 
0 | 
| T165 | 
3771 | 
11 | 
0 | 
0 | 
| T166 | 
5931 | 
12 | 
0 | 
0 | 
| T167 | 
13219 | 
39 | 
0 | 
0 | 
| T168 | 
12566 | 
37 | 
0 | 
0 | 
| T169 | 
19584 | 
86 | 
0 | 
0 | 
mailbox_addr_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1003 | 
0 | 
0 | 
| T99 | 
32944 | 
46 | 
0 | 
0 | 
| T122 | 
11334 | 
2 | 
0 | 
0 | 
| T151 | 
16449 | 
38 | 
0 | 
0 | 
| T163 | 
90466 | 
229 | 
0 | 
0 | 
| T164 | 
64513 | 
73 | 
0 | 
0 | 
| T165 | 
3771 | 
6 | 
0 | 
0 | 
| T166 | 
5931 | 
10 | 
0 | 
0 | 
| T167 | 
13219 | 
5 | 
0 | 
0 | 
| T168 | 
12566 | 
18 | 
0 | 
0 | 
| T169 | 
19584 | 
55 | 
0 | 
0 | 
payload_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1059 | 
0 | 
0 | 
| T99 | 
32944 | 
40 | 
0 | 
0 | 
| T122 | 
11334 | 
9 | 
0 | 
0 | 
| T151 | 
16449 | 
36 | 
0 | 
0 | 
| T163 | 
90466 | 
239 | 
0 | 
0 | 
| T164 | 
64513 | 
75 | 
0 | 
0 | 
| T165 | 
3771 | 
7 | 
0 | 
0 | 
| T166 | 
5931 | 
11 | 
0 | 
0 | 
| T167 | 
13219 | 
32 | 
0 | 
0 | 
| T168 | 
12566 | 
12 | 
0 | 
0 | 
| T169 | 
19584 | 
77 | 
0 | 
0 | 
payload_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1148 | 
0 | 
0 | 
| T99 | 
32944 | 
48 | 
0 | 
0 | 
| T122 | 
11334 | 
24 | 
0 | 
0 | 
| T151 | 
16449 | 
36 | 
0 | 
0 | 
| T163 | 
90466 | 
232 | 
0 | 
0 | 
| T164 | 
64513 | 
88 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
11 | 
0 | 
0 | 
| T167 | 
13219 | 
32 | 
0 | 
0 | 
| T168 | 
12566 | 
26 | 
0 | 
0 | 
| T169 | 
19584 | 
77 | 
0 | 
0 | 
read_threshold_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1134 | 
0 | 
0 | 
| T85 | 
4729 | 
14 | 
0 | 
0 | 
| T99 | 
32944 | 
38 | 
0 | 
0 | 
| T122 | 
11334 | 
10 | 
0 | 
0 | 
| T151 | 
16449 | 
114 | 
0 | 
0 | 
| T163 | 
90466 | 
207 | 
0 | 
0 | 
| T164 | 
64513 | 
54 | 
0 | 
0 | 
| T166 | 
5931 | 
17 | 
0 | 
0 | 
| T167 | 
13219 | 
14 | 
0 | 
0 | 
| T168 | 
12566 | 
30 | 
0 | 
0 | 
| T169 | 
19584 | 
45 | 
0 | 
0 | 
tpm_access_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1410 | 
0 | 
0 | 
| T85 | 
4729 | 
7 | 
0 | 
0 | 
| T99 | 
32944 | 
86 | 
0 | 
0 | 
| T122 | 
11334 | 
9 | 
0 | 
0 | 
| T151 | 
16449 | 
20 | 
0 | 
0 | 
| T163 | 
90466 | 
261 | 
0 | 
0 | 
| T164 | 
64513 | 
195 | 
0 | 
0 | 
| T166 | 
5931 | 
4 | 
0 | 
0 | 
| T167 | 
13219 | 
26 | 
0 | 
0 | 
| T168 | 
12566 | 
11 | 
0 | 
0 | 
| T169 | 
19584 | 
37 | 
0 | 
0 | 
tpm_access_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1151 | 
0 | 
0 | 
| T99 | 
32944 | 
44 | 
0 | 
0 | 
| T122 | 
11334 | 
12 | 
0 | 
0 | 
| T151 | 
16449 | 
33 | 
0 | 
0 | 
| T163 | 
90466 | 
254 | 
0 | 
0 | 
| T164 | 
64513 | 
74 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
5 | 
0 | 
0 | 
| T167 | 
13219 | 
40 | 
0 | 
0 | 
| T168 | 
12566 | 
27 | 
0 | 
0 | 
| T169 | 
19584 | 
54 | 
0 | 
0 | 
tpm_cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1789 | 
0 | 
0 | 
| T99 | 
32944 | 
163 | 
0 | 
0 | 
| T122 | 
11334 | 
50 | 
0 | 
0 | 
| T151 | 
16449 | 
75 | 
0 | 
0 | 
| T163 | 
90466 | 
251 | 
0 | 
0 | 
| T164 | 
64513 | 
202 | 
0 | 
0 | 
| T165 | 
3771 | 
20 | 
0 | 
0 | 
| T166 | 
5931 | 
25 | 
0 | 
0 | 
| T167 | 
13219 | 
43 | 
0 | 
0 | 
| T168 | 
12566 | 
26 | 
0 | 
0 | 
| T169 | 
19584 | 
45 | 
0 | 
0 | 
tpm_did_vid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1171 | 
0 | 
0 | 
| T99 | 
32944 | 
60 | 
0 | 
0 | 
| T122 | 
11334 | 
17 | 
0 | 
0 | 
| T151 | 
16449 | 
38 | 
0 | 
0 | 
| T163 | 
90466 | 
246 | 
0 | 
0 | 
| T164 | 
64513 | 
102 | 
0 | 
0 | 
| T165 | 
3771 | 
1 | 
0 | 
0 | 
| T166 | 
5931 | 
5 | 
0 | 
0 | 
| T167 | 
13219 | 
17 | 
0 | 
0 | 
| T168 | 
12566 | 
32 | 
0 | 
0 | 
| T169 | 
19584 | 
19 | 
0 | 
0 | 
tpm_int_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1144 | 
0 | 
0 | 
| T99 | 
32944 | 
38 | 
0 | 
0 | 
| T122 | 
11334 | 
11 | 
0 | 
0 | 
| T151 | 
16449 | 
72 | 
0 | 
0 | 
| T163 | 
90466 | 
231 | 
0 | 
0 | 
| T164 | 
64513 | 
93 | 
0 | 
0 | 
| T165 | 
3771 | 
6 | 
0 | 
0 | 
| T166 | 
5931 | 
3 | 
0 | 
0 | 
| T167 | 
13219 | 
20 | 
0 | 
0 | 
| T168 | 
12566 | 
15 | 
0 | 
0 | 
| T169 | 
19584 | 
77 | 
0 | 
0 | 
tpm_int_status_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1013 | 
0 | 
0 | 
| T99 | 
32944 | 
40 | 
0 | 
0 | 
| T122 | 
11334 | 
15 | 
0 | 
0 | 
| T151 | 
16449 | 
21 | 
0 | 
0 | 
| T163 | 
90466 | 
227 | 
0 | 
0 | 
| T164 | 
64513 | 
65 | 
0 | 
0 | 
| T165 | 
3771 | 
3 | 
0 | 
0 | 
| T166 | 
5931 | 
1 | 
0 | 
0 | 
| T167 | 
13219 | 
19 | 
0 | 
0 | 
| T168 | 
12566 | 
12 | 
0 | 
0 | 
| T169 | 
19584 | 
57 | 
0 | 
0 | 
tpm_int_vector_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1013 | 
0 | 
0 | 
| T99 | 
32944 | 
33 | 
0 | 
0 | 
| T122 | 
11334 | 
16 | 
0 | 
0 | 
| T151 | 
16449 | 
46 | 
0 | 
0 | 
| T163 | 
90466 | 
224 | 
0 | 
0 | 
| T164 | 
64513 | 
85 | 
0 | 
0 | 
| T165 | 
3771 | 
10 | 
0 | 
0 | 
| T166 | 
5931 | 
9 | 
0 | 
0 | 
| T167 | 
13219 | 
7 | 
0 | 
0 | 
| T168 | 
12566 | 
9 | 
0 | 
0 | 
| T169 | 
19584 | 
37 | 
0 | 
0 | 
tpm_intf_capability_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1037 | 
0 | 
0 | 
| T99 | 
32944 | 
58 | 
0 | 
0 | 
| T122 | 
11334 | 
16 | 
0 | 
0 | 
| T151 | 
16449 | 
78 | 
0 | 
0 | 
| T163 | 
90466 | 
223 | 
0 | 
0 | 
| T164 | 
64513 | 
78 | 
0 | 
0 | 
| T165 | 
3771 | 
2 | 
0 | 
0 | 
| T166 | 
5931 | 
10 | 
0 | 
0 | 
| T167 | 
13219 | 
19 | 
0 | 
0 | 
| T168 | 
12566 | 
23 | 
0 | 
0 | 
| T169 | 
19584 | 
3 | 
0 | 
0 | 
tpm_rid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1184 | 
0 | 
0 | 
| T99 | 
32944 | 
39 | 
0 | 
0 | 
| T122 | 
11334 | 
18 | 
0 | 
0 | 
| T151 | 
16449 | 
48 | 
0 | 
0 | 
| T163 | 
90466 | 
222 | 
0 | 
0 | 
| T164 | 
64513 | 
66 | 
0 | 
0 | 
| T165 | 
3771 | 
5 | 
0 | 
0 | 
| T166 | 
5931 | 
5 | 
0 | 
0 | 
| T167 | 
13219 | 
15 | 
0 | 
0 | 
| T168 | 
12566 | 
7 | 
0 | 
0 | 
| T169 | 
19584 | 
119 | 
0 | 
0 | 
tpm_sts_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
499711834 | 
1067 | 
0 | 
0 | 
| T99 | 
32944 | 
20 | 
0 | 
0 | 
| T122 | 
11334 | 
3 | 
0 | 
0 | 
| T151 | 
16449 | 
28 | 
0 | 
0 | 
| T163 | 
90466 | 
234 | 
0 | 
0 | 
| T164 | 
64513 | 
64 | 
0 | 
0 | 
| T165 | 
3771 | 
1 | 
0 | 
0 | 
| T166 | 
5931 | 
6 | 
0 | 
0 | 
| T167 | 
13219 | 
30 | 
0 | 
0 | 
| T168 | 
12566 | 
27 | 
0 | 
0 | 
| T169 | 
19584 | 
53 | 
0 | 
0 |