Assert Coverage for Module : 
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
3279 | 
0 | 
0 | 
| T72 | 
8099 | 
370 | 
0 | 
0 | 
| T73 | 
2231 | 
7 | 
0 | 
0 | 
| T74 | 
5438 | 
8 | 
0 | 
0 | 
| T98 | 
1959 | 
46 | 
0 | 
0 | 
| T99 | 
9928 | 
107 | 
0 | 
0 | 
| T100 | 
26879 | 
2 | 
0 | 
0 | 
| T103 | 
4225 | 
187 | 
0 | 
0 | 
| T106 | 
9341 | 
172 | 
0 | 
0 | 
| T110 | 
9694 | 
4 | 
0 | 
0 | 
| T111 | 
2637 | 
7 | 
0 | 
0 | 
addr_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2184 | 
0 | 
0 | 
| T101 | 
36140 | 
62 | 
0 | 
0 | 
| T110 | 
9694 | 
25 | 
0 | 
0 | 
| T115 | 
9739 | 
3 | 
0 | 
0 | 
| T118 | 
76900 | 
501 | 
0 | 
0 | 
| T119 | 
11834 | 
7 | 
0 | 
0 | 
| T122 | 
74393 | 
520 | 
0 | 
0 | 
| T144 | 
11843 | 
41 | 
0 | 
0 | 
| T152 | 
15923 | 
33 | 
0 | 
0 | 
| T153 | 
11918 | 
10 | 
0 | 
0 | 
| T154 | 
5351 | 
12 | 
0 | 
0 | 
addr_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2082 | 
0 | 
0 | 
| T101 | 
36140 | 
39 | 
0 | 
0 | 
| T110 | 
9694 | 
15 | 
0 | 
0 | 
| T115 | 
9739 | 
13 | 
0 | 
0 | 
| T118 | 
76900 | 
536 | 
0 | 
0 | 
| T119 | 
11834 | 
7 | 
0 | 
0 | 
| T122 | 
74393 | 
531 | 
0 | 
0 | 
| T144 | 
11843 | 
8 | 
0 | 
0 | 
| T152 | 
15923 | 
13 | 
0 | 
0 | 
| T153 | 
11918 | 
13 | 
0 | 
0 | 
| T154 | 
5351 | 
12 | 
0 | 
0 | 
cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2802 | 
0 | 
0 | 
| T101 | 
36140 | 
78 | 
0 | 
0 | 
| T110 | 
9694 | 
25 | 
0 | 
0 | 
| T118 | 
76900 | 
580 | 
0 | 
0 | 
| T119 | 
11834 | 
17 | 
0 | 
0 | 
| T122 | 
74393 | 
482 | 
0 | 
0 | 
| T125 | 
5091 | 
10 | 
0 | 
0 | 
| T144 | 
11843 | 
20 | 
0 | 
0 | 
| T152 | 
15923 | 
35 | 
0 | 
0 | 
| T153 | 
11918 | 
27 | 
0 | 
0 | 
| T154 | 
5351 | 
2 | 
0 | 
0 | 
cmd_filter_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
13569 | 
0 | 
0 | 
| T101 | 
36140 | 
1192 | 
0 | 
0 | 
| T110 | 
9694 | 
179 | 
0 | 
0 | 
| T115 | 
9739 | 
212 | 
0 | 
0 | 
| T118 | 
76900 | 
537 | 
0 | 
0 | 
| T119 | 
11834 | 
199 | 
0 | 
0 | 
| T122 | 
74393 | 
549 | 
0 | 
0 | 
| T144 | 
11843 | 
44 | 
0 | 
0 | 
| T152 | 
15923 | 
283 | 
0 | 
0 | 
| T153 | 
11918 | 
20 | 
0 | 
0 | 
| T154 | 
5351 | 
8 | 
0 | 
0 | 
cmd_filter_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
13525 | 
0 | 
0 | 
| T101 | 
36140 | 
541 | 
0 | 
0 | 
| T110 | 
9694 | 
137 | 
0 | 
0 | 
| T115 | 
9739 | 
54 | 
0 | 
0 | 
| T118 | 
76900 | 
556 | 
0 | 
0 | 
| T119 | 
11834 | 
250 | 
0 | 
0 | 
| T122 | 
74393 | 
523 | 
0 | 
0 | 
| T144 | 
11843 | 
18 | 
0 | 
0 | 
| T152 | 
15923 | 
133 | 
0 | 
0 | 
| T153 | 
11918 | 
135 | 
0 | 
0 | 
| T154 | 
5351 | 
107 | 
0 | 
0 | 
cmd_filter_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
14033 | 
0 | 
0 | 
| T101 | 
36140 | 
791 | 
0 | 
0 | 
| T110 | 
9694 | 
18 | 
0 | 
0 | 
| T115 | 
9739 | 
19 | 
0 | 
0 | 
| T118 | 
76900 | 
524 | 
0 | 
0 | 
| T119 | 
11834 | 
246 | 
0 | 
0 | 
| T122 | 
74393 | 
502 | 
0 | 
0 | 
| T144 | 
11843 | 
3 | 
0 | 
0 | 
| T152 | 
15923 | 
234 | 
0 | 
0 | 
| T153 | 
11918 | 
277 | 
0 | 
0 | 
| T154 | 
5351 | 
105 | 
0 | 
0 | 
cmd_filter_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
13661 | 
0 | 
0 | 
| T101 | 
36140 | 
745 | 
0 | 
0 | 
| T110 | 
9694 | 
289 | 
0 | 
0 | 
| T115 | 
9739 | 
88 | 
0 | 
0 | 
| T118 | 
76900 | 
528 | 
0 | 
0 | 
| T119 | 
11834 | 
260 | 
0 | 
0 | 
| T122 | 
74393 | 
535 | 
0 | 
0 | 
| T144 | 
11843 | 
37 | 
0 | 
0 | 
| T152 | 
15923 | 
33 | 
0 | 
0 | 
| T153 | 
11918 | 
261 | 
0 | 
0 | 
| T154 | 
5351 | 
6 | 
0 | 
0 | 
cmd_filter_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
12061 | 
0 | 
0 | 
| T101 | 
36140 | 
558 | 
0 | 
0 | 
| T110 | 
9694 | 
16 | 
0 | 
0 | 
| T115 | 
9739 | 
133 | 
0 | 
0 | 
| T118 | 
76900 | 
543 | 
0 | 
0 | 
| T119 | 
11834 | 
245 | 
0 | 
0 | 
| T122 | 
74393 | 
483 | 
0 | 
0 | 
| T144 | 
11843 | 
17 | 
0 | 
0 | 
| T152 | 
15923 | 
395 | 
0 | 
0 | 
| T153 | 
11918 | 
116 | 
0 | 
0 | 
| T154 | 
5351 | 
8 | 
0 | 
0 | 
cmd_filter_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
14323 | 
0 | 
0 | 
| T101 | 
36140 | 
605 | 
0 | 
0 | 
| T110 | 
9694 | 
115 | 
0 | 
0 | 
| T115 | 
9739 | 
160 | 
0 | 
0 | 
| T118 | 
76900 | 
524 | 
0 | 
0 | 
| T119 | 
11834 | 
337 | 
0 | 
0 | 
| T122 | 
74393 | 
530 | 
0 | 
0 | 
| T144 | 
11843 | 
27 | 
0 | 
0 | 
| T152 | 
15923 | 
138 | 
0 | 
0 | 
| T153 | 
11918 | 
302 | 
0 | 
0 | 
| T154 | 
5351 | 
158 | 
0 | 
0 | 
cmd_filter_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
11970 | 
0 | 
0 | 
| T101 | 
36140 | 
428 | 
0 | 
0 | 
| T110 | 
9694 | 
154 | 
0 | 
0 | 
| T115 | 
9739 | 
68 | 
0 | 
0 | 
| T118 | 
76900 | 
606 | 
0 | 
0 | 
| T119 | 
11834 | 
99 | 
0 | 
0 | 
| T122 | 
74393 | 
499 | 
0 | 
0 | 
| T144 | 
11843 | 
33 | 
0 | 
0 | 
| T152 | 
15923 | 
303 | 
0 | 
0 | 
| T153 | 
11918 | 
180 | 
0 | 
0 | 
| T154 | 
5351 | 
127 | 
0 | 
0 | 
cmd_filter_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
13250 | 
0 | 
0 | 
| T101 | 
36140 | 
1146 | 
0 | 
0 | 
| T110 | 
9694 | 
12 | 
0 | 
0 | 
| T115 | 
9739 | 
142 | 
0 | 
0 | 
| T118 | 
76900 | 
584 | 
0 | 
0 | 
| T119 | 
11834 | 
222 | 
0 | 
0 | 
| T122 | 
74393 | 
520 | 
0 | 
0 | 
| T144 | 
11843 | 
22 | 
0 | 
0 | 
| T152 | 
15923 | 
168 | 
0 | 
0 | 
| T153 | 
11918 | 
261 | 
0 | 
0 | 
| T154 | 
5351 | 
13 | 
0 | 
0 | 
cmd_info_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
5853 | 
0 | 
0 | 
| T101 | 
36140 | 
276 | 
0 | 
0 | 
| T110 | 
9694 | 
126 | 
0 | 
0 | 
| T115 | 
9739 | 
42 | 
0 | 
0 | 
| T118 | 
76900 | 
547 | 
0 | 
0 | 
| T119 | 
11834 | 
89 | 
0 | 
0 | 
| T122 | 
74393 | 
464 | 
0 | 
0 | 
| T144 | 
11843 | 
3 | 
0 | 
0 | 
| T152 | 
15923 | 
116 | 
0 | 
0 | 
| T153 | 
11918 | 
78 | 
0 | 
0 | 
| T154 | 
5351 | 
65 | 
0 | 
0 | 
cmd_info_10_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
5987 | 
0 | 
0 | 
| T101 | 
36140 | 
166 | 
0 | 
0 | 
| T110 | 
9694 | 
63 | 
0 | 
0 | 
| T115 | 
9739 | 
50 | 
0 | 
0 | 
| T118 | 
76900 | 
564 | 
0 | 
0 | 
| T119 | 
11834 | 
44 | 
0 | 
0 | 
| T122 | 
74393 | 
461 | 
0 | 
0 | 
| T144 | 
11843 | 
49 | 
0 | 
0 | 
| T152 | 
15923 | 
184 | 
0 | 
0 | 
| T153 | 
11918 | 
10 | 
0 | 
0 | 
| T154 | 
5351 | 
6 | 
0 | 
0 | 
cmd_info_11_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6121 | 
0 | 
0 | 
| T101 | 
36140 | 
240 | 
0 | 
0 | 
| T107 | 
15459 | 
1 | 
0 | 
0 | 
| T110 | 
9694 | 
19 | 
0 | 
0 | 
| T115 | 
9739 | 
42 | 
0 | 
0 | 
| T118 | 
76900 | 
568 | 
0 | 
0 | 
| T119 | 
11834 | 
88 | 
0 | 
0 | 
| T122 | 
74393 | 
488 | 
0 | 
0 | 
| T144 | 
11843 | 
32 | 
0 | 
0 | 
| T152 | 
15923 | 
117 | 
0 | 
0 | 
| T153 | 
11918 | 
20 | 
0 | 
0 | 
cmd_info_12_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6064 | 
0 | 
0 | 
| T101 | 
36140 | 
281 | 
0 | 
0 | 
| T107 | 
15459 | 
1 | 
0 | 
0 | 
| T110 | 
9694 | 
53 | 
0 | 
0 | 
| T115 | 
9739 | 
76 | 
0 | 
0 | 
| T118 | 
76900 | 
517 | 
0 | 
0 | 
| T119 | 
11834 | 
94 | 
0 | 
0 | 
| T122 | 
74393 | 
542 | 
0 | 
0 | 
| T144 | 
11843 | 
21 | 
0 | 
0 | 
| T152 | 
15923 | 
89 | 
0 | 
0 | 
| T153 | 
11918 | 
51 | 
0 | 
0 | 
cmd_info_13_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6010 | 
0 | 
0 | 
| T101 | 
36140 | 
285 | 
0 | 
0 | 
| T110 | 
9694 | 
61 | 
0 | 
0 | 
| T115 | 
9739 | 
22 | 
0 | 
0 | 
| T118 | 
76900 | 
543 | 
0 | 
0 | 
| T119 | 
11834 | 
8 | 
0 | 
0 | 
| T122 | 
74393 | 
501 | 
0 | 
0 | 
| T144 | 
11843 | 
40 | 
0 | 
0 | 
| T152 | 
15923 | 
81 | 
0 | 
0 | 
| T153 | 
11918 | 
56 | 
0 | 
0 | 
| T154 | 
5351 | 
2 | 
0 | 
0 | 
cmd_info_14_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6281 | 
0 | 
0 | 
| T101 | 
36140 | 
324 | 
0 | 
0 | 
| T110 | 
9694 | 
75 | 
0 | 
0 | 
| T115 | 
9739 | 
22 | 
0 | 
0 | 
| T118 | 
76900 | 
522 | 
0 | 
0 | 
| T119 | 
11834 | 
69 | 
0 | 
0 | 
| T122 | 
74393 | 
515 | 
0 | 
0 | 
| T144 | 
11843 | 
29 | 
0 | 
0 | 
| T152 | 
15923 | 
111 | 
0 | 
0 | 
| T153 | 
11918 | 
63 | 
0 | 
0 | 
| T154 | 
5351 | 
5 | 
0 | 
0 | 
cmd_info_15_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6037 | 
0 | 
0 | 
| T101 | 
36140 | 
280 | 
0 | 
0 | 
| T110 | 
9694 | 
15 | 
0 | 
0 | 
| T115 | 
9739 | 
11 | 
0 | 
0 | 
| T118 | 
76900 | 
547 | 
0 | 
0 | 
| T119 | 
11834 | 
87 | 
0 | 
0 | 
| T122 | 
74393 | 
466 | 
0 | 
0 | 
| T144 | 
11843 | 
33 | 
0 | 
0 | 
| T152 | 
15923 | 
73 | 
0 | 
0 | 
| T153 | 
11918 | 
104 | 
0 | 
0 | 
| T154 | 
5351 | 
72 | 
0 | 
0 | 
cmd_info_16_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6436 | 
0 | 
0 | 
| T101 | 
36140 | 
259 | 
0 | 
0 | 
| T110 | 
9694 | 
87 | 
0 | 
0 | 
| T115 | 
9739 | 
15 | 
0 | 
0 | 
| T118 | 
76900 | 
531 | 
0 | 
0 | 
| T119 | 
11834 | 
99 | 
0 | 
0 | 
| T122 | 
74393 | 
457 | 
0 | 
0 | 
| T144 | 
11843 | 
36 | 
0 | 
0 | 
| T152 | 
15923 | 
122 | 
0 | 
0 | 
| T153 | 
11918 | 
57 | 
0 | 
0 | 
| T154 | 
5351 | 
68 | 
0 | 
0 | 
cmd_info_17_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6469 | 
0 | 
0 | 
| T101 | 
36140 | 
183 | 
0 | 
0 | 
| T110 | 
9694 | 
12 | 
0 | 
0 | 
| T115 | 
9739 | 
35 | 
0 | 
0 | 
| T118 | 
76900 | 
532 | 
0 | 
0 | 
| T119 | 
11834 | 
39 | 
0 | 
0 | 
| T122 | 
74393 | 
552 | 
0 | 
0 | 
| T144 | 
11843 | 
12 | 
0 | 
0 | 
| T152 | 
15923 | 
71 | 
0 | 
0 | 
| T153 | 
11918 | 
57 | 
0 | 
0 | 
| T154 | 
5351 | 
16 | 
0 | 
0 | 
cmd_info_18_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6271 | 
0 | 
0 | 
| T101 | 
36140 | 
225 | 
0 | 
0 | 
| T110 | 
9694 | 
65 | 
0 | 
0 | 
| T115 | 
9739 | 
27 | 
0 | 
0 | 
| T118 | 
76900 | 
602 | 
0 | 
0 | 
| T119 | 
11834 | 
114 | 
0 | 
0 | 
| T122 | 
74393 | 
533 | 
0 | 
0 | 
| T144 | 
11843 | 
18 | 
0 | 
0 | 
| T152 | 
15923 | 
164 | 
0 | 
0 | 
| T153 | 
11918 | 
72 | 
0 | 
0 | 
| T154 | 
5351 | 
11 | 
0 | 
0 | 
cmd_info_19_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6455 | 
0 | 
0 | 
| T101 | 
36140 | 
258 | 
0 | 
0 | 
| T105 | 
13834 | 
5 | 
0 | 
0 | 
| T110 | 
9694 | 
138 | 
0 | 
0 | 
| T115 | 
9739 | 
8 | 
0 | 
0 | 
| T118 | 
76900 | 
526 | 
0 | 
0 | 
| T119 | 
11834 | 
79 | 
0 | 
0 | 
| T122 | 
74393 | 
484 | 
0 | 
0 | 
| T144 | 
11843 | 
20 | 
0 | 
0 | 
| T152 | 
15923 | 
186 | 
0 | 
0 | 
| T153 | 
11918 | 
74 | 
0 | 
0 | 
cmd_info_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6290 | 
0 | 
0 | 
| T101 | 
36140 | 
336 | 
0 | 
0 | 
| T110 | 
9694 | 
104 | 
0 | 
0 | 
| T115 | 
9739 | 
59 | 
0 | 
0 | 
| T118 | 
76900 | 
574 | 
0 | 
0 | 
| T119 | 
11834 | 
43 | 
0 | 
0 | 
| T122 | 
74393 | 
453 | 
0 | 
0 | 
| T144 | 
11843 | 
27 | 
0 | 
0 | 
| T152 | 
15923 | 
78 | 
0 | 
0 | 
| T153 | 
11918 | 
47 | 
0 | 
0 | 
| T154 | 
5351 | 
12 | 
0 | 
0 | 
cmd_info_20_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6190 | 
0 | 
0 | 
| T101 | 
36140 | 
357 | 
0 | 
0 | 
| T110 | 
9694 | 
68 | 
0 | 
0 | 
| T115 | 
9739 | 
53 | 
0 | 
0 | 
| T118 | 
76900 | 
489 | 
0 | 
0 | 
| T119 | 
11834 | 
70 | 
0 | 
0 | 
| T122 | 
74393 | 
485 | 
0 | 
0 | 
| T144 | 
11843 | 
10 | 
0 | 
0 | 
| T152 | 
15923 | 
148 | 
0 | 
0 | 
| T153 | 
11918 | 
95 | 
0 | 
0 | 
| T154 | 
5351 | 
34 | 
0 | 
0 | 
cmd_info_21_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
5948 | 
0 | 
0 | 
| T101 | 
36140 | 
140 | 
0 | 
0 | 
| T110 | 
9694 | 
14 | 
0 | 
0 | 
| T115 | 
9739 | 
35 | 
0 | 
0 | 
| T118 | 
76900 | 
546 | 
0 | 
0 | 
| T119 | 
11834 | 
104 | 
0 | 
0 | 
| T122 | 
74393 | 
506 | 
0 | 
0 | 
| T144 | 
11843 | 
35 | 
0 | 
0 | 
| T152 | 
15923 | 
128 | 
0 | 
0 | 
| T153 | 
11918 | 
129 | 
0 | 
0 | 
| T154 | 
5351 | 
65 | 
0 | 
0 | 
cmd_info_22_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6403 | 
0 | 
0 | 
| T101 | 
36140 | 
207 | 
0 | 
0 | 
| T110 | 
9694 | 
66 | 
0 | 
0 | 
| T115 | 
9739 | 
57 | 
0 | 
0 | 
| T118 | 
76900 | 
545 | 
0 | 
0 | 
| T119 | 
11834 | 
97 | 
0 | 
0 | 
| T122 | 
74393 | 
526 | 
0 | 
0 | 
| T144 | 
11843 | 
36 | 
0 | 
0 | 
| T152 | 
15923 | 
33 | 
0 | 
0 | 
| T153 | 
11918 | 
88 | 
0 | 
0 | 
| T154 | 
5351 | 
3 | 
0 | 
0 | 
cmd_info_23_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6019 | 
0 | 
0 | 
| T101 | 
36140 | 
236 | 
0 | 
0 | 
| T110 | 
9694 | 
76 | 
0 | 
0 | 
| T115 | 
9739 | 
22 | 
0 | 
0 | 
| T118 | 
76900 | 
525 | 
0 | 
0 | 
| T119 | 
11834 | 
91 | 
0 | 
0 | 
| T122 | 
74393 | 
470 | 
0 | 
0 | 
| T144 | 
11843 | 
16 | 
0 | 
0 | 
| T152 | 
15923 | 
79 | 
0 | 
0 | 
| T153 | 
11918 | 
52 | 
0 | 
0 | 
| T154 | 
5351 | 
30 | 
0 | 
0 | 
cmd_info_2_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6181 | 
0 | 
0 | 
| T101 | 
36140 | 
227 | 
0 | 
0 | 
| T110 | 
9694 | 
58 | 
0 | 
0 | 
| T115 | 
9739 | 
60 | 
0 | 
0 | 
| T118 | 
76900 | 
547 | 
0 | 
0 | 
| T119 | 
11834 | 
50 | 
0 | 
0 | 
| T122 | 
74393 | 
486 | 
0 | 
0 | 
| T144 | 
11843 | 
32 | 
0 | 
0 | 
| T152 | 
15923 | 
84 | 
0 | 
0 | 
| T153 | 
11918 | 
53 | 
0 | 
0 | 
| T154 | 
5351 | 
73 | 
0 | 
0 | 
cmd_info_3_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6254 | 
0 | 
0 | 
| T101 | 
36140 | 
340 | 
0 | 
0 | 
| T110 | 
9694 | 
70 | 
0 | 
0 | 
| T115 | 
9739 | 
12 | 
0 | 
0 | 
| T118 | 
76900 | 
468 | 
0 | 
0 | 
| T119 | 
11834 | 
45 | 
0 | 
0 | 
| T122 | 
74393 | 
481 | 
0 | 
0 | 
| T144 | 
11843 | 
63 | 
0 | 
0 | 
| T152 | 
15923 | 
96 | 
0 | 
0 | 
| T153 | 
11918 | 
71 | 
0 | 
0 | 
| T154 | 
5351 | 
2 | 
0 | 
0 | 
cmd_info_4_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6920 | 
0 | 
0 | 
| T101 | 
36140 | 
284 | 
0 | 
0 | 
| T110 | 
9694 | 
73 | 
0 | 
0 | 
| T115 | 
9739 | 
93 | 
0 | 
0 | 
| T118 | 
76900 | 
476 | 
0 | 
0 | 
| T119 | 
11834 | 
59 | 
0 | 
0 | 
| T122 | 
74393 | 
498 | 
0 | 
0 | 
| T144 | 
11843 | 
35 | 
0 | 
0 | 
| T152 | 
15923 | 
86 | 
0 | 
0 | 
| T153 | 
11918 | 
14 | 
0 | 
0 | 
| T154 | 
5351 | 
9 | 
0 | 
0 | 
cmd_info_5_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6591 | 
0 | 
0 | 
| T101 | 
36140 | 
305 | 
0 | 
0 | 
| T110 | 
9694 | 
55 | 
0 | 
0 | 
| T115 | 
9739 | 
54 | 
0 | 
0 | 
| T118 | 
76900 | 
563 | 
0 | 
0 | 
| T119 | 
11834 | 
100 | 
0 | 
0 | 
| T122 | 
74393 | 
591 | 
0 | 
0 | 
| T144 | 
11843 | 
2 | 
0 | 
0 | 
| T152 | 
15923 | 
56 | 
0 | 
0 | 
| T153 | 
11918 | 
10 | 
0 | 
0 | 
| T154 | 
5351 | 
81 | 
0 | 
0 | 
cmd_info_6_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6163 | 
0 | 
0 | 
| T101 | 
36140 | 
322 | 
0 | 
0 | 
| T110 | 
9694 | 
48 | 
0 | 
0 | 
| T115 | 
9739 | 
43 | 
0 | 
0 | 
| T118 | 
76900 | 
511 | 
0 | 
0 | 
| T119 | 
11834 | 
157 | 
0 | 
0 | 
| T122 | 
74393 | 
483 | 
0 | 
0 | 
| T144 | 
11843 | 
29 | 
0 | 
0 | 
| T152 | 
15923 | 
121 | 
0 | 
0 | 
| T153 | 
11918 | 
19 | 
0 | 
0 | 
| T154 | 
5351 | 
10 | 
0 | 
0 | 
cmd_info_7_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6146 | 
0 | 
0 | 
| T101 | 
36140 | 
293 | 
0 | 
0 | 
| T107 | 
15459 | 
6 | 
0 | 
0 | 
| T110 | 
9694 | 
79 | 
0 | 
0 | 
| T115 | 
9739 | 
80 | 
0 | 
0 | 
| T118 | 
76900 | 
495 | 
0 | 
0 | 
| T119 | 
11834 | 
67 | 
0 | 
0 | 
| T122 | 
74393 | 
450 | 
0 | 
0 | 
| T144 | 
11843 | 
23 | 
0 | 
0 | 
| T152 | 
15923 | 
163 | 
0 | 
0 | 
| T153 | 
11918 | 
65 | 
0 | 
0 | 
cmd_info_8_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
6165 | 
0 | 
0 | 
| T101 | 
36140 | 
379 | 
0 | 
0 | 
| T110 | 
9694 | 
59 | 
0 | 
0 | 
| T115 | 
9739 | 
50 | 
0 | 
0 | 
| T118 | 
76900 | 
525 | 
0 | 
0 | 
| T119 | 
11834 | 
60 | 
0 | 
0 | 
| T122 | 
74393 | 
525 | 
0 | 
0 | 
| T144 | 
11843 | 
24 | 
0 | 
0 | 
| T152 | 
15923 | 
63 | 
0 | 
0 | 
| T153 | 
11918 | 
95 | 
0 | 
0 | 
| T154 | 
5351 | 
56 | 
0 | 
0 | 
cmd_info_9_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
5824 | 
0 | 
0 | 
| T101 | 
36140 | 
245 | 
0 | 
0 | 
| T110 | 
9694 | 
16 | 
0 | 
0 | 
| T115 | 
9739 | 
64 | 
0 | 
0 | 
| T118 | 
76900 | 
515 | 
0 | 
0 | 
| T119 | 
11834 | 
17 | 
0 | 
0 | 
| T122 | 
74393 | 
456 | 
0 | 
0 | 
| T152 | 
15923 | 
69 | 
0 | 
0 | 
| T153 | 
11918 | 
68 | 
0 | 
0 | 
| T154 | 
5351 | 
73 | 
0 | 
0 | 
| T155 | 
7265 | 
18 | 
0 | 
0 | 
cmd_info_en4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2363 | 
0 | 
0 | 
| T101 | 
36140 | 
64 | 
0 | 
0 | 
| T110 | 
9694 | 
22 | 
0 | 
0 | 
| T115 | 
9739 | 
14 | 
0 | 
0 | 
| T118 | 
76900 | 
501 | 
0 | 
0 | 
| T119 | 
11834 | 
27 | 
0 | 
0 | 
| T122 | 
74393 | 
428 | 
0 | 
0 | 
| T144 | 
11843 | 
18 | 
0 | 
0 | 
| T152 | 
15923 | 
30 | 
0 | 
0 | 
| T153 | 
11918 | 
26 | 
0 | 
0 | 
| T154 | 
5351 | 
9 | 
0 | 
0 | 
cmd_info_ex4b_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2613 | 
0 | 
0 | 
| T101 | 
36140 | 
66 | 
0 | 
0 | 
| T110 | 
9694 | 
19 | 
0 | 
0 | 
| T115 | 
9739 | 
7 | 
0 | 
0 | 
| T118 | 
76900 | 
531 | 
0 | 
0 | 
| T119 | 
11834 | 
24 | 
0 | 
0 | 
| T122 | 
74393 | 
511 | 
0 | 
0 | 
| T144 | 
11843 | 
51 | 
0 | 
0 | 
| T152 | 
15923 | 
33 | 
0 | 
0 | 
| T153 | 
11918 | 
14 | 
0 | 
0 | 
| T154 | 
5351 | 
4 | 
0 | 
0 | 
cmd_info_wrdi_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2330 | 
0 | 
0 | 
| T101 | 
36140 | 
90 | 
0 | 
0 | 
| T110 | 
9694 | 
13 | 
0 | 
0 | 
| T115 | 
9739 | 
12 | 
0 | 
0 | 
| T118 | 
76900 | 
513 | 
0 | 
0 | 
| T119 | 
11834 | 
24 | 
0 | 
0 | 
| T122 | 
74393 | 
466 | 
0 | 
0 | 
| T144 | 
11843 | 
15 | 
0 | 
0 | 
| T152 | 
15923 | 
40 | 
0 | 
0 | 
| T153 | 
11918 | 
30 | 
0 | 
0 | 
| T154 | 
5351 | 
14 | 
0 | 
0 | 
cmd_info_wren_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2601 | 
0 | 
0 | 
| T101 | 
36140 | 
62 | 
0 | 
0 | 
| T110 | 
9694 | 
16 | 
0 | 
0 | 
| T115 | 
9739 | 
2 | 
0 | 
0 | 
| T118 | 
76900 | 
489 | 
0 | 
0 | 
| T119 | 
11834 | 
10 | 
0 | 
0 | 
| T122 | 
74393 | 
545 | 
0 | 
0 | 
| T144 | 
11843 | 
17 | 
0 | 
0 | 
| T152 | 
15923 | 
25 | 
0 | 
0 | 
| T153 | 
11918 | 
28 | 
0 | 
0 | 
| T154 | 
5351 | 
8 | 
0 | 
0 | 
intercept_en_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
3294 | 
0 | 
0 | 
| T101 | 
36140 | 
137 | 
0 | 
0 | 
| T110 | 
9694 | 
24 | 
0 | 
0 | 
| T115 | 
9739 | 
1 | 
0 | 
0 | 
| T118 | 
76900 | 
565 | 
0 | 
0 | 
| T119 | 
11834 | 
12 | 
0 | 
0 | 
| T122 | 
74393 | 
516 | 
0 | 
0 | 
| T144 | 
11843 | 
11 | 
0 | 
0 | 
| T152 | 
15923 | 
25 | 
0 | 
0 | 
| T153 | 
11918 | 
36 | 
0 | 
0 | 
| T154 | 
5351 | 
23 | 
0 | 
0 | 
intr_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
5439 | 
0 | 
0 | 
| T14 | 
0 | 
10 | 
0 | 
0 | 
| T15 | 
0 | 
46 | 
0 | 
0 | 
| T22 | 
0 | 
5 | 
0 | 
0 | 
| T33 | 
735273 | 
18 | 
0 | 
0 | 
| T34 | 
218468 | 
0 | 
0 | 
0 | 
| T35 | 
2282 | 
0 | 
0 | 
0 | 
| T36 | 
410552 | 
0 | 
0 | 
0 | 
| T37 | 
257022 | 
0 | 
0 | 
0 | 
| T47 | 
6071 | 
0 | 
0 | 
0 | 
| T48 | 
15070 | 
0 | 
0 | 
0 | 
| T67 | 
37621 | 
0 | 
0 | 
0 | 
| T70 | 
1143 | 
0 | 
0 | 
0 | 
| T156 | 
0 | 
101 | 
0 | 
0 | 
| T157 | 
0 | 
24 | 
0 | 
0 | 
| T158 | 
0 | 
19 | 
0 | 
0 | 
| T159 | 
0 | 
36 | 
0 | 
0 | 
| T160 | 
0 | 
7 | 
0 | 
0 | 
| T161 | 
0 | 
29 | 
0 | 
0 | 
| T162 | 
110531 | 
0 | 
0 | 
0 | 
jedec_cc_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2553 | 
0 | 
0 | 
| T101 | 
36140 | 
72 | 
0 | 
0 | 
| T110 | 
9694 | 
14 | 
0 | 
0 | 
| T115 | 
9739 | 
14 | 
0 | 
0 | 
| T118 | 
76900 | 
539 | 
0 | 
0 | 
| T119 | 
11834 | 
20 | 
0 | 
0 | 
| T122 | 
74393 | 
522 | 
0 | 
0 | 
| T144 | 
11843 | 
17 | 
0 | 
0 | 
| T152 | 
15923 | 
39 | 
0 | 
0 | 
| T153 | 
11918 | 
20 | 
0 | 
0 | 
| T154 | 
5351 | 
15 | 
0 | 
0 | 
jedec_id_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2443 | 
0 | 
0 | 
| T101 | 
36140 | 
58 | 
0 | 
0 | 
| T110 | 
9694 | 
8 | 
0 | 
0 | 
| T115 | 
9739 | 
11 | 
0 | 
0 | 
| T118 | 
76900 | 
545 | 
0 | 
0 | 
| T119 | 
11834 | 
28 | 
0 | 
0 | 
| T122 | 
74393 | 
474 | 
0 | 
0 | 
| T144 | 
11843 | 
21 | 
0 | 
0 | 
| T152 | 
15923 | 
45 | 
0 | 
0 | 
| T153 | 
11918 | 
15 | 
0 | 
0 | 
| T154 | 
5351 | 
3 | 
0 | 
0 | 
mailbox_addr_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2214 | 
0 | 
0 | 
| T101 | 
36140 | 
30 | 
0 | 
0 | 
| T110 | 
9694 | 
23 | 
0 | 
0 | 
| T115 | 
9739 | 
9 | 
0 | 
0 | 
| T118 | 
76900 | 
525 | 
0 | 
0 | 
| T119 | 
11834 | 
13 | 
0 | 
0 | 
| T122 | 
74393 | 
523 | 
0 | 
0 | 
| T144 | 
11843 | 
30 | 
0 | 
0 | 
| T152 | 
15923 | 
17 | 
0 | 
0 | 
| T153 | 
11918 | 
7 | 
0 | 
0 | 
| T154 | 
5351 | 
5 | 
0 | 
0 | 
payload_swap_data_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2084 | 
0 | 
0 | 
| T101 | 
36140 | 
46 | 
0 | 
0 | 
| T110 | 
9694 | 
15 | 
0 | 
0 | 
| T115 | 
9739 | 
6 | 
0 | 
0 | 
| T118 | 
76900 | 
563 | 
0 | 
0 | 
| T119 | 
11834 | 
8 | 
0 | 
0 | 
| T122 | 
74393 | 
498 | 
0 | 
0 | 
| T144 | 
11843 | 
22 | 
0 | 
0 | 
| T152 | 
15923 | 
29 | 
0 | 
0 | 
| T153 | 
11918 | 
17 | 
0 | 
0 | 
| T154 | 
5351 | 
2 | 
0 | 
0 | 
payload_swap_mask_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2129 | 
0 | 
0 | 
| T101 | 
36140 | 
39 | 
0 | 
0 | 
| T110 | 
9694 | 
7 | 
0 | 
0 | 
| T115 | 
9739 | 
4 | 
0 | 
0 | 
| T118 | 
76900 | 
489 | 
0 | 
0 | 
| T119 | 
11834 | 
11 | 
0 | 
0 | 
| T122 | 
74393 | 
526 | 
0 | 
0 | 
| T144 | 
11843 | 
13 | 
0 | 
0 | 
| T152 | 
15923 | 
18 | 
0 | 
0 | 
| T153 | 
11918 | 
8 | 
0 | 
0 | 
| T154 | 
5351 | 
5 | 
0 | 
0 | 
read_threshold_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2056 | 
0 | 
0 | 
| T101 | 
36140 | 
33 | 
0 | 
0 | 
| T110 | 
9694 | 
17 | 
0 | 
0 | 
| T115 | 
9739 | 
12 | 
0 | 
0 | 
| T118 | 
76900 | 
563 | 
0 | 
0 | 
| T119 | 
11834 | 
12 | 
0 | 
0 | 
| T122 | 
74393 | 
500 | 
0 | 
0 | 
| T144 | 
11843 | 
39 | 
0 | 
0 | 
| T152 | 
15923 | 
13 | 
0 | 
0 | 
| T153 | 
11918 | 
24 | 
0 | 
0 | 
| T154 | 
5351 | 
7 | 
0 | 
0 | 
tpm_access_0_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
3031 | 
0 | 
0 | 
| T101 | 
36140 | 
93 | 
0 | 
0 | 
| T110 | 
9694 | 
15 | 
0 | 
0 | 
| T115 | 
9739 | 
3 | 
0 | 
0 | 
| T118 | 
76900 | 
537 | 
0 | 
0 | 
| T119 | 
11834 | 
37 | 
0 | 
0 | 
| T122 | 
74393 | 
499 | 
0 | 
0 | 
| T144 | 
11843 | 
18 | 
0 | 
0 | 
| T152 | 
15923 | 
34 | 
0 | 
0 | 
| T153 | 
11918 | 
23 | 
0 | 
0 | 
| T154 | 
5351 | 
16 | 
0 | 
0 | 
tpm_access_1_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2016 | 
0 | 
0 | 
| T101 | 
36140 | 
21 | 
0 | 
0 | 
| T110 | 
9694 | 
20 | 
0 | 
0 | 
| T115 | 
9739 | 
18 | 
0 | 
0 | 
| T118 | 
76900 | 
549 | 
0 | 
0 | 
| T119 | 
11834 | 
14 | 
0 | 
0 | 
| T122 | 
74393 | 
457 | 
0 | 
0 | 
| T144 | 
11843 | 
9 | 
0 | 
0 | 
| T152 | 
15923 | 
20 | 
0 | 
0 | 
| T153 | 
11918 | 
20 | 
0 | 
0 | 
| T154 | 
5351 | 
10 | 
0 | 
0 | 
tpm_cfg_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
3550 | 
0 | 
0 | 
| T101 | 
36140 | 
131 | 
0 | 
0 | 
| T110 | 
9694 | 
22 | 
0 | 
0 | 
| T115 | 
9739 | 
14 | 
0 | 
0 | 
| T118 | 
76900 | 
540 | 
0 | 
0 | 
| T119 | 
11834 | 
21 | 
0 | 
0 | 
| T122 | 
74393 | 
515 | 
0 | 
0 | 
| T144 | 
11843 | 
23 | 
0 | 
0 | 
| T152 | 
15923 | 
11 | 
0 | 
0 | 
| T153 | 
11918 | 
66 | 
0 | 
0 | 
| T154 | 
5351 | 
8 | 
0 | 
0 | 
tpm_did_vid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2403 | 
0 | 
0 | 
| T101 | 
36140 | 
63 | 
0 | 
0 | 
| T110 | 
9694 | 
25 | 
0 | 
0 | 
| T115 | 
9739 | 
15 | 
0 | 
0 | 
| T118 | 
76900 | 
464 | 
0 | 
0 | 
| T119 | 
11834 | 
14 | 
0 | 
0 | 
| T122 | 
74393 | 
449 | 
0 | 
0 | 
| T144 | 
11843 | 
24 | 
0 | 
0 | 
| T152 | 
15923 | 
30 | 
0 | 
0 | 
| T153 | 
11918 | 
18 | 
0 | 
0 | 
| T154 | 
5351 | 
16 | 
0 | 
0 | 
tpm_int_enable_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2078 | 
0 | 
0 | 
| T101 | 
36140 | 
36 | 
0 | 
0 | 
| T110 | 
9694 | 
5 | 
0 | 
0 | 
| T115 | 
9739 | 
9 | 
0 | 
0 | 
| T118 | 
76900 | 
529 | 
0 | 
0 | 
| T119 | 
11834 | 
17 | 
0 | 
0 | 
| T122 | 
74393 | 
513 | 
0 | 
0 | 
| T144 | 
11843 | 
11 | 
0 | 
0 | 
| T152 | 
15923 | 
28 | 
0 | 
0 | 
| T153 | 
11918 | 
14 | 
0 | 
0 | 
| T154 | 
5351 | 
8 | 
0 | 
0 | 
tpm_int_status_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2124 | 
0 | 
0 | 
| T101 | 
36140 | 
47 | 
0 | 
0 | 
| T110 | 
9694 | 
16 | 
0 | 
0 | 
| T115 | 
9739 | 
2 | 
0 | 
0 | 
| T118 | 
76900 | 
590 | 
0 | 
0 | 
| T119 | 
11834 | 
4 | 
0 | 
0 | 
| T122 | 
74393 | 
478 | 
0 | 
0 | 
| T144 | 
11843 | 
25 | 
0 | 
0 | 
| T152 | 
15923 | 
16 | 
0 | 
0 | 
| T153 | 
11918 | 
14 | 
0 | 
0 | 
| T154 | 
5351 | 
10 | 
0 | 
0 | 
tpm_int_vector_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2052 | 
0 | 
0 | 
| T101 | 
36140 | 
51 | 
0 | 
0 | 
| T105 | 
13834 | 
9 | 
0 | 
0 | 
| T110 | 
9694 | 
8 | 
0 | 
0 | 
| T115 | 
9739 | 
11 | 
0 | 
0 | 
| T118 | 
76900 | 
539 | 
0 | 
0 | 
| T119 | 
11834 | 
4 | 
0 | 
0 | 
| T122 | 
74393 | 
474 | 
0 | 
0 | 
| T144 | 
11843 | 
16 | 
0 | 
0 | 
| T152 | 
15923 | 
41 | 
0 | 
0 | 
| T153 | 
11918 | 
10 | 
0 | 
0 | 
tpm_intf_capability_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2201 | 
0 | 
0 | 
| T101 | 
36140 | 
65 | 
0 | 
0 | 
| T110 | 
9694 | 
5 | 
0 | 
0 | 
| T118 | 
76900 | 
533 | 
0 | 
0 | 
| T119 | 
11834 | 
7 | 
0 | 
0 | 
| T122 | 
74393 | 
568 | 
0 | 
0 | 
| T125 | 
5091 | 
9 | 
0 | 
0 | 
| T144 | 
11843 | 
22 | 
0 | 
0 | 
| T152 | 
15923 | 
25 | 
0 | 
0 | 
| T153 | 
11918 | 
15 | 
0 | 
0 | 
| T154 | 
5351 | 
5 | 
0 | 
0 | 
tpm_rid_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2174 | 
0 | 
0 | 
| T101 | 
36140 | 
42 | 
0 | 
0 | 
| T110 | 
9694 | 
11 | 
0 | 
0 | 
| T115 | 
9739 | 
9 | 
0 | 
0 | 
| T118 | 
76900 | 
562 | 
0 | 
0 | 
| T119 | 
11834 | 
14 | 
0 | 
0 | 
| T122 | 
74393 | 
476 | 
0 | 
0 | 
| T144 | 
11843 | 
46 | 
0 | 
0 | 
| T152 | 
15923 | 
25 | 
0 | 
0 | 
| T153 | 
11918 | 
6 | 
0 | 
0 | 
| T154 | 
5351 | 
4 | 
0 | 
0 | 
tpm_sts_rd_A
| Name | Attempts | Real Successes | Failures | Incomplete | 
| Total | 
453681869 | 
2262 | 
0 | 
0 | 
| T101 | 
36140 | 
38 | 
0 | 
0 | 
| T110 | 
9694 | 
10 | 
0 | 
0 | 
| T118 | 
76900 | 
593 | 
0 | 
0 | 
| T119 | 
11834 | 
3 | 
0 | 
0 | 
| T122 | 
74393 | 
504 | 
0 | 
0 | 
| T125 | 
5091 | 
5 | 
0 | 
0 | 
| T144 | 
11843 | 
38 | 
0 | 
0 | 
| T152 | 
15923 | 
35 | 
0 | 
0 | 
| T153 | 
11918 | 
15 | 
0 | 
0 | 
| T154 | 
5351 | 
1 | 
0 | 
0 |