Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	456412406	2785	0	0
addr_swap_data_rd_A	456412406	3069	0	0
addr_swap_mask_rd_A	456412406	3166	0	0
cfg_rd_A	456412406	3738	0	0
cmd_filter_0_rd_A	456412406	12214	0	0
cmd_filter_1_rd_A	456412406	12641	0	0
cmd_filter_2_rd_A	456412406	12285	0	0
cmd_filter_3_rd_A	456412406	12650	0	0
cmd_filter_4_rd_A	456412406	12540	0	0
cmd_filter_5_rd_A	456412406	11865	0	0
cmd_filter_6_rd_A	456412406	13204	0	0
cmd_filter_7_rd_A	456412406	12823	0	0
cmd_info_0_rd_A	456412406	7016	0	0
cmd_info_10_rd_A	456412406	6729	0	0
cmd_info_11_rd_A	456412406	6693	0	0
cmd_info_12_rd_A	456412406	7246	0	0
cmd_info_13_rd_A	456412406	6310	0	0
cmd_info_14_rd_A	456412406	6394	0	0
cmd_info_15_rd_A	456412406	7174	0	0
cmd_info_16_rd_A	456412406	6536	0	0
cmd_info_17_rd_A	456412406	6983	0	0
cmd_info_18_rd_A	456412406	6981	0	0
cmd_info_19_rd_A	456412406	7171	0	0
cmd_info_1_rd_A	456412406	6250	0	0
cmd_info_20_rd_A	456412406	6678	0	0
cmd_info_21_rd_A	456412406	6616	0	0
cmd_info_22_rd_A	456412406	6236	0	0
cmd_info_23_rd_A	456412406	7390	0	0
cmd_info_2_rd_A	456412406	7197	0	0
cmd_info_3_rd_A	456412406	7124	0	0
cmd_info_4_rd_A	456412406	6424	0	0
cmd_info_5_rd_A	456412406	6610	0	0
cmd_info_6_rd_A	456412406	6821	0	0
cmd_info_7_rd_A	456412406	7486	0	0
cmd_info_8_rd_A	456412406	6645	0	0
cmd_info_9_rd_A	456412406	6829	0	0
cmd_info_en4b_rd_A	456412406	3565	0	0
cmd_info_ex4b_rd_A	456412406	3277	0	0
cmd_info_wrdi_rd_A	456412406	3402	0	0
cmd_info_wren_rd_A	456412406	3365	0	0
intercept_en_rd_A	456412406	4015	0	0
intr_enable_rd_A	456412406	6056	0	0
jedec_cc_rd_A	456412406	3414	0	0
jedec_id_rd_A	456412406	3588	0	0
mailbox_addr_rd_A	456412406	3137	0	0
payload_swap_data_rd_A	456412406	3255	0	0
payload_swap_mask_rd_A	456412406	3171	0	0
read_threshold_rd_A	456412406	3009	0	0
tpm_access_0_rd_A	456412406	4176	0	0
tpm_access_1_rd_A	456412406	3265	0	0
tpm_cfg_rd_A	456412406	4274	0	0
tpm_did_vid_rd_A	456412406	3489	0	0
tpm_int_enable_rd_A	456412406	3024	0	0
tpm_int_status_rd_A	456412406	3079	0	0
tpm_int_vector_rd_A	456412406	3090	0	0
tpm_intf_capability_rd_A	456412406	3099	0	0
tpm_rid_rd_A	456412406	3187	0	0
tpm_sts_rd_A	456412406	3105	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	2785	0	0
T57	14364	123	0	0
T58	71065	2	0	0
T59	12116	7	0	0
T81	5194	9	0	0
T82	100884	4	0	0
T83	67061	3	0	0
T84	5729	38	0	0
T95	9605	3	0	0
T98	8344	3	0	0
T99	14904	9	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3069	0	0
T58	71065	56	0	0
T82	100884	73	0	0
T83	67061	81	0	0
T95	9605	3	0	0
T96	15993	19	0	0
T97	70557	43	0	0
T99	14904	29	0	0
T107	155504	245	0	0
T114	8634	2	0	0
T150	4394	9	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3166	0	0
T58	71065	61	0	0
T82	100884	125	0	0
T83	67061	72	0	0
T95	9605	6	0	0
T96	15993	21	0	0
T97	70557	60	0	0
T99	14904	25	0	0
T107	155504	283	0	0
T114	8634	15	0	0
T150	4394	4	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3738	0	0
T58	71065	125	0	0
T82	100884	284	0	0
T83	67061	167	0	0
T95	9605	11	0	0
T96	15993	34	0	0
T97	70557	100	0	0
T99	14904	23	0	0
T107	155504	253	0	0
T114	8634	7	0	0
T150	4394	14	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	12214	0	0
T58	71065	1442	0	0
T82	100884	1537	0	0
T83	67061	875	0	0
T95	9605	150	0	0
T96	15993	235	0	0
T97	70557	1082	0	0
T99	14904	286	0	0
T107	155504	302	0	0
T114	8634	7	0	0
T150	4394	144	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	12641	0	0
T58	71065	873	0	0
T82	100884	1814	0	0
T83	67061	1155	0	0
T95	9605	163	0	0
T96	15993	121	0	0
T97	70557	1672	0	0
T99	14904	158	0	0
T107	155504	316	0	0
T114	8634	222	0	0
T150	4394	4	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	12285	0	0
T58	71065	1170	0	0
T82	100884	1588	0	0
T83	67061	1195	0	0
T84	5729	2	0	0
T95	9605	3	0	0
T96	15993	156	0	0
T97	70557	1087	0	0
T99	14904	227	0	0
T107	155504	226	0	0
T150	4394	2	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	12650	0	0
T58	71065	1229	0	0
T82	100884	2196	0	0
T83	67061	890	0	0
T95	9605	105	0	0
T96	15993	130	0	0
T97	70557	920	0	0
T99	14904	231	0	0
T107	155504	312	0	0
T114	8634	186	0	0
T150	4394	126	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	12540	0	0
T58	71065	1514	0	0
T82	100884	2101	0	0
T83	67061	825	0	0
T95	9605	70	0	0
T96	15993	236	0	0
T97	70557	1451	0	0
T99	14904	309	0	0
T107	155504	316	0	0
T114	8634	214	0	0
T150	4394	8	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	11865	0	0
T58	71065	1411	0	0
T82	100884	1835	0	0
T83	67061	1098	0	0
T95	9605	8	0	0
T96	15993	17	0	0
T97	70557	876	0	0
T99	14904	129	0	0
T107	155504	268	0	0
T114	8634	135	0	0
T150	4394	1	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	13204	0	0
T58	71065	1074	0	0
T82	100884	2104	0	0
T83	67061	1502	0	0
T95	9605	79	0	0
T96	15993	259	0	0
T97	70557	1487	0	0
T99	14904	102	0	0
T107	155504	280	0	0
T114	8634	129	0	0
T150	4394	1	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	12823	0	0
T58	71065	1128	0	0
T82	100884	2270	0	0
T83	67061	1337	0	0
T95	9605	40	0	0
T96	15993	399	0	0
T97	70557	1111	0	0
T99	14904	246	0	0
T107	155504	268	0	0
T114	8634	112	0	0
T150	4394	109	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7016	0	0
T58	71065	611	0	0
T82	100884	660	0	0
T83	67061	464	0	0
T95	9605	64	0	0
T96	15993	121	0	0
T97	70557	547	0	0
T99	14904	111	0	0
T107	155504	294	0	0
T114	8634	40	0	0
T150	4394	38	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6729	0	0
T58	71065	455	0	0
T82	100884	727	0	0
T83	67061	677	0	0
T95	9605	34	0	0
T96	15993	91	0	0
T97	70557	508	0	0
T99	14904	49	0	0
T107	155504	325	0	0
T114	8634	4	0	0
T150	4394	54	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6693	0	0
T58	71065	468	0	0
T82	100884	922	0	0
T83	67061	534	0	0
T95	9605	42	0	0
T96	15993	154	0	0
T97	70557	467	0	0
T99	14904	65	0	0
T107	155504	238	0	0
T114	8634	3	0	0
T150	4394	53	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7246	0	0
T58	71065	476	0	0
T82	100884	788	0	0
T83	67061	757	0	0
T95	9605	38	0	0
T96	15993	73	0	0
T97	70557	713	0	0
T99	14904	116	0	0
T107	155504	285	0	0
T114	8634	38	0	0
T150	4394	51	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6310	0	0
T58	71065	603	0	0
T82	100884	776	0	0
T83	67061	443	0	0
T95	9605	8	0	0
T96	15993	82	0	0
T97	70557	417	0	0
T99	14904	14	0	0
T107	155504	267	0	0
T114	8634	40	0	0
T150	4394	51	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6394	0	0
T58	71065	360	0	0
T82	100884	714	0	0
T83	67061	345	0	0
T95	9605	75	0	0
T96	15993	101	0	0
T97	70557	625	0	0
T99	14904	59	0	0
T107	155504	249	0	0
T114	8634	47	0	0
T150	4394	4	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7174	0	0
T58	71065	462	0	0
T82	100884	1041	0	0
T83	67061	593	0	0
T95	9605	4	0	0
T96	15993	25	0	0
T97	70557	578	0	0
T99	14904	109	0	0
T107	155504	305	0	0
T114	8634	79	0	0
T150	4394	1	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6536	0	0
T58	71065	677	0	0
T82	100884	651	0	0
T83	67061	570	0	0
T95	9605	74	0	0
T96	15993	60	0	0
T97	70557	444	0	0
T99	14904	177	0	0
T107	155504	233	0	0
T114	8634	42	0	0
T150	4394	59	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6983	0	0
T58	71065	430	0	0
T82	100884	629	0	0
T83	67061	554	0	0
T95	9605	30	0	0
T96	15993	139	0	0
T97	70557	630	0	0
T99	14904	178	0	0
T107	155504	257	0	0
T114	8634	42	0	0
T150	4394	7	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6981	0	0
T58	71065	729	0	0
T82	100884	648	0	0
T83	67061	346	0	0
T95	9605	22	0	0
T96	15993	103	0	0
T97	70557	592	0	0
T99	14904	136	0	0
T107	155504	213	0	0
T114	8634	70	0	0
T150	4394	68	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7171	0	0
T58	71065	630	0	0
T82	100884	962	0	0
T83	67061	317	0	0
T95	9605	47	0	0
T96	15993	101	0	0
T97	70557	473	0	0
T99	14904	104	0	0
T107	155504	247	0	0
T114	8634	52	0	0
T150	4394	64	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6250	0	0
T58	71065	606	0	0
T82	100884	761	0	0
T83	67061	597	0	0
T95	9605	35	0	0
T96	15993	136	0	0
T97	70557	363	0	0
T99	14904	124	0	0
T107	155504	217	0	0
T114	8634	42	0	0
T150	4394	3	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6678	0	0
T58	71065	643	0	0
T82	100884	797	0	0
T83	67061	583	0	0
T95	9605	20	0	0
T96	15993	55	0	0
T97	70557	465	0	0
T99	14904	78	0	0
T107	155504	227	0	0
T114	8634	38	0	0
T150	4394	53	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6616	0	0
T58	71065	494	0	0
T82	100884	767	0	0
T83	67061	338	0	0
T95	9605	28	0	0
T96	15993	134	0	0
T97	70557	604	0	0
T99	14904	57	0	0
T107	155504	262	0	0
T114	8634	33	0	0
T150	4394	51	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6236	0	0
T58	71065	541	0	0
T82	100884	691	0	0
T83	67061	232	0	0
T89	17132	1	0	0
T95	9605	57	0	0
T96	15993	117	0	0
T97	70557	491	0	0
T99	14904	77	0	0
T107	155504	302	0	0
T150	4394	64	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7390	0	0
T58	71065	660	0	0
T82	100884	1095	0	0
T83	67061	466	0	0
T95	9605	61	0	0
T96	15993	121	0	0
T97	70557	691	0	0
T99	14904	186	0	0
T107	155504	257	0	0
T114	8634	85	0	0
T150	4394	9	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7197	0	0
T58	71065	454	0	0
T82	100884	974	0	0
T83	67061	449	0	0
T95	9605	27	0	0
T96	15993	71	0	0
T97	70557	603	0	0
T99	14904	138	0	0
T107	155504	333	0	0
T114	8634	101	0	0
T150	4394	2	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7124	0	0
T58	71065	576	0	0
T82	100884	954	0	0
T83	67061	475	0	0
T95	9605	6	0	0
T96	15993	106	0	0
T97	70557	532	0	0
T99	14904	59	0	0
T107	155504	262	0	0
T114	8634	49	0	0
T150	4394	52	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6424	0	0
T58	71065	449	0	0
T82	100884	662	0	0
T83	67061	431	0	0
T95	9605	31	0	0
T96	15993	159	0	0
T97	70557	489	0	0
T99	14904	69	0	0
T107	155504	276	0	0
T114	8634	57	0	0
T150	4394	49	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6610	0	0
T58	71065	644	0	0
T82	100884	655	0	0
T83	67061	617	0	0
T95	9605	36	0	0
T96	15993	108	0	0
T97	70557	503	0	0
T99	14904	123	0	0
T107	155504	212	0	0
T114	8634	71	0	0
T150	4394	51	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6821	0	0
T58	71065	534	0	0
T82	100884	1051	0	0
T83	67061	493	0	0
T95	9605	16	0	0
T96	15993	112	0	0
T97	70557	322	0	0
T99	14904	116	0	0
T107	155504	279	0	0
T114	8634	60	0	0
T150	4394	9	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	7486	0	0
T58	71065	675	0	0
T82	100884	945	0	0
T83	67061	397	0	0
T95	9605	11	0	0
T96	15993	67	0	0
T97	70557	451	0	0
T99	14904	106	0	0
T107	155504	242	0	0
T114	8634	86	0	0
T150	4394	4	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6645	0	0
T58	71065	403	0	0
T82	100884	1042	0	0
T83	67061	413	0	0
T95	9605	5	0	0
T96	15993	59	0	0
T97	70557	668	0	0
T99	14904	160	0	0
T107	155504	278	0	0
T114	8634	58	0	0
T150	4394	54	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6829	0	0
T58	71065	561	0	0
T82	100884	661	0	0
T83	67061	628	0	0
T95	9605	21	0	0
T96	15993	64	0	0
T97	70557	385	0	0
T99	14904	35	0	0
T107	155504	214	0	0
T114	8634	99	0	0
T150	4394	55	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3565	0	0
T58	71065	90	0	0
T82	100884	173	0	0
T83	67061	124	0	0
T95	9605	3	0	0
T96	15993	30	0	0
T97	70557	84	0	0
T99	14904	47	0	0
T107	155504	218	0	0
T114	8634	19	0	0
T150	4394	5	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3277	0	0
T58	71065	69	0	0
T82	100884	164	0	0
T83	67061	90	0	0
T95	9605	11	0	0
T96	15993	27	0	0
T97	70557	101	0	0
T99	14904	41	0	0
T107	155504	244	0	0
T114	8634	19	0	0
T150	4394	12	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3402	0	0
T58	71065	68	0	0
T82	100884	150	0	0
T83	67061	110	0	0
T95	9605	1	0	0
T96	15993	38	0	0
T97	70557	124	0	0
T99	14904	14	0	0
T107	155504	247	0	0
T114	8634	9	0	0
T151	35979	72	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3365	0	0
T58	71065	103	0	0
T82	100884	167	0	0
T83	67061	83	0	0
T95	9605	2	0	0
T96	15993	31	0	0
T97	70557	124	0	0
T99	14904	25	0	0
T107	155504	241	0	0
T114	8634	15	0	0
T150	4394	4	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	4015	0	0
T58	71065	166	0	0
T82	100884	340	0	0
T83	67061	218	0	0
T95	9605	3	0	0
T96	15993	53	0	0
T97	70557	195	0	0
T99	14904	38	0	0
T107	155504	225	0	0
T114	8634	11	0	0
T150	4394	1	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	6056	0	0
T16	200834	24	0	0
T21	0	6	0	0
T26	626602	0	0	0
T31	11665	0	0	0
T38	14955	0	0	0
T39	0	6	0	0
T76	67439	0	0	0
T78	705247	0	0	0
T86	56885	0	0	0
T100	47777	0	0	0
T130	0	29	0	0
T132	0	43	0	0
T146	977	0	0	0
T147	3284	0	0	0
T152	0	22	0	0
T153	0	17	0	0
T154	0	29	0	0
T155	0	12	0	0
T156	0	20	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3414	0	0
T58	71065	130	0	0
T82	100884	173	0	0
T83	67061	83	0	0
T95	9605	21	0	0
T96	15993	27	0	0
T97	70557	116	0	0
T99	14904	30	0	0
T107	155504	273	0	0
T114	8634	13	0	0
T150	4394	6	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3588	0	0
T58	71065	138	0	0
T82	100884	176	0	0
T83	67061	134	0	0
T95	9605	12	0	0
T96	15993	24	0	0
T97	70557	99	0	0
T99	14904	51	0	0
T107	155504	311	0	0
T114	8634	10	0	0
T150	4394	2	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3137	0	0
T58	71065	63	0	0
T82	100884	113	0	0
T83	67061	100	0	0
T95	9605	5	0	0
T96	15993	9	0	0
T97	70557	70	0	0
T99	14904	20	0	0
T107	155504	300	0	0
T114	8634	10	0	0
T150	4394	5	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3255	0	0
T58	71065	71	0	0
T82	100884	140	0	0
T83	67061	70	0	0
T84	5729	7	0	0
T95	9605	1	0	0
T96	15993	25	0	0
T97	70557	75	0	0
T99	14904	32	0	0
T107	155504	270	0	0
T150	4394	8	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3171	0	0
T58	71065	71	0	0
T82	100884	105	0	0
T83	67061	87	0	0
T89	17132	7	0	0
T95	9605	6	0	0
T96	15993	36	0	0
T97	70557	51	0	0
T99	14904	33	0	0
T107	155504	283	0	0
T150	4394	3	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3009	0	0
T58	71065	71	0	0
T82	100884	130	0	0
T83	67061	77	0	0
T95	9605	5	0	0
T96	15993	14	0	0
T97	70557	66	0	0
T99	14904	15	0	0
T107	155504	231	0	0
T114	8634	4	0	0
T150	4394	5	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	4176	0	0
T58	71065	131	0	0
T82	100884	249	0	0
T83	67061	241	0	0
T95	9605	10	0	0
T96	15993	55	0	0
T97	70557	258	0	0
T99	14904	26	0	0
T107	155504	250	0	0
T114	8634	14	0	0
T150	4394	13	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3265	0	0
T58	71065	75	0	0
T82	100884	123	0	0
T83	67061	80	0	0
T95	9605	5	0	0
T96	15993	17	0	0
T97	70557	88	0	0
T99	14904	26	0	0
T107	155504	287	0	0
T114	8634	11	0	0
T150	4394	2	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	4274	0	0
T58	71065	156	0	0
T82	100884	257	0	0
T83	67061	279	0	0
T95	9605	11	0	0
T96	15993	64	0	0
T97	70557	261	0	0
T99	14904	34	0	0
T107	155504	283	0	0
T114	8634	29	0	0
T151	35979	135	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3489	0	0
T58	71065	112	0	0
T82	100884	170	0	0
T83	67061	98	0	0
T95	9605	9	0	0
T96	15993	40	0	0
T97	70557	93	0	0
T99	14904	24	0	0
T107	155504	273	0	0
T114	8634	12	0	0
T151	35979	70	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3024	0	0
T58	71065	93	0	0
T82	100884	110	0	0
T83	67061	53	0	0
T95	9605	9	0	0
T96	15993	20	0	0
T97	70557	88	0	0
T99	14904	28	0	0
T107	155504	266	0	0
T114	8634	11	0	0
T150	4394	5	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3079	0	0
T58	71065	68	0	0
T82	100884	117	0	0
T83	67061	74	0	0
T95	9605	7	0	0
T96	15993	25	0	0
T97	70557	85	0	0
T99	14904	21	0	0
T107	155504	227	0	0
T114	8634	8	0	0
T150	4394	2	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3090	0	0
T58	71065	76	0	0
T82	100884	142	0	0
T83	67061	73	0	0
T95	9605	15	0	0
T96	15993	16	0	0
T97	70557	76	0	0
T99	14904	18	0	0
T107	155504	279	0	0
T114	8634	16	0	0
T150	4394	7	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3099	0	0
T58	71065	71	0	0
T82	100884	148	0	0
T83	67061	81	0	0
T95	9605	4	0	0
T96	15993	21	0	0
T97	70557	64	0	0
T99	14904	23	0	0
T107	155504	273	0	0
T114	8634	5	0	0
T150	4394	2	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3187	0	0
T58	71065	89	0	0
T82	100884	112	0	0
T83	67061	76	0	0
T89	17132	2	0	0
T95	9605	3	0	0
T96	15993	22	0	0
T97	70557	56	0	0
T99	14904	28	0	0
T107	155504	310	0	0
T150	4394	7	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	456412406	3105	0	0
T58	71065	49	0	0
T82	100884	138	0	0
T83	67061	72	0	0
T95	9605	2	0	0
T96	15993	8	0	0
T97	70557	55	0	0
T99	14904	24	0	0
T107	155504	209	0	0
T114	8634	5	0	0
T150	4394	9	0	0