Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3608 |
0 |
0 |
T48 |
2484 |
8 |
0 |
0 |
T49 |
5491 |
73 |
0 |
0 |
T50 |
29698 |
4 |
0 |
0 |
T85 |
12184 |
3 |
0 |
0 |
T86 |
8485 |
253 |
0 |
0 |
T87 |
71756 |
2 |
0 |
0 |
T88 |
27011 |
1 |
0 |
0 |
T89 |
12559 |
11 |
0 |
0 |
T90 |
5622 |
159 |
0 |
0 |
T95 |
20245 |
320 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1661 |
0 |
0 |
T71 |
3427 |
2 |
0 |
0 |
T85 |
12184 |
15 |
0 |
0 |
T87 |
71756 |
63 |
0 |
0 |
T105 |
72041 |
67 |
0 |
0 |
T108 |
6577 |
4 |
0 |
0 |
T112 |
11103 |
15 |
0 |
0 |
T115 |
103892 |
476 |
0 |
0 |
T138 |
13533 |
42 |
0 |
0 |
T139 |
30647 |
1 |
0 |
0 |
T140 |
7296 |
8 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1776 |
0 |
0 |
T71 |
3427 |
11 |
0 |
0 |
T85 |
12184 |
4 |
0 |
0 |
T87 |
71756 |
59 |
0 |
0 |
T105 |
72041 |
83 |
0 |
0 |
T108 |
6577 |
7 |
0 |
0 |
T112 |
11103 |
6 |
0 |
0 |
T115 |
103892 |
389 |
0 |
0 |
T138 |
13533 |
82 |
0 |
0 |
T139 |
30647 |
20 |
0 |
0 |
T140 |
7296 |
25 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
2099 |
0 |
0 |
T71 |
3427 |
2 |
0 |
0 |
T85 |
12184 |
43 |
0 |
0 |
T87 |
71756 |
142 |
0 |
0 |
T105 |
72041 |
131 |
0 |
0 |
T108 |
6577 |
37 |
0 |
0 |
T112 |
11103 |
22 |
0 |
0 |
T115 |
103892 |
444 |
0 |
0 |
T138 |
13533 |
61 |
0 |
0 |
T139 |
30647 |
42 |
0 |
0 |
T140 |
7296 |
14 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
7933 |
0 |
0 |
T71 |
3427 |
11 |
0 |
0 |
T85 |
12184 |
141 |
0 |
0 |
T87 |
71756 |
1108 |
0 |
0 |
T105 |
72041 |
1168 |
0 |
0 |
T108 |
6577 |
281 |
0 |
0 |
T112 |
11103 |
358 |
0 |
0 |
T115 |
103892 |
440 |
0 |
0 |
T138 |
13533 |
47 |
0 |
0 |
T139 |
30647 |
199 |
0 |
0 |
T140 |
7296 |
6 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
8771 |
0 |
0 |
T71 |
3427 |
8 |
0 |
0 |
T85 |
12184 |
168 |
0 |
0 |
T87 |
71756 |
1347 |
0 |
0 |
T99 |
13529 |
7 |
0 |
0 |
T105 |
72041 |
1335 |
0 |
0 |
T112 |
11103 |
245 |
0 |
0 |
T115 |
103892 |
518 |
0 |
0 |
T138 |
13533 |
33 |
0 |
0 |
T139 |
30647 |
479 |
0 |
0 |
T140 |
7296 |
7 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
7697 |
0 |
0 |
T71 |
3427 |
9 |
0 |
0 |
T85 |
12184 |
14 |
0 |
0 |
T87 |
71756 |
1563 |
0 |
0 |
T105 |
72041 |
1298 |
0 |
0 |
T108 |
6577 |
7 |
0 |
0 |
T112 |
11103 |
112 |
0 |
0 |
T115 |
103892 |
394 |
0 |
0 |
T138 |
13533 |
19 |
0 |
0 |
T139 |
30647 |
175 |
0 |
0 |
T140 |
7296 |
25 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
7273 |
0 |
0 |
T71 |
3427 |
1 |
0 |
0 |
T85 |
12184 |
241 |
0 |
0 |
T87 |
71756 |
902 |
0 |
0 |
T105 |
72041 |
1016 |
0 |
0 |
T108 |
6577 |
11 |
0 |
0 |
T112 |
11103 |
106 |
0 |
0 |
T115 |
103892 |
497 |
0 |
0 |
T138 |
13533 |
54 |
0 |
0 |
T139 |
30647 |
24 |
0 |
0 |
T140 |
7296 |
26 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
8493 |
0 |
0 |
T71 |
3427 |
2 |
0 |
0 |
T85 |
12184 |
261 |
0 |
0 |
T87 |
71756 |
1321 |
0 |
0 |
T105 |
72041 |
1258 |
0 |
0 |
T108 |
6577 |
135 |
0 |
0 |
T112 |
11103 |
107 |
0 |
0 |
T115 |
103892 |
499 |
0 |
0 |
T138 |
13533 |
26 |
0 |
0 |
T139 |
30647 |
325 |
0 |
0 |
T140 |
7296 |
8 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
8922 |
0 |
0 |
T71 |
3427 |
3 |
0 |
0 |
T85 |
12184 |
255 |
0 |
0 |
T87 |
71756 |
1389 |
0 |
0 |
T105 |
72041 |
1578 |
0 |
0 |
T108 |
6577 |
6 |
0 |
0 |
T112 |
11103 |
355 |
0 |
0 |
T115 |
103892 |
462 |
0 |
0 |
T138 |
13533 |
53 |
0 |
0 |
T139 |
30647 |
215 |
0 |
0 |
T140 |
7296 |
78 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
8283 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
155 |
0 |
0 |
T87 |
71756 |
1345 |
0 |
0 |
T105 |
72041 |
1342 |
0 |
0 |
T108 |
6577 |
116 |
0 |
0 |
T112 |
11103 |
16 |
0 |
0 |
T115 |
103892 |
402 |
0 |
0 |
T138 |
13533 |
34 |
0 |
0 |
T139 |
30647 |
580 |
0 |
0 |
T140 |
7296 |
15 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
7944 |
0 |
0 |
T85 |
12184 |
116 |
0 |
0 |
T87 |
71756 |
1632 |
0 |
0 |
T105 |
72041 |
1405 |
0 |
0 |
T108 |
6577 |
121 |
0 |
0 |
T112 |
11103 |
261 |
0 |
0 |
T115 |
103892 |
519 |
0 |
0 |
T138 |
13533 |
25 |
0 |
0 |
T139 |
30647 |
303 |
0 |
0 |
T140 |
7296 |
32 |
0 |
0 |
T141 |
11149 |
9 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4638 |
0 |
0 |
T71 |
3427 |
5 |
0 |
0 |
T85 |
12184 |
110 |
0 |
0 |
T87 |
71756 |
468 |
0 |
0 |
T105 |
72041 |
645 |
0 |
0 |
T108 |
6577 |
57 |
0 |
0 |
T112 |
11103 |
56 |
0 |
0 |
T115 |
103892 |
428 |
0 |
0 |
T138 |
13533 |
9 |
0 |
0 |
T139 |
30647 |
188 |
0 |
0 |
T140 |
7296 |
4 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4156 |
0 |
0 |
T85 |
12184 |
59 |
0 |
0 |
T87 |
71756 |
605 |
0 |
0 |
T105 |
72041 |
509 |
0 |
0 |
T108 |
6577 |
73 |
0 |
0 |
T112 |
11103 |
80 |
0 |
0 |
T115 |
103892 |
376 |
0 |
0 |
T138 |
13533 |
38 |
0 |
0 |
T139 |
30647 |
113 |
0 |
0 |
T140 |
7296 |
14 |
0 |
0 |
T141 |
11149 |
96 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4368 |
0 |
0 |
T71 |
3427 |
10 |
0 |
0 |
T85 |
12184 |
50 |
0 |
0 |
T87 |
71756 |
467 |
0 |
0 |
T105 |
72041 |
568 |
0 |
0 |
T108 |
6577 |
14 |
0 |
0 |
T112 |
11103 |
59 |
0 |
0 |
T115 |
103892 |
446 |
0 |
0 |
T138 |
13533 |
20 |
0 |
0 |
T139 |
30647 |
137 |
0 |
0 |
T140 |
7296 |
22 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4117 |
0 |
0 |
T71 |
3427 |
11 |
0 |
0 |
T85 |
12184 |
52 |
0 |
0 |
T87 |
71756 |
490 |
0 |
0 |
T105 |
72041 |
562 |
0 |
0 |
T108 |
6577 |
5 |
0 |
0 |
T112 |
11103 |
3 |
0 |
0 |
T115 |
103892 |
493 |
0 |
0 |
T138 |
13533 |
86 |
0 |
0 |
T139 |
30647 |
118 |
0 |
0 |
T140 |
7296 |
6 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3698 |
0 |
0 |
T71 |
3427 |
6 |
0 |
0 |
T85 |
12184 |
126 |
0 |
0 |
T87 |
71756 |
363 |
0 |
0 |
T105 |
72041 |
570 |
0 |
0 |
T108 |
6577 |
10 |
0 |
0 |
T112 |
11103 |
60 |
0 |
0 |
T115 |
103892 |
387 |
0 |
0 |
T138 |
13533 |
20 |
0 |
0 |
T139 |
30647 |
84 |
0 |
0 |
T140 |
7296 |
3 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4265 |
0 |
0 |
T71 |
3427 |
2 |
0 |
0 |
T85 |
12184 |
99 |
0 |
0 |
T87 |
71756 |
518 |
0 |
0 |
T105 |
72041 |
501 |
0 |
0 |
T108 |
6577 |
89 |
0 |
0 |
T112 |
11103 |
83 |
0 |
0 |
T115 |
103892 |
417 |
0 |
0 |
T138 |
13533 |
43 |
0 |
0 |
T139 |
30647 |
154 |
0 |
0 |
T140 |
7296 |
2 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4043 |
0 |
0 |
T71 |
3427 |
8 |
0 |
0 |
T85 |
12184 |
13 |
0 |
0 |
T87 |
71756 |
494 |
0 |
0 |
T105 |
72041 |
624 |
0 |
0 |
T108 |
6577 |
37 |
0 |
0 |
T112 |
11103 |
9 |
0 |
0 |
T115 |
103892 |
442 |
0 |
0 |
T138 |
13533 |
55 |
0 |
0 |
T139 |
30647 |
136 |
0 |
0 |
T140 |
7296 |
5 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4156 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
17 |
0 |
0 |
T87 |
71756 |
574 |
0 |
0 |
T105 |
72041 |
450 |
0 |
0 |
T108 |
6577 |
68 |
0 |
0 |
T112 |
11103 |
11 |
0 |
0 |
T115 |
103892 |
442 |
0 |
0 |
T138 |
13533 |
47 |
0 |
0 |
T139 |
30647 |
192 |
0 |
0 |
T140 |
7296 |
24 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4268 |
0 |
0 |
T71 |
3427 |
12 |
0 |
0 |
T85 |
12184 |
102 |
0 |
0 |
T87 |
71756 |
377 |
0 |
0 |
T105 |
72041 |
413 |
0 |
0 |
T108 |
6577 |
70 |
0 |
0 |
T112 |
11103 |
7 |
0 |
0 |
T115 |
103892 |
459 |
0 |
0 |
T138 |
13533 |
37 |
0 |
0 |
T139 |
30647 |
196 |
0 |
0 |
T140 |
7296 |
17 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3974 |
0 |
0 |
T71 |
3427 |
2 |
0 |
0 |
T85 |
12184 |
54 |
0 |
0 |
T87 |
71756 |
620 |
0 |
0 |
T105 |
72041 |
513 |
0 |
0 |
T108 |
6577 |
39 |
0 |
0 |
T112 |
11103 |
103 |
0 |
0 |
T115 |
103892 |
408 |
0 |
0 |
T138 |
13533 |
20 |
0 |
0 |
T139 |
30647 |
73 |
0 |
0 |
T140 |
7296 |
28 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4435 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
69 |
0 |
0 |
T87 |
71756 |
605 |
0 |
0 |
T105 |
72041 |
538 |
0 |
0 |
T108 |
6577 |
57 |
0 |
0 |
T112 |
11103 |
4 |
0 |
0 |
T115 |
103892 |
432 |
0 |
0 |
T138 |
13533 |
35 |
0 |
0 |
T139 |
30647 |
168 |
0 |
0 |
T140 |
7296 |
24 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3943 |
0 |
0 |
T71 |
3427 |
2 |
0 |
0 |
T85 |
12184 |
45 |
0 |
0 |
T87 |
71756 |
428 |
0 |
0 |
T105 |
72041 |
514 |
0 |
0 |
T108 |
6577 |
51 |
0 |
0 |
T112 |
11103 |
60 |
0 |
0 |
T115 |
103892 |
461 |
0 |
0 |
T138 |
13533 |
27 |
0 |
0 |
T139 |
30647 |
99 |
0 |
0 |
T140 |
7296 |
1 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4425 |
0 |
0 |
T71 |
3427 |
6 |
0 |
0 |
T85 |
12184 |
49 |
0 |
0 |
T87 |
71756 |
642 |
0 |
0 |
T105 |
72041 |
747 |
0 |
0 |
T108 |
6577 |
112 |
0 |
0 |
T112 |
11103 |
99 |
0 |
0 |
T115 |
103892 |
438 |
0 |
0 |
T138 |
13533 |
4 |
0 |
0 |
T139 |
30647 |
160 |
0 |
0 |
T140 |
7296 |
22 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4093 |
0 |
0 |
T85 |
12184 |
50 |
0 |
0 |
T87 |
71756 |
534 |
0 |
0 |
T105 |
72041 |
543 |
0 |
0 |
T108 |
6577 |
57 |
0 |
0 |
T112 |
11103 |
61 |
0 |
0 |
T115 |
103892 |
344 |
0 |
0 |
T138 |
13533 |
32 |
0 |
0 |
T139 |
30647 |
91 |
0 |
0 |
T140 |
7296 |
36 |
0 |
0 |
T141 |
11149 |
52 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4221 |
0 |
0 |
T71 |
3427 |
5 |
0 |
0 |
T85 |
12184 |
76 |
0 |
0 |
T87 |
71756 |
580 |
0 |
0 |
T105 |
72041 |
564 |
0 |
0 |
T108 |
6577 |
54 |
0 |
0 |
T112 |
11103 |
76 |
0 |
0 |
T115 |
103892 |
470 |
0 |
0 |
T138 |
13533 |
53 |
0 |
0 |
T139 |
30647 |
119 |
0 |
0 |
T140 |
7296 |
34 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3935 |
0 |
0 |
T71 |
3427 |
3 |
0 |
0 |
T85 |
12184 |
113 |
0 |
0 |
T87 |
71756 |
342 |
0 |
0 |
T105 |
72041 |
433 |
0 |
0 |
T108 |
6577 |
56 |
0 |
0 |
T112 |
11103 |
98 |
0 |
0 |
T115 |
103892 |
439 |
0 |
0 |
T138 |
13533 |
72 |
0 |
0 |
T139 |
30647 |
195 |
0 |
0 |
T141 |
11149 |
122 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4039 |
0 |
0 |
T71 |
3427 |
5 |
0 |
0 |
T85 |
12184 |
66 |
0 |
0 |
T87 |
71756 |
474 |
0 |
0 |
T105 |
72041 |
484 |
0 |
0 |
T108 |
6577 |
67 |
0 |
0 |
T112 |
11103 |
56 |
0 |
0 |
T115 |
103892 |
429 |
0 |
0 |
T138 |
13533 |
41 |
0 |
0 |
T139 |
30647 |
185 |
0 |
0 |
T140 |
7296 |
17 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4381 |
0 |
0 |
T71 |
3427 |
5 |
0 |
0 |
T85 |
12184 |
82 |
0 |
0 |
T87 |
71756 |
698 |
0 |
0 |
T105 |
72041 |
414 |
0 |
0 |
T108 |
6577 |
101 |
0 |
0 |
T112 |
11103 |
85 |
0 |
0 |
T115 |
103892 |
476 |
0 |
0 |
T138 |
13533 |
57 |
0 |
0 |
T139 |
30647 |
133 |
0 |
0 |
T140 |
7296 |
37 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4678 |
0 |
0 |
T71 |
3427 |
13 |
0 |
0 |
T85 |
12184 |
94 |
0 |
0 |
T87 |
71756 |
666 |
0 |
0 |
T105 |
72041 |
752 |
0 |
0 |
T108 |
6577 |
52 |
0 |
0 |
T112 |
11103 |
158 |
0 |
0 |
T115 |
103892 |
433 |
0 |
0 |
T138 |
13533 |
33 |
0 |
0 |
T139 |
30647 |
189 |
0 |
0 |
T140 |
7296 |
5 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3980 |
0 |
0 |
T71 |
3427 |
9 |
0 |
0 |
T85 |
12184 |
67 |
0 |
0 |
T87 |
71756 |
424 |
0 |
0 |
T105 |
72041 |
410 |
0 |
0 |
T108 |
6577 |
38 |
0 |
0 |
T112 |
11103 |
105 |
0 |
0 |
T115 |
103892 |
427 |
0 |
0 |
T138 |
13533 |
45 |
0 |
0 |
T139 |
30647 |
201 |
0 |
0 |
T140 |
7296 |
23 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4513 |
0 |
0 |
T71 |
3427 |
1 |
0 |
0 |
T85 |
12184 |
121 |
0 |
0 |
T87 |
71756 |
520 |
0 |
0 |
T105 |
72041 |
643 |
0 |
0 |
T108 |
6577 |
45 |
0 |
0 |
T112 |
11103 |
101 |
0 |
0 |
T115 |
103892 |
385 |
0 |
0 |
T138 |
13533 |
21 |
0 |
0 |
T139 |
30647 |
194 |
0 |
0 |
T140 |
7296 |
5 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3880 |
0 |
0 |
T85 |
12184 |
59 |
0 |
0 |
T87 |
71756 |
595 |
0 |
0 |
T105 |
72041 |
425 |
0 |
0 |
T108 |
6577 |
5 |
0 |
0 |
T112 |
11103 |
75 |
0 |
0 |
T115 |
103892 |
424 |
0 |
0 |
T138 |
13533 |
32 |
0 |
0 |
T139 |
30647 |
82 |
0 |
0 |
T140 |
7296 |
25 |
0 |
0 |
T141 |
11149 |
22 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4152 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
40 |
0 |
0 |
T87 |
71756 |
602 |
0 |
0 |
T105 |
72041 |
554 |
0 |
0 |
T108 |
6577 |
8 |
0 |
0 |
T112 |
11103 |
155 |
0 |
0 |
T115 |
103892 |
415 |
0 |
0 |
T138 |
13533 |
45 |
0 |
0 |
T139 |
30647 |
104 |
0 |
0 |
T140 |
7296 |
4 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
3727 |
0 |
0 |
T85 |
12184 |
35 |
0 |
0 |
T87 |
71756 |
285 |
0 |
0 |
T105 |
72041 |
452 |
0 |
0 |
T108 |
6577 |
5 |
0 |
0 |
T112 |
11103 |
90 |
0 |
0 |
T115 |
103892 |
437 |
0 |
0 |
T138 |
13533 |
30 |
0 |
0 |
T139 |
30647 |
167 |
0 |
0 |
T140 |
7296 |
7 |
0 |
0 |
T141 |
11149 |
49 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1898 |
0 |
0 |
T71 |
3427 |
15 |
0 |
0 |
T85 |
12184 |
18 |
0 |
0 |
T87 |
71756 |
113 |
0 |
0 |
T105 |
72041 |
162 |
0 |
0 |
T108 |
6577 |
15 |
0 |
0 |
T112 |
11103 |
22 |
0 |
0 |
T115 |
103892 |
459 |
0 |
0 |
T138 |
13533 |
27 |
0 |
0 |
T139 |
30647 |
18 |
0 |
0 |
T140 |
7296 |
18 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1919 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
24 |
0 |
0 |
T87 |
71756 |
127 |
0 |
0 |
T105 |
72041 |
114 |
0 |
0 |
T108 |
6577 |
16 |
0 |
0 |
T112 |
11103 |
5 |
0 |
0 |
T115 |
103892 |
477 |
0 |
0 |
T138 |
13533 |
7 |
0 |
0 |
T139 |
30647 |
29 |
0 |
0 |
T140 |
7296 |
11 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1918 |
0 |
0 |
T71 |
3427 |
10 |
0 |
0 |
T85 |
12184 |
10 |
0 |
0 |
T87 |
71756 |
111 |
0 |
0 |
T105 |
72041 |
97 |
0 |
0 |
T108 |
6577 |
4 |
0 |
0 |
T112 |
11103 |
10 |
0 |
0 |
T115 |
103892 |
397 |
0 |
0 |
T138 |
13533 |
27 |
0 |
0 |
T139 |
30647 |
32 |
0 |
0 |
T140 |
7296 |
14 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1885 |
0 |
0 |
T71 |
3427 |
5 |
0 |
0 |
T85 |
12184 |
25 |
0 |
0 |
T87 |
71756 |
113 |
0 |
0 |
T105 |
72041 |
118 |
0 |
0 |
T108 |
6577 |
14 |
0 |
0 |
T112 |
11103 |
11 |
0 |
0 |
T115 |
103892 |
412 |
0 |
0 |
T138 |
13533 |
48 |
0 |
0 |
T139 |
30647 |
42 |
0 |
0 |
T140 |
7296 |
42 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
2355 |
0 |
0 |
T71 |
3427 |
8 |
0 |
0 |
T85 |
12184 |
35 |
0 |
0 |
T87 |
71756 |
182 |
0 |
0 |
T105 |
72041 |
185 |
0 |
0 |
T108 |
6577 |
27 |
0 |
0 |
T112 |
11103 |
13 |
0 |
0 |
T115 |
103892 |
405 |
0 |
0 |
T138 |
13533 |
20 |
0 |
0 |
T139 |
30647 |
61 |
0 |
0 |
T140 |
7296 |
40 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
4057 |
0 |
0 |
T6 |
5157 |
44 |
0 |
0 |
T7 |
387849 |
0 |
0 |
0 |
T8 |
15785 |
0 |
0 |
0 |
T9 |
184322 |
0 |
0 |
0 |
T10 |
9171 |
0 |
0 |
0 |
T11 |
224332 |
0 |
0 |
0 |
T12 |
601515 |
0 |
0 |
0 |
T13 |
105334 |
0 |
0 |
0 |
T14 |
17443 |
0 |
0 |
0 |
T15 |
231413 |
0 |
0 |
0 |
T16 |
0 |
18 |
0 |
0 |
T19 |
0 |
49 |
0 |
0 |
T22 |
0 |
40 |
0 |
0 |
T26 |
0 |
45 |
0 |
0 |
T27 |
0 |
69 |
0 |
0 |
T142 |
0 |
19 |
0 |
0 |
T143 |
0 |
36 |
0 |
0 |
T144 |
0 |
79 |
0 |
0 |
T145 |
0 |
17 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1980 |
0 |
0 |
T71 |
3427 |
11 |
0 |
0 |
T85 |
12184 |
15 |
0 |
0 |
T87 |
71756 |
89 |
0 |
0 |
T105 |
72041 |
124 |
0 |
0 |
T108 |
6577 |
13 |
0 |
0 |
T112 |
11103 |
16 |
0 |
0 |
T115 |
103892 |
402 |
0 |
0 |
T138 |
13533 |
65 |
0 |
0 |
T139 |
30647 |
45 |
0 |
0 |
T140 |
7296 |
9 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1922 |
0 |
0 |
T71 |
3427 |
1 |
0 |
0 |
T85 |
12184 |
11 |
0 |
0 |
T87 |
71756 |
119 |
0 |
0 |
T105 |
72041 |
114 |
0 |
0 |
T108 |
6577 |
8 |
0 |
0 |
T112 |
11103 |
13 |
0 |
0 |
T115 |
103892 |
455 |
0 |
0 |
T138 |
13533 |
56 |
0 |
0 |
T139 |
30647 |
23 |
0 |
0 |
T140 |
7296 |
44 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1706 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
15 |
0 |
0 |
T87 |
71756 |
90 |
0 |
0 |
T105 |
72041 |
70 |
0 |
0 |
T108 |
6577 |
5 |
0 |
0 |
T112 |
11103 |
1 |
0 |
0 |
T115 |
103892 |
422 |
0 |
0 |
T138 |
13533 |
28 |
0 |
0 |
T139 |
30647 |
22 |
0 |
0 |
T140 |
7296 |
18 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1706 |
0 |
0 |
T71 |
3427 |
8 |
0 |
0 |
T85 |
12184 |
15 |
0 |
0 |
T87 |
71756 |
55 |
0 |
0 |
T105 |
72041 |
67 |
0 |
0 |
T108 |
6577 |
11 |
0 |
0 |
T112 |
11103 |
2 |
0 |
0 |
T115 |
103892 |
449 |
0 |
0 |
T138 |
13533 |
90 |
0 |
0 |
T139 |
30647 |
17 |
0 |
0 |
T140 |
7296 |
1 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1816 |
0 |
0 |
T71 |
3427 |
13 |
0 |
0 |
T85 |
12184 |
10 |
0 |
0 |
T87 |
71756 |
57 |
0 |
0 |
T105 |
72041 |
64 |
0 |
0 |
T108 |
6577 |
16 |
0 |
0 |
T112 |
11103 |
14 |
0 |
0 |
T115 |
103892 |
434 |
0 |
0 |
T138 |
13533 |
57 |
0 |
0 |
T139 |
30647 |
20 |
0 |
0 |
T140 |
7296 |
8 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1826 |
0 |
0 |
T71 |
3427 |
4 |
0 |
0 |
T85 |
12184 |
14 |
0 |
0 |
T87 |
71756 |
66 |
0 |
0 |
T105 |
72041 |
93 |
0 |
0 |
T108 |
6577 |
11 |
0 |
0 |
T112 |
11103 |
18 |
0 |
0 |
T115 |
103892 |
432 |
0 |
0 |
T138 |
13533 |
79 |
0 |
0 |
T139 |
30647 |
29 |
0 |
0 |
T140 |
7296 |
15 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
2460 |
0 |
0 |
T71 |
3427 |
5 |
0 |
0 |
T85 |
12184 |
49 |
0 |
0 |
T87 |
71756 |
184 |
0 |
0 |
T105 |
72041 |
200 |
0 |
0 |
T108 |
6577 |
5 |
0 |
0 |
T112 |
11103 |
10 |
0 |
0 |
T115 |
103892 |
436 |
0 |
0 |
T138 |
13533 |
41 |
0 |
0 |
T139 |
30647 |
48 |
0 |
0 |
T140 |
7296 |
17 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1836 |
0 |
0 |
T71 |
3427 |
9 |
0 |
0 |
T85 |
12184 |
11 |
0 |
0 |
T87 |
71756 |
99 |
0 |
0 |
T105 |
72041 |
55 |
0 |
0 |
T108 |
6577 |
6 |
0 |
0 |
T112 |
11103 |
14 |
0 |
0 |
T115 |
103892 |
497 |
0 |
0 |
T138 |
13533 |
52 |
0 |
0 |
T139 |
30647 |
20 |
0 |
0 |
T140 |
7296 |
48 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
2630 |
0 |
0 |
T71 |
3427 |
16 |
0 |
0 |
T85 |
12184 |
41 |
0 |
0 |
T87 |
71756 |
255 |
0 |
0 |
T105 |
72041 |
254 |
0 |
0 |
T108 |
6577 |
7 |
0 |
0 |
T112 |
11103 |
16 |
0 |
0 |
T115 |
103892 |
428 |
0 |
0 |
T138 |
13533 |
68 |
0 |
0 |
T139 |
30647 |
59 |
0 |
0 |
T140 |
7296 |
14 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1966 |
0 |
0 |
T71 |
3427 |
10 |
0 |
0 |
T85 |
12184 |
16 |
0 |
0 |
T87 |
71756 |
159 |
0 |
0 |
T105 |
72041 |
96 |
0 |
0 |
T108 |
6577 |
7 |
0 |
0 |
T112 |
11103 |
14 |
0 |
0 |
T115 |
103892 |
450 |
0 |
0 |
T138 |
13533 |
30 |
0 |
0 |
T139 |
30647 |
26 |
0 |
0 |
T140 |
7296 |
25 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1887 |
0 |
0 |
T71 |
3427 |
4 |
0 |
0 |
T85 |
12184 |
24 |
0 |
0 |
T87 |
71756 |
98 |
0 |
0 |
T105 |
72041 |
81 |
0 |
0 |
T108 |
6577 |
17 |
0 |
0 |
T112 |
11103 |
11 |
0 |
0 |
T115 |
103892 |
469 |
0 |
0 |
T138 |
13533 |
30 |
0 |
0 |
T139 |
30647 |
26 |
0 |
0 |
T140 |
7296 |
47 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1738 |
0 |
0 |
T71 |
3427 |
4 |
0 |
0 |
T85 |
12184 |
24 |
0 |
0 |
T87 |
71756 |
92 |
0 |
0 |
T105 |
72041 |
53 |
0 |
0 |
T108 |
6577 |
7 |
0 |
0 |
T112 |
11103 |
15 |
0 |
0 |
T115 |
103892 |
432 |
0 |
0 |
T138 |
13533 |
84 |
0 |
0 |
T139 |
30647 |
11 |
0 |
0 |
T140 |
7296 |
34 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1741 |
0 |
0 |
T85 |
12184 |
14 |
0 |
0 |
T87 |
71756 |
89 |
0 |
0 |
T105 |
72041 |
69 |
0 |
0 |
T108 |
6577 |
3 |
0 |
0 |
T112 |
11103 |
10 |
0 |
0 |
T115 |
103892 |
418 |
0 |
0 |
T138 |
13533 |
54 |
0 |
0 |
T139 |
30647 |
22 |
0 |
0 |
T140 |
7296 |
9 |
0 |
0 |
T141 |
11149 |
12 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1663 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
16 |
0 |
0 |
T87 |
71756 |
59 |
0 |
0 |
T105 |
72041 |
56 |
0 |
0 |
T112 |
11103 |
13 |
0 |
0 |
T115 |
103892 |
442 |
0 |
0 |
T138 |
13533 |
35 |
0 |
0 |
T139 |
30647 |
17 |
0 |
0 |
T140 |
7296 |
13 |
0 |
0 |
T141 |
11149 |
3 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1738 |
0 |
0 |
T71 |
3427 |
12 |
0 |
0 |
T85 |
12184 |
26 |
0 |
0 |
T87 |
71756 |
67 |
0 |
0 |
T105 |
72041 |
71 |
0 |
0 |
T108 |
6577 |
12 |
0 |
0 |
T112 |
11103 |
14 |
0 |
0 |
T115 |
103892 |
462 |
0 |
0 |
T138 |
13533 |
54 |
0 |
0 |
T139 |
30647 |
13 |
0 |
0 |
T140 |
7296 |
29 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
493555029 |
1860 |
0 |
0 |
T71 |
3427 |
7 |
0 |
0 |
T85 |
12184 |
17 |
0 |
0 |
T87 |
71756 |
68 |
0 |
0 |
T105 |
72041 |
79 |
0 |
0 |
T108 |
6577 |
4 |
0 |
0 |
T112 |
11103 |
12 |
0 |
0 |
T115 |
103892 |
457 |
0 |
0 |
T138 |
13533 |
62 |
0 |
0 |
T139 |
30647 |
16 |
0 |
0 |
T140 |
7296 |
48 |
0 |
0 |