| T809 |
/workspace/coverage/default/9.spi_device_flash_and_tpm.2825188436 |
|
|
Mar 19 02:16:17 PM PDT 24 |
Mar 19 02:19:11 PM PDT 24 |
25019688829 ps |
| T810 |
/workspace/coverage/default/43.spi_device_pass_addr_payload_swap.2085823975 |
|
|
Mar 19 02:20:51 PM PDT 24 |
Mar 19 02:20:58 PM PDT 24 |
3525045565 ps |
| T811 |
/workspace/coverage/default/25.spi_device_cfg_cmd.3937715235 |
|
|
Mar 19 02:18:39 PM PDT 24 |
Mar 19 02:18:42 PM PDT 24 |
125165313 ps |
| T812 |
/workspace/coverage/default/30.spi_device_flash_and_tpm.2476297466 |
|
|
Mar 19 02:19:22 PM PDT 24 |
Mar 19 02:19:49 PM PDT 24 |
16178772964 ps |
| T813 |
/workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.2901662982 |
|
|
Mar 19 02:19:41 PM PDT 24 |
Mar 19 02:20:38 PM PDT 24 |
7012349110 ps |
| T814 |
/workspace/coverage/default/29.spi_device_tpm_rw.2767888875 |
|
|
Mar 19 02:19:11 PM PDT 24 |
Mar 19 02:19:12 PM PDT 24 |
41300196 ps |
| T815 |
/workspace/coverage/default/40.spi_device_tpm_all.1272125866 |
|
|
Mar 19 02:20:38 PM PDT 24 |
Mar 19 02:21:11 PM PDT 24 |
3808530555 ps |
| T816 |
/workspace/coverage/default/32.spi_device_stress_all.446359273 |
|
|
Mar 19 02:19:48 PM PDT 24 |
Mar 19 02:19:49 PM PDT 24 |
157108345 ps |
| T817 |
/workspace/coverage/default/4.spi_device_mailbox.3903907383 |
|
|
Mar 19 02:14:50 PM PDT 24 |
Mar 19 02:14:56 PM PDT 24 |
518594341 ps |
| T818 |
/workspace/coverage/default/43.spi_device_flash_all.3072906723 |
|
|
Mar 19 02:21:01 PM PDT 24 |
Mar 19 02:23:30 PM PDT 24 |
27062368275 ps |
| T819 |
/workspace/coverage/default/41.spi_device_read_buffer_direct.1072625670 |
|
|
Mar 19 02:20:50 PM PDT 24 |
Mar 19 02:20:57 PM PDT 24 |
9067316704 ps |
| T820 |
/workspace/coverage/default/28.spi_device_flash_all.1121204351 |
|
|
Mar 19 02:19:10 PM PDT 24 |
Mar 19 02:21:45 PM PDT 24 |
34295061643 ps |
| T821 |
/workspace/coverage/default/45.spi_device_mailbox.2927636961 |
|
|
Mar 19 02:21:04 PM PDT 24 |
Mar 19 02:21:18 PM PDT 24 |
3602750277 ps |
| T822 |
/workspace/coverage/default/17.spi_device_flash_mode.1583628359 |
|
|
Mar 19 02:17:33 PM PDT 24 |
Mar 19 02:17:48 PM PDT 24 |
4032453282 ps |
| T823 |
/workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.1419675899 |
|
|
Mar 19 02:20:40 PM PDT 24 |
Mar 19 02:23:10 PM PDT 24 |
20919467660 ps |
| T824 |
/workspace/coverage/default/20.spi_device_pass_cmd_filtering.3885705978 |
|
|
Mar 19 02:17:55 PM PDT 24 |
Mar 19 02:18:12 PM PDT 24 |
10265896341 ps |
| T825 |
/workspace/coverage/default/6.spi_device_alert_test.3539176124 |
|
|
Mar 19 02:15:32 PM PDT 24 |
Mar 19 02:15:32 PM PDT 24 |
13175898 ps |
| T826 |
/workspace/coverage/default/24.spi_device_cfg_cmd.2984084460 |
|
|
Mar 19 02:18:29 PM PDT 24 |
Mar 19 02:18:35 PM PDT 24 |
1228992540 ps |
| T827 |
/workspace/coverage/default/41.spi_device_alert_test.3022191545 |
|
|
Mar 19 02:20:46 PM PDT 24 |
Mar 19 02:20:47 PM PDT 24 |
33471368 ps |
| T828 |
/workspace/coverage/default/32.spi_device_read_buffer_direct.46628728 |
|
|
Mar 19 02:19:46 PM PDT 24 |
Mar 19 02:19:50 PM PDT 24 |
467617295 ps |
| T829 |
/workspace/coverage/default/2.spi_device_stress_all.353984358 |
|
|
Mar 19 02:14:21 PM PDT 24 |
Mar 19 02:17:00 PM PDT 24 |
82804084127 ps |
| T830 |
/workspace/coverage/default/4.spi_device_pass_addr_payload_swap.270355496 |
|
|
Mar 19 02:14:50 PM PDT 24 |
Mar 19 02:15:26 PM PDT 24 |
11421353375 ps |
| T831 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.1944921846 |
|
|
Mar 19 02:21:20 PM PDT 24 |
Mar 19 02:21:21 PM PDT 24 |
78805798 ps |
| T832 |
/workspace/coverage/default/43.spi_device_alert_test.392487133 |
|
|
Mar 19 02:21:09 PM PDT 24 |
Mar 19 02:21:09 PM PDT 24 |
39094295 ps |
| T833 |
/workspace/coverage/default/41.spi_device_csb_read.914021207 |
|
|
Mar 19 02:20:34 PM PDT 24 |
Mar 19 02:20:35 PM PDT 24 |
46154755 ps |
| T77 |
/workspace/coverage/default/3.spi_device_sec_cm.3781715794 |
|
|
Mar 19 02:14:40 PM PDT 24 |
Mar 19 02:14:41 PM PDT 24 |
33264982 ps |
| T834 |
/workspace/coverage/default/49.spi_device_csb_read.658862176 |
|
|
Mar 19 02:21:34 PM PDT 24 |
Mar 19 02:21:35 PM PDT 24 |
14633885 ps |
| T835 |
/workspace/coverage/default/0.spi_device_pass_cmd_filtering.2041218494 |
|
|
Mar 19 02:13:23 PM PDT 24 |
Mar 19 02:13:34 PM PDT 24 |
2379304693 ps |
| T836 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.3004727609 |
|
|
Mar 19 02:18:20 PM PDT 24 |
Mar 19 02:18:36 PM PDT 24 |
4580166058 ps |
| T837 |
/workspace/coverage/default/4.spi_device_ram_cfg.2962782897 |
|
|
Mar 19 02:14:49 PM PDT 24 |
Mar 19 02:14:50 PM PDT 24 |
41243523 ps |
| T838 |
/workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.4241525894 |
|
|
Mar 19 02:15:21 PM PDT 24 |
Mar 19 02:16:32 PM PDT 24 |
4654967472 ps |
| T839 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.712229509 |
|
|
Mar 19 02:21:00 PM PDT 24 |
Mar 19 02:21:06 PM PDT 24 |
2497587760 ps |
| T840 |
/workspace/coverage/default/44.spi_device_tpm_all.358107767 |
|
|
Mar 19 02:21:01 PM PDT 24 |
Mar 19 02:21:17 PM PDT 24 |
8348470274 ps |
| T841 |
/workspace/coverage/default/37.spi_device_tpm_rw.3410290249 |
|
|
Mar 19 02:20:08 PM PDT 24 |
Mar 19 02:20:10 PM PDT 24 |
48458514 ps |
| T842 |
/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.2478765559 |
|
|
Mar 19 02:18:30 PM PDT 24 |
Mar 19 02:22:49 PM PDT 24 |
100579846369 ps |
| T843 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.963736823 |
|
|
Mar 19 02:15:20 PM PDT 24 |
Mar 19 02:15:46 PM PDT 24 |
9069851985 ps |
| T844 |
/workspace/coverage/default/46.spi_device_tpm_read_hw_reg.109054023 |
|
|
Mar 19 02:21:11 PM PDT 24 |
Mar 19 02:21:30 PM PDT 24 |
6039524932 ps |
| T845 |
/workspace/coverage/default/35.spi_device_csb_read.3522397378 |
|
|
Mar 19 02:19:56 PM PDT 24 |
Mar 19 02:19:57 PM PDT 24 |
263336738 ps |
| T846 |
/workspace/coverage/default/33.spi_device_cfg_cmd.414794962 |
|
|
Mar 19 02:19:42 PM PDT 24 |
Mar 19 02:19:48 PM PDT 24 |
1994520638 ps |
| T847 |
/workspace/coverage/default/41.spi_device_flash_all.3094015114 |
|
|
Mar 19 02:20:48 PM PDT 24 |
Mar 19 02:22:50 PM PDT 24 |
48683034539 ps |
| T848 |
/workspace/coverage/default/33.spi_device_tpm_sts_read.1754284021 |
|
|
Mar 19 02:19:32 PM PDT 24 |
Mar 19 02:19:33 PM PDT 24 |
131156526 ps |
| T849 |
/workspace/coverage/default/12.spi_device_csb_read.3116794095 |
|
|
Mar 19 02:16:34 PM PDT 24 |
Mar 19 02:16:35 PM PDT 24 |
32598238 ps |
| T850 |
/workspace/coverage/default/22.spi_device_mailbox.2490815710 |
|
|
Mar 19 02:18:21 PM PDT 24 |
Mar 19 02:18:34 PM PDT 24 |
3583144350 ps |
| T851 |
/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.122945383 |
|
|
Mar 19 02:20:23 PM PDT 24 |
Mar 19 02:20:27 PM PDT 24 |
428716832 ps |
| T852 |
/workspace/coverage/default/6.spi_device_flash_all.2215409489 |
|
|
Mar 19 02:15:20 PM PDT 24 |
Mar 19 02:16:44 PM PDT 24 |
60966317967 ps |
| T853 |
/workspace/coverage/default/29.spi_device_flash_mode.770307599 |
|
|
Mar 19 02:19:21 PM PDT 24 |
Mar 19 02:19:41 PM PDT 24 |
2091519940 ps |
| T159 |
/workspace/coverage/default/49.spi_device_stress_all.54510446 |
|
|
Mar 19 02:21:32 PM PDT 24 |
Mar 19 02:22:40 PM PDT 24 |
7346583667 ps |
| T854 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.556538854 |
|
|
Mar 19 02:19:54 PM PDT 24 |
Mar 19 02:19:55 PM PDT 24 |
159064432 ps |
| T268 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.1150949802 |
|
|
Mar 19 02:18:21 PM PDT 24 |
Mar 19 02:18:50 PM PDT 24 |
20175956932 ps |
| T855 |
/workspace/coverage/default/1.spi_device_mem_parity.149959900 |
|
|
Mar 19 02:13:47 PM PDT 24 |
Mar 19 02:13:48 PM PDT 24 |
128446116 ps |
| T856 |
/workspace/coverage/default/22.spi_device_tpm_all.4294642434 |
|
|
Mar 19 02:18:18 PM PDT 24 |
Mar 19 02:19:37 PM PDT 24 |
15412708342 ps |
| T857 |
/workspace/coverage/default/30.spi_device_pass_addr_payload_swap.2300307737 |
|
|
Mar 19 02:19:29 PM PDT 24 |
Mar 19 02:19:37 PM PDT 24 |
3317163980 ps |
| T858 |
/workspace/coverage/default/26.spi_device_flash_and_tpm.2124801258 |
|
|
Mar 19 02:18:47 PM PDT 24 |
Mar 19 02:19:46 PM PDT 24 |
12728841795 ps |
| T859 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.2320257770 |
|
|
Mar 19 02:18:07 PM PDT 24 |
Mar 19 02:18:15 PM PDT 24 |
546362467 ps |
| T860 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.769032458 |
|
|
Mar 19 02:14:02 PM PDT 24 |
Mar 19 02:14:11 PM PDT 24 |
1130812402 ps |
| T861 |
/workspace/coverage/default/43.spi_device_intercept.3500587898 |
|
|
Mar 19 02:20:48 PM PDT 24 |
Mar 19 02:21:02 PM PDT 24 |
3180766322 ps |
| T78 |
/workspace/coverage/default/4.spi_device_sec_cm.1313314815 |
|
|
Mar 19 02:14:59 PM PDT 24 |
Mar 19 02:15:01 PM PDT 24 |
291960913 ps |
| T862 |
/workspace/coverage/default/40.spi_device_pass_cmd_filtering.1049009013 |
|
|
Mar 19 02:20:35 PM PDT 24 |
Mar 19 02:21:07 PM PDT 24 |
18134519793 ps |
| T863 |
/workspace/coverage/default/31.spi_device_csb_read.951129702 |
|
|
Mar 19 02:19:21 PM PDT 24 |
Mar 19 02:19:22 PM PDT 24 |
68928282 ps |
| T864 |
/workspace/coverage/default/0.spi_device_tpm_all.179233100 |
|
|
Mar 19 02:13:25 PM PDT 24 |
Mar 19 02:14:27 PM PDT 24 |
19033404916 ps |
| T865 |
/workspace/coverage/default/31.spi_device_flash_mode.285008761 |
|
|
Mar 19 02:19:32 PM PDT 24 |
Mar 19 02:19:52 PM PDT 24 |
14955917457 ps |
| T866 |
/workspace/coverage/default/3.spi_device_pass_cmd_filtering.2032542566 |
|
|
Mar 19 02:14:30 PM PDT 24 |
Mar 19 02:14:50 PM PDT 24 |
7950643171 ps |
| T867 |
/workspace/coverage/default/31.spi_device_flash_all.3654068826 |
|
|
Mar 19 02:19:32 PM PDT 24 |
Mar 19 02:19:59 PM PDT 24 |
1653703913 ps |
| T868 |
/workspace/coverage/default/32.spi_device_flash_mode.3599040989 |
|
|
Mar 19 02:19:41 PM PDT 24 |
Mar 19 02:19:52 PM PDT 24 |
1689766592 ps |
| T869 |
/workspace/coverage/default/0.spi_device_upload.4271840521 |
|
|
Mar 19 02:13:34 PM PDT 24 |
Mar 19 02:13:45 PM PDT 24 |
3276416200 ps |
| T870 |
/workspace/coverage/default/4.spi_device_cfg_cmd.1451410808 |
|
|
Mar 19 02:14:50 PM PDT 24 |
Mar 19 02:15:00 PM PDT 24 |
2794544630 ps |
| T871 |
/workspace/coverage/default/8.spi_device_upload.530220613 |
|
|
Mar 19 02:15:51 PM PDT 24 |
Mar 19 02:15:54 PM PDT 24 |
105339454 ps |
| T872 |
/workspace/coverage/default/7.spi_device_csb_read.7270408 |
|
|
Mar 19 02:15:31 PM PDT 24 |
Mar 19 02:15:32 PM PDT 24 |
45082148 ps |
| T873 |
/workspace/coverage/default/2.spi_device_csb_read.2182360509 |
|
|
Mar 19 02:14:12 PM PDT 24 |
Mar 19 02:14:12 PM PDT 24 |
27566437 ps |
| T874 |
/workspace/coverage/default/19.spi_device_cfg_cmd.249160755 |
|
|
Mar 19 02:18:01 PM PDT 24 |
Mar 19 02:18:04 PM PDT 24 |
693435462 ps |
| T875 |
/workspace/coverage/default/3.spi_device_flash_all.868728859 |
|
|
Mar 19 02:14:29 PM PDT 24 |
Mar 19 02:16:06 PM PDT 24 |
10186524905 ps |
| T876 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.1473665966 |
|
|
Mar 19 02:17:34 PM PDT 24 |
Mar 19 02:17:38 PM PDT 24 |
520859698 ps |
| T877 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.1481256113 |
|
|
Mar 19 02:21:35 PM PDT 24 |
Mar 19 02:21:49 PM PDT 24 |
2083411835 ps |
| T878 |
/workspace/coverage/default/17.spi_device_tpm_rw.2387760702 |
|
|
Mar 19 02:17:32 PM PDT 24 |
Mar 19 02:17:34 PM PDT 24 |
113214720 ps |
| T879 |
/workspace/coverage/default/5.spi_device_alert_test.3056313801 |
|
|
Mar 19 02:15:10 PM PDT 24 |
Mar 19 02:15:11 PM PDT 24 |
36758452 ps |
| T880 |
/workspace/coverage/default/10.spi_device_alert_test.1680514252 |
|
|
Mar 19 02:16:26 PM PDT 24 |
Mar 19 02:16:27 PM PDT 24 |
39285023 ps |
| T881 |
/workspace/coverage/default/26.spi_device_alert_test.4124365494 |
|
|
Mar 19 02:18:51 PM PDT 24 |
Mar 19 02:18:52 PM PDT 24 |
16670136 ps |
| T882 |
/workspace/coverage/default/29.spi_device_mailbox.1425545665 |
|
|
Mar 19 02:19:11 PM PDT 24 |
Mar 19 02:19:17 PM PDT 24 |
5939760621 ps |
| T883 |
/workspace/coverage/default/20.spi_device_flash_mode.51577785 |
|
|
Mar 19 02:17:55 PM PDT 24 |
Mar 19 02:18:36 PM PDT 24 |
5821189471 ps |
| T884 |
/workspace/coverage/default/44.spi_device_read_buffer_direct.2348623295 |
|
|
Mar 19 02:21:02 PM PDT 24 |
Mar 19 02:21:07 PM PDT 24 |
722313876 ps |
| T885 |
/workspace/coverage/default/42.spi_device_tpm_rw.2935687765 |
|
|
Mar 19 02:20:51 PM PDT 24 |
Mar 19 02:20:56 PM PDT 24 |
421120800 ps |
| T886 |
/workspace/coverage/default/8.spi_device_flash_mode.475770957 |
|
|
Mar 19 02:15:52 PM PDT 24 |
Mar 19 02:16:01 PM PDT 24 |
2046344582 ps |
| T887 |
/workspace/coverage/default/17.spi_device_tpm_read_hw_reg.1378087937 |
|
|
Mar 19 02:17:22 PM PDT 24 |
Mar 19 02:17:25 PM PDT 24 |
446352982 ps |
| T888 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.858339243 |
|
|
Mar 19 02:21:12 PM PDT 24 |
Mar 19 02:21:27 PM PDT 24 |
4130120403 ps |
| T889 |
/workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.2272626186 |
|
|
Mar 19 02:15:11 PM PDT 24 |
Mar 19 02:16:08 PM PDT 24 |
2507254668 ps |
| T890 |
/workspace/coverage/default/36.spi_device_flash_mode.2999589203 |
|
|
Mar 19 02:20:05 PM PDT 24 |
Mar 19 02:20:25 PM PDT 24 |
10440848634 ps |
| T891 |
/workspace/coverage/default/44.spi_device_intercept.3105481994 |
|
|
Mar 19 02:21:01 PM PDT 24 |
Mar 19 02:21:09 PM PDT 24 |
1918495657 ps |
| T892 |
/workspace/coverage/default/18.spi_device_ram_cfg.1514600163 |
|
|
Mar 19 02:17:34 PM PDT 24 |
Mar 19 02:17:35 PM PDT 24 |
34749937 ps |
| T893 |
/workspace/coverage/default/13.spi_device_mem_parity.393162730 |
|
|
Mar 19 02:16:54 PM PDT 24 |
Mar 19 02:16:56 PM PDT 24 |
25571056 ps |
| T894 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.1054563702 |
|
|
Mar 19 02:21:00 PM PDT 24 |
Mar 19 02:21:12 PM PDT 24 |
4082922802 ps |
| T895 |
/workspace/coverage/default/33.spi_device_flash_all.1708171000 |
|
|
Mar 19 02:19:47 PM PDT 24 |
Mar 19 02:21:20 PM PDT 24 |
50263951410 ps |
| T896 |
/workspace/coverage/default/49.spi_device_intercept.4149796647 |
|
|
Mar 19 02:21:33 PM PDT 24 |
Mar 19 02:21:44 PM PDT 24 |
3084482862 ps |
| T897 |
/workspace/coverage/default/30.spi_device_stress_all.259674843 |
|
|
Mar 19 02:19:21 PM PDT 24 |
Mar 19 02:25:45 PM PDT 24 |
205001168373 ps |
| T898 |
/workspace/coverage/default/47.spi_device_mailbox.1597551819 |
|
|
Mar 19 02:21:20 PM PDT 24 |
Mar 19 02:21:26 PM PDT 24 |
1127491595 ps |
| T899 |
/workspace/coverage/default/11.spi_device_upload.2647532288 |
|
|
Mar 19 02:16:26 PM PDT 24 |
Mar 19 02:16:37 PM PDT 24 |
15868297841 ps |
| T900 |
/workspace/coverage/default/49.spi_device_read_buffer_direct.4027469318 |
|
|
Mar 19 02:21:31 PM PDT 24 |
Mar 19 02:21:40 PM PDT 24 |
8476112301 ps |
| T264 |
/workspace/coverage/default/37.spi_device_stress_all.3379666239 |
|
|
Mar 19 02:20:22 PM PDT 24 |
Mar 19 02:24:50 PM PDT 24 |
27010443581 ps |
| T901 |
/workspace/coverage/default/32.spi_device_csb_read.2256640661 |
|
|
Mar 19 02:19:48 PM PDT 24 |
Mar 19 02:19:49 PM PDT 24 |
42200436 ps |
| T902 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.3088422966 |
|
|
Mar 19 02:20:05 PM PDT 24 |
Mar 19 02:20:06 PM PDT 24 |
39176822 ps |
| T903 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.3101380181 |
|
|
Mar 19 02:16:17 PM PDT 24 |
Mar 19 02:16:23 PM PDT 24 |
920713394 ps |
| T904 |
/workspace/coverage/default/27.spi_device_pass_cmd_filtering.2568818780 |
|
|
Mar 19 02:18:50 PM PDT 24 |
Mar 19 02:18:53 PM PDT 24 |
275623168 ps |
| T905 |
/workspace/coverage/default/44.spi_device_stress_all.3921833959 |
|
|
Mar 19 02:21:03 PM PDT 24 |
Mar 19 02:23:38 PM PDT 24 |
24261462377 ps |
| T906 |
/workspace/coverage/default/33.spi_device_csb_read.1916756826 |
|
|
Mar 19 02:19:46 PM PDT 24 |
Mar 19 02:19:47 PM PDT 24 |
73157088 ps |
| T907 |
/workspace/coverage/default/47.spi_device_stress_all.2795335337 |
|
|
Mar 19 02:21:20 PM PDT 24 |
Mar 19 02:26:54 PM PDT 24 |
199352431390 ps |
| T908 |
/workspace/coverage/default/19.spi_device_pass_addr_payload_swap.4150834021 |
|
|
Mar 19 02:17:46 PM PDT 24 |
Mar 19 02:17:52 PM PDT 24 |
2950306309 ps |
| T909 |
/workspace/coverage/default/42.spi_device_flash_mode.2615334665 |
|
|
Mar 19 02:20:47 PM PDT 24 |
Mar 19 02:21:49 PM PDT 24 |
22562014014 ps |
| T910 |
/workspace/coverage/default/36.spi_device_pass_addr_payload_swap.881853731 |
|
|
Mar 19 02:20:08 PM PDT 24 |
Mar 19 02:20:12 PM PDT 24 |
972111164 ps |
| T911 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.3389912148 |
|
|
Mar 19 02:19:24 PM PDT 24 |
Mar 19 02:19:26 PM PDT 24 |
372928277 ps |
| T912 |
/workspace/coverage/default/45.spi_device_flash_all.3839382919 |
|
|
Mar 19 02:21:11 PM PDT 24 |
Mar 19 02:21:50 PM PDT 24 |
62351386656 ps |
| T913 |
/workspace/coverage/default/45.spi_device_tpm_sts_read.193971784 |
|
|
Mar 19 02:21:01 PM PDT 24 |
Mar 19 02:21:02 PM PDT 24 |
33006063 ps |
| T914 |
/workspace/coverage/default/9.spi_device_tpm_all.1795517001 |
|
|
Mar 19 02:16:06 PM PDT 24 |
Mar 19 02:16:16 PM PDT 24 |
857307848 ps |
| T915 |
/workspace/coverage/default/48.spi_device_tpm_rw.2923123870 |
|
|
Mar 19 02:21:20 PM PDT 24 |
Mar 19 02:21:28 PM PDT 24 |
127976088 ps |
| T916 |
/workspace/coverage/default/12.spi_device_intercept.3693200216 |
|
|
Mar 19 02:16:39 PM PDT 24 |
Mar 19 02:16:43 PM PDT 24 |
206015313 ps |
| T917 |
/workspace/coverage/default/45.spi_device_flash_and_tpm.10981368 |
|
|
Mar 19 02:21:10 PM PDT 24 |
Mar 19 02:24:23 PM PDT 24 |
133019264551 ps |
| T918 |
/workspace/coverage/default/46.spi_device_mailbox.3993673907 |
|
|
Mar 19 02:21:09 PM PDT 24 |
Mar 19 02:21:22 PM PDT 24 |
10395115655 ps |
| T919 |
/workspace/coverage/default/5.spi_device_mailbox.1023145454 |
|
|
Mar 19 02:15:10 PM PDT 24 |
Mar 19 02:15:16 PM PDT 24 |
1157333394 ps |
| T920 |
/workspace/coverage/default/36.spi_device_tpm_all.2844529295 |
|
|
Mar 19 02:20:03 PM PDT 24 |
Mar 19 02:21:16 PM PDT 24 |
27049162798 ps |
| T921 |
/workspace/coverage/default/49.spi_device_alert_test.736084377 |
|
|
Mar 19 02:21:32 PM PDT 24 |
Mar 19 02:21:33 PM PDT 24 |
13938480 ps |
| T922 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.981216489 |
|
|
Mar 19 02:13:24 PM PDT 24 |
Mar 19 02:13:27 PM PDT 24 |
724597963 ps |
| T923 |
/workspace/coverage/default/2.spi_device_cfg_cmd.932277435 |
|
|
Mar 19 02:14:20 PM PDT 24 |
Mar 19 02:14:22 PM PDT 24 |
82840559 ps |
| T924 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.3610207072 |
|
|
Mar 19 02:17:41 PM PDT 24 |
Mar 19 02:17:51 PM PDT 24 |
5964047852 ps |
| T925 |
/workspace/coverage/default/3.spi_device_intercept.2442619433 |
|
|
Mar 19 02:14:31 PM PDT 24 |
Mar 19 02:14:38 PM PDT 24 |
1972705141 ps |
| T926 |
/workspace/coverage/default/0.spi_device_cfg_cmd.860105292 |
|
|
Mar 19 02:13:36 PM PDT 24 |
Mar 19 02:13:39 PM PDT 24 |
274724054 ps |
| T927 |
/workspace/coverage/default/15.spi_device_ram_cfg.158751792 |
|
|
Mar 19 02:17:02 PM PDT 24 |
Mar 19 02:17:03 PM PDT 24 |
18036174 ps |
| T928 |
/workspace/coverage/default/26.spi_device_intercept.681294089 |
|
|
Mar 19 02:18:47 PM PDT 24 |
Mar 19 02:18:53 PM PDT 24 |
1416976269 ps |
| T929 |
/workspace/coverage/default/3.spi_device_ram_cfg.2558542679 |
|
|
Mar 19 02:14:19 PM PDT 24 |
Mar 19 02:14:20 PM PDT 24 |
18454820 ps |
| T930 |
/workspace/coverage/default/37.spi_device_csb_read.2986470488 |
|
|
Mar 19 02:20:07 PM PDT 24 |
Mar 19 02:20:08 PM PDT 24 |
15900707 ps |
| T931 |
/workspace/coverage/default/23.spi_device_intercept.2136684711 |
|
|
Mar 19 02:18:17 PM PDT 24 |
Mar 19 02:18:23 PM PDT 24 |
1119132723 ps |
| T932 |
/workspace/coverage/default/7.spi_device_alert_test.3289272991 |
|
|
Mar 19 02:15:45 PM PDT 24 |
Mar 19 02:15:46 PM PDT 24 |
14554564 ps |
| T933 |
/workspace/coverage/default/31.spi_device_tpm_all.2138862927 |
|
|
Mar 19 02:19:25 PM PDT 24 |
Mar 19 02:19:30 PM PDT 24 |
794456450 ps |
| T934 |
/workspace/coverage/default/3.spi_device_upload.3971728566 |
|
|
Mar 19 02:14:31 PM PDT 24 |
Mar 19 02:14:36 PM PDT 24 |
353902920 ps |
| T935 |
/workspace/coverage/default/47.spi_device_tpm_rw.3393918386 |
|
|
Mar 19 02:21:19 PM PDT 24 |
Mar 19 02:21:21 PM PDT 24 |
90645515 ps |
| T936 |
/workspace/coverage/default/37.spi_device_alert_test.1371516171 |
|
|
Mar 19 02:20:23 PM PDT 24 |
Mar 19 02:20:23 PM PDT 24 |
15677392 ps |
| T937 |
/workspace/coverage/default/32.spi_device_intercept.371077991 |
|
|
Mar 19 02:19:33 PM PDT 24 |
Mar 19 02:19:37 PM PDT 24 |
1323567186 ps |
| T938 |
/workspace/coverage/default/31.spi_device_intercept.2020815801 |
|
|
Mar 19 02:19:21 PM PDT 24 |
Mar 19 02:19:24 PM PDT 24 |
71534747 ps |
| T939 |
/workspace/coverage/default/6.spi_device_stress_all.432467385 |
|
|
Mar 19 02:15:32 PM PDT 24 |
Mar 19 02:17:52 PM PDT 24 |
30702160355 ps |
| T940 |
/workspace/coverage/default/31.spi_device_flash_and_tpm.275185680 |
|
|
Mar 19 02:19:47 PM PDT 24 |
Mar 19 02:20:43 PM PDT 24 |
5125735724 ps |
| T941 |
/workspace/coverage/default/42.spi_device_tpm_sts_read.2763973622 |
|
|
Mar 19 02:20:48 PM PDT 24 |
Mar 19 02:20:50 PM PDT 24 |
310361756 ps |
| T267 |
/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.4257589615 |
|
|
Mar 19 02:16:08 PM PDT 24 |
Mar 19 02:23:39 PM PDT 24 |
1101247998499 ps |
| T942 |
/workspace/coverage/default/46.spi_device_csb_read.4029165235 |
|
|
Mar 19 02:21:13 PM PDT 24 |
Mar 19 02:21:14 PM PDT 24 |
57650110 ps |
| T943 |
/workspace/coverage/default/1.spi_device_tpm_rw.3787045117 |
|
|
Mar 19 02:13:49 PM PDT 24 |
Mar 19 02:13:50 PM PDT 24 |
71037320 ps |
| T944 |
/workspace/coverage/default/4.spi_device_flash_and_tpm.346043520 |
|
|
Mar 19 02:14:59 PM PDT 24 |
Mar 19 02:15:33 PM PDT 24 |
6675443933 ps |
| T945 |
/workspace/coverage/default/14.spi_device_cfg_cmd.3810432717 |
|
|
Mar 19 02:17:05 PM PDT 24 |
Mar 19 02:17:09 PM PDT 24 |
824406393 ps |
| T946 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.138922489 |
|
|
Mar 19 02:21:18 PM PDT 24 |
Mar 19 02:21:25 PM PDT 24 |
914220089 ps |
| T947 |
/workspace/coverage/default/5.spi_device_flash_all.401093881 |
|
|
Mar 19 02:15:11 PM PDT 24 |
Mar 19 02:16:20 PM PDT 24 |
8906281858 ps |
| T948 |
/workspace/coverage/default/39.spi_device_intercept.920801361 |
|
|
Mar 19 02:20:38 PM PDT 24 |
Mar 19 02:20:46 PM PDT 24 |
3324634369 ps |
| T949 |
/workspace/coverage/default/25.spi_device_tpm_all.981390345 |
|
|
Mar 19 02:18:38 PM PDT 24 |
Mar 19 02:19:16 PM PDT 24 |
4795355120 ps |
| T950 |
/workspace/coverage/default/32.spi_device_tpm_all.2156189346 |
|
|
Mar 19 02:19:32 PM PDT 24 |
Mar 19 02:20:12 PM PDT 24 |
2651353714 ps |
| T951 |
/workspace/coverage/default/34.spi_device_cfg_cmd.2213303097 |
|
|
Mar 19 02:19:56 PM PDT 24 |
Mar 19 02:19:59 PM PDT 24 |
1607323370 ps |
| T952 |
/workspace/coverage/default/26.spi_device_csb_read.3726250731 |
|
|
Mar 19 02:18:37 PM PDT 24 |
Mar 19 02:18:38 PM PDT 24 |
19727910 ps |
| T953 |
/workspace/coverage/default/11.spi_device_intercept.1765199119 |
|
|
Mar 19 02:16:29 PM PDT 24 |
Mar 19 02:16:32 PM PDT 24 |
252485959 ps |
| T79 |
/workspace/coverage/default/2.spi_device_sec_cm.3665653881 |
|
|
Mar 19 02:14:19 PM PDT 24 |
Mar 19 02:14:20 PM PDT 24 |
33974867 ps |
| T954 |
/workspace/coverage/default/1.spi_device_ram_cfg.628808338 |
|
|
Mar 19 02:13:49 PM PDT 24 |
Mar 19 02:13:50 PM PDT 24 |
45642393 ps |
| T955 |
/workspace/coverage/default/20.spi_device_mailbox.2275367661 |
|
|
Mar 19 02:17:53 PM PDT 24 |
Mar 19 02:17:59 PM PDT 24 |
200778962 ps |
| T956 |
/workspace/coverage/default/17.spi_device_mailbox.4280487408 |
|
|
Mar 19 02:17:32 PM PDT 24 |
Mar 19 02:17:41 PM PDT 24 |
1277809881 ps |
| T957 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.221747669 |
|
|
Mar 19 02:19:21 PM PDT 24 |
Mar 19 02:19:32 PM PDT 24 |
15086223939 ps |
| T958 |
/workspace/coverage/default/7.spi_device_intercept.11815956 |
|
|
Mar 19 02:15:39 PM PDT 24 |
Mar 19 02:15:45 PM PDT 24 |
11833389894 ps |
| T959 |
/workspace/coverage/default/0.spi_device_mem_parity.1934200632 |
|
|
Mar 19 02:13:24 PM PDT 24 |
Mar 19 02:13:26 PM PDT 24 |
43484574 ps |
| T960 |
/workspace/coverage/default/35.spi_device_cfg_cmd.3929749821 |
|
|
Mar 19 02:19:54 PM PDT 24 |
Mar 19 02:19:58 PM PDT 24 |
1326630517 ps |
| T961 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.102759042 |
|
|
Mar 19 02:17:46 PM PDT 24 |
Mar 19 02:17:52 PM PDT 24 |
1697144604 ps |
| T962 |
/workspace/coverage/default/27.spi_device_tpm_rw.2355043351 |
|
|
Mar 19 02:18:48 PM PDT 24 |
Mar 19 02:18:54 PM PDT 24 |
816989628 ps |
| T963 |
/workspace/coverage/default/14.spi_device_flash_all.1021638290 |
|
|
Mar 19 02:17:01 PM PDT 24 |
Mar 19 02:18:11 PM PDT 24 |
38811365381 ps |
| T964 |
/workspace/coverage/default/8.spi_device_tpm_rw.2046555207 |
|
|
Mar 19 02:15:52 PM PDT 24 |
Mar 19 02:15:53 PM PDT 24 |
64222810 ps |
| T965 |
/workspace/coverage/default/5.spi_device_tpm_read_hw_reg.2678453298 |
|
|
Mar 19 02:15:07 PM PDT 24 |
Mar 19 02:15:13 PM PDT 24 |
815271280 ps |
| T966 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.2705477024 |
|
|
Mar 19 02:15:20 PM PDT 24 |
Mar 19 02:15:26 PM PDT 24 |
224796549 ps |
| T967 |
/workspace/coverage/default/38.spi_device_cfg_cmd.3301580740 |
|
|
Mar 19 02:20:23 PM PDT 24 |
Mar 19 02:20:26 PM PDT 24 |
500087691 ps |
| T968 |
/workspace/coverage/default/11.spi_device_ram_cfg.3849789670 |
|
|
Mar 19 02:16:28 PM PDT 24 |
Mar 19 02:16:29 PM PDT 24 |
63985839 ps |
| T54 |
/workspace/coverage/default/22.spi_device_flash_and_tpm_min_idle.213248534 |
|
|
Mar 19 02:18:24 PM PDT 24 |
Mar 19 02:20:13 PM PDT 24 |
18948668113 ps |
| T969 |
/workspace/coverage/default/21.spi_device_pass_cmd_filtering.475532188 |
|
|
Mar 19 02:18:06 PM PDT 24 |
Mar 19 02:18:21 PM PDT 24 |
8166203169 ps |
| T970 |
/workspace/coverage/default/43.spi_device_tpm_all.543740101 |
|
|
Mar 19 02:20:51 PM PDT 24 |
Mar 19 02:21:10 PM PDT 24 |
2287066251 ps |
| T971 |
/workspace/coverage/default/0.spi_device_flash_mode.2351369813 |
|
|
Mar 19 02:13:34 PM PDT 24 |
Mar 19 02:13:44 PM PDT 24 |
1083313671 ps |
| T972 |
/workspace/coverage/default/3.spi_device_tpm_rw.902504428 |
|
|
Mar 19 02:14:31 PM PDT 24 |
Mar 19 02:14:34 PM PDT 24 |
574875567 ps |
| T973 |
/workspace/coverage/default/1.spi_device_alert_test.2933757622 |
|
|
Mar 19 02:14:00 PM PDT 24 |
Mar 19 02:14:02 PM PDT 24 |
22104357 ps |
| T974 |
/workspace/coverage/default/47.spi_device_csb_read.667405129 |
|
|
Mar 19 02:21:11 PM PDT 24 |
Mar 19 02:21:12 PM PDT 24 |
51870980 ps |
| T975 |
/workspace/coverage/default/16.spi_device_flash_mode.373997096 |
|
|
Mar 19 02:17:22 PM PDT 24 |
Mar 19 02:17:36 PM PDT 24 |
1834306179 ps |
| T976 |
/workspace/coverage/default/18.spi_device_tpm_sts_read.4267670199 |
|
|
Mar 19 02:17:46 PM PDT 24 |
Mar 19 02:17:47 PM PDT 24 |
52528513 ps |
| T977 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.4185627605 |
|
|
Mar 19 02:19:11 PM PDT 24 |
Mar 19 02:19:16 PM PDT 24 |
773116463 ps |
| T978 |
/workspace/coverage/default/9.spi_device_csb_read.3545829678 |
|
|
Mar 19 02:16:04 PM PDT 24 |
Mar 19 02:16:06 PM PDT 24 |
21283335 ps |
| T979 |
/workspace/coverage/default/9.spi_device_intercept.3642655340 |
|
|
Mar 19 02:16:05 PM PDT 24 |
Mar 19 02:16:14 PM PDT 24 |
5424507882 ps |
| T980 |
/workspace/coverage/default/45.spi_device_alert_test.237972097 |
|
|
Mar 19 02:21:19 PM PDT 24 |
Mar 19 02:21:20 PM PDT 24 |
22375090 ps |
| T981 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.3389493532 |
|
|
Mar 19 02:17:24 PM PDT 24 |
Mar 19 02:18:02 PM PDT 24 |
54753501935 ps |
| T982 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.2882187884 |
|
|
Mar 19 02:19:11 PM PDT 24 |
Mar 19 02:19:12 PM PDT 24 |
68114500 ps |
| T983 |
/workspace/coverage/default/19.spi_device_ram_cfg.3151220536 |
|
|
Mar 19 02:17:46 PM PDT 24 |
Mar 19 02:17:47 PM PDT 24 |
42649089 ps |
| T984 |
/workspace/coverage/default/6.spi_device_mem_parity.3871416184 |
|
|
Mar 19 02:15:21 PM PDT 24 |
Mar 19 02:15:23 PM PDT 24 |
34826394 ps |
| T985 |
/workspace/coverage/default/42.spi_device_pass_addr_payload_swap.131178178 |
|
|
Mar 19 02:20:47 PM PDT 24 |
Mar 19 02:20:55 PM PDT 24 |
704878303 ps |
| T986 |
/workspace/coverage/default/31.spi_device_pass_addr_payload_swap.4140099660 |
|
|
Mar 19 02:19:23 PM PDT 24 |
Mar 19 02:19:37 PM PDT 24 |
4335926070 ps |
| T260 |
/workspace/coverage/default/28.spi_device_flash_and_tpm.1932784188 |
|
|
Mar 19 02:19:09 PM PDT 24 |
Mar 19 02:28:54 PM PDT 24 |
1006591216618 ps |
| T987 |
/workspace/coverage/default/8.spi_device_mem_parity.1997324320 |
|
|
Mar 19 02:15:45 PM PDT 24 |
Mar 19 02:15:46 PM PDT 24 |
45013443 ps |
| T988 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.543803269 |
|
|
Mar 19 02:13:58 PM PDT 24 |
Mar 19 02:14:03 PM PDT 24 |
1008102960 ps |
| T989 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.1321067814 |
|
|
Mar 19 03:18:44 PM PDT 24 |
Mar 19 03:18:45 PM PDT 24 |
129562089 ps |
| T122 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2680040454 |
|
|
Mar 19 03:18:18 PM PDT 24 |
Mar 19 03:18:21 PM PDT 24 |
34209099 ps |
| T990 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.3809464481 |
|
|
Mar 19 03:18:20 PM PDT 24 |
Mar 19 03:18:24 PM PDT 24 |
296416763 ps |
| T991 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.1521806955 |
|
|
Mar 19 03:18:31 PM PDT 24 |
Mar 19 03:18:33 PM PDT 24 |
110368708 ps |
| T123 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.111001161 |
|
|
Mar 19 03:18:45 PM PDT 24 |
Mar 19 03:18:48 PM PDT 24 |
226955623 ps |
| T99 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.2821492005 |
|
|
Mar 19 03:18:41 PM PDT 24 |
Mar 19 03:18:47 PM PDT 24 |
224044980 ps |
| T992 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.449941718 |
|
|
Mar 19 03:18:20 PM PDT 24 |
Mar 19 03:18:21 PM PDT 24 |
10306075 ps |
| T124 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1141772896 |
|
|
Mar 19 03:18:20 PM PDT 24 |
Mar 19 03:18:22 PM PDT 24 |
19885543 ps |
| T993 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.919543938 |
|
|
Mar 19 03:18:37 PM PDT 24 |
Mar 19 03:18:39 PM PDT 24 |
26168868 ps |
| T994 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.1113553009 |
|
|
Mar 19 03:18:30 PM PDT 24 |
Mar 19 03:18:32 PM PDT 24 |
98135432 ps |
| T995 |
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.319424252 |
|
|
Mar 19 03:18:33 PM PDT 24 |
Mar 19 03:18:34 PM PDT 24 |
37082315 ps |
| T996 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.4096821298 |
|
|
Mar 19 03:18:19 PM PDT 24 |
Mar 19 03:18:20 PM PDT 24 |
20240048 ps |
| T89 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.3650588712 |
|
|
Mar 19 03:18:41 PM PDT 24 |
Mar 19 03:18:43 PM PDT 24 |
23689360 ps |
| T997 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.2757348269 |
|
|
Mar 19 03:18:40 PM PDT 24 |
Mar 19 03:18:42 PM PDT 24 |
20499684 ps |
| T100 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.428603621 |
|
|
Mar 19 03:18:38 PM PDT 24 |
Mar 19 03:18:47 PM PDT 24 |
119470576 ps |
| T125 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.89589682 |
|
|
Mar 19 03:18:29 PM PDT 24 |
Mar 19 03:18:37 PM PDT 24 |
1271582916 ps |
| T101 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.1722631393 |
|
|
Mar 19 03:18:30 PM PDT 24 |
Mar 19 03:18:34 PM PDT 24 |
53794969 ps |
| T998 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2831723943 |
|
|
Mar 19 03:18:40 PM PDT 24 |
Mar 19 03:18:44 PM PDT 24 |
55275154 ps |
| T999 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.3974424730 |
|
|
Mar 19 03:18:45 PM PDT 24 |
Mar 19 03:18:46 PM PDT 24 |
203548850 ps |
| T1000 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.3944071049 |
|
|
Mar 19 03:18:42 PM PDT 24 |
Mar 19 03:18:44 PM PDT 24 |
58787172 ps |
| T1001 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1848116848 |
|
|
Mar 19 03:18:43 PM PDT 24 |
Mar 19 03:19:21 PM PDT 24 |
3749999012 ps |
| T1002 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.1776260334 |
|
|
Mar 19 03:18:48 PM PDT 24 |
Mar 19 03:18:48 PM PDT 24 |
20058731 ps |
| T102 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.4131420929 |
|
|
Mar 19 03:18:38 PM PDT 24 |
Mar 19 03:18:42 PM PDT 24 |
937438307 ps |
| T1003 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.71205936 |
|
|
Mar 19 03:18:46 PM PDT 24 |
Mar 19 03:18:47 PM PDT 24 |
17080813 ps |
| T1004 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1880108852 |
|
|
Mar 19 03:18:29 PM PDT 24 |
Mar 19 03:18:33 PM PDT 24 |
62216670 ps |
| T1005 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.3939034705 |
|
|
Mar 19 03:18:40 PM PDT 24 |
Mar 19 03:18:44 PM PDT 24 |
357078291 ps |
| T103 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2814778064 |
|
|
Mar 19 03:18:28 PM PDT 24 |
Mar 19 03:18:33 PM PDT 24 |
140169275 ps |
| T1006 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.3965419536 |
|
|
Mar 19 03:18:18 PM PDT 24 |
Mar 19 03:18:43 PM PDT 24 |
1276371969 ps |
| T107 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.1579903981 |
|
|
Mar 19 03:18:41 PM PDT 24 |
Mar 19 03:18:45 PM PDT 24 |
107923818 ps |
| T106 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.717845268 |
|
|
Mar 19 03:18:29 PM PDT 24 |
Mar 19 03:18:44 PM PDT 24 |
1370522707 ps |
| T1007 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.3174562825 |
|
|
Mar 19 03:18:44 PM PDT 24 |
Mar 19 03:18:45 PM PDT 24 |
11363210 ps |
| T1008 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.923846162 |
|
|
Mar 19 03:18:37 PM PDT 24 |
Mar 19 03:18:39 PM PDT 24 |
19421545 ps |
| T1009 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.161716905 |
|
|
Mar 19 03:18:46 PM PDT 24 |
Mar 19 03:18:47 PM PDT 24 |
50520664 ps |
| T90 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2135561540 |
|
|
Mar 19 03:18:16 PM PDT 24 |
Mar 19 03:18:18 PM PDT 24 |
77545596 ps |
| T1010 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.4087914592 |
|
|
Mar 19 03:18:48 PM PDT 24 |
Mar 19 03:18:52 PM PDT 24 |
229097111 ps |
| T1011 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.1637127057 |
|
|
Mar 19 03:18:46 PM PDT 24 |
Mar 19 03:18:47 PM PDT 24 |
15031879 ps |
| T126 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.730530199 |
|
|
Mar 19 03:18:20 PM PDT 24 |
Mar 19 03:18:29 PM PDT 24 |
1264755120 ps |
| T127 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.3743812156 |
|
|
Mar 19 03:18:31 PM PDT 24 |
Mar 19 03:18:34 PM PDT 24 |
43143423 ps |
| T104 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.2931555491 |
|
|
Mar 19 03:18:13 PM PDT 24 |
Mar 19 03:18:22 PM PDT 24 |
288008915 ps |
| T1012 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1184243473 |
|
|
Mar 19 03:18:43 PM PDT 24 |
Mar 19 03:18:44 PM PDT 24 |
19449425 ps |
| T1013 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.658435977 |
|
|
Mar 19 03:18:47 PM PDT 24 |
Mar 19 03:18:48 PM PDT 24 |
55595164 ps |
| T128 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3185107952 |
|
|
Mar 19 03:18:41 PM PDT 24 |
Mar 19 03:18:43 PM PDT 24 |
18331814 ps |
| T105 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.2319318935 |
|
|
Mar 19 03:18:46 PM PDT 24 |
Mar 19 03:19:09 PM PDT 24 |
3002036723 ps |
| T114 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.3033667561 |
|
|
Mar 19 03:18:31 PM PDT 24 |
Mar 19 03:18:33 PM PDT 24 |
51537258 ps |
| T116 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.1889690558 |
|
|
Mar 19 03:18:51 PM PDT 24 |
Mar 19 03:18:53 PM PDT 24 |
67282215 ps |
| T1014 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.3597797674 |
|
|
Mar 19 03:18:41 PM PDT 24 |
Mar 19 03:18:43 PM PDT 24 |
10714382 ps |
| T119 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3988217101 |
|
|
Mar 19 03:18:45 PM PDT 24 |
Mar 19 03:18:49 PM PDT 24 |
124158707 ps |
| T109 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.1931222634 |
|
|
Mar 19 03:18:42 PM PDT 24 |
Mar 19 03:18:45 PM PDT 24 |
1210558315 ps |
| T1015 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.2222930938 |
|
|
Mar 19 03:18:45 PM PDT 24 |
Mar 19 03:18:46 PM PDT 24 |
16143377 ps |
| T120 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.3246781397 |
|
|
Mar 19 03:18:37 PM PDT 24 |
Mar 19 03:18:51 PM PDT 24 |
215931635 ps |
| T1016 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.90481807 |
|
|
Mar 19 03:18:36 PM PDT 24 |
Mar 19 03:18:37 PM PDT 24 |
17640091 ps |
| T1017 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.741078092 |
|
|
Mar 19 03:18:27 PM PDT 24 |
Mar 19 03:18:28 PM PDT 24 |
17222868 ps |
| T1018 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.375853600 |
|
|
Mar 19 03:18:49 PM PDT 24 |
Mar 19 03:18:50 PM PDT 24 |
12816595 ps |
| T1019 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.597544704 |
|
|
Mar 19 03:18:34 PM PDT 24 |
Mar 19 03:18:35 PM PDT 24 |
50881599 ps |
| T1020 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.2694588675 |
|
|
Mar 19 03:18:41 PM PDT 24 |
Mar 19 03:18:43 PM PDT 24 |
14141572 ps |
| T146 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.1072878110 |
|
|
Mar 19 03:18:40 PM PDT 24 |
Mar 19 03:18:44 PM PDT 24 |
150348327 ps |
| T1021 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.2137086979 |
|
|
Mar 19 03:18:23 PM PDT 24 |
Mar 19 03:18:32 PM PDT 24 |
308035182 ps |
| T1022 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.3204960626 |
|
|
Mar 19 03:18:21 PM PDT 24 |
Mar 19 03:18:23 PM PDT 24 |
18696809 ps |
| T147 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.3498143755 |
|
|
Mar 19 03:18:32 PM PDT 24 |
Mar 19 03:18:48 PM PDT 24 |
670443046 ps |
| T129 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2352816817 |
|
|
Mar 19 03:18:29 PM PDT 24 |
Mar 19 03:19:06 PM PDT 24 |
1862883133 ps |
| T130 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.287999108 |
|
|
Mar 19 03:18:31 PM PDT 24 |
Mar 19 03:18:33 PM PDT 24 |
102780101 ps |