Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
91.69	94.25	84.31	96.94		87.50	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	579543174	4142	0	0
addr_swap_data_rd_A	579543174	1383	0	0
addr_swap_mask_rd_A	579543174	1507	0	0
cfg_rd_A	579543174	1997	0	0
cmd_filter_0_rd_A	579543174	7409	0	0
cmd_filter_1_rd_A	579543174	6757	0	0
cmd_filter_2_rd_A	579543174	7151	0	0
cmd_filter_3_rd_A	579543174	7000	0	0
cmd_filter_4_rd_A	579543174	6831	0	0
cmd_filter_5_rd_A	579543174	6923	0	0
cmd_filter_6_rd_A	579543174	6214	0	0
cmd_filter_7_rd_A	579543174	7190	0	0
cmd_info_0_rd_A	579543174	3007	0	0
cmd_info_10_rd_A	579543174	3777	0	0
cmd_info_11_rd_A	579543174	3681	0	0
cmd_info_12_rd_A	579543174	3483	0	0
cmd_info_13_rd_A	579543174	3602	0	0
cmd_info_14_rd_A	579543174	3517	0	0
cmd_info_15_rd_A	579543174	4004	0	0
cmd_info_16_rd_A	579543174	3180	0	0
cmd_info_17_rd_A	579543174	3111	0	0
cmd_info_18_rd_A	579543174	3443	0	0
cmd_info_19_rd_A	579543174	3944	0	0
cmd_info_1_rd_A	579543174	3727	0	0
cmd_info_20_rd_A	579543174	3527	0	0
cmd_info_21_rd_A	579543174	3566	0	0
cmd_info_22_rd_A	579543174	3791	0	0
cmd_info_23_rd_A	579543174	3380	0	0
cmd_info_2_rd_A	579543174	3993	0	0
cmd_info_3_rd_A	579543174	3630	0	0
cmd_info_4_rd_A	579543174	3525	0	0
cmd_info_5_rd_A	579543174	3473	0	0
cmd_info_6_rd_A	579543174	3724	0	0
cmd_info_7_rd_A	579543174	3436	0	0
cmd_info_8_rd_A	579543174	3940	0	0
cmd_info_9_rd_A	579543174	3884	0	0
cmd_info_en4b_rd_A	579543174	1673	0	0
cmd_info_ex4b_rd_A	579543174	1815	0	0
cmd_info_wrdi_rd_A	579543174	1666	0	0
cmd_info_wren_rd_A	579543174	1594	0	0
intercept_en_rd_A	579543174	2239	0	0
intr_enable_rd_A	579543174	3232	0	0
jedec_cc_rd_A	579543174	1535	0	0
jedec_id_rd_A	579543174	1650	0	0
mailbox_addr_rd_A	579543174	1530	0	0
payload_swap_data_rd_A	579543174	1757	0	0
payload_swap_mask_rd_A	579543174	1488	0	0
read_threshold_rd_A	579543174	1419	0	0
tpm_access_0_rd_A	579543174	2157	0	0
tpm_access_1_rd_A	579543174	1451	0	0
tpm_cfg_rd_A	579543174	2257	0	0
tpm_did_vid_rd_A	579543174	1688	0	0
tpm_int_enable_rd_A	579543174	1677	0	0
tpm_int_status_rd_A	579543174	1458	0	0
tpm_int_vector_rd_A	579543174	1655	0	0
tpm_intf_capability_rd_A	579543174	1381	0	0
tpm_rid_rd_A	579543174	1488	0	0
tpm_sts_rd_A	579543174	1604	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	4142	0	0
T102	3596	9	0	0
T103	78610	5	0	0
T104	13579	190	0	0
T105	3253	137	0	0
T106	28750	3	0	0
T108	9591	155	0	0
T111	11296	158	0	0
T114	5671	95	0	0
T116	4125	10	0	0
T121	12590	8	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1383	0	0
T122	5586	7	0	0
T128	10071	17	0	0
T146	6987	15	0	0
T147	8159	8	0	0
T148	18623	54	0	0
T149	10376	13	0	0
T150	7855	10	0	0
T151	102660	119	0	0
T152	28840	9	0	0
T153	13845	15	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1507	0	0
T122	5586	8	0	0
T128	10071	10	0	0
T146	6987	21	0	0
T147	8159	7	0	0
T148	18623	44	0	0
T149	10376	8	0	0
T151	102660	100	0	0
T154	6551	29	0	0
T155	6407	24	0	0
T156	9283	13	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1997	0	0
T128	10071	9	0	0
T146	6987	11	0	0
T147	8159	11	0	0
T148	18623	81	0	0
T149	10376	35	0	0
T150	7855	10	0	0
T151	102660	314	0	0
T154	6551	9	0	0
T155	6407	33	0	0
T156	9283	18	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	7409	0	0
T122	5586	90	0	0
T146	6987	6	0	0
T147	8159	146	0	0
T148	18623	30	0	0
T149	10376	16	0	0
T150	7855	17	0	0
T151	102660	2071	0	0
T154	6551	28	0	0
T155	6407	15	0	0
T156	9283	133	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	6757	0	0
T122	5586	49	0	0
T146	6987	45	0	0
T147	8159	15	0	0
T148	18623	96	0	0
T149	10376	252	0	0
T150	7855	51	0	0
T151	102660	1709	0	0
T154	6551	4	0	0
T155	6407	3	0	0
T156	9283	8	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	7151	0	0
T122	5586	69	0	0
T146	6987	25	0	0
T147	8159	131	0	0
T148	18623	39	0	0
T149	10376	146	0	0
T150	7855	45	0	0
T151	102660	2025	0	0
T154	6551	23	0	0
T155	6407	25	0	0
T156	9283	145	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	7000	0	0
T122	5586	82	0	0
T146	6987	3	0	0
T147	8159	128	0	0
T148	18623	38	0	0
T149	10376	20	0	0
T150	7855	15	0	0
T151	102660	2318	0	0
T154	6551	27	0	0
T155	6407	27	0	0
T156	9283	82	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	6831	0	0
T122	5586	4	0	0
T146	6987	1	0	0
T147	8159	11	0	0
T148	18623	61	0	0
T149	10376	144	0	0
T150	7855	8	0	0
T151	102660	2381	0	0
T154	6551	6	0	0
T155	6407	15	0	0
T156	9283	69	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	6923	0	0
T122	5586	88	0	0
T146	6987	15	0	0
T147	8159	128	0	0
T148	18623	60	0	0
T149	10376	262	0	0
T150	7855	19	0	0
T151	102660	2083	0	0
T154	6551	15	0	0
T155	6407	12	0	0
T156	9283	8	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	6214	0	0
T122	5586	8	0	0
T128	10071	122	0	0
T146	6987	14	0	0
T147	8159	292	0	0
T148	18623	75	0	0
T149	10376	21	0	0
T150	7855	16	0	0
T151	102660	1290	0	0
T154	6551	14	0	0
T156	9283	96	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	7190	0	0
T128	10071	285	0	0
T146	6987	19	0	0
T147	8159	94	0	0
T148	18623	44	0	0
T149	10376	253	0	0
T150	7855	31	0	0
T151	102660	2112	0	0
T154	6551	16	0	0
T155	6407	18	0	0
T156	9283	21	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3007	0	0
T122	5586	29	0	0
T128	10071	50	0	0
T146	6987	1	0	0
T147	8159	11	0	0
T148	18623	58	0	0
T149	10376	60	0	0
T150	7855	6	0	0
T151	102660	816	0	0
T154	6551	15	0	0
T156	9283	19	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3777	0	0
T128	10071	55	0	0
T146	6987	16	0	0
T147	8159	101	0	0
T148	18623	68	0	0
T149	10376	77	0	0
T150	7855	31	0	0
T151	102660	800	0	0
T154	6551	3	0	0
T155	6407	6	0	0
T156	9283	66	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3681	0	0
T122	5586	9	0	0
T146	6987	22	0	0
T147	8159	64	0	0
T148	18623	72	0	0
T149	10376	62	0	0
T150	7855	28	0	0
T151	102660	881	0	0
T154	6551	2	0	0
T155	6407	21	0	0
T156	9283	40	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3483	0	0
T122	5586	5	0	0
T146	6987	10	0	0
T147	8159	102	0	0
T148	18623	64	0	0
T149	10376	110	0	0
T150	7855	6	0	0
T151	102660	819	0	0
T154	6551	30	0	0
T155	6407	7	0	0
T156	9283	35	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3602	0	0
T122	5586	18	0	0
T146	6987	20	0	0
T147	8159	58	0	0
T148	18623	84	0	0
T149	10376	48	0	0
T150	7855	32	0	0
T151	102660	761	0	0
T154	6551	5	0	0
T155	6407	6	0	0
T156	9283	27	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3517	0	0
T122	5586	23	0	0
T146	6987	3	0	0
T147	8159	4	0	0
T148	18623	77	0	0
T149	10376	66	0	0
T150	7855	21	0	0
T151	102660	769	0	0
T154	6551	15	0	0
T155	6407	11	0	0
T156	9283	29	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	4004	0	0
T122	5586	7	0	0
T128	10071	130	0	0
T146	6987	10	0	0
T147	8159	98	0	0
T148	18623	85	0	0
T149	10376	108	0	0
T151	102660	1062	0	0
T154	6551	14	0	0
T155	6407	29	0	0
T156	9283	27	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3180	0	0
T122	5586	2	0	0
T146	6987	42	0	0
T147	8159	52	0	0
T148	18623	41	0	0
T149	10376	19	0	0
T150	7855	16	0	0
T151	102660	646	0	0
T154	6551	20	0	0
T155	6407	7	0	0
T156	9283	37	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3111	0	0
T122	5586	1	0	0
T128	10071	17	0	0
T146	6987	30	0	0
T147	8159	13	0	0
T148	18623	42	0	0
T149	10376	42	0	0
T150	7855	26	0	0
T151	102660	690	0	0
T154	6551	8	0	0
T156	9283	38	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3443	0	0
T122	5586	40	0	0
T128	10071	95	0	0
T146	6987	3	0	0
T147	8159	91	0	0
T148	18623	81	0	0
T149	10376	15	0	0
T150	7855	20	0	0
T151	102660	733	0	0
T152	28840	138	0	0
T154	6551	6	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3944	0	0
T122	5586	24	0	0
T128	10071	46	0	0
T146	6987	20	0	0
T148	18623	78	0	0
T149	10376	71	0	0
T150	7855	40	0	0
T151	102660	1082	0	0
T154	6551	17	0	0
T155	6407	14	0	0
T156	9283	4	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3727	0	0
T122	5586	32	0	0
T146	6987	10	0	0
T147	8159	79	0	0
T148	18623	64	0	0
T149	10376	140	0	0
T150	7855	9	0	0
T151	102660	856	0	0
T154	6551	10	0	0
T155	6407	9	0	0
T156	9283	9	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3527	0	0
T122	5586	5	0	0
T128	10071	55	0	0
T146	6987	41	0	0
T147	8159	56	0	0
T148	18623	67	0	0
T149	10376	21	0	0
T150	7855	41	0	0
T151	102660	987	0	0
T154	6551	6	0	0
T155	6407	6	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3566	0	0
T122	5586	5	0	0
T128	10071	174	0	0
T146	6987	9	0	0
T147	8159	103	0	0
T148	18623	22	0	0
T149	10376	76	0	0
T150	7855	32	0	0
T151	102660	659	0	0
T154	6551	16	0	0
T156	9283	34	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3791	0	0
T122	5586	31	0	0
T146	6987	3	0	0
T147	8159	53	0	0
T148	18623	30	0	0
T149	10376	72	0	0
T150	7855	23	0	0
T151	102660	1077	0	0
T154	6551	1	0	0
T155	6407	16	0	0
T156	9283	28	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3380	0	0
T122	5586	35	0	0
T146	6987	32	0	0
T147	8159	97	0	0
T148	18623	104	0	0
T149	10376	142	0	0
T150	7855	28	0	0
T151	102660	789	0	0
T154	6551	20	0	0
T155	6407	2	0	0
T156	9283	21	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3993	0	0
T122	5586	25	0	0
T146	6987	28	0	0
T147	8159	68	0	0
T148	18623	52	0	0
T149	10376	18	0	0
T150	7855	2	0	0
T151	102660	1104	0	0
T154	6551	13	0	0
T155	6407	12	0	0
T156	9283	45	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3630	0	0
T122	5586	32	0	0
T146	6987	11	0	0
T147	8159	51	0	0
T148	18623	68	0	0
T149	10376	28	0	0
T150	7855	41	0	0
T151	102660	838	0	0
T154	6551	14	0	0
T155	6407	29	0	0
T156	9283	44	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3525	0	0
T128	10071	59	0	0
T146	6987	11	0	0
T147	8159	35	0	0
T148	18623	19	0	0
T149	10376	107	0	0
T150	7855	47	0	0
T151	102660	651	0	0
T154	6551	5	0	0
T155	6407	7	0	0
T156	9283	26	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3473	0	0
T122	5586	13	0	0
T146	6987	1	0	0
T147	8159	96	0	0
T148	18623	67	0	0
T149	10376	5	0	0
T150	7855	10	0	0
T151	102660	718	0	0
T154	6551	5	0	0
T155	6407	12	0	0
T156	9283	11	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3724	0	0
T122	5586	11	0	0
T146	6987	18	0	0
T147	8159	4	0	0
T148	18623	30	0	0
T149	10376	97	0	0
T150	7855	27	0	0
T151	102660	899	0	0
T154	6551	20	0	0
T155	6407	12	0	0
T156	9283	5	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3436	0	0
T128	10071	54	0	0
T146	6987	4	0	0
T147	8159	44	0	0
T148	18623	58	0	0
T149	10376	13	0	0
T150	7855	26	0	0
T151	102660	878	0	0
T152	28840	102	0	0
T155	6407	2	0	0
T156	9283	31	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3940	0	0
T122	5586	31	0	0
T146	6987	37	0	0
T147	8159	48	0	0
T148	18623	98	0	0
T149	10376	19	0	0
T150	7855	9	0	0
T151	102660	1021	0	0
T154	6551	6	0	0
T155	6407	23	0	0
T156	9283	51	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3884	0	0
T104	13579	4	0	0
T146	6987	5	0	0
T147	8159	107	0	0
T148	18623	82	0	0
T149	10376	62	0	0
T150	7855	11	0	0
T151	102660	952	0	0
T154	6551	5	0	0
T155	6407	9	0	0
T156	9283	45	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1673	0	0
T122	5586	4	0	0
T146	6987	22	0	0
T147	8159	13	0	0
T148	18623	51	0	0
T149	10376	24	0	0
T150	7855	47	0	0
T151	102660	197	0	0
T154	6551	2	0	0
T155	6407	9	0	0
T156	9283	17	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1815	0	0
T122	5586	2	0	0
T146	6987	36	0	0
T147	8159	8	0	0
T148	18623	89	0	0
T149	10376	13	0	0
T150	7855	16	0	0
T151	102660	144	0	0
T154	6551	33	0	0
T155	6407	6	0	0
T156	9283	7	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1666	0	0
T122	5586	6	0	0
T128	10071	17	0	0
T146	6987	19	0	0
T147	8159	3	0	0
T148	18623	89	0	0
T149	10376	16	0	0
T150	7855	44	0	0
T151	102660	187	0	0
T155	6407	9	0	0
T156	9283	8	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1594	0	0
T122	5586	1	0	0
T146	6987	9	0	0
T147	8159	30	0	0
T148	18623	81	0	0
T149	10376	11	0	0
T150	7855	17	0	0
T151	102660	212	0	0
T154	6551	10	0	0
T155	6407	6	0	0
T156	9283	11	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	2239	0	0
T122	5586	18	0	0
T146	6987	22	0	0
T147	8159	12	0	0
T148	18623	86	0	0
T149	10376	36	0	0
T150	7855	55	0	0
T151	102660	333	0	0
T154	6551	7	0	0
T155	6407	27	0	0
T156	9283	13	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	3232	0	0
T27	1142	0	0	0
T82	0	56	0	0
T138	559779	17	0	0
T157	0	33	0	0
T158	0	12	0	0
T159	0	24	0	0
T160	0	28	0	0
T161	0	39	0	0
T162	0	41	0	0
T163	0	33	0	0
T164	0	12	0	0
T165	1134	0	0	0
T166	68794	0	0	0
T167	1471	0	0	0
T168	1781	0	0	0
T169	38300	0	0	0
T170	1944	0	0	0
T171	173219	0	0	0
T172	254496	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1535	0	0
T122	5586	6	0	0
T146	6987	1	0	0
T147	8159	9	0	0
T148	18623	55	0	0
T149	10376	22	0	0
T150	7855	1	0	0
T151	102660	180	0	0
T154	6551	5	0	0
T155	6407	13	0	0
T156	9283	2	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1650	0	0
T128	10071	17	0	0
T146	6987	37	0	0
T147	8159	6	0	0
T148	18623	54	0	0
T149	10376	20	0	0
T150	7855	22	0	0
T151	102660	186	0	0
T154	6551	21	0	0
T155	6407	12	0	0
T156	9283	5	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1530	0	0
T128	10071	14	0	0
T146	6987	43	0	0
T147	8159	9	0	0
T148	18623	64	0	0
T149	10376	8	0	0
T150	7855	21	0	0
T151	102660	117	0	0
T154	6551	24	0	0
T155	6407	5	0	0
T156	9283	12	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1757	0	0
T122	5586	5	0	0
T128	10071	12	0	0
T146	6987	18	0	0
T147	8159	3	0	0
T148	18623	62	0	0
T149	10376	13	0	0
T150	7855	19	0	0
T151	102660	140	0	0
T154	6551	27	0	0
T156	9283	22	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1488	0	0
T122	5586	2	0	0
T128	10071	14	0	0
T146	6987	20	0	0
T147	8159	8	0	0
T148	18623	15	0	0
T149	10376	22	0	0
T150	7855	36	0	0
T151	102660	110	0	0
T154	6551	7	0	0
T156	9283	8	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1419	0	0
T128	10071	15	0	0
T146	6987	7	0	0
T147	8159	7	0	0
T148	18623	14	0	0
T149	10376	14	0	0
T150	7855	45	0	0
T151	102660	131	0	0
T152	28840	17	0	0
T155	6407	6	0	0
T156	9283	20	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	2157	0	0
T122	5586	7	0	0
T128	10071	16	0	0
T146	6987	49	0	0
T147	8159	43	0	0
T148	18623	48	0	0
T149	10376	12	0	0
T150	7855	2	0	0
T151	102660	345	0	0
T154	6551	35	0	0
T156	9283	18	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1451	0	0
T108	9591	3	0	0
T122	5586	5	0	0
T146	6987	20	0	0
T147	8159	5	0	0
T148	18623	62	0	0
T149	10376	13	0	0
T150	7855	36	0	0
T151	102660	104	0	0
T154	6551	8	0	0
T155	6407	5	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	2257	0	0
T122	5586	17	0	0
T146	6987	31	0	0
T147	8159	34	0	0
T148	18623	29	0	0
T149	10376	44	0	0
T150	7855	16	0	0
T151	102660	354	0	0
T154	6551	19	0	0
T155	6407	13	0	0
T156	9283	25	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1688	0	0
T122	5586	3	0	0
T146	6987	13	0	0
T147	8159	14	0	0
T148	18623	83	0	0
T149	10376	24	0	0
T150	7855	8	0	0
T151	102660	165	0	0
T154	6551	13	0	0
T155	6407	9	0	0
T156	9283	12	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1677	0	0
T128	10071	14	0	0
T146	6987	22	0	0
T147	8159	7	0	0
T148	18623	108	0	0
T149	10376	19	0	0
T150	7855	6	0	0
T151	102660	138	0	0
T154	6551	28	0	0
T155	6407	8	0	0
T156	9283	11	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1458	0	0
T122	5586	4	0	0
T146	6987	10	0	0
T147	8159	11	0	0
T148	18623	56	0	0
T149	10376	14	0	0
T150	7855	30	0	0
T151	102660	100	0	0
T154	6551	5	0	0
T155	6407	22	0	0
T156	9283	4	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1655	0	0
T128	10071	12	0	0
T146	6987	1	0	0
T147	8159	8	0	0
T148	18623	85	0	0
T149	10376	9	0	0
T150	7855	24	0	0
T151	102660	141	0	0
T155	6407	7	0	0
T156	9283	8	0	0
T173	6565	2	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1381	0	0
T122	5586	3	0	0
T146	6987	34	0	0
T147	8159	14	0	0
T148	18623	40	0	0
T149	10376	7	0	0
T150	7855	1	0	0
T151	102660	111	0	0
T154	6551	26	0	0
T155	6407	13	0	0
T156	9283	19	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1488	0	0
T122	5586	9	0	0
T128	10071	19	0	0
T146	6987	10	0	0
T147	8159	9	0	0
T148	18623	61	0	0
T149	10376	16	0	0
T150	7855	12	0	0
T151	102660	131	0	0
T154	6551	9	0	0
T156	9283	16	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	579543174	1604	0	0
T128	10071	5	0	0
T146	6987	14	0	0
T147	8159	8	0	0
T148	18623	75	0	0
T149	10376	25	0	0
T150	7855	22	0	0
T151	102660	118	0	0
T154	6551	4	0	0
T155	6407	8	0	0
T156	9283	12	0	0