Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

15020

1

T4

450

T5

8

T7

2

auto[1]

52249

1

T1

503

T4

263

T5

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1563	1			T1	13		T4	21		T8	11
auto[4:7]	26433	1			T1	190		T4	290		T5	2
auto[8:11]	1464	1			T1	8		T4	24		T8	9
auto[12:15]	360	1			T1	6		T4	5		T8	1
auto[16:19]	451	1			T1	4		T4	3		T8	4
auto[20:23]	2168	1			T1	13		T4	22		T7	2
auto[24:27]	383	1			T1	1		T4	6		T5	2
auto[28:31]	348	1			T1	4		T4	4		T8	2
auto[32:35]	380	1			T1	3		T4	7		T8	1
auto[36:39]	348	1			T1	6		T4	7		T8	1
auto[40:43]	373	1			T1	1		T4	4		T11	5
auto[44:47]	345	1			T1	1		T4	4		T5	2
auto[48:51]	384	1			T1	9		T4	3		T8	4
auto[52:55]	2165	1			T1	18		T4	14		T5	2
auto[56:59]	1513	1			T1	6		T4	28		T8	13
auto[60:63]	363	1			T1	3		T4	4		T11	3
auto[64:67]	332	1			T1	5		T4	4		T8	4
auto[68:71]	342	1			T1	2		T4	11		T8	4
auto[72:75]	352	1			T1	2		T4	2		T13	1
auto[76:79]	349	1			T1	5		T4	1		T8	1
auto[80:83]	313	1			T1	3		T4	7		T8	1
auto[84:87]	372	1			T1	6		T4	1		T8	6
auto[88:91]	2133	1			T1	14		T4	14		T5	4
auto[92:95]	371	1			T1	7		T4	3		T8	1
auto[96:99]	365	1			T1	2		T4	4		T8	1
auto[100:103]	403	1			T1	1		T4	5		T5	2
auto[104:107]	1595	1			T1	5		T4	20		T8	17
auto[108:111]	348	1			T1	3		T4	1		T8	3
auto[112:115]	373	1			T1	4		T4	4		T8	2
auto[116:119]	316	1			T1	9		T4	4		T13	1
auto[120:123]	362	1			T1	2		T4	4		T11	1
auto[124:127]	324	1			T1	2		T4	4		T8	1
auto[128:131]	372	1			T1	1		T4	5		T8	2
auto[132:135]	383	1			T1	4		T4	6		T11	3
auto[136:139]	384	1			T1	4		T4	2		T8	8
auto[140:143]	353	1			T1	2		T4	6		T11	5
auto[144:147]	360	1			T1	3		T8	1		T11	1
auto[148:151]	411	1			T1	3		T4	6		T11	1
auto[152:155]	378	1			T1	4		T4	2		T8	5
auto[156:159]	2140	1			T1	11		T4	23		T5	2
auto[160:163]	370	1			T1	4		T4	2		T8	9
auto[164:167]	358	1			T4	3		T8	4		T11	4
auto[168:171]	360	1			T1	4		T4	2		T8	2
auto[172:175]	404	1			T1	3		T4	1		T8	5
auto[176:179]	361	1			T4	3		T8	1		T25	2
auto[180:183]	2104	1			T1	20		T4	18		T8	10
auto[184:187]	1527	1			T1	8		T4	17		T8	8
auto[188:191]	376	1			T1	6		T8	2		T13	1
auto[192:195]	401	1			T1	3		T4	5		T8	2
auto[196:199]	390	1			T1	3		T4	3		T13	1
auto[200:203]	369	1			T1	3		T4	2		T11	3
auto[204:207]	373	1			T1	1		T4	7		T8	3
auto[208:211]	405	1			T1	2		T4	3		T8	1
auto[212:215]	388	1			T1	6		T4	1		T8	4
auto[216:219]	366	1			T1	6		T4	3		T11	1
auto[220:223]	322	1			T1	2		T4	1		T8	5
auto[224:227]	357	1			T1	7		T4	4		T8	2
auto[228:231]	381	1			T1	3		T11	2		T13	3
auto[232:235]	3312	1			T1	25		T4	36		T8	21
auto[236:239]	322	1			T1	2		T4	4		T8	3
auto[240:243]	394	1			T4	3		T11	2		T13	6
auto[244:247]	401	1			T1	1		T4	7		T11	2
auto[248:251]	385	1			T1	4		T4	1		T11	3
auto[252:255]	371	1			T4	2		T8	6		T13	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	471	1			T4	6		T8	3		T11	7
auto[0:3]	auto[1]	1092	1			T1	13		T4	15		T8	8
auto[4:7]	auto[0]	5173	1			T4	245		T5	1		T8	133
auto[4:7]	auto[1]	21260	1			T1	190		T4	45		T5	1
auto[8:11]	auto[0]	493	1			T4	8		T8	4		T11	6
auto[8:11]	auto[1]	971	1			T1	8		T4	16		T8	5
auto[12:15]	auto[0]	81	1			T4	3		T8	1		T13	2
auto[12:15]	auto[1]	279	1			T1	6		T4	2		T13	1
auto[16:19]	auto[0]	95	1			T8	1		T13	3		T40	2
auto[16:19]	auto[1]	356	1			T1	4		T4	3		T8	3
auto[20:23]	auto[0]	492	1			T4	15		T7	1		T8	6
auto[20:23]	auto[1]	1676	1			T1	13		T4	7		T7	1
auto[24:27]	auto[0]	91	1			T4	5		T5	1		T8	1
auto[24:27]	auto[1]	292	1			T1	1		T4	1		T5	1
auto[28:31]	auto[0]	76	1			T4	3		T11	1		T12	2
auto[28:31]	auto[1]	272	1			T1	4		T4	1		T8	2
auto[32:35]	auto[0]	89	1			T4	4		T11	2		T13	1
auto[32:35]	auto[1]	291	1			T1	3		T4	3		T8	1
auto[36:39]	auto[0]	66	1			T4	3		T11	1		T40	2
auto[36:39]	auto[1]	282	1			T1	6		T4	4		T8	1
auto[40:43]	auto[0]	78	1			T4	1		T11	4		T25	2
auto[40:43]	auto[1]	295	1			T1	1		T4	3		T11	1
auto[44:47]	auto[0]	82	1			T4	4		T5	1		T8	4
auto[44:47]	auto[1]	263	1			T1	1		T5	1		T8	1
auto[48:51]	auto[0]	82	1			T4	2		T8	3		T11	1
auto[48:51]	auto[1]	302	1			T1	9		T4	1		T8	1
auto[52:55]	auto[0]	511	1			T4	9		T5	1		T8	4
auto[52:55]	auto[1]	1654	1			T1	18		T4	5		T5	1
auto[56:59]	auto[0]	458	1			T4	10		T8	2		T11	9
auto[56:59]	auto[1]	1055	1			T1	6		T4	18		T8	11
auto[60:63]	auto[0]	72	1			T4	3		T11	3		T38	1
auto[60:63]	auto[1]	291	1			T1	3		T4	1		T38	1
auto[64:67]	auto[0]	72	1			T4	1		T8	2		T11	3
auto[64:67]	auto[1]	260	1			T1	5		T4	3		T8	2
auto[68:71]	auto[0]	73	1			T4	5		T13	1		T40	1
auto[68:71]	auto[1]	269	1			T1	2		T4	6		T8	4
auto[72:75]	auto[0]	80	1			T4	2		T25	1		T40	2
auto[72:75]	auto[1]	272	1			T1	2		T13	1		T36	1
auto[76:79]	auto[0]	87	1			T11	2		T13	4		T38	2
auto[76:79]	auto[1]	262	1			T1	5		T4	1		T8	1
auto[80:83]	auto[0]	62	1			T4	1		T11	1		T12	2
auto[80:83]	auto[1]	251	1			T1	3		T4	6		T8	1
auto[84:87]	auto[0]	82	1			T13	2		T25	4		T40	2
auto[84:87]	auto[1]	290	1			T1	6		T4	1		T8	6
auto[88:91]	auto[0]	509	1			T4	5		T5	2		T8	10
auto[88:91]	auto[1]	1624	1			T1	14		T4	9		T5	2
auto[92:95]	auto[0]	84	1			T4	3		T38	1		T40	3
auto[92:95]	auto[1]	287	1			T1	7		T8	1		T11	1
auto[96:99]	auto[0]	96	1			T4	3		T11	4		T12	1
auto[96:99]	auto[1]	269	1			T1	2		T4	1		T8	1
auto[100:103]	auto[0]	87	1			T4	5		T5	1		T8	2
auto[100:103]	auto[1]	316	1			T1	1		T5	1		T8	1
auto[104:107]	auto[0]	514	1			T4	10		T8	13		T11	2
auto[104:107]	auto[1]	1081	1			T1	5		T4	10		T8	4
auto[108:111]	auto[0]	85	1			T11	1		T40	2		T36	3
auto[108:111]	auto[1]	263	1			T1	3		T4	1		T8	3
auto[112:115]	auto[0]	69	1			T4	4		T8	2		T11	1
auto[112:115]	auto[1]	304	1			T1	4		T11	2		T36	5
auto[116:119]	auto[0]	57	1			T4	3		T40	1		T171	4
auto[116:119]	auto[1]	259	1			T1	9		T4	1		T13	1
auto[120:123]	auto[0]	84	1			T4	3		T13	2		T40	1
auto[120:123]	auto[1]	278	1			T1	2		T4	1		T11	1
auto[124:127]	auto[0]	71	1			T4	3		T8	1		T40	2
auto[124:127]	auto[1]	253	1			T1	2		T4	1		T11	1
auto[128:131]	auto[0]	81	1			T4	1		T8	2		T11	4
auto[128:131]	auto[1]	291	1			T1	1		T4	4		T197	1
auto[132:135]	auto[0]	87	1			T4	5		T11	1		T40	1
auto[132:135]	auto[1]	296	1			T1	4		T4	1		T11	2
auto[136:139]	auto[0]	90	1			T4	2		T8	5		T25	1
auto[136:139]	auto[1]	294	1			T1	4		T8	3		T11	2
auto[140:143]	auto[0]	75	1			T4	2		T11	3		T26	1
auto[140:143]	auto[1]	278	1			T1	2		T4	4		T11	2
auto[144:147]	auto[0]	65	1			T11	1		T39	1		T209	1
auto[144:147]	auto[1]	295	1			T1	3		T8	1		T13	1
auto[148:151]	auto[0]	86	1			T4	5		T13	2		T25	1
auto[148:151]	auto[1]	325	1			T1	3		T4	1		T11	1
auto[152:155]	auto[0]	91	1			T4	1		T8	3		T13	3
auto[152:155]	auto[1]	287	1			T1	4		T4	1		T8	2
auto[156:159]	auto[0]	506	1			T4	17		T5	1		T7	1
auto[156:159]	auto[1]	1634	1			T1	11		T4	6		T5	1
auto[160:163]	auto[0]	76	1			T4	2		T8	2		T11	1
auto[160:163]	auto[1]	294	1			T1	4		T8	7		T11	2
auto[164:167]	auto[0]	90	1			T4	1		T8	4		T11	1
auto[164:167]	auto[1]	268	1			T4	2		T11	3		T25	1
auto[168:171]	auto[0]	87	1			T8	2		T13	1		T39	1
auto[168:171]	auto[1]	273	1			T1	4		T4	2		T39	1
auto[172:175]	auto[0]	73	1			T8	1		T11	1		T25	1
auto[172:175]	auto[1]	331	1			T1	3		T4	1		T8	4
auto[176:179]	auto[0]	71	1			T8	1		T40	1		T28	2
auto[176:179]	auto[1]	290	1			T4	3		T25	2		T40	1
auto[180:183]	auto[0]	463	1			T4	7		T8	5		T9	2
auto[180:183]	auto[1]	1641	1			T1	20		T4	11		T8	5
auto[184:187]	auto[0]	463	1			T4	7		T8	5		T11	1
auto[184:187]	auto[1]	1064	1			T1	8		T4	10		T8	3
auto[188:191]	auto[0]	78	1			T25	1		T28	1		T29	1
auto[188:191]	auto[1]	298	1			T1	6		T8	2		T13	1
auto[192:195]	auto[0]	81	1			T4	2		T25	1		T36	1
auto[192:195]	auto[1]	320	1			T1	3		T4	3		T8	2
auto[196:199]	auto[0]	85	1			T4	1		T13	1		T25	3
auto[196:199]	auto[1]	305	1			T1	3		T4	2		T40	2
auto[200:203]	auto[0]	94	1			T4	2		T11	3		T13	4
auto[200:203]	auto[1]	275	1			T1	3		T13	1		T25	1
auto[204:207]	auto[0]	72	1			T4	3		T8	3		T25	3
auto[204:207]	auto[1]	301	1			T1	1		T4	4		T11	2
auto[208:211]	auto[0]	78	1			T4	1		T8	1		T11	3
auto[208:211]	auto[1]	327	1			T1	2		T4	2		T25	2
auto[212:215]	auto[0]	81	1			T4	1		T13	2		T25	1
auto[212:215]	auto[1]	307	1			T1	6		T8	4		T11	3
auto[216:219]	auto[0]	61	1			T4	1		T25	1		T40	3
auto[216:219]	auto[1]	305	1			T1	6		T4	2		T11	1
auto[220:223]	auto[0]	71	1			T8	4		T11	1		T13	4
auto[220:223]	auto[1]	251	1			T1	2		T4	1		T8	1
auto[224:227]	auto[0]	79	1			T4	1		T11	4		T40	2
auto[224:227]	auto[1]	278	1			T1	7		T4	3		T8	2
auto[228:231]	auto[0]	88	1			T40	1		T197	1		T28	1
auto[228:231]	auto[1]	293	1			T1	3		T11	2		T13	3
auto[232:235]	auto[0]	848	1			T4	17		T8	8		T9	5
auto[232:235]	auto[1]	2464	1			T1	25		T4	19		T8	13
auto[236:239]	auto[0]	71	1			T11	5		T40	1		T36	2
auto[236:239]	auto[1]	251	1			T1	2		T4	4		T8	3
auto[240:243]	auto[0]	75	1			T13	4		T25	2		T197	3
auto[240:243]	auto[1]	319	1			T4	3		T11	2		T13	2
auto[244:247]	auto[0]	66	1			T11	1		T12	1		T40	1
auto[244:247]	auto[1]	335	1			T1	1		T4	7		T11	1
auto[248:251]	auto[0]	68	1			T39	2		T63	1		T28	2
auto[248:251]	auto[1]	317	1			T1	4		T4	1		T11	3
auto[252:255]	auto[0]	98	1			T4	2		T8	3		T13	2
auto[252:255]	auto[1]	273	1			T8	3		T36	2		T28	1