Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.95 98.36 94.16 98.61 89.36 97.09 95.82 98.22


Total tests in report: 1116
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
84.17 84.17 97.88 97.88 90.36 90.36 71.63 71.63 88.89 88.89 96.34 96.34 84.87 84.87 59.25 59.25 /workspace/coverage/default/26.spi_device_stress_all.1209214592
88.98 4.81 97.99 0.11 92.23 1.87 91.87 20.24 91.11 2.22 96.51 0.17 85.16 0.29 68.00 8.75 /workspace/coverage/default/26.spi_device_flash_and_tpm_min_idle.1715452906
90.82 1.84 98.09 0.10 92.38 0.15 91.87 0.00 93.33 2.22 96.65 0.14 85.16 0.00 78.24 10.24 /workspace/coverage/default/45.spi_device_stress_all.1252640494
92.21 1.39 98.09 0.00 92.54 0.16 92.26 0.40 93.33 0.00 96.68 0.03 92.80 7.64 79.77 1.53 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1354752225
92.82 0.61 98.12 0.03 92.58 0.04 92.26 0.00 93.33 0.00 96.75 0.07 92.80 0.00 83.88 4.10 /workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.2368140885
93.39 0.57 98.13 0.01 92.60 0.02 96.23 3.97 93.33 0.00 96.76 0.02 92.80 0.00 83.88 0.00 /workspace/coverage/default/14.spi_device_ram_cfg.457978753
93.84 0.45 98.13 0.00 92.60 0.00 96.23 0.00 93.33 0.00 96.76 0.00 92.94 0.14 86.89 3.02 /workspace/coverage/default/3.spi_device_stress_all.1653836021
94.24 0.40 98.15 0.02 92.70 0.10 96.83 0.60 93.33 0.00 96.80 0.03 94.09 1.15 87.78 0.89 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.3579624197
94.53 0.29 98.15 0.00 92.78 0.07 96.83 0.00 93.33 0.00 96.82 0.02 94.09 0.00 89.71 1.93 /workspace/coverage/default/0.spi_device_flash_all.3086620601
94.76 0.23 98.15 0.00 92.80 0.02 98.02 1.19 93.33 0.00 96.82 0.00 94.24 0.14 89.96 0.25 /workspace/coverage/default/0.spi_device_sec_cm.1856656283
94.97 0.21 98.26 0.11 93.15 0.35 98.02 0.00 93.33 0.00 96.97 0.15 94.81 0.58 90.26 0.30 /workspace/coverage/default/16.spi_device_flash_mode.2341888427
95.15 0.18 98.26 0.00 93.15 0.00 98.02 0.00 93.33 0.00 96.97 0.00 94.81 0.00 91.49 1.24 /workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.1208026407
95.30 0.16 98.26 0.00 93.15 0.00 98.02 0.00 93.33 0.00 96.97 0.00 94.81 0.00 92.58 1.09 /workspace/coverage/default/3.spi_device_flash_and_tpm_min_idle.3923954872
95.44 0.14 98.26 0.00 93.80 0.65 98.02 0.00 93.33 0.00 96.97 0.00 94.81 0.00 92.88 0.30 /workspace/coverage/cover_reg_top/3.spi_device_tl_errors.4060767881
95.57 0.13 98.26 0.00 93.83 0.02 98.02 0.00 93.33 0.00 96.97 0.00 95.68 0.86 92.88 0.00 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.1823695028
95.69 0.12 98.26 0.00 93.83 0.00 98.02 0.00 93.33 0.00 96.97 0.00 95.68 0.00 93.72 0.84 /workspace/coverage/default/42.spi_device_flash_and_tpm.2444566635
95.78 0.09 98.26 0.00 93.83 0.00 98.02 0.00 93.33 0.00 96.97 0.00 95.68 0.00 94.36 0.64 /workspace/coverage/default/33.spi_device_flash_and_tpm.1325050273
95.87 0.09 98.31 0.06 93.91 0.09 98.41 0.40 93.33 0.00 97.05 0.08 95.68 0.00 94.36 0.00 /workspace/coverage/default/0.spi_device_mem_parity.3927139163
95.95 0.08 98.31 0.00 93.91 0.00 98.41 0.00 93.33 0.00 97.05 0.00 95.82 0.14 94.81 0.45 /workspace/coverage/default/43.spi_device_stress_all.4110977358
96.01 0.06 98.31 0.00 93.91 0.00 98.41 0.00 93.33 0.00 97.05 0.00 95.82 0.00 95.25 0.45 /workspace/coverage/default/20.spi_device_flash_all.2154490545
96.07 0.06 98.31 0.00 93.91 0.00 98.41 0.00 93.33 0.00 97.05 0.00 95.82 0.00 95.65 0.40 /workspace/coverage/default/17.spi_device_flash_and_tpm.1702071662
96.13 0.06 98.31 0.00 93.91 0.00 98.41 0.00 93.33 0.00 97.05 0.00 95.82 0.00 96.04 0.40 /workspace/coverage/default/29.spi_device_stress_all.2363939412
96.17 0.04 98.31 0.00 93.91 0.00 98.41 0.00 93.33 0.00 97.05 0.00 95.82 0.00 96.34 0.30 /workspace/coverage/default/22.spi_device_flash_and_tpm.2373413400
96.21 0.04 98.34 0.03 93.95 0.04 98.61 0.20 93.33 0.00 97.05 0.00 95.82 0.00 96.34 0.00 /workspace/coverage/default/1.spi_device_alert_test.3370536313
96.24 0.04 98.34 0.00 93.96 0.01 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 96.59 0.25 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.3033312788
96.27 0.03 98.34 0.00 93.96 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 96.79 0.20 /workspace/coverage/default/47.spi_device_flash_mode.1582289362
96.30 0.03 98.34 0.00 93.96 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 96.98 0.20 /workspace/coverage/default/8.spi_device_flash_and_tpm.1480683045
96.32 0.02 98.34 0.00 94.11 0.15 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 96.98 0.00 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.4173610225
96.34 0.02 98.34 0.00 94.11 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.13 0.15 /workspace/coverage/default/1.spi_device_stress_all.3104450383
96.36 0.02 98.35 0.01 94.11 0.00 98.61 0.00 93.33 0.00 97.07 0.02 95.82 0.00 97.23 0.10 /workspace/coverage/default/19.spi_device_intercept.2292788118
96.38 0.02 98.35 0.00 94.14 0.02 98.61 0.00 93.33 0.00 97.07 0.00 95.82 0.00 97.33 0.10 /workspace/coverage/default/0.spi_device_stress_all.3766930211
96.39 0.01 98.35 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.07 0.00 95.82 0.00 97.43 0.10 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.3800199225
96.41 0.01 98.35 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.07 0.00 95.82 0.00 97.53 0.10 /workspace/coverage/default/25.spi_device_stress_all.1429710547
96.42 0.01 98.35 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.07 0.00 95.82 0.00 97.63 0.10 /workspace/coverage/default/37.spi_device_flash_all.345748294
96.44 0.01 98.35 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.07 0.00 95.82 0.00 97.73 0.10 /workspace/coverage/default/45.spi_device_flash_all.1549809524
96.45 0.01 98.36 0.01 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.02 95.82 0.00 97.77 0.05 /workspace/coverage/default/21.spi_device_flash_and_tpm_min_idle.539663296
96.45 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 97.82 0.05 /workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.1725044018
96.46 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 97.87 0.05 /workspace/coverage/default/10.spi_device_intercept.707613793
96.47 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 97.92 0.05 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.1503890027
96.47 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 97.97 0.05 /workspace/coverage/default/16.spi_device_flash_all.886806870
96.48 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 98.02 0.05 /workspace/coverage/default/19.spi_device_flash_all.1868928331
96.49 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 98.07 0.05 /workspace/coverage/default/21.spi_device_flash_and_tpm.3947014689
96.50 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 98.12 0.05 /workspace/coverage/default/23.spi_device_flash_all.317268155
96.50 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 98.17 0.05 /workspace/coverage/default/37.spi_device_flash_and_tpm.1914948406
96.51 0.01 98.36 0.00 94.14 0.00 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 98.22 0.05 /workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.1844139154
96.51 0.01 98.36 0.00 94.16 0.02 98.61 0.00 93.33 0.00 97.09 0.00 95.82 0.00 98.22 0.00 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1411567329


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.1972467579
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3736120550
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2414464420
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2888232548
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.292428332
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.149189477
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.1815052019
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.2343094874
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.397214802
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.254530587
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.3348046177
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3738361671
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.3488984035
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.2617057963
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.730587292
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.3426189130
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.4247615578
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.646941054
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3607386385
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.2691860317
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1432766829
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.159987000
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.3383415212
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.2122431840
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1668712576
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3902051037
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.2071952996
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.3869365035
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2426357774
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.1197530800
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.1511989616
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.195330047
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.48451754
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.3646817515
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1085301725
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.585216817
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.3981065465
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.311797148
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.569712917
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.141889380
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.4074572843
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.3880734620
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.843479273
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.1943181980
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.3124478158
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3670909425
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3481827598
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.878558128
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.3535932007
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.3377473641
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3187697472
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.597174581
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.1110392729
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.984401309
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3043238571
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.2341026202
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.3418611
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1106137409
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.2467493718
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.1808396597
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.573253642
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.3617102565
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3936080987
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3838526204
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.1636882182
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.1436497900
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.817286344
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1660268701
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.189731789
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2683788798
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.664769932
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.2457150508
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.881742968
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.2406063755
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.462180529
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2189335442
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.1963177147
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.1173878448
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.1844954743
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.157497404
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2334652967
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.2200490575
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.940819157
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1984048719
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.2944672556
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.3515744053
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.374306809
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.3475707349
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2786260630
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.1032528561
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.3606085497
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.105746749
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.1327091871
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.4216212302
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.2809630635
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.1519103345
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.2604897896
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.3459112467
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.1749538351
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.181975431
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.1671446437
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.2470461914
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.4204930828
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.2912597523
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.3973034021
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3084981605
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.2229553041
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2213735576
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.2131521597
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.1897825557
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.1723470977
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.2883543508
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.12642114
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.3956129565
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.717902101
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.3234126804
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.3313895047
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.3739518270
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.4022312371
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.259224379
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2184907946
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.2745871415
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.1243070043
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.1700239283
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.823623480
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.2657318811
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.2054351383
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.3079902613
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.1570839023
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.674288614
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.1045975034
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2278316509
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.126254688
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.1823618834
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.3812227178
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2630984021
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.1836074974
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.4111338941
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.3721899151
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.3877811187
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.2373103080
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.2307590811
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.764171403
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.805813096
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/workspace/coverage/default/9.spi_device_flash_and_tpm.2810395743
/workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.2762488458
/workspace/coverage/default/9.spi_device_flash_mode.3354195703
/workspace/coverage/default/9.spi_device_intercept.1361582841
/workspace/coverage/default/9.spi_device_mailbox.2464039071
/workspace/coverage/default/9.spi_device_mem_parity.3809896844
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.2584690370
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.3124923770
/workspace/coverage/default/9.spi_device_ram_cfg.2903463836
/workspace/coverage/default/9.spi_device_read_buffer_direct.3729004506
/workspace/coverage/default/9.spi_device_stress_all.1910337786
/workspace/coverage/default/9.spi_device_tpm_all.1180215134
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.1679380734
/workspace/coverage/default/9.spi_device_tpm_rw.3700478645
/workspace/coverage/default/9.spi_device_tpm_sts_read.1436135489
/workspace/coverage/default/9.spi_device_upload.3362735678




Total test records in report: 1116
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/17.spi_device_flash_and_tpm.1702071662 Mar 26 02:03:09 PM PDT 24 Mar 26 02:05:16 PM PDT 24 39683383772 ps
T2 /workspace/coverage/default/48.spi_device_tpm_all.3579698567 Mar 26 02:06:34 PM PDT 24 Mar 26 02:06:58 PM PDT 24 2068424052 ps
T3 /workspace/coverage/default/25.spi_device_csb_read.1762096691 Mar 26 02:04:02 PM PDT 24 Mar 26 02:04:03 PM PDT 24 36464400 ps
T4 /workspace/coverage/default/26.spi_device_stress_all.1209214592 Mar 26 02:04:12 PM PDT 24 Mar 26 02:11:17 PM PDT 24 87527109302 ps
T5 /workspace/coverage/default/17.spi_device_upload.2474554554 Mar 26 02:03:09 PM PDT 24 Mar 26 02:03:16 PM PDT 24 913205243 ps
T6 /workspace/coverage/default/46.spi_device_tpm_all.3432158690 Mar 26 02:06:21 PM PDT 24 Mar 26 02:07:03 PM PDT 24 8148298006 ps
T7 /workspace/coverage/default/29.spi_device_mailbox.267507588 Mar 26 02:04:40 PM PDT 24 Mar 26 02:04:50 PM PDT 24 861992035 ps
T8 /workspace/coverage/default/13.spi_device_flash_all.1411516775 Mar 26 02:02:30 PM PDT 24 Mar 26 02:10:12 PM PDT 24 132752550537 ps
T9 /workspace/coverage/default/42.spi_device_cfg_cmd.1739961702 Mar 26 02:05:59 PM PDT 24 Mar 26 02:06:03 PM PDT 24 236127709 ps
T10 /workspace/coverage/default/27.spi_device_csb_read.2341224373 Mar 26 02:04:13 PM PDT 24 Mar 26 02:04:14 PM PDT 24 26759260 ps
T15 /workspace/coverage/default/30.spi_device_tpm_read_hw_reg.1252963904 Mar 26 02:04:40 PM PDT 24 Mar 26 02:04:48 PM PDT 24 864865112 ps
T11 /workspace/coverage/default/37.spi_device_flash_all.345748294 Mar 26 02:05:26 PM PDT 24 Mar 26 02:06:51 PM PDT 24 54849054827 ps
T56 /workspace/coverage/default/14.spi_device_ram_cfg.457978753 Mar 26 02:02:43 PM PDT 24 Mar 26 02:02:44 PM PDT 24 48184737 ps
T12 /workspace/coverage/default/4.spi_device_pass_cmd_filtering.1564537376 Mar 26 02:01:13 PM PDT 24 Mar 26 02:01:30 PM PDT 24 15782467242 ps
T16 /workspace/coverage/default/39.spi_device_tpm_sts_read.1303080918 Mar 26 02:05:35 PM PDT 24 Mar 26 02:05:36 PM PDT 24 69025941 ps
T51 /workspace/coverage/default/33.spi_device_alert_test.945481460 Mar 26 02:04:59 PM PDT 24 Mar 26 02:05:01 PM PDT 24 24788451 ps
T13 /workspace/coverage/default/26.spi_device_flash_and_tpm_min_idle.1715452906 Mar 26 02:04:13 PM PDT 24 Mar 26 02:10:57 PM PDT 24 107249798721 ps
T14 /workspace/coverage/default/16.spi_device_flash_mode.2341888427 Mar 26 02:02:56 PM PDT 24 Mar 26 02:03:08 PM PDT 24 620562895 ps
T17 /workspace/coverage/default/17.spi_device_tpm_all.2884644346 Mar 26 02:03:08 PM PDT 24 Mar 26 02:03:47 PM PDT 24 7010008172 ps
T38 /workspace/coverage/default/22.spi_device_upload.3975577532 Mar 26 02:03:47 PM PDT 24 Mar 26 02:03:54 PM PDT 24 558839329 ps
T50 /workspace/coverage/default/9.spi_device_csb_read.1129196287 Mar 26 02:01:55 PM PDT 24 Mar 26 02:01:56 PM PDT 24 229537042 ps
T24 /workspace/coverage/default/18.spi_device_tpm_all.77233497 Mar 26 02:03:09 PM PDT 24 Mar 26 02:03:31 PM PDT 24 3562040536 ps
T25 /workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.2762488458 Mar 26 02:02:08 PM PDT 24 Mar 26 02:03:18 PM PDT 24 12108184218 ps
T39 /workspace/coverage/default/10.spi_device_upload.1301725007 Mar 26 02:02:01 PM PDT 24 Mar 26 02:02:17 PM PDT 24 6434676693 ps
T40 /workspace/coverage/default/30.spi_device_flash_and_tpm_min_idle.742862446 Mar 26 02:04:41 PM PDT 24 Mar 26 02:12:41 PM PDT 24 225744672123 ps
T125 /workspace/coverage/default/25.spi_device_mailbox.1187579414 Mar 26 02:04:15 PM PDT 24 Mar 26 02:05:00 PM PDT 24 49981880182 ps
T126 /workspace/coverage/default/14.spi_device_csb_read.1931276518 Mar 26 02:02:31 PM PDT 24 Mar 26 02:02:33 PM PDT 24 57708172 ps
T73 /workspace/coverage/default/45.spi_device_tpm_read_hw_reg.4125854173 Mar 26 02:06:10 PM PDT 24 Mar 26 02:06:17 PM PDT 24 2794278890 ps
T127 /workspace/coverage/default/41.spi_device_intercept.4284444038 Mar 26 02:05:47 PM PDT 24 Mar 26 02:05:52 PM PDT 24 597230412 ps
T197 /workspace/coverage/default/44.spi_device_pass_cmd_filtering.2847888644 Mar 26 02:06:08 PM PDT 24 Mar 26 02:06:24 PM PDT 24 46813132200 ps
T218 /workspace/coverage/default/46.spi_device_intercept.3065944396 Mar 26 02:06:22 PM PDT 24 Mar 26 02:06:25 PM PDT 24 352957778 ps
T54 /workspace/coverage/default/4.spi_device_sec_cm.2113426218 Mar 26 02:01:25 PM PDT 24 Mar 26 02:01:26 PM PDT 24 66099560 ps
T63 /workspace/coverage/default/13.spi_device_upload.1133566283 Mar 26 02:02:32 PM PDT 24 Mar 26 02:02:54 PM PDT 24 20348983687 ps
T64 /workspace/coverage/default/14.spi_device_upload.3781126603 Mar 26 02:02:43 PM PDT 24 Mar 26 02:02:50 PM PDT 24 1694266667 ps
T65 /workspace/coverage/default/22.spi_device_cfg_cmd.4145143760 Mar 26 02:03:46 PM PDT 24 Mar 26 02:03:50 PM PDT 24 605970136 ps
T66 /workspace/coverage/default/30.spi_device_mailbox.3896941580 Mar 26 02:04:45 PM PDT 24 Mar 26 02:05:12 PM PDT 24 10127302691 ps
T67 /workspace/coverage/default/47.spi_device_csb_read.3252672791 Mar 26 02:06:21 PM PDT 24 Mar 26 02:06:22 PM PDT 24 60515011 ps
T26 /workspace/coverage/default/22.spi_device_flash_and_tpm.2373413400 Mar 26 02:03:47 PM PDT 24 Mar 26 02:04:42 PM PDT 24 7099768930 ps
T36 /workspace/coverage/default/45.spi_device_stress_all.1252640494 Mar 26 02:06:10 PM PDT 24 Mar 26 02:09:02 PM PDT 24 53582911292 ps
T27 /workspace/coverage/default/17.spi_device_flash_and_tpm_min_idle.1655058783 Mar 26 02:03:09 PM PDT 24 Mar 26 02:03:37 PM PDT 24 9952260196 ps
T68 /workspace/coverage/default/32.spi_device_intercept.982763607 Mar 26 02:04:48 PM PDT 24 Mar 26 02:04:56 PM PDT 24 2501015231 ps
T34 /workspace/coverage/default/49.spi_device_read_buffer_direct.3187721703 Mar 26 02:06:42 PM PDT 24 Mar 26 02:06:48 PM PDT 24 2214725628 ps
T212 /workspace/coverage/default/13.spi_device_cfg_cmd.3628409636 Mar 26 02:02:37 PM PDT 24 Mar 26 02:02:40 PM PDT 24 689576924 ps
T76 /workspace/coverage/default/28.spi_device_tpm_read_hw_reg.3923417459 Mar 26 02:04:33 PM PDT 24 Mar 26 02:04:37 PM PDT 24 5924341635 ps
T37 /workspace/coverage/default/44.spi_device_flash_all.41619332 Mar 26 02:06:11 PM PDT 24 Mar 26 02:06:49 PM PDT 24 28274591310 ps
T77 /workspace/coverage/default/20.spi_device_tpm_sts_read.3608057811 Mar 26 02:03:32 PM PDT 24 Mar 26 02:03:34 PM PDT 24 80178944 ps
T273 /workspace/coverage/default/48.spi_device_tpm_read_hw_reg.1388570208 Mar 26 02:06:32 PM PDT 24 Mar 26 02:06:54 PM PDT 24 13534561217 ps
T274 /workspace/coverage/default/32.spi_device_tpm_read_hw_reg.3822048576 Mar 26 02:04:49 PM PDT 24 Mar 26 02:04:59 PM PDT 24 4375581654 ps
T158 /workspace/coverage/default/0.spi_device_tpm_rw.939694198 Mar 26 02:00:52 PM PDT 24 Mar 26 02:01:00 PM PDT 24 249312292 ps
T111 /workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.3819263594 Mar 26 02:01:02 PM PDT 24 Mar 26 02:01:23 PM PDT 24 4399287169 ps
T35 /workspace/coverage/default/10.spi_device_read_buffer_direct.3869838021 Mar 26 02:02:10 PM PDT 24 Mar 26 02:02:14 PM PDT 24 428868839 ps
T275 /workspace/coverage/default/30.spi_device_csb_read.2773009702 Mar 26 02:04:37 PM PDT 24 Mar 26 02:04:39 PM PDT 24 16114503 ps
T57 /workspace/coverage/default/17.spi_device_ram_cfg.1966447762 Mar 26 02:03:08 PM PDT 24 Mar 26 02:03:12 PM PDT 24 33787245 ps
T219 /workspace/coverage/default/41.spi_device_cfg_cmd.989794304 Mar 26 02:05:53 PM PDT 24 Mar 26 02:05:56 PM PDT 24 71310672 ps
T52 /workspace/coverage/default/49.spi_device_alert_test.1525215742 Mar 26 02:06:44 PM PDT 24 Mar 26 02:06:45 PM PDT 24 58304764 ps
T78 /workspace/coverage/default/40.spi_device_mailbox.796357891 Mar 26 02:05:37 PM PDT 24 Mar 26 02:06:30 PM PDT 24 19477421376 ps
T159 /workspace/coverage/default/22.spi_device_tpm_rw.2884982312 Mar 26 02:03:48 PM PDT 24 Mar 26 02:03:49 PM PDT 24 18287731 ps
T180 /workspace/coverage/default/38.spi_device_upload.1413468554 Mar 26 02:05:27 PM PDT 24 Mar 26 02:06:09 PM PDT 24 55071958463 ps
T195 /workspace/coverage/default/35.spi_device_pass_cmd_filtering.1316274026 Mar 26 02:05:11 PM PDT 24 Mar 26 02:05:33 PM PDT 24 7087703096 ps
T276 /workspace/coverage/default/13.spi_device_tpm_sts_read.522829890 Mar 26 02:02:30 PM PDT 24 Mar 26 02:02:32 PM PDT 24 84994262 ps
T157 /workspace/coverage/default/16.spi_device_flash_and_tpm.156577954 Mar 26 02:02:59 PM PDT 24 Mar 26 02:04:07 PM PDT 24 5830699814 ps
T28 /workspace/coverage/default/0.spi_device_flash_all.3086620601 Mar 26 02:00:53 PM PDT 24 Mar 26 02:02:28 PM PDT 24 9634611889 ps
T117 /workspace/coverage/default/38.spi_device_read_buffer_direct.1749425824 Mar 26 02:05:37 PM PDT 24 Mar 26 02:05:40 PM PDT 24 427392274 ps
T277 /workspace/coverage/default/45.spi_device_csb_read.4237369336 Mar 26 02:06:11 PM PDT 24 Mar 26 02:06:11 PM PDT 24 29326730 ps
T278 /workspace/coverage/default/35.spi_device_csb_read.2564173053 Mar 26 02:05:10 PM PDT 24 Mar 26 02:05:11 PM PDT 24 31618299 ps
T112 /workspace/coverage/default/31.spi_device_flash_and_tpm.3599322792 Mar 26 02:04:47 PM PDT 24 Mar 26 02:10:22 PM PDT 24 181856060105 ps
T279 /workspace/coverage/default/17.spi_device_csb_read.2094722003 Mar 26 02:03:06 PM PDT 24 Mar 26 02:03:11 PM PDT 24 16284017 ps
T118 /workspace/coverage/default/4.spi_device_flash_mode.410347734 Mar 26 02:01:31 PM PDT 24 Mar 26 02:01:37 PM PDT 24 803620996 ps
T177 /workspace/coverage/default/19.spi_device_intercept.2292788118 Mar 26 02:03:19 PM PDT 24 Mar 26 02:03:38 PM PDT 24 5245307705 ps
T181 /workspace/coverage/default/12.spi_device_mailbox.2451546657 Mar 26 02:02:18 PM PDT 24 Mar 26 02:03:07 PM PDT 24 16580055446 ps
T280 /workspace/coverage/default/9.spi_device_tpm_sts_read.1436135489 Mar 26 02:01:54 PM PDT 24 Mar 26 02:01:54 PM PDT 24 55953730 ps
T156 /workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.921298252 Mar 26 02:04:02 PM PDT 24 Mar 26 02:05:50 PM PDT 24 16450719778 ps
T196 /workspace/coverage/default/17.spi_device_intercept.282717754 Mar 26 02:03:09 PM PDT 24 Mar 26 02:03:19 PM PDT 24 1266875510 ps
T58 /workspace/coverage/default/6.spi_device_ram_cfg.134077552 Mar 26 02:01:33 PM PDT 24 Mar 26 02:01:35 PM PDT 24 18471866 ps
T209 /workspace/coverage/default/24.spi_device_pass_cmd_filtering.2779796417 Mar 26 02:04:02 PM PDT 24 Mar 26 02:04:35 PM PDT 24 10959947784 ps
T119 /workspace/coverage/default/2.spi_device_flash_mode.2480484624 Mar 26 02:01:02 PM PDT 24 Mar 26 02:01:21 PM PDT 24 1340370253 ps
T153 /workspace/coverage/default/18.spi_device_flash_and_tpm.2319762656 Mar 26 02:03:18 PM PDT 24 Mar 26 02:09:39 PM PDT 24 532705737906 ps
T233 /workspace/coverage/default/44.spi_device_cfg_cmd.2833418001 Mar 26 02:06:11 PM PDT 24 Mar 26 02:06:14 PM PDT 24 349960878 ps
T120 /workspace/coverage/default/8.spi_device_read_buffer_direct.4238790213 Mar 26 02:01:53 PM PDT 24 Mar 26 02:01:57 PM PDT 24 171532802 ps
T190 /workspace/coverage/default/28.spi_device_mailbox.772252583 Mar 26 02:04:33 PM PDT 24 Mar 26 02:04:39 PM PDT 24 1505457763 ps
T152 /workspace/coverage/default/6.spi_device_flash_all.730021253 Mar 26 02:01:25 PM PDT 24 Mar 26 02:02:04 PM PDT 24 101747592413 ps
T281 /workspace/coverage/default/47.spi_device_tpm_read_hw_reg.3595633819 Mar 26 02:06:24 PM PDT 24 Mar 26 02:06:32 PM PDT 24 1202408144 ps
T171 /workspace/coverage/default/2.spi_device_flash_all.271014417 Mar 26 02:01:02 PM PDT 24 Mar 26 02:01:49 PM PDT 24 17157003672 ps
T282 /workspace/coverage/default/27.spi_device_cfg_cmd.3618200042 Mar 26 02:04:18 PM PDT 24 Mar 26 02:04:21 PM PDT 24 2838081900 ps
T283 /workspace/coverage/default/45.spi_device_tpm_rw.2914851093 Mar 26 02:06:10 PM PDT 24 Mar 26 02:06:14 PM PDT 24 171753608 ps
T121 /workspace/coverage/default/31.spi_device_flash_mode.3508490038 Mar 26 02:04:49 PM PDT 24 Mar 26 02:05:12 PM PDT 24 11389179321 ps
T269 /workspace/coverage/default/8.spi_device_tpm_all.656324499 Mar 26 02:01:55 PM PDT 24 Mar 26 02:02:03 PM PDT 24 612992500 ps
T29 /workspace/coverage/default/33.spi_device_flash_and_tpm.1325050273 Mar 26 02:05:00 PM PDT 24 Mar 26 02:10:29 PM PDT 24 220662323119 ps
T208 /workspace/coverage/default/43.spi_device_mailbox.815283263 Mar 26 02:06:02 PM PDT 24 Mar 26 02:06:33 PM PDT 24 32713636046 ps
T192 /workspace/coverage/default/7.spi_device_upload.2969743502 Mar 26 02:01:54 PM PDT 24 Mar 26 02:02:07 PM PDT 24 2254003154 ps
T284 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.1503890027 Mar 26 02:02:32 PM PDT 24 Mar 26 02:02:45 PM PDT 24 2565644350 ps
T154 /workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.2014026777 Mar 26 02:04:01 PM PDT 24 Mar 26 02:04:28 PM PDT 24 8425014000 ps
T205 /workspace/coverage/default/48.spi_device_intercept.2230431114 Mar 26 02:06:34 PM PDT 24 Mar 26 02:06:39 PM PDT 24 670592460 ps
T214 /workspace/coverage/default/44.spi_device_upload.379752378 Mar 26 02:06:11 PM PDT 24 Mar 26 02:06:25 PM PDT 24 56210090570 ps
T285 /workspace/coverage/default/23.spi_device_csb_read.4233562069 Mar 26 02:03:48 PM PDT 24 Mar 26 02:03:48 PM PDT 24 23164304 ps
T286 /workspace/coverage/default/37.spi_device_tpm_rw.3255300111 Mar 26 02:05:25 PM PDT 24 Mar 26 02:05:26 PM PDT 24 705671193 ps
T191 /workspace/coverage/default/42.spi_device_pass_cmd_filtering.1198019402 Mar 26 02:05:47 PM PDT 24 Mar 26 02:05:54 PM PDT 24 742937820 ps
T30 /workspace/coverage/default/3.spi_device_stress_all.1653836021 Mar 26 02:01:15 PM PDT 24 Mar 26 02:08:10 PM PDT 24 49782679189 ps
T31 /workspace/coverage/default/18.spi_device_flash_and_tpm_min_idle.2106356710 Mar 26 02:03:24 PM PDT 24 Mar 26 02:04:26 PM PDT 24 51423505855 ps
T43 /workspace/coverage/default/41.spi_device_mailbox.4294267157 Mar 26 02:05:55 PM PDT 24 Mar 26 02:06:41 PM PDT 24 169166744341 ps
T44 /workspace/coverage/default/34.spi_device_mailbox.2822771342 Mar 26 02:05:12 PM PDT 24 Mar 26 02:05:44 PM PDT 24 6565250894 ps
T45 /workspace/coverage/default/16.spi_device_upload.1571243437 Mar 26 02:02:57 PM PDT 24 Mar 26 02:03:04 PM PDT 24 571955681 ps
T46 /workspace/coverage/default/27.spi_device_alert_test.1269018766 Mar 26 02:04:27 PM PDT 24 Mar 26 02:04:28 PM PDT 24 12216301 ps
T47 /workspace/coverage/default/6.spi_device_tpm_all.490507357 Mar 26 02:01:25 PM PDT 24 Mar 26 02:01:32 PM PDT 24 3752119882 ps
T32 /workspace/coverage/default/1.spi_device_stress_all.3104450383 Mar 26 02:01:01 PM PDT 24 Mar 26 02:03:37 PM PDT 24 68865314544 ps
T48 /workspace/coverage/default/25.spi_device_pass_cmd_filtering.2043474622 Mar 26 02:04:03 PM PDT 24 Mar 26 02:04:34 PM PDT 24 11394446532 ps
T49 /workspace/coverage/default/47.spi_device_pass_addr_payload_swap.306944078 Mar 26 02:06:24 PM PDT 24 Mar 26 02:06:27 PM PDT 24 181119608 ps
T193 /workspace/coverage/default/47.spi_device_pass_cmd_filtering.2673176082 Mar 26 02:06:24 PM PDT 24 Mar 26 02:06:56 PM PDT 24 19560833102 ps
T287 /workspace/coverage/default/6.spi_device_tpm_sts_read.1009022847 Mar 26 02:01:27 PM PDT 24 Mar 26 02:01:29 PM PDT 24 51424006 ps
T33 /workspace/coverage/default/42.spi_device_flash_and_tpm.2444566635 Mar 26 02:06:00 PM PDT 24 Mar 26 02:12:34 PM PDT 24 469868822897 ps
T288 /workspace/coverage/default/9.spi_device_upload.3362735678 Mar 26 02:02:07 PM PDT 24 Mar 26 02:02:16 PM PDT 24 984989128 ps
T69 /workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.2368140885 Mar 26 02:01:29 PM PDT 24 Mar 26 02:04:07 PM PDT 24 13675072596 ps
T21 /workspace/coverage/default/0.spi_device_mem_parity.3927139163 Mar 26 02:00:52 PM PDT 24 Mar 26 02:00:54 PM PDT 24 16436468 ps
T155 /workspace/coverage/default/46.spi_device_flash_all.1383900895 Mar 26 02:06:20 PM PDT 24 Mar 26 02:06:44 PM PDT 24 1133605414 ps
T53 /workspace/coverage/default/5.spi_device_alert_test.1534360560 Mar 26 02:01:33 PM PDT 24 Mar 26 02:01:34 PM PDT 24 32257617 ps
T122 /workspace/coverage/default/26.spi_device_read_buffer_direct.3029211432 Mar 26 02:04:15 PM PDT 24 Mar 26 02:04:20 PM PDT 24 495267257 ps
T172 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.1688195655 Mar 26 02:01:27 PM PDT 24 Mar 26 02:05:24 PM PDT 24 114714997400 ps
T22 /workspace/coverage/default/18.spi_device_mem_parity.4266566775 Mar 26 02:03:08 PM PDT 24 Mar 26 02:03:12 PM PDT 24 154998266 ps
T224 /workspace/coverage/default/3.spi_device_mailbox.120306639 Mar 26 02:01:13 PM PDT 24 Mar 26 02:01:20 PM PDT 24 1206285478 ps
T289 /workspace/coverage/default/14.spi_device_pass_cmd_filtering.693989443 Mar 26 02:02:42 PM PDT 24 Mar 26 02:02:52 PM PDT 24 5272096269 ps
T55 /workspace/coverage/default/30.spi_device_stress_all.4028298785 Mar 26 02:04:41 PM PDT 24 Mar 26 02:04:43 PM PDT 24 92818841 ps
T113 /workspace/coverage/default/40.spi_device_stress_all.1822551008 Mar 26 02:05:55 PM PDT 24 Mar 26 02:08:45 PM PDT 24 48687803346 ps
T144 /workspace/coverage/default/3.spi_device_csb_read.1210044621 Mar 26 02:01:15 PM PDT 24 Mar 26 02:01:16 PM PDT 24 19356100 ps
T145 /workspace/coverage/default/33.spi_device_mailbox.3861883454 Mar 26 02:04:59 PM PDT 24 Mar 26 02:05:03 PM PDT 24 995400075 ps
T146 /workspace/coverage/default/9.spi_device_tpm_read_hw_reg.1679380734 Mar 26 02:01:55 PM PDT 24 Mar 26 02:02:11 PM PDT 24 3906018991 ps
T147 /workspace/coverage/default/24.spi_device_flash_all.296980192 Mar 26 02:04:00 PM PDT 24 Mar 26 02:05:14 PM PDT 24 30792983586 ps
T148 /workspace/coverage/default/23.spi_device_tpm_rw.3449085621 Mar 26 02:03:47 PM PDT 24 Mar 26 02:03:49 PM PDT 24 24506471 ps
T149 /workspace/coverage/default/32.spi_device_alert_test.2373595144 Mar 26 02:04:59 PM PDT 24 Mar 26 02:05:00 PM PDT 24 14722779 ps
T150 /workspace/coverage/default/3.spi_device_ram_cfg.3688533975 Mar 26 02:01:15 PM PDT 24 Mar 26 02:01:16 PM PDT 24 36316672 ps
T151 /workspace/coverage/default/13.spi_device_stress_all.238041349 Mar 26 02:02:33 PM PDT 24 Mar 26 02:04:51 PM PDT 24 102038189965 ps
T290 /workspace/coverage/default/34.spi_device_flash_and_tpm_min_idle.1498438672 Mar 26 02:05:13 PM PDT 24 Mar 26 02:06:36 PM PDT 24 56855555656 ps
T217 /workspace/coverage/default/49.spi_device_upload.2339002614 Mar 26 02:06:34 PM PDT 24 Mar 26 02:06:44 PM PDT 24 433554898 ps
T137 /workspace/coverage/default/47.spi_device_stress_all.1103997105 Mar 26 02:06:32 PM PDT 24 Mar 26 02:07:34 PM PDT 24 8399519656 ps
T123 /workspace/coverage/default/27.spi_device_read_buffer_direct.4277814712 Mar 26 02:04:32 PM PDT 24 Mar 26 02:04:38 PM PDT 24 10118437220 ps
T207 /workspace/coverage/default/43.spi_device_pass_addr_payload_swap.3368975111 Mar 26 02:06:00 PM PDT 24 Mar 26 02:06:29 PM PDT 24 18940450732 ps
T291 /workspace/coverage/default/28.spi_device_upload.3540083313 Mar 26 02:04:25 PM PDT 24 Mar 26 02:04:41 PM PDT 24 3674611997 ps
T124 /workspace/coverage/default/21.spi_device_read_buffer_direct.3324720465 Mar 26 02:03:46 PM PDT 24 Mar 26 02:03:51 PM PDT 24 1165565636 ps
T231 /workspace/coverage/default/1.spi_device_upload.824738960 Mar 26 02:01:03 PM PDT 24 Mar 26 02:01:22 PM PDT 24 4577722585 ps
T292 /workspace/coverage/default/4.spi_device_read_buffer_direct.1037233891 Mar 26 02:01:26 PM PDT 24 Mar 26 02:01:30 PM PDT 24 614509876 ps
T23 /workspace/coverage/default/14.spi_device_mem_parity.3247592627 Mar 26 02:02:31 PM PDT 24 Mar 26 02:02:33 PM PDT 24 111420975 ps
T293 /workspace/coverage/default/8.spi_device_tpm_rw.1061004829 Mar 26 02:01:55 PM PDT 24 Mar 26 02:01:58 PM PDT 24 141852315 ps
T59 /workspace/coverage/default/0.spi_device_sec_cm.1856656283 Mar 26 02:01:00 PM PDT 24 Mar 26 02:01:01 PM PDT 24 267567477 ps
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T337 /workspace/coverage/default/40.spi_device_tpm_read_hw_reg.3666144747 Mar 26 02:05:35 PM PDT 24 Mar 26 02:05:46 PM PDT 24 44057483216 ps
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T185 /workspace/coverage/default/38.spi_device_mailbox.809647443 Mar 26 02:05:29 PM PDT 24 Mar 26 02:05:53 PM PDT 24 26432867883 ps
T116 /workspace/coverage/default/22.spi_device_stress_all.1472453527 Mar 26 02:03:46 PM PDT 24 Mar 26 02:04:55 PM PDT 24 6920980937 ps
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T352 /workspace/coverage/default/35.spi_device_flash_and_tpm_min_idle.395986313 Mar 26 02:05:12 PM PDT 24 Mar 26 02:06:25 PM PDT 24 10298052639 ps
T353 /workspace/coverage/default/25.spi_device_tpm_read_hw_reg.1866036514 Mar 26 02:04:00 PM PDT 24 Mar 26 02:04:11 PM PDT 24 8425954094 ps
T354 /workspace/coverage/default/43.spi_device_pass_cmd_filtering.1033877954 Mar 26 02:06:04 PM PDT 24 Mar 26 02:06:17 PM PDT 24 16280769524 ps
T355 /workspace/coverage/default/25.spi_device_flash_and_tpm.3553814407 Mar 26 02:04:11 PM PDT 24 Mar 26 02:05:54 PM PDT 24 7743146206 ps
T356 /workspace/coverage/default/16.spi_device_tpm_sts_read.594596792 Mar 26 02:02:59 PM PDT 24 Mar 26 02:03:00 PM PDT 24 21228077 ps
T357 /workspace/coverage/default/5.spi_device_flash_mode.3794070237 Mar 26 02:01:24 PM PDT 24 Mar 26 02:02:03 PM PDT 24 8983403961 ps
T230 /workspace/coverage/default/36.spi_device_mailbox.712726178 Mar 26 02:05:24 PM PDT 24 Mar 26 02:05:36 PM PDT 24 1534044806 ps
T358 /workspace/coverage/default/23.spi_device_stress_all.9747439 Mar 26 02:03:59 PM PDT 24 Mar 26 02:04:01 PM PDT 24 168345038 ps
T359 /workspace/coverage/default/6.spi_device_stress_all.1739442550 Mar 26 02:01:26 PM PDT 24 Mar 26 02:05:11 PM PDT 24 42426378853 ps
T222 /workspace/coverage/default/20.spi_device_pass_addr_payload_swap.972860689 Mar 26 02:03:32 PM PDT 24 Mar 26 02:03:40 PM PDT 24 8881718344 ps
T187 /workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.3121782624 Mar 26 02:01:03 PM PDT 24 Mar 26 02:04:19 PM PDT 24 21525719414 ps
T360 /workspace/coverage/default/49.spi_device_tpm_all.3249749588 Mar 26 02:06:32 PM PDT 24 Mar 26 02:07:09 PM PDT 24 12845480960 ps
T361 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.2232844870 Mar 26 02:02:26 PM PDT 24 Mar 26 02:02:35 PM PDT 24 1585386224 ps
T362 /workspace/coverage/default/7.spi_device_tpm_all.4019688996 Mar 26 02:01:41 PM PDT 24 Mar 26 02:01:57 PM PDT 24 49508965994 ps
T363 /workspace/coverage/default/10.spi_device_tpm_read_hw_reg.242365798 Mar 26 02:02:08 PM PDT 24 Mar 26 02:02:31 PM PDT 24 76489063638 ps
T364 /workspace/coverage/default/10.spi_device_mailbox.1414536877 Mar 26 02:02:08 PM PDT 24 Mar 26 02:02:15 PM PDT 24 5354963504 ps
T365 /workspace/coverage/default/1.spi_device_pass_cmd_filtering.4071600607 Mar 26 02:01:05 PM PDT 24 Mar 26 02:01:07 PM PDT 24 187376488 ps
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