Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
86.03	90.27	78.43	96.94		78.12	86.36	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	116914124	4169	0	0
addr_swap_data_rd_A	116914124	1238	0	0
addr_swap_mask_rd_A	116914124	1336	0	0
cfg_rd_A	116914124	1650	0	0
cmd_filter_0_rd_A	116914124	6509	0	0
cmd_filter_1_rd_A	116914124	6778	0	0
cmd_filter_2_rd_A	116914124	7417	0	0
cmd_filter_3_rd_A	116914124	7492	0	0
cmd_filter_4_rd_A	116914124	7755	0	0
cmd_filter_5_rd_A	116914124	7661	0	0
cmd_filter_6_rd_A	116914124	7657	0	0
cmd_filter_7_rd_A	116914124	6374	0	0
cmd_info_0_rd_A	116914124	4042	0	0
cmd_info_10_rd_A	116914124	4023	0	0
cmd_info_11_rd_A	116914124	3562	0	0
cmd_info_12_rd_A	116914124	3783	0	0
cmd_info_13_rd_A	116914124	3764	0	0
cmd_info_14_rd_A	116914124	3966	0	0
cmd_info_15_rd_A	116914124	3666	0	0
cmd_info_16_rd_A	116914124	3611	0	0
cmd_info_17_rd_A	116914124	3889	0	0
cmd_info_18_rd_A	116914124	3612	0	0
cmd_info_19_rd_A	116914124	3500	0	0
cmd_info_1_rd_A	116914124	3934	0	0
cmd_info_20_rd_A	116914124	3336	0	0
cmd_info_21_rd_A	116914124	3265	0	0
cmd_info_22_rd_A	116914124	3773	0	0
cmd_info_23_rd_A	116914124	3303	0	0
cmd_info_2_rd_A	116914124	3756	0	0
cmd_info_3_rd_A	116914124	3849	0	0
cmd_info_4_rd_A	116914124	3472	0	0
cmd_info_5_rd_A	116914124	3504	0	0
cmd_info_6_rd_A	116914124	4258	0	0
cmd_info_7_rd_A	116914124	3837	0	0
cmd_info_8_rd_A	116914124	3713	0	0
cmd_info_9_rd_A	116914124	3225	0	0
cmd_info_en4b_rd_A	116914124	1499	0	0
cmd_info_ex4b_rd_A	116914124	1679	0	0
cmd_info_wrdi_rd_A	116914124	1448	0	0
cmd_info_wren_rd_A	116914124	1510	0	0
intercept_en_rd_A	116914124	1972	0	0
intr_enable_rd_A	116914124	3150	0	0
jedec_cc_rd_A	116914124	1625	0	0
jedec_id_rd_A	116914124	1512	0	0
mailbox_addr_rd_A	116914124	1366	0	0
payload_swap_data_rd_A	116914124	1390	0	0
payload_swap_mask_rd_A	116914124	1332	0	0
read_threshold_rd_A	116914124	1344	0	0
tpm_access_0_rd_A	116914124	1674	0	0
tpm_access_1_rd_A	116914124	1422	0	0
tpm_cfg_rd_A	116914124	2133	0	0
tpm_did_vid_rd_A	116914124	1523	0	0
tpm_int_enable_rd_A	116914124	1422	0	0
tpm_int_status_rd_A	116914124	1311	0	0
tpm_int_vector_rd_A	116914124	1223	0	0
tpm_intf_capability_rd_A	116914124	1331	0	0
tpm_rid_rd_A	116914124	1324	0	0
tpm_sts_rd_A	116914124	1311	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	4169	0	0
T35	10419	1	0	0
T114	17522	374	0	0
T115	3444	81	0	0
T116	15240	267	0	0
T121	28415	2	0	0
T123	4678	233	0	0
T126	24546	302	0	0
T128	3999	176	0	0
T134	8081	5	0	0
T135	13382	7	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1238	0	0
T36	19812	22	0	0
T37	12622	49	0	0
T122	102309	116	0	0
T139	9736	9	0	0
T140	6444	2	0	0
T141	11081	13	0	0
T151	4319	2	0	0
T156	4104	6	0	0
T157	71112	55	0	0
T158	8215	13	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1336	0	0
T36	19812	70	0	0
T37	12622	11	0	0
T122	102309	104	0	0
T139	9736	5	0	0
T141	11081	10	0	0
T143	4455	2	0	0
T156	4104	1	0	0
T157	71112	80	0	0
T158	8215	16	0	0
T159	94650	71	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1650	0	0
T36	19812	70	0	0
T37	12622	18	0	0
T122	102309	224	0	0
T139	9736	8	0	0
T140	6444	2	0	0
T141	11081	11	0	0
T143	4455	14	0	0
T151	4319	10	0	0
T156	4104	3	0	0
T157	71112	138	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	6509	0	0
T36	19812	79	0	0
T37	12622	48	0	0
T122	102309	1061	0	0
T139	9736	154	0	0
T140	6444	6	0	0
T141	11081	295	0	0
T143	4455	43	0	0
T151	4319	41	0	0
T156	4104	112	0	0
T157	71112	938	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	6778	0	0
T36	19812	96	0	0
T37	12622	69	0	0
T122	102309	2042	0	0
T139	9736	358	0	0
T140	6444	2	0	0
T141	11081	121	0	0
T143	4455	91	0	0
T151	4319	48	0	0
T156	4104	3	0	0
T157	71112	1010	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	7417	0	0
T36	19812	35	0	0
T37	12622	28	0	0
T122	102309	2191	0	0
T139	9736	10	0	0
T140	6444	14	0	0
T141	11081	278	0	0
T143	4455	3	0	0
T151	4319	46	0	0
T156	4104	1	0	0
T157	71112	1402	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	7492	0	0
T36	19812	50	0	0
T37	12622	47	0	0
T122	102309	1511	0	0
T126	24546	8	0	0
T139	9736	253	0	0
T140	6444	75	0	0
T141	11081	122	0	0
T143	4455	30	0	0
T151	4319	69	0	0
T157	71112	1574	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	7755	0	0
T36	19812	37	0	0
T37	12622	44	0	0
T122	102309	1953	0	0
T139	9736	97	0	0
T140	6444	47	0	0
T141	11081	127	0	0
T143	4455	54	0	0
T151	4319	49	0	0
T156	4104	134	0	0
T157	71112	1562	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	7661	0	0
T36	19812	62	0	0
T37	12622	44	0	0
T122	102309	1946	0	0
T139	9736	237	0	0
T140	6444	120	0	0
T141	11081	138	0	0
T143	4455	80	0	0
T151	4319	7	0	0
T156	4104	127	0	0
T157	71112	1233	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	7657	0	0
T36	19812	66	0	0
T37	12622	41	0	0
T122	102309	1426	0	0
T139	9736	108	0	0
T140	6444	163	0	0
T141	11081	297	0	0
T143	4455	79	0	0
T151	4319	68	0	0
T157	71112	1501	0	0
T158	8215	3	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	6374	0	0
T36	19812	69	0	0
T37	12622	11	0	0
T122	102309	1745	0	0
T139	9736	118	0	0
T140	6444	82	0	0
T141	11081	11	0	0
T143	4455	53	0	0
T151	4319	120	0	0
T157	71112	902	0	0
T158	8215	21	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	4042	0	0
T36	19812	76	0	0
T37	12622	33	0	0
T122	102309	899	0	0
T139	9736	47	0	0
T140	6444	72	0	0
T141	11081	65	0	0
T143	4455	25	0	0
T151	4319	26	0	0
T156	4104	8	0	0
T157	71112	668	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	4023	0	0
T36	19812	55	0	0
T37	12622	38	0	0
T122	102309	746	0	0
T139	9736	95	0	0
T140	6444	23	0	0
T141	11081	46	0	0
T151	4319	27	0	0
T156	4104	3	0	0
T157	71112	537	0	0
T158	8215	29	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3562	0	0
T36	19812	86	0	0
T37	12622	22	0	0
T122	102309	704	0	0
T139	9736	76	0	0
T140	6444	29	0	0
T141	11081	64	0	0
T143	4455	1	0	0
T156	4104	52	0	0
T157	71112	518	0	0
T158	8215	19	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3783	0	0
T36	19812	83	0	0
T37	12622	85	0	0
T122	102309	737	0	0
T139	9736	50	0	0
T140	6444	6	0	0
T141	11081	139	0	0
T143	4455	16	0	0
T151	4319	4	0	0
T156	4104	60	0	0
T157	71112	551	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3764	0	0
T36	19812	91	0	0
T37	12622	45	0	0
T122	102309	662	0	0
T139	9736	54	0	0
T140	6444	8	0	0
T141	11081	167	0	0
T151	4319	19	0	0
T156	4104	55	0	0
T157	71112	458	0	0
T158	8215	29	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3966	0	0
T36	19812	15	0	0
T37	12622	17	0	0
T122	102309	878	0	0
T139	9736	85	0	0
T140	6444	16	0	0
T141	11081	16	0	0
T151	4319	31	0	0
T156	4104	49	0	0
T157	71112	721	0	0
T158	8215	11	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3666	0	0
T36	19812	59	0	0
T37	12622	54	0	0
T122	102309	759	0	0
T139	9736	56	0	0
T140	6444	12	0	0
T141	11081	36	0	0
T143	4455	31	0	0
T156	4104	43	0	0
T157	71112	600	0	0
T158	8215	7	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3611	0	0
T36	19812	59	0	0
T37	12622	49	0	0
T122	102309	819	0	0
T139	9736	102	0	0
T140	6444	7	0	0
T141	11081	58	0	0
T151	4319	29	0	0
T156	4104	4	0	0
T157	71112	375	0	0
T158	8215	16	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3889	0	0
T36	19812	84	0	0
T37	12622	71	0	0
T122	102309	830	0	0
T139	9736	53	0	0
T141	11081	157	0	0
T151	4319	17	0	0
T156	4104	43	0	0
T157	71112	568	0	0
T158	8215	43	0	0
T159	94650	467	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3612	0	0
T36	19812	86	0	0
T37	12622	43	0	0
T122	102309	726	0	0
T126	24546	4	0	0
T139	9736	30	0	0
T140	6444	25	0	0
T141	11081	72	0	0
T143	4455	11	0	0
T156	4104	52	0	0
T157	71112	467	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3500	0	0
T36	19812	100	0	0
T37	12622	26	0	0
T122	102309	885	0	0
T139	9736	18	0	0
T140	6444	9	0	0
T141	11081	116	0	0
T143	4455	30	0	0
T151	4319	4	0	0
T156	4104	51	0	0
T157	71112	570	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3934	0	0
T36	19812	120	0	0
T37	12622	59	0	0
T122	102309	756	0	0
T139	9736	15	0	0
T140	6444	27	0	0
T141	11081	109	0	0
T143	4455	30	0	0
T156	4104	69	0	0
T157	71112	623	0	0
T158	8215	3	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3336	0	0
T36	19812	25	0	0
T37	12622	67	0	0
T122	102309	697	0	0
T139	9736	129	0	0
T140	6444	30	0	0
T141	11081	67	0	0
T143	4455	26	0	0
T156	4104	47	0	0
T157	71112	445	0	0
T158	8215	53	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3265	0	0
T36	19812	112	0	0
T37	12622	27	0	0
T122	102309	481	0	0
T139	9736	96	0	0
T140	6444	39	0	0
T141	11081	97	0	0
T143	4455	21	0	0
T156	4104	2	0	0
T157	71112	449	0	0
T158	8215	22	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3773	0	0
T36	19812	78	0	0
T37	12622	75	0	0
T122	102309	754	0	0
T139	9736	70	0	0
T140	6444	47	0	0
T141	11081	74	0	0
T143	4455	15	0	0
T151	4319	3	0	0
T156	4104	7	0	0
T157	71112	502	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3303	0	0
T36	19812	55	0	0
T37	12622	46	0	0
T122	102309	610	0	0
T139	9736	63	0	0
T140	6444	35	0	0
T141	11081	126	0	0
T143	4455	5	0	0
T151	4319	8	0	0
T156	4104	50	0	0
T157	71112	478	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3756	0	0
T36	19812	69	0	0
T37	12622	94	0	0
T122	102309	758	0	0
T139	9736	163	0	0
T140	6444	41	0	0
T141	11081	117	0	0
T151	4319	30	0	0
T156	4104	54	0	0
T157	71112	473	0	0
T158	8215	11	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3849	0	0
T36	19812	36	0	0
T37	12622	37	0	0
T122	102309	876	0	0
T139	9736	65	0	0
T140	6444	45	0	0
T141	11081	131	0	0
T143	4455	36	0	0
T157	71112	622	0	0
T158	8215	10	0	0
T159	94650	465	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3472	0	0
T36	19812	69	0	0
T37	12622	22	0	0
T122	102309	738	0	0
T139	9736	112	0	0
T140	6444	21	0	0
T141	11081	110	0	0
T143	4455	8	0	0
T151	4319	27	0	0
T156	4104	47	0	0
T157	71112	482	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3504	0	0
T36	19812	92	0	0
T37	12622	46	0	0
T122	102309	929	0	0
T139	9736	4	0	0
T140	6444	15	0	0
T141	11081	105	0	0
T151	4319	41	0	0
T156	4104	46	0	0
T157	71112	237	0	0
T158	8215	17	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	4258	0	0
T36	19812	26	0	0
T37	12622	41	0	0
T122	102309	1077	0	0
T139	9736	84	0	0
T140	6444	25	0	0
T141	11081	144	0	0
T143	4455	21	0	0
T151	4319	31	0	0
T156	4104	57	0	0
T157	71112	455	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3837	0	0
T36	19812	84	0	0
T37	12622	63	0	0
T122	102309	772	0	0
T139	9736	124	0	0
T140	6444	36	0	0
T141	11081	130	0	0
T143	4455	37	0	0
T151	4319	30	0	0
T156	4104	9	0	0
T157	71112	535	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3713	0	0
T36	19812	57	0	0
T122	102309	819	0	0
T139	9736	120	0	0
T140	6444	22	0	0
T141	11081	132	0	0
T143	4455	28	0	0
T151	4319	4	0	0
T156	4104	45	0	0
T157	71112	526	0	0
T158	8215	35	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3225	0	0
T36	19812	25	0	0
T37	12622	47	0	0
T122	102309	575	0	0
T139	9736	64	0	0
T140	6444	39	0	0
T141	11081	62	0	0
T143	4455	18	0	0
T156	4104	3	0	0
T157	71112	633	0	0
T158	8215	29	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1499	0	0
T36	19812	74	0	0
T37	12622	48	0	0
T122	102309	165	0	0
T139	9736	14	0	0
T140	6444	6	0	0
T141	11081	11	0	0
T143	4455	4	0	0
T156	4104	2	0	0
T157	71112	113	0	0
T158	8215	43	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1679	0	0
T36	19812	36	0	0
T37	12622	52	0	0
T122	102309	115	0	0
T133	5527	8	0	0
T139	9736	16	0	0
T140	6444	11	0	0
T141	11081	21	0	0
T143	4455	9	0	0
T151	4319	1	0	0
T156	4104	14	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1448	0	0
T36	19812	51	0	0
T37	12622	24	0	0
T122	102309	177	0	0
T126	24546	4	0	0
T139	9736	16	0	0
T140	6444	8	0	0
T141	11081	24	0	0
T143	4455	3	0	0
T151	4319	8	0	0
T156	4104	1	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1510	0	0
T36	19812	57	0	0
T37	12622	58	0	0
T122	102309	130	0	0
T139	9736	15	0	0
T140	6444	1	0	0
T141	11081	19	0	0
T151	4319	7	0	0
T156	4104	4	0	0
T157	71112	134	0	0
T158	8215	14	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1972	0	0
T36	19812	122	0	0
T37	12622	37	0	0
T122	102309	304	0	0
T139	9736	17	0	0
T140	6444	18	0	0
T141	11081	50	0	0
T143	4455	4	0	0
T156	4104	5	0	0
T157	71112	173	0	0
T158	8215	43	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	3150	0	0
T36	0	80	0	0
T38	5483	15	0	0
T47	29337	0	0	0
T48	249056	0	0	0
T84	24999	0	0	0
T109	1498	0	0	0
T151	0	27	0	0
T160	0	17	0	0
T161	0	4	0	0
T162	0	51	0	0
T163	0	44	0	0
T164	0	23	0	0
T165	0	18	0	0
T166	0	12	0	0
T167	3623	0	0	0
T168	195634	0	0	0
T169	3491	0	0	0
T170	5371	0	0	0
T171	2156	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1625	0	0
T36	19812	11	0	0
T37	12622	55	0	0
T122	102309	153	0	0
T139	9736	34	0	0
T140	6444	3	0	0
T141	11081	9	0	0
T143	4455	7	0	0
T151	4319	2	0	0
T156	4104	6	0	0
T157	71112	128	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1512	0	0
T36	19812	40	0	0
T37	12622	56	0	0
T122	102309	148	0	0
T126	24546	3	0	0
T139	9736	11	0	0
T140	6444	8	0	0
T141	11081	10	0	0
T157	71112	108	0	0
T158	8215	44	0	0
T159	94650	125	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1366	0	0
T36	19812	38	0	0
T37	12622	53	0	0
T122	102309	127	0	0
T139	9736	4	0	0
T140	6444	9	0	0
T141	11081	12	0	0
T156	4104	2	0	0
T157	71112	73	0	0
T158	8215	8	0	0
T159	94650	75	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1390	0	0
T36	19812	76	0	0
T37	12622	20	0	0
T122	102309	111	0	0
T139	9736	4	0	0
T140	6444	1	0	0
T141	11081	15	0	0
T151	4319	8	0	0
T157	71112	54	0	0
T158	8215	16	0	0
T159	94650	83	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1332	0	0
T36	19812	45	0	0
T37	12622	43	0	0
T122	102309	105	0	0
T139	9736	6	0	0
T141	11081	13	0	0
T143	4455	2	0	0
T151	4319	2	0	0
T156	4104	1	0	0
T157	71112	69	0	0
T158	8215	7	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1344	0	0
T36	19812	143	0	0
T37	12622	51	0	0
T122	102309	114	0	0
T139	9736	20	0	0
T141	11081	5	0	0
T151	4319	6	0	0
T156	4104	3	0	0
T157	71112	83	0	0
T158	8215	35	0	0
T159	94650	59	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1674	0	0
T36	19812	35	0	0
T37	12622	38	0	0
T122	102309	326	0	0
T139	9736	24	0	0
T140	6444	13	0	0
T141	11081	32	0	0
T157	71112	142	0	0
T158	8215	16	0	0
T159	94650	107	0	0
T172	30498	60	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1422	0	0
T36	19812	107	0	0
T37	12622	59	0	0
T122	102309	133	0	0
T139	9736	6	0	0
T140	6444	7	0	0
T141	11081	17	0	0
T157	71112	80	0	0
T158	8215	24	0	0
T159	94650	65	0	0
T172	30498	12	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	2133	0	0
T36	19812	44	0	0
T37	12622	65	0	0
T122	102309	327	0	0
T139	9736	49	0	0
T140	6444	1	0	0
T141	11081	42	0	0
T143	4455	13	0	0
T156	4104	1	0	0
T157	71112	174	0	0
T158	8215	7	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1523	0	0
T36	19812	50	0	0
T37	12622	22	0	0
T122	102309	152	0	0
T139	9736	7	0	0
T141	11081	23	0	0
T156	4104	6	0	0
T157	71112	114	0	0
T158	8215	29	0	0
T159	94650	149	0	0
T172	30498	44	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1422	0	0
T36	19812	80	0	0
T37	12622	68	0	0
T122	102309	105	0	0
T139	9736	9	0	0
T140	6444	8	0	0
T141	11081	15	0	0
T156	4104	6	0	0
T157	71112	94	0	0
T158	8215	33	0	0
T159	94650	65	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1311	0	0
T36	19812	33	0	0
T37	12622	41	0	0
T122	102309	120	0	0
T139	9736	10	0	0
T140	6444	3	0	0
T141	11081	15	0	0
T151	4319	4	0	0
T156	4104	5	0	0
T157	71112	77	0	0
T158	8215	2	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1223	0	0
T36	19812	60	0	0
T37	12622	23	0	0
T122	102309	112	0	0
T139	9736	9	0	0
T140	6444	12	0	0
T141	11081	9	0	0
T143	4455	3	0	0
T156	4104	6	0	0
T157	71112	77	0	0
T158	8215	13	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1331	0	0
T36	19812	68	0	0
T37	12622	20	0	0
T122	102309	123	0	0
T139	9736	4	0	0
T140	6444	11	0	0
T141	11081	11	0	0
T156	4104	9	0	0
T157	71112	77	0	0
T158	8215	48	0	0
T159	94650	41	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1324	0	0
T36	19812	34	0	0
T37	12622	40	0	0
T122	102309	92	0	0
T139	9736	6	0	0
T141	11081	4	0	0
T151	4319	9	0	0
T156	4104	8	0	0
T157	71112	73	0	0
T158	8215	35	0	0
T159	94650	84	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	116914124	1311	0	0
T36	19812	51	0	0
T37	12622	27	0	0
T122	102309	117	0	0
T139	9736	21	0	0
T140	6444	7	0	0
T141	11081	11	0	0
T157	71112	82	0	0
T158	8215	39	0	0
T159	94650	57	0	0
T172	30498	43	0	0