T262 |
/workspace/coverage/default/39.spi_device_mailbox.1297637592 |
|
|
Apr 02 02:09:28 PM PDT 24 |
Apr 02 02:09:36 PM PDT 24 |
1586056330 ps |
T215 |
/workspace/coverage/default/17.spi_device_mailbox.2148322433 |
|
|
Apr 02 02:06:05 PM PDT 24 |
Apr 02 02:07:03 PM PDT 24 |
12085887243 ps |
T619 |
/workspace/coverage/default/29.spi_device_tpm_rw.3066859890 |
|
|
Apr 02 02:07:49 PM PDT 24 |
Apr 02 02:07:51 PM PDT 24 |
41873881 ps |
T201 |
/workspace/coverage/default/24.spi_device_pass_cmd_filtering.120674780 |
|
|
Apr 02 02:07:07 PM PDT 24 |
Apr 02 02:07:14 PM PDT 24 |
5900412860 ps |
T620 |
/workspace/coverage/default/41.spi_device_csb_read.297232991 |
|
|
Apr 02 02:09:47 PM PDT 24 |
Apr 02 02:09:48 PM PDT 24 |
233687546 ps |
T621 |
/workspace/coverage/default/22.spi_device_mailbox.1662534904 |
|
|
Apr 02 02:06:48 PM PDT 24 |
Apr 02 02:06:50 PM PDT 24 |
198129418 ps |
T622 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.1591806135 |
|
|
Apr 02 02:05:44 PM PDT 24 |
Apr 02 02:05:45 PM PDT 24 |
106280249 ps |
T623 |
/workspace/coverage/default/27.spi_device_tpm_rw.282968241 |
|
|
Apr 02 02:07:31 PM PDT 24 |
Apr 02 02:07:33 PM PDT 24 |
63617595 ps |
T624 |
/workspace/coverage/default/6.spi_device_tpm_all.3790175132 |
|
|
Apr 02 02:04:07 PM PDT 24 |
Apr 02 02:04:31 PM PDT 24 |
12798329478 ps |
T625 |
/workspace/coverage/default/29.spi_device_tpm_all.678169220 |
|
|
Apr 02 02:07:50 PM PDT 24 |
Apr 02 02:07:56 PM PDT 24 |
469713660 ps |
T626 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.2821647171 |
|
|
Apr 02 02:06:21 PM PDT 24 |
Apr 02 02:06:24 PM PDT 24 |
476199674 ps |
T290 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.2669471608 |
|
|
Apr 02 02:06:47 PM PDT 24 |
Apr 02 02:07:30 PM PDT 24 |
14754758783 ps |
T354 |
/workspace/coverage/default/17.spi_device_flash_mode.2418882 |
|
|
Apr 02 02:06:05 PM PDT 24 |
Apr 02 02:08:56 PM PDT 24 |
45852112275 ps |
T627 |
/workspace/coverage/default/14.spi_device_ram_cfg.1472941274 |
|
|
Apr 02 02:05:35 PM PDT 24 |
Apr 02 02:05:35 PM PDT 24 |
24011567 ps |
T373 |
/workspace/coverage/default/15.spi_device_upload.1183781316 |
|
|
Apr 02 02:05:51 PM PDT 24 |
Apr 02 02:06:09 PM PDT 24 |
17867063445 ps |
T628 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.2535293105 |
|
|
Apr 02 02:04:08 PM PDT 24 |
Apr 02 02:04:25 PM PDT 24 |
42341103239 ps |
T629 |
/workspace/coverage/default/24.spi_device_cfg_cmd.1375312097 |
|
|
Apr 02 02:07:06 PM PDT 24 |
Apr 02 02:07:08 PM PDT 24 |
30879808 ps |
T331 |
/workspace/coverage/default/30.spi_device_intercept.3156745104 |
|
|
Apr 02 02:08:06 PM PDT 24 |
Apr 02 02:08:15 PM PDT 24 |
593014524 ps |
T630 |
/workspace/coverage/default/38.spi_device_tpm_sts_read.2085751383 |
|
|
Apr 02 02:09:18 PM PDT 24 |
Apr 02 02:09:20 PM PDT 24 |
61581700 ps |
T631 |
/workspace/coverage/default/30.spi_device_tpm_all.2592164798 |
|
|
Apr 02 02:08:03 PM PDT 24 |
Apr 02 02:08:44 PM PDT 24 |
42183465217 ps |
T219 |
/workspace/coverage/default/42.spi_device_pass_cmd_filtering.2117015555 |
|
|
Apr 02 02:09:57 PM PDT 24 |
Apr 02 02:10:25 PM PDT 24 |
9514634321 ps |
T89 |
/workspace/coverage/default/20.spi_device_cfg_cmd.2436640894 |
|
|
Apr 02 02:06:32 PM PDT 24 |
Apr 02 02:06:35 PM PDT 24 |
309738833 ps |
T632 |
/workspace/coverage/default/11.spi_device_tpm_all.1509985060 |
|
|
Apr 02 02:05:07 PM PDT 24 |
Apr 02 02:05:10 PM PDT 24 |
338937345 ps |
T305 |
/workspace/coverage/default/39.spi_device_flash_mode.3177001539 |
|
|
Apr 02 02:09:26 PM PDT 24 |
Apr 02 02:10:16 PM PDT 24 |
30537682423 ps |
T323 |
/workspace/coverage/default/9.spi_device_intercept.1316266413 |
|
|
Apr 02 02:04:45 PM PDT 24 |
Apr 02 02:04:49 PM PDT 24 |
477765688 ps |
T234 |
/workspace/coverage/default/37.spi_device_mailbox.2653855019 |
|
|
Apr 02 02:09:12 PM PDT 24 |
Apr 02 02:09:33 PM PDT 24 |
9219384340 ps |
T346 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.3935925190 |
|
|
Apr 02 02:09:11 PM PDT 24 |
Apr 02 02:09:16 PM PDT 24 |
841367819 ps |
T633 |
/workspace/coverage/default/5.spi_device_tpm_sts_read.3746295297 |
|
|
Apr 02 02:04:01 PM PDT 24 |
Apr 02 02:04:06 PM PDT 24 |
628158064 ps |
T214 |
/workspace/coverage/default/37.spi_device_upload.2660890085 |
|
|
Apr 02 02:09:10 PM PDT 24 |
Apr 02 02:09:22 PM PDT 24 |
4257133580 ps |
T244 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.1655771557 |
|
|
Apr 02 02:09:12 PM PDT 24 |
Apr 02 02:09:18 PM PDT 24 |
637680666 ps |
T634 |
/workspace/coverage/default/19.spi_device_ram_cfg.2056412536 |
|
|
Apr 02 02:06:22 PM PDT 24 |
Apr 02 02:06:23 PM PDT 24 |
24490166 ps |
T635 |
/workspace/coverage/default/3.spi_device_csb_read.3826679797 |
|
|
Apr 02 02:03:28 PM PDT 24 |
Apr 02 02:03:29 PM PDT 24 |
19844167 ps |
T636 |
/workspace/coverage/default/12.spi_device_mem_parity.949019931 |
|
|
Apr 02 02:05:15 PM PDT 24 |
Apr 02 02:05:16 PM PDT 24 |
75611745 ps |
T637 |
/workspace/coverage/default/7.spi_device_mem_parity.912194424 |
|
|
Apr 02 02:04:23 PM PDT 24 |
Apr 02 02:04:24 PM PDT 24 |
17579533 ps |
T638 |
/workspace/coverage/default/23.spi_device_tpm_sts_read.297743601 |
|
|
Apr 02 02:06:55 PM PDT 24 |
Apr 02 02:06:57 PM PDT 24 |
18378394 ps |
T49 |
/workspace/coverage/default/3.spi_device_sec_cm.2841044205 |
|
|
Apr 02 02:03:43 PM PDT 24 |
Apr 02 02:03:44 PM PDT 24 |
89531425 ps |
T639 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.1520985181 |
|
|
Apr 02 02:11:05 PM PDT 24 |
Apr 02 02:11:06 PM PDT 24 |
100404467 ps |
T640 |
/workspace/coverage/default/24.spi_device_tpm_all.1261580190 |
|
|
Apr 02 02:07:05 PM PDT 24 |
Apr 02 02:07:12 PM PDT 24 |
3592834579 ps |
T374 |
/workspace/coverage/default/32.spi_device_upload.1317304257 |
|
|
Apr 02 02:08:25 PM PDT 24 |
Apr 02 02:08:40 PM PDT 24 |
3611809233 ps |
T313 |
/workspace/coverage/default/0.spi_device_intercept.85714751 |
|
|
Apr 02 02:02:45 PM PDT 24 |
Apr 02 02:03:27 PM PDT 24 |
3313625866 ps |
T50 |
/workspace/coverage/default/4.spi_device_sec_cm.1808051127 |
|
|
Apr 02 02:03:55 PM PDT 24 |
Apr 02 02:03:57 PM PDT 24 |
115241258 ps |
T641 |
/workspace/coverage/default/14.spi_device_tpm_rw.2769964656 |
|
|
Apr 02 02:05:35 PM PDT 24 |
Apr 02 02:05:38 PM PDT 24 |
311594657 ps |
T642 |
/workspace/coverage/default/46.spi_device_tpm_all.375284158 |
|
|
Apr 02 02:10:43 PM PDT 24 |
Apr 02 02:11:15 PM PDT 24 |
6225694706 ps |
T643 |
/workspace/coverage/default/34.spi_device_alert_test.3368798008 |
|
|
Apr 02 02:08:46 PM PDT 24 |
Apr 02 02:08:47 PM PDT 24 |
25919422 ps |
T644 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.1696205177 |
|
|
Apr 02 02:07:05 PM PDT 24 |
Apr 02 02:07:09 PM PDT 24 |
1489272760 ps |
T645 |
/workspace/coverage/default/44.spi_device_alert_test.4136723746 |
|
|
Apr 02 02:10:33 PM PDT 24 |
Apr 02 02:10:34 PM PDT 24 |
21817915 ps |
T646 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.3339635700 |
|
|
Apr 02 02:09:06 PM PDT 24 |
Apr 02 02:09:27 PM PDT 24 |
32517713275 ps |
T288 |
/workspace/coverage/default/42.spi_device_pass_addr_payload_swap.3014805410 |
|
|
Apr 02 02:09:58 PM PDT 24 |
Apr 02 02:10:01 PM PDT 24 |
695022595 ps |
T647 |
/workspace/coverage/default/9.spi_device_tpm_all.1998671832 |
|
|
Apr 02 02:04:43 PM PDT 24 |
Apr 02 02:04:52 PM PDT 24 |
1423165361 ps |
T357 |
/workspace/coverage/default/10.spi_device_upload.3827853104 |
|
|
Apr 02 02:04:58 PM PDT 24 |
Apr 02 02:05:19 PM PDT 24 |
10974143589 ps |
T401 |
/workspace/coverage/default/17.spi_device_tpm_all.4207347965 |
|
|
Apr 02 02:05:59 PM PDT 24 |
Apr 02 02:06:35 PM PDT 24 |
2542457931 ps |
T330 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3822799450 |
|
|
Apr 02 02:04:31 PM PDT 24 |
Apr 02 02:04:59 PM PDT 24 |
11710740372 ps |
T318 |
/workspace/coverage/default/2.spi_device_intercept.2485766190 |
|
|
Apr 02 02:03:24 PM PDT 24 |
Apr 02 02:03:29 PM PDT 24 |
338219815 ps |
T208 |
/workspace/coverage/default/23.spi_device_pass_cmd_filtering.177093078 |
|
|
Apr 02 02:06:59 PM PDT 24 |
Apr 02 02:07:12 PM PDT 24 |
15144641572 ps |
T343 |
/workspace/coverage/default/39.spi_device_pass_addr_payload_swap.1786383346 |
|
|
Apr 02 02:09:25 PM PDT 24 |
Apr 02 02:09:29 PM PDT 24 |
240185883 ps |
T648 |
/workspace/coverage/default/33.spi_device_csb_read.380392751 |
|
|
Apr 02 02:08:32 PM PDT 24 |
Apr 02 02:08:32 PM PDT 24 |
66119625 ps |
T352 |
/workspace/coverage/default/21.spi_device_flash_mode.1000942978 |
|
|
Apr 02 02:06:41 PM PDT 24 |
Apr 02 02:06:55 PM PDT 24 |
391938163 ps |
T649 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.2065428819 |
|
|
Apr 02 02:09:45 PM PDT 24 |
Apr 02 02:09:53 PM PDT 24 |
2746870307 ps |
T650 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.2098014625 |
|
|
Apr 02 02:04:25 PM PDT 24 |
Apr 02 02:04:27 PM PDT 24 |
109126753 ps |
T651 |
/workspace/coverage/default/6.spi_device_ram_cfg.2570034519 |
|
|
Apr 02 02:04:09 PM PDT 24 |
Apr 02 02:04:11 PM PDT 24 |
21796114 ps |
T652 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.427296406 |
|
|
Apr 02 02:10:59 PM PDT 24 |
Apr 02 02:11:44 PM PDT 24 |
15655079727 ps |
T342 |
/workspace/coverage/default/6.spi_device_pass_addr_payload_swap.2280854993 |
|
|
Apr 02 02:04:13 PM PDT 24 |
Apr 02 02:04:33 PM PDT 24 |
25699741019 ps |
T653 |
/workspace/coverage/default/41.spi_device_mailbox.4120300285 |
|
|
Apr 02 02:09:54 PM PDT 24 |
Apr 02 02:10:03 PM PDT 24 |
1677721775 ps |
T654 |
/workspace/coverage/default/40.spi_device_alert_test.3092714833 |
|
|
Apr 02 02:09:47 PM PDT 24 |
Apr 02 02:09:48 PM PDT 24 |
14389712 ps |
T655 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.3589902948 |
|
|
Apr 02 02:10:11 PM PDT 24 |
Apr 02 02:10:19 PM PDT 24 |
2246903668 ps |
T336 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.663467518 |
|
|
Apr 02 02:04:00 PM PDT 24 |
Apr 02 02:04:03 PM PDT 24 |
263043828 ps |
T332 |
/workspace/coverage/default/16.spi_device_pass_cmd_filtering.2869709689 |
|
|
Apr 02 02:05:52 PM PDT 24 |
Apr 02 02:05:55 PM PDT 24 |
125136070 ps |
T656 |
/workspace/coverage/default/23.spi_device_tpm_read_hw_reg.3744843561 |
|
|
Apr 02 02:06:59 PM PDT 24 |
Apr 02 02:07:10 PM PDT 24 |
2759951890 ps |
T320 |
/workspace/coverage/default/36.spi_device_mailbox.4150000917 |
|
|
Apr 02 02:09:02 PM PDT 24 |
Apr 02 02:09:20 PM PDT 24 |
2502380690 ps |
T657 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.4061849766 |
|
|
Apr 02 02:11:08 PM PDT 24 |
Apr 02 02:11:12 PM PDT 24 |
399405110 ps |
T658 |
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.2893537603 |
|
|
Apr 02 02:04:30 PM PDT 24 |
Apr 02 02:04:32 PM PDT 24 |
269117519 ps |
T659 |
/workspace/coverage/default/13.spi_device_mem_parity.3342958114 |
|
|
Apr 02 02:05:22 PM PDT 24 |
Apr 02 02:05:23 PM PDT 24 |
42865930 ps |
T660 |
/workspace/coverage/default/15.spi_device_tpm_rw.2192023872 |
|
|
Apr 02 02:05:45 PM PDT 24 |
Apr 02 02:05:49 PM PDT 24 |
237925448 ps |
T661 |
/workspace/coverage/default/34.spi_device_read_buffer_direct.1115566108 |
|
|
Apr 02 02:08:44 PM PDT 24 |
Apr 02 02:08:49 PM PDT 24 |
721979700 ps |
T316 |
/workspace/coverage/default/32.spi_device_mailbox.185805805 |
|
|
Apr 02 02:08:26 PM PDT 24 |
Apr 02 02:08:34 PM PDT 24 |
354396269 ps |
T662 |
/workspace/coverage/default/4.spi_device_ram_cfg.406296632 |
|
|
Apr 02 02:03:48 PM PDT 24 |
Apr 02 02:03:49 PM PDT 24 |
17655214 ps |
T663 |
/workspace/coverage/default/7.spi_device_csb_read.1291144178 |
|
|
Apr 02 02:04:24 PM PDT 24 |
Apr 02 02:04:25 PM PDT 24 |
36853576 ps |
T664 |
/workspace/coverage/default/18.spi_device_alert_test.3394806888 |
|
|
Apr 02 02:06:21 PM PDT 24 |
Apr 02 02:06:21 PM PDT 24 |
163493022 ps |
T665 |
/workspace/coverage/default/19.spi_device_tpm_sts_read.842709027 |
|
|
Apr 02 02:06:24 PM PDT 24 |
Apr 02 02:06:25 PM PDT 24 |
152361759 ps |
T666 |
/workspace/coverage/default/14.spi_device_csb_read.47124089 |
|
|
Apr 02 02:05:31 PM PDT 24 |
Apr 02 02:05:32 PM PDT 24 |
54614369 ps |
T667 |
/workspace/coverage/default/24.spi_device_csb_read.1395484223 |
|
|
Apr 02 02:07:02 PM PDT 24 |
Apr 02 02:07:04 PM PDT 24 |
40820782 ps |
T361 |
/workspace/coverage/default/11.spi_device_flash_mode.1657325015 |
|
|
Apr 02 02:05:06 PM PDT 24 |
Apr 02 02:05:22 PM PDT 24 |
1430379554 ps |
T668 |
/workspace/coverage/default/36.spi_device_stress_all.652210152 |
|
|
Apr 02 02:09:08 PM PDT 24 |
Apr 02 02:09:09 PM PDT 24 |
44414065 ps |
T669 |
/workspace/coverage/default/0.spi_device_tpm_rw.3779602922 |
|
|
Apr 02 02:02:39 PM PDT 24 |
Apr 02 02:02:40 PM PDT 24 |
62604195 ps |
T402 |
/workspace/coverage/default/4.spi_device_tpm_all.1352299338 |
|
|
Apr 02 02:03:49 PM PDT 24 |
Apr 02 02:04:40 PM PDT 24 |
97376907681 ps |
T670 |
/workspace/coverage/default/2.spi_device_alert_test.62733074 |
|
|
Apr 02 02:03:26 PM PDT 24 |
Apr 02 02:03:27 PM PDT 24 |
131959381 ps |
T671 |
/workspace/coverage/default/34.spi_device_tpm_rw.1385863703 |
|
|
Apr 02 02:08:40 PM PDT 24 |
Apr 02 02:08:43 PM PDT 24 |
396350890 ps |
T672 |
/workspace/coverage/default/44.spi_device_tpm_rw.59672923 |
|
|
Apr 02 02:10:22 PM PDT 24 |
Apr 02 02:10:32 PM PDT 24 |
211064609 ps |
T673 |
/workspace/coverage/default/38.spi_device_stress_all.2458626137 |
|
|
Apr 02 02:09:20 PM PDT 24 |
Apr 02 02:09:22 PM PDT 24 |
74859264 ps |
T241 |
/workspace/coverage/default/3.spi_device_mailbox.3062061725 |
|
|
Apr 02 02:03:35 PM PDT 24 |
Apr 02 02:03:52 PM PDT 24 |
1037372806 ps |
T674 |
/workspace/coverage/default/41.spi_device_alert_test.2572692204 |
|
|
Apr 02 02:09:54 PM PDT 24 |
Apr 02 02:09:57 PM PDT 24 |
21660190 ps |
T675 |
/workspace/coverage/default/17.spi_device_tpm_read_hw_reg.1788754462 |
|
|
Apr 02 02:06:04 PM PDT 24 |
Apr 02 02:06:11 PM PDT 24 |
5203678808 ps |
T676 |
/workspace/coverage/default/10.spi_device_tpm_read_hw_reg.339962940 |
|
|
Apr 02 02:04:54 PM PDT 24 |
Apr 02 02:04:59 PM PDT 24 |
5423085925 ps |
T314 |
/workspace/coverage/default/31.spi_device_upload.1756259918 |
|
|
Apr 02 02:08:16 PM PDT 24 |
Apr 02 02:08:24 PM PDT 24 |
702102285 ps |
T677 |
/workspace/coverage/default/47.spi_device_csb_read.1867991096 |
|
|
Apr 02 02:10:54 PM PDT 24 |
Apr 02 02:10:55 PM PDT 24 |
51126219 ps |
T678 |
/workspace/coverage/default/39.spi_device_cfg_cmd.3139921484 |
|
|
Apr 02 02:09:32 PM PDT 24 |
Apr 02 02:09:37 PM PDT 24 |
413268258 ps |
T679 |
/workspace/coverage/default/36.spi_device_alert_test.1349215060 |
|
|
Apr 02 02:09:10 PM PDT 24 |
Apr 02 02:09:12 PM PDT 24 |
60704393 ps |
T356 |
/workspace/coverage/default/41.spi_device_intercept.820535126 |
|
|
Apr 02 02:09:53 PM PDT 24 |
Apr 02 02:10:11 PM PDT 24 |
1353828375 ps |
T341 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.3671355683 |
|
|
Apr 02 02:07:36 PM PDT 24 |
Apr 02 02:07:39 PM PDT 24 |
102550004 ps |
T680 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.703937964 |
|
|
Apr 02 02:04:49 PM PDT 24 |
Apr 02 02:04:58 PM PDT 24 |
1193227089 ps |
T681 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.1965927877 |
|
|
Apr 02 02:08:51 PM PDT 24 |
Apr 02 02:08:54 PM PDT 24 |
608352273 ps |
T682 |
/workspace/coverage/default/19.spi_device_alert_test.1970301682 |
|
|
Apr 02 02:06:28 PM PDT 24 |
Apr 02 02:06:29 PM PDT 24 |
16038323 ps |
T683 |
/workspace/coverage/default/29.spi_device_cfg_cmd.3639918380 |
|
|
Apr 02 02:07:58 PM PDT 24 |
Apr 02 02:08:01 PM PDT 24 |
35898045 ps |
T684 |
/workspace/coverage/default/35.spi_device_tpm_all.1649146854 |
|
|
Apr 02 02:08:51 PM PDT 24 |
Apr 02 02:09:11 PM PDT 24 |
34848098312 ps |
T163 |
/workspace/coverage/default/0.spi_device_stress_all.1866034619 |
|
|
Apr 02 02:02:52 PM PDT 24 |
Apr 02 02:02:53 PM PDT 24 |
85297343 ps |
T204 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.2382562703 |
|
|
Apr 02 02:07:55 PM PDT 24 |
Apr 02 02:07:58 PM PDT 24 |
233484529 ps |
T685 |
/workspace/coverage/default/23.spi_device_alert_test.2833350942 |
|
|
Apr 02 02:07:04 PM PDT 24 |
Apr 02 02:07:06 PM PDT 24 |
38264521 ps |
T686 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.3592099521 |
|
|
Apr 02 02:11:14 PM PDT 24 |
Apr 02 02:11:15 PM PDT 24 |
280343608 ps |
T687 |
/workspace/coverage/default/25.spi_device_tpm_all.695230487 |
|
|
Apr 02 02:07:14 PM PDT 24 |
Apr 02 02:07:30 PM PDT 24 |
1146748727 ps |
T339 |
/workspace/coverage/default/28.spi_device_pass_addr_payload_swap.3001836281 |
|
|
Apr 02 02:07:42 PM PDT 24 |
Apr 02 02:07:48 PM PDT 24 |
1601093866 ps |
T688 |
/workspace/coverage/default/23.spi_device_flash_mode.2195864291 |
|
|
Apr 02 02:07:00 PM PDT 24 |
Apr 02 02:07:41 PM PDT 24 |
10207513324 ps |
T289 |
/workspace/coverage/default/35.spi_device_pass_addr_payload_swap.1240590175 |
|
|
Apr 02 02:08:47 PM PDT 24 |
Apr 02 02:08:51 PM PDT 24 |
444434756 ps |
T689 |
/workspace/coverage/default/18.spi_device_tpm_all.1052400162 |
|
|
Apr 02 02:06:10 PM PDT 24 |
Apr 02 02:06:22 PM PDT 24 |
2059884873 ps |
T690 |
/workspace/coverage/default/26.spi_device_intercept.3630693710 |
|
|
Apr 02 02:07:26 PM PDT 24 |
Apr 02 02:07:48 PM PDT 24 |
13816161418 ps |
T691 |
/workspace/coverage/default/5.spi_device_mem_parity.3492140708 |
|
|
Apr 02 02:03:58 PM PDT 24 |
Apr 02 02:03:59 PM PDT 24 |
17208412 ps |
T51 |
/workspace/coverage/default/1.spi_device_sec_cm.2907980804 |
|
|
Apr 02 02:03:14 PM PDT 24 |
Apr 02 02:03:15 PM PDT 24 |
147083828 ps |
T692 |
/workspace/coverage/default/21.spi_device_tpm_all.787231374 |
|
|
Apr 02 02:06:41 PM PDT 24 |
Apr 02 02:07:51 PM PDT 24 |
28255528281 ps |
T317 |
/workspace/coverage/default/42.spi_device_intercept.3234227630 |
|
|
Apr 02 02:10:03 PM PDT 24 |
Apr 02 02:10:06 PM PDT 24 |
440331800 ps |
T693 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.1154286081 |
|
|
Apr 02 02:03:15 PM PDT 24 |
Apr 02 02:03:30 PM PDT 24 |
21298007157 ps |
T245 |
/workspace/coverage/default/2.spi_device_cfg_cmd.1126645541 |
|
|
Apr 02 02:03:24 PM PDT 24 |
Apr 02 02:03:30 PM PDT 24 |
1774783952 ps |
T694 |
/workspace/coverage/default/8.spi_device_ram_cfg.3882416479 |
|
|
Apr 02 02:04:30 PM PDT 24 |
Apr 02 02:04:31 PM PDT 24 |
19444203 ps |
T695 |
/workspace/coverage/default/36.spi_device_tpm_all.4167761497 |
|
|
Apr 02 02:08:59 PM PDT 24 |
Apr 02 02:09:04 PM PDT 24 |
3476066509 ps |
T83 |
/workspace/coverage/default/15.spi_device_mailbox.707251963 |
|
|
Apr 02 02:05:47 PM PDT 24 |
Apr 02 02:06:31 PM PDT 24 |
19648287315 ps |
T256 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.3148098547 |
|
|
Apr 02 02:05:14 PM PDT 24 |
Apr 02 02:05:18 PM PDT 24 |
368239000 ps |
T696 |
/workspace/coverage/default/17.spi_device_mem_parity.2097486041 |
|
|
Apr 02 02:05:58 PM PDT 24 |
Apr 02 02:06:00 PM PDT 24 |
15490501 ps |
T697 |
/workspace/coverage/default/27.spi_device_flash_mode.265339496 |
|
|
Apr 02 02:07:40 PM PDT 24 |
Apr 02 02:08:50 PM PDT 24 |
28844014639 ps |
T698 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.394039847 |
|
|
Apr 02 02:06:44 PM PDT 24 |
Apr 02 02:06:51 PM PDT 24 |
6499801204 ps |
T699 |
/workspace/coverage/default/38.spi_device_intercept.4151973769 |
|
|
Apr 02 02:09:18 PM PDT 24 |
Apr 02 02:09:42 PM PDT 24 |
3007542992 ps |
T700 |
/workspace/coverage/default/39.spi_device_tpm_sts_read.1066152190 |
|
|
Apr 02 02:09:25 PM PDT 24 |
Apr 02 02:09:25 PM PDT 24 |
37247515 ps |
T345 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.1151324345 |
|
|
Apr 02 02:04:45 PM PDT 24 |
Apr 02 02:05:11 PM PDT 24 |
35174692657 ps |
T701 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.3183321687 |
|
|
Apr 02 02:02:38 PM PDT 24 |
Apr 02 02:02:41 PM PDT 24 |
804358666 ps |
T702 |
/workspace/coverage/default/41.spi_device_flash_mode.649245392 |
|
|
Apr 02 02:09:56 PM PDT 24 |
Apr 02 02:11:27 PM PDT 24 |
30481130795 ps |
T703 |
/workspace/coverage/default/7.spi_device_tpm_rw.2132145328 |
|
|
Apr 02 02:04:22 PM PDT 24 |
Apr 02 02:04:25 PM PDT 24 |
709999534 ps |
T704 |
/workspace/coverage/default/39.spi_device_tpm_read_hw_reg.3304818063 |
|
|
Apr 02 02:09:24 PM PDT 24 |
Apr 02 02:09:38 PM PDT 24 |
11892581077 ps |
T705 |
/workspace/coverage/default/16.spi_device_alert_test.1766894991 |
|
|
Apr 02 02:05:55 PM PDT 24 |
Apr 02 02:05:57 PM PDT 24 |
13127386 ps |
T706 |
/workspace/coverage/default/25.spi_device_read_buffer_direct.1305242048 |
|
|
Apr 02 02:07:19 PM PDT 24 |
Apr 02 02:07:34 PM PDT 24 |
2956954134 ps |
T355 |
/workspace/coverage/default/46.spi_device_flash_mode.3411304551 |
|
|
Apr 02 02:10:46 PM PDT 24 |
Apr 02 02:13:42 PM PDT 24 |
54355208414 ps |
T707 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.2177035373 |
|
|
Apr 02 02:09:44 PM PDT 24 |
Apr 02 02:09:55 PM PDT 24 |
805332534 ps |
T708 |
/workspace/coverage/default/9.spi_device_tpm_rw.1794405861 |
|
|
Apr 02 02:04:43 PM PDT 24 |
Apr 02 02:04:47 PM PDT 24 |
607974653 ps |
T709 |
/workspace/coverage/default/16.spi_device_tpm_all.2851504534 |
|
|
Apr 02 02:05:50 PM PDT 24 |
Apr 02 02:06:24 PM PDT 24 |
6464038098 ps |
T710 |
/workspace/coverage/default/47.spi_device_tpm_sts_read.3459763341 |
|
|
Apr 02 02:10:54 PM PDT 24 |
Apr 02 02:10:55 PM PDT 24 |
189795968 ps |
T711 |
/workspace/coverage/default/0.spi_device_upload.4246869069 |
|
|
Apr 02 02:02:47 PM PDT 24 |
Apr 02 02:02:50 PM PDT 24 |
137883141 ps |
T712 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.3559492564 |
|
|
Apr 02 02:09:32 PM PDT 24 |
Apr 02 02:09:52 PM PDT 24 |
23442416732 ps |
T713 |
/workspace/coverage/default/17.spi_device_cfg_cmd.1537945077 |
|
|
Apr 02 02:06:03 PM PDT 24 |
Apr 02 02:06:06 PM PDT 24 |
79280094 ps |
T714 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.3656339929 |
|
|
Apr 02 02:05:08 PM PDT 24 |
Apr 02 02:05:09 PM PDT 24 |
15881320 ps |
T715 |
/workspace/coverage/default/32.spi_device_csb_read.1206985330 |
|
|
Apr 02 02:08:19 PM PDT 24 |
Apr 02 02:08:20 PM PDT 24 |
27506576 ps |
T716 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.271874312 |
|
|
Apr 02 02:08:11 PM PDT 24 |
Apr 02 02:08:39 PM PDT 24 |
36801940302 ps |
T717 |
/workspace/coverage/default/4.spi_device_mem_parity.2321579278 |
|
|
Apr 02 02:03:46 PM PDT 24 |
Apr 02 02:03:48 PM PDT 24 |
119375036 ps |
T718 |
/workspace/coverage/default/26.spi_device_tpm_rw.1220174767 |
|
|
Apr 02 02:07:25 PM PDT 24 |
Apr 02 02:07:28 PM PDT 24 |
360312489 ps |
T338 |
/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.408763703 |
|
|
Apr 02 02:08:41 PM PDT 24 |
Apr 02 02:08:49 PM PDT 24 |
3300483548 ps |
T719 |
/workspace/coverage/default/6.spi_device_alert_test.3077522202 |
|
|
Apr 02 02:04:19 PM PDT 24 |
Apr 02 02:04:20 PM PDT 24 |
14997283 ps |
T187 |
/workspace/coverage/default/46.spi_device_cfg_cmd.2486447355 |
|
|
Apr 02 02:10:46 PM PDT 24 |
Apr 02 02:10:53 PM PDT 24 |
2032449911 ps |
T720 |
/workspace/coverage/default/45.spi_device_tpm_all.1164561967 |
|
|
Apr 02 02:10:32 PM PDT 24 |
Apr 02 02:10:57 PM PDT 24 |
3443456300 ps |
T721 |
/workspace/coverage/default/39.spi_device_alert_test.1226953956 |
|
|
Apr 02 02:09:32 PM PDT 24 |
Apr 02 02:09:34 PM PDT 24 |
24704320 ps |
T722 |
/workspace/coverage/default/6.spi_device_tpm_rw.3700623631 |
|
|
Apr 02 02:04:08 PM PDT 24 |
Apr 02 02:04:10 PM PDT 24 |
85431642 ps |
T723 |
/workspace/coverage/default/47.spi_device_alert_test.3197797495 |
|
|
Apr 02 02:11:03 PM PDT 24 |
Apr 02 02:11:04 PM PDT 24 |
40488951 ps |
T724 |
/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.2924355303 |
|
|
Apr 02 02:11:14 PM PDT 24 |
Apr 02 02:11:19 PM PDT 24 |
1483483716 ps |
T725 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.1688424770 |
|
|
Apr 02 02:04:16 PM PDT 24 |
Apr 02 02:04:22 PM PDT 24 |
420013268 ps |
T321 |
/workspace/coverage/default/33.spi_device_pass_cmd_filtering.418709500 |
|
|
Apr 02 02:08:30 PM PDT 24 |
Apr 02 02:08:49 PM PDT 24 |
3778060565 ps |
T726 |
/workspace/coverage/default/14.spi_device_alert_test.2888897338 |
|
|
Apr 02 02:05:40 PM PDT 24 |
Apr 02 02:05:41 PM PDT 24 |
13634778 ps |
T727 |
/workspace/coverage/default/39.spi_device_csb_read.3691865035 |
|
|
Apr 02 02:09:27 PM PDT 24 |
Apr 02 02:09:28 PM PDT 24 |
163465698 ps |
T728 |
/workspace/coverage/default/19.spi_device_flash_mode.1378880935 |
|
|
Apr 02 02:06:25 PM PDT 24 |
Apr 02 02:07:20 PM PDT 24 |
3750998620 ps |
T278 |
/workspace/coverage/default/22.spi_device_upload.3741907479 |
|
|
Apr 02 02:06:54 PM PDT 24 |
Apr 02 02:07:08 PM PDT 24 |
6256406811 ps |
T347 |
/workspace/coverage/default/28.spi_device_mailbox.632760597 |
|
|
Apr 02 02:07:43 PM PDT 24 |
Apr 02 02:08:01 PM PDT 24 |
806010277 ps |
T729 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.608116340 |
|
|
Apr 02 02:06:04 PM PDT 24 |
Apr 02 02:06:08 PM PDT 24 |
223672803 ps |
T188 |
/workspace/coverage/default/35.spi_device_pass_cmd_filtering.2010656088 |
|
|
Apr 02 02:08:49 PM PDT 24 |
Apr 02 02:08:59 PM PDT 24 |
4460253816 ps |
T730 |
/workspace/coverage/default/37.spi_device_tpm_sts_read.1400983695 |
|
|
Apr 02 02:09:05 PM PDT 24 |
Apr 02 02:09:06 PM PDT 24 |
26827747 ps |
T372 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.1187548706 |
|
|
Apr 02 02:06:01 PM PDT 24 |
Apr 02 02:06:14 PM PDT 24 |
10986054427 ps |
T731 |
/workspace/coverage/default/22.spi_device_tpm_rw.3904247854 |
|
|
Apr 02 02:06:53 PM PDT 24 |
Apr 02 02:06:55 PM PDT 24 |
88847336 ps |
T732 |
/workspace/coverage/default/0.spi_device_ram_cfg.1871633563 |
|
|
Apr 02 02:02:30 PM PDT 24 |
Apr 02 02:02:31 PM PDT 24 |
63987978 ps |
T733 |
/workspace/coverage/default/47.spi_device_read_buffer_direct.3998793603 |
|
|
Apr 02 02:11:03 PM PDT 24 |
Apr 02 02:11:08 PM PDT 24 |
828915400 ps |
T315 |
/workspace/coverage/default/48.spi_device_mailbox.3960081866 |
|
|
Apr 02 02:11:06 PM PDT 24 |
Apr 02 02:11:13 PM PDT 24 |
259444080 ps |
T734 |
/workspace/coverage/default/3.spi_device_mem_parity.796437418 |
|
|
Apr 02 02:03:27 PM PDT 24 |
Apr 02 02:03:28 PM PDT 24 |
251776639 ps |
T735 |
/workspace/coverage/default/28.spi_device_read_buffer_direct.222062406 |
|
|
Apr 02 02:07:45 PM PDT 24 |
Apr 02 02:07:50 PM PDT 24 |
194146367 ps |
T736 |
/workspace/coverage/default/31.spi_device_flash_mode.3611343198 |
|
|
Apr 02 02:08:16 PM PDT 24 |
Apr 02 02:08:33 PM PDT 24 |
5090859124 ps |
T737 |
/workspace/coverage/default/17.spi_device_stress_all.2559401800 |
|
|
Apr 02 02:06:04 PM PDT 24 |
Apr 02 02:06:06 PM PDT 24 |
68409661 ps |
T738 |
/workspace/coverage/default/43.spi_device_alert_test.1362934161 |
|
|
Apr 02 02:10:19 PM PDT 24 |
Apr 02 02:10:20 PM PDT 24 |
23525867 ps |
T335 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.307383488 |
|
|
Apr 02 02:04:44 PM PDT 24 |
Apr 02 02:05:06 PM PDT 24 |
24122850784 ps |
T739 |
/workspace/coverage/default/11.spi_device_mem_parity.479947520 |
|
|
Apr 02 02:04:58 PM PDT 24 |
Apr 02 02:05:00 PM PDT 24 |
15751118 ps |
T740 |
/workspace/coverage/default/17.spi_device_tpm_rw.4063788900 |
|
|
Apr 02 02:06:02 PM PDT 24 |
Apr 02 02:06:04 PM PDT 24 |
72791818 ps |
T741 |
/workspace/coverage/default/30.spi_device_csb_read.2843929753 |
|
|
Apr 02 02:08:00 PM PDT 24 |
Apr 02 02:08:01 PM PDT 24 |
61031516 ps |
T742 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.4010567185 |
|
|
Apr 02 02:04:28 PM PDT 24 |
Apr 02 02:04:41 PM PDT 24 |
6607491043 ps |
T743 |
/workspace/coverage/default/32.spi_device_flash_mode.2135365671 |
|
|
Apr 02 02:08:26 PM PDT 24 |
Apr 02 02:10:28 PM PDT 24 |
9504198533 ps |
T744 |
/workspace/coverage/default/39.spi_device_tpm_rw.1380656792 |
|
|
Apr 02 02:09:26 PM PDT 24 |
Apr 02 02:09:27 PM PDT 24 |
205650909 ps |
T745 |
/workspace/coverage/default/10.spi_device_alert_test.3658519974 |
|
|
Apr 02 02:05:00 PM PDT 24 |
Apr 02 02:05:02 PM PDT 24 |
38231627 ps |
T746 |
/workspace/coverage/default/42.spi_device_tpm_rw.2049040580 |
|
|
Apr 02 02:09:57 PM PDT 24 |
Apr 02 02:09:59 PM PDT 24 |
54342622 ps |
T747 |
/workspace/coverage/default/37.spi_device_tpm_all.966804779 |
|
|
Apr 02 02:09:10 PM PDT 24 |
Apr 02 02:09:34 PM PDT 24 |
1925384005 ps |
T206 |
/workspace/coverage/default/1.spi_device_mailbox.1412477131 |
|
|
Apr 02 02:03:05 PM PDT 24 |
Apr 02 02:03:19 PM PDT 24 |
1391006431 ps |
T238 |
/workspace/coverage/default/36.spi_device_pass_cmd_filtering.2556213668 |
|
|
Apr 02 02:09:02 PM PDT 24 |
Apr 02 02:09:15 PM PDT 24 |
3840975272 ps |
T748 |
/workspace/coverage/default/42.spi_device_flash_mode.3270717535 |
|
|
Apr 02 02:10:01 PM PDT 24 |
Apr 02 02:11:29 PM PDT 24 |
9585854921 ps |
T749 |
/workspace/coverage/default/14.spi_device_tpm_read_hw_reg.1614236301 |
|
|
Apr 02 02:05:36 PM PDT 24 |
Apr 02 02:06:06 PM PDT 24 |
12765576732 ps |
T750 |
/workspace/coverage/default/31.spi_device_tpm_all.1316341703 |
|
|
Apr 02 02:08:11 PM PDT 24 |
Apr 02 02:08:20 PM PDT 24 |
2444720752 ps |
T751 |
/workspace/coverage/default/30.spi_device_tpm_rw.3821298500 |
|
|
Apr 02 02:08:03 PM PDT 24 |
Apr 02 02:08:05 PM PDT 24 |
742475411 ps |
T285 |
/workspace/coverage/default/4.spi_device_pass_addr_payload_swap.1430760827 |
|
|
Apr 02 02:03:47 PM PDT 24 |
Apr 02 02:03:57 PM PDT 24 |
2509797015 ps |
T752 |
/workspace/coverage/default/3.spi_device_tpm_rw.1741934587 |
|
|
Apr 02 02:03:33 PM PDT 24 |
Apr 02 02:03:35 PM PDT 24 |
161380316 ps |
T753 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.2139864332 |
|
|
Apr 02 12:28:58 PM PDT 24 |
Apr 02 12:28:59 PM PDT 24 |
13899627 ps |
T129 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.563896469 |
|
|
Apr 02 12:29:38 PM PDT 24 |
Apr 02 12:29:41 PM PDT 24 |
406266758 ps |
T35 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1793013956 |
|
|
Apr 02 12:29:23 PM PDT 24 |
Apr 02 12:29:30 PM PDT 24 |
105263576 ps |
T130 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.2526511814 |
|
|
Apr 02 12:29:24 PM PDT 24 |
Apr 02 12:29:33 PM PDT 24 |
1249110670 ps |
T149 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.4079125207 |
|
|
Apr 02 12:29:43 PM PDT 24 |
Apr 02 12:29:44 PM PDT 24 |
114262610 ps |
T114 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.1506981832 |
|
|
Apr 02 12:29:36 PM PDT 24 |
Apr 02 12:29:41 PM PDT 24 |
357603719 ps |
T164 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.201896782 |
|
|
Apr 02 12:29:23 PM PDT 24 |
Apr 02 12:29:24 PM PDT 24 |
17433680 ps |
T36 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1663204886 |
|
|
Apr 02 12:29:23 PM PDT 24 |
Apr 02 12:29:28 PM PDT 24 |
900631523 ps |
T150 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.1189642044 |
|
|
Apr 02 12:29:39 PM PDT 24 |
Apr 02 12:29:42 PM PDT 24 |
446707576 ps |
T136 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3305076691 |
|
|
Apr 02 12:29:21 PM PDT 24 |
Apr 02 12:29:23 PM PDT 24 |
448344101 ps |
T754 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.546181805 |
|
|
Apr 02 12:29:41 PM PDT 24 |
Apr 02 12:29:42 PM PDT 24 |
12191779 ps |
T151 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.808110263 |
|
|
Apr 02 12:29:31 PM PDT 24 |
Apr 02 12:29:32 PM PDT 24 |
91927542 ps |
T165 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.1941542482 |
|
|
Apr 02 12:29:40 PM PDT 24 |
Apr 02 12:29:42 PM PDT 24 |
18078743 ps |
T166 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.267673310 |
|
|
Apr 02 12:29:43 PM PDT 24 |
Apr 02 12:29:44 PM PDT 24 |
36936187 ps |
T99 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.92457606 |
|
|
Apr 02 12:29:21 PM PDT 24 |
Apr 02 12:29:22 PM PDT 24 |
32463496 ps |
T137 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.2765705838 |
|
|
Apr 02 12:29:24 PM PDT 24 |
Apr 02 12:29:46 PM PDT 24 |
355375968 ps |
T755 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.3189903128 |
|
|
Apr 02 12:29:37 PM PDT 24 |
Apr 02 12:29:38 PM PDT 24 |
15707445 ps |
T115 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1702450150 |
|
|
Apr 02 12:29:39 PM PDT 24 |
Apr 02 12:29:40 PM PDT 24 |
68925870 ps |
T116 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3072746493 |
|
|
Apr 02 12:29:39 PM PDT 24 |
Apr 02 12:29:44 PM PDT 24 |
635058360 ps |
T37 |
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.3676135745 |
|
|
Apr 02 12:29:34 PM PDT 24 |
Apr 02 12:29:37 PM PDT 24 |
257612963 ps |
T756 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.3095808646 |
|
|
Apr 02 12:30:00 PM PDT 24 |
Apr 02 12:30:01 PM PDT 24 |
27385675 ps |
T123 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1057258276 |
|
|
Apr 02 12:29:25 PM PDT 24 |
Apr 02 12:29:29 PM PDT 24 |
195034866 ps |
T757 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.3335386691 |
|
|
Apr 02 12:29:32 PM PDT 24 |
Apr 02 12:29:33 PM PDT 24 |
36407798 ps |
T138 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.575192962 |
|
|
Apr 02 12:29:26 PM PDT 24 |
Apr 02 12:29:46 PM PDT 24 |
303392770 ps |
T134 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.2094807018 |
|
|
Apr 02 12:29:23 PM PDT 24 |
Apr 02 12:29:26 PM PDT 24 |
164944766 ps |
T126 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.1896065839 |
|
|
Apr 02 12:29:20 PM PDT 24 |
Apr 02 12:29:26 PM PDT 24 |
533618711 ps |
T135 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2999875493 |
|
|
Apr 02 12:29:13 PM PDT 24 |
Apr 02 12:29:17 PM PDT 24 |
787320372 ps |
T758 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.346228604 |
|
|
Apr 02 12:29:41 PM PDT 24 |
Apr 02 12:29:42 PM PDT 24 |
40002693 ps |
T121 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.2350511001 |
|
|
Apr 02 12:29:31 PM PDT 24 |
Apr 02 12:29:38 PM PDT 24 |
284184661 ps |
T759 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.2294278527 |
|
|
Apr 02 12:29:30 PM PDT 24 |
Apr 02 12:29:31 PM PDT 24 |
35576661 ps |
T152 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1410935949 |
|
|
Apr 02 12:29:16 PM PDT 24 |
Apr 02 12:29:18 PM PDT 24 |
104663099 ps |
T760 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.3304015582 |
|
|
Apr 02 12:29:26 PM PDT 24 |
Apr 02 12:29:26 PM PDT 24 |
57551950 ps |
T761 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.704088787 |
|
|
Apr 02 12:29:34 PM PDT 24 |
Apr 02 12:29:35 PM PDT 24 |
48278557 ps |
T128 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.3420588450 |
|
|
Apr 02 12:29:26 PM PDT 24 |
Apr 02 12:29:29 PM PDT 24 |
40418556 ps |
T122 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2441788916 |
|
|
Apr 02 12:29:28 PM PDT 24 |
Apr 02 12:29:51 PM PDT 24 |
4092441433 ps |
T139 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.1196443208 |
|
|
Apr 02 12:29:16 PM PDT 24 |
Apr 02 12:29:19 PM PDT 24 |
405757391 ps |
T762 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3192986481 |
|
|
Apr 02 12:29:39 PM PDT 24 |
Apr 02 12:29:39 PM PDT 24 |
62742694 ps |
T763 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.2544754221 |
|
|
Apr 02 12:29:39 PM PDT 24 |
Apr 02 12:29:40 PM PDT 24 |
26820465 ps |
T153 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.52040393 |
|
|
Apr 02 12:29:26 PM PDT 24 |
Apr 02 12:29:29 PM PDT 24 |
212384209 ps |
T140 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.2292653670 |
|
|
Apr 02 12:29:28 PM PDT 24 |
Apr 02 12:29:30 PM PDT 24 |
257855995 ps |
T127 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.3007166536 |
|
|
Apr 02 12:29:40 PM PDT 24 |
Apr 02 12:29:44 PM PDT 24 |
2537779370 ps |
T141 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.1705607462 |
|
|
Apr 02 12:29:41 PM PDT 24 |
Apr 02 12:29:44 PM PDT 24 |
110838951 ps |
T156 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3459979582 |
|
|
Apr 02 12:29:06 PM PDT 24 |
Apr 02 12:29:07 PM PDT 24 |
171054017 ps |
T764 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.724990679 |
|
|
Apr 02 12:29:24 PM PDT 24 |
Apr 02 12:29:28 PM PDT 24 |
301807492 ps |
T364 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.936093707 |
|
|
Apr 02 12:29:15 PM PDT 24 |
Apr 02 12:29:22 PM PDT 24 |
285220498 ps |
T142 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.1087061662 |
|
|
Apr 02 12:29:16 PM PDT 24 |
Apr 02 12:29:18 PM PDT 24 |
56881100 ps |
T765 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.2017688968 |
|
|
Apr 02 12:29:19 PM PDT 24 |
Apr 02 12:29:22 PM PDT 24 |
311481244 ps |
T766 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.840796876 |
|
|
Apr 02 12:29:35 PM PDT 24 |
Apr 02 12:29:37 PM PDT 24 |
89764942 ps |
T767 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.486728774 |
|
|
Apr 02 12:29:40 PM PDT 24 |
Apr 02 12:29:42 PM PDT 24 |
36827905 ps |
T133 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.1895976142 |
|
|
Apr 02 12:29:09 PM PDT 24 |
Apr 02 12:29:11 PM PDT 24 |
502568511 ps |
T143 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.1855974579 |
|
|
Apr 02 12:29:33 PM PDT 24 |
Apr 02 12:29:35 PM PDT 24 |
202573493 ps |
T157 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.615193959 |
|
|
Apr 02 12:29:15 PM PDT 24 |
Apr 02 12:29:31 PM PDT 24 |
7111371158 ps |
T158 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2785440127 |
|
|
Apr 02 12:29:38 PM PDT 24 |
Apr 02 12:29:40 PM PDT 24 |
85608319 ps |
T768 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.1478816290 |
|
|
Apr 02 12:29:36 PM PDT 24 |
Apr 02 12:29:37 PM PDT 24 |
14729834 ps |
T769 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.1382481901 |
|
|
Apr 02 12:29:29 PM PDT 24 |
Apr 02 12:29:30 PM PDT 24 |
46393034 ps |