Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
3111 |
0 |
0 |
T40 |
30875 |
5 |
0 |
0 |
T122 |
3037 |
27 |
0 |
0 |
T123 |
13264 |
7 |
0 |
0 |
T124 |
8669 |
5 |
0 |
0 |
T125 |
19893 |
3 |
0 |
0 |
T129 |
15003 |
187 |
0 |
0 |
T130 |
5376 |
188 |
0 |
0 |
T149 |
54252 |
2 |
0 |
0 |
T150 |
8203 |
3 |
0 |
0 |
T151 |
8662 |
3 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1369 |
0 |
0 |
T38 |
11762 |
32 |
0 |
0 |
T39 |
68919 |
93 |
0 |
0 |
T124 |
8669 |
9 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
4 |
0 |
0 |
T175 |
7553 |
14 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
13 |
0 |
0 |
T178 |
66628 |
91 |
0 |
0 |
T179 |
101033 |
129 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1367 |
0 |
0 |
T38 |
11762 |
9 |
0 |
0 |
T39 |
68919 |
90 |
0 |
0 |
T124 |
8669 |
2 |
0 |
0 |
T155 |
3496 |
5 |
0 |
0 |
T170 |
7078 |
38 |
0 |
0 |
T175 |
7553 |
27 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
11 |
0 |
0 |
T178 |
66628 |
90 |
0 |
0 |
T179 |
101033 |
99 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
2163 |
0 |
0 |
T38 |
11762 |
22 |
0 |
0 |
T39 |
68919 |
170 |
0 |
0 |
T124 |
8669 |
8 |
0 |
0 |
T170 |
7078 |
8 |
0 |
0 |
T175 |
7553 |
25 |
0 |
0 |
T176 |
5590 |
9 |
0 |
0 |
T177 |
5431 |
6 |
0 |
0 |
T178 |
66628 |
153 |
0 |
0 |
T179 |
101033 |
313 |
0 |
0 |
T180 |
10271 |
39 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
13237 |
0 |
0 |
T38 |
11762 |
35 |
0 |
0 |
T39 |
68919 |
1532 |
0 |
0 |
T124 |
8669 |
6 |
0 |
0 |
T155 |
3496 |
108 |
0 |
0 |
T170 |
7078 |
25 |
0 |
0 |
T175 |
7553 |
9 |
0 |
0 |
T176 |
5590 |
135 |
0 |
0 |
T177 |
5431 |
1 |
0 |
0 |
T178 |
66628 |
1433 |
0 |
0 |
T179 |
101033 |
1709 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
12755 |
0 |
0 |
T38 |
11762 |
71 |
0 |
0 |
T39 |
68919 |
1330 |
0 |
0 |
T124 |
8669 |
13 |
0 |
0 |
T155 |
3496 |
7 |
0 |
0 |
T170 |
7078 |
21 |
0 |
0 |
T175 |
7553 |
13 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
172 |
0 |
0 |
T178 |
66628 |
1038 |
0 |
0 |
T179 |
101033 |
1642 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
12759 |
0 |
0 |
T38 |
11762 |
16 |
0 |
0 |
T39 |
68919 |
1175 |
0 |
0 |
T124 |
8669 |
140 |
0 |
0 |
T155 |
3496 |
100 |
0 |
0 |
T170 |
7078 |
29 |
0 |
0 |
T175 |
7553 |
54 |
0 |
0 |
T176 |
5590 |
4 |
0 |
0 |
T177 |
5431 |
130 |
0 |
0 |
T178 |
66628 |
1421 |
0 |
0 |
T179 |
101033 |
1719 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
13571 |
0 |
0 |
T38 |
11762 |
36 |
0 |
0 |
T39 |
68919 |
1383 |
0 |
0 |
T124 |
8669 |
8 |
0 |
0 |
T155 |
3496 |
128 |
0 |
0 |
T170 |
7078 |
17 |
0 |
0 |
T175 |
7553 |
34 |
0 |
0 |
T176 |
5590 |
137 |
0 |
0 |
T177 |
5431 |
128 |
0 |
0 |
T178 |
66628 |
1217 |
0 |
0 |
T179 |
101033 |
2385 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
14581 |
0 |
0 |
T39 |
68919 |
959 |
0 |
0 |
T124 |
8669 |
51 |
0 |
0 |
T129 |
15003 |
5 |
0 |
0 |
T155 |
3496 |
97 |
0 |
0 |
T170 |
7078 |
16 |
0 |
0 |
T175 |
7553 |
28 |
0 |
0 |
T176 |
5590 |
110 |
0 |
0 |
T177 |
5431 |
14 |
0 |
0 |
T178 |
66628 |
1603 |
0 |
0 |
T179 |
101033 |
2284 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
11291 |
0 |
0 |
T38 |
11762 |
40 |
0 |
0 |
T39 |
68919 |
1171 |
0 |
0 |
T170 |
7078 |
8 |
0 |
0 |
T175 |
7553 |
8 |
0 |
0 |
T176 |
5590 |
5 |
0 |
0 |
T177 |
5431 |
138 |
0 |
0 |
T178 |
66628 |
864 |
0 |
0 |
T179 |
101033 |
1990 |
0 |
0 |
T180 |
10271 |
13 |
0 |
0 |
T181 |
11030 |
47 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
14050 |
0 |
0 |
T38 |
11762 |
61 |
0 |
0 |
T39 |
68919 |
776 |
0 |
0 |
T124 |
8669 |
125 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
18 |
0 |
0 |
T175 |
7553 |
35 |
0 |
0 |
T176 |
5590 |
1 |
0 |
0 |
T178 |
66628 |
1107 |
0 |
0 |
T179 |
101033 |
2105 |
0 |
0 |
T180 |
10271 |
248 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
11407 |
0 |
0 |
T39 |
68919 |
886 |
0 |
0 |
T124 |
8669 |
8 |
0 |
0 |
T155 |
3496 |
103 |
0 |
0 |
T170 |
7078 |
3 |
0 |
0 |
T175 |
7553 |
23 |
0 |
0 |
T176 |
5590 |
135 |
0 |
0 |
T177 |
5431 |
6 |
0 |
0 |
T178 |
66628 |
1320 |
0 |
0 |
T179 |
101033 |
1288 |
0 |
0 |
T180 |
10271 |
9 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5374 |
0 |
0 |
T38 |
11762 |
11 |
0 |
0 |
T39 |
68919 |
426 |
0 |
0 |
T124 |
8669 |
27 |
0 |
0 |
T155 |
3496 |
8 |
0 |
0 |
T170 |
7078 |
13 |
0 |
0 |
T175 |
7553 |
17 |
0 |
0 |
T176 |
5590 |
7 |
0 |
0 |
T177 |
5431 |
11 |
0 |
0 |
T178 |
66628 |
507 |
0 |
0 |
T179 |
101033 |
569 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6418 |
0 |
0 |
T38 |
11762 |
42 |
0 |
0 |
T39 |
68919 |
461 |
0 |
0 |
T124 |
8669 |
57 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
17 |
0 |
0 |
T175 |
7553 |
37 |
0 |
0 |
T176 |
5590 |
7 |
0 |
0 |
T177 |
5431 |
53 |
0 |
0 |
T178 |
66628 |
556 |
0 |
0 |
T179 |
101033 |
927 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5889 |
0 |
0 |
T38 |
11762 |
17 |
0 |
0 |
T39 |
68919 |
429 |
0 |
0 |
T124 |
8669 |
36 |
0 |
0 |
T155 |
3496 |
9 |
0 |
0 |
T170 |
7078 |
16 |
0 |
0 |
T175 |
7553 |
42 |
0 |
0 |
T176 |
5590 |
10 |
0 |
0 |
T177 |
5431 |
58 |
0 |
0 |
T178 |
66628 |
599 |
0 |
0 |
T179 |
101033 |
889 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5518 |
0 |
0 |
T38 |
11762 |
14 |
0 |
0 |
T39 |
68919 |
632 |
0 |
0 |
T124 |
8669 |
40 |
0 |
0 |
T155 |
3496 |
58 |
0 |
0 |
T170 |
7078 |
23 |
0 |
0 |
T175 |
7553 |
14 |
0 |
0 |
T176 |
5590 |
14 |
0 |
0 |
T177 |
5431 |
5 |
0 |
0 |
T178 |
66628 |
558 |
0 |
0 |
T179 |
101033 |
973 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5787 |
0 |
0 |
T38 |
11762 |
9 |
0 |
0 |
T39 |
68919 |
608 |
0 |
0 |
T124 |
8669 |
9 |
0 |
0 |
T155 |
3496 |
51 |
0 |
0 |
T170 |
7078 |
19 |
0 |
0 |
T175 |
7553 |
10 |
0 |
0 |
T176 |
5590 |
15 |
0 |
0 |
T177 |
5431 |
1 |
0 |
0 |
T178 |
66628 |
470 |
0 |
0 |
T179 |
101033 |
1022 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5744 |
0 |
0 |
T38 |
11762 |
47 |
0 |
0 |
T39 |
68919 |
270 |
0 |
0 |
T124 |
8669 |
35 |
0 |
0 |
T155 |
3496 |
27 |
0 |
0 |
T170 |
7078 |
23 |
0 |
0 |
T175 |
7553 |
29 |
0 |
0 |
T176 |
5590 |
40 |
0 |
0 |
T177 |
5431 |
62 |
0 |
0 |
T178 |
66628 |
516 |
0 |
0 |
T179 |
101033 |
1019 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5423 |
0 |
0 |
T38 |
11762 |
37 |
0 |
0 |
T39 |
68919 |
453 |
0 |
0 |
T124 |
8669 |
17 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T175 |
7553 |
19 |
0 |
0 |
T176 |
5590 |
42 |
0 |
0 |
T177 |
5431 |
3 |
0 |
0 |
T178 |
66628 |
271 |
0 |
0 |
T179 |
101033 |
735 |
0 |
0 |
T180 |
10271 |
104 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6692 |
0 |
0 |
T38 |
11762 |
48 |
0 |
0 |
T39 |
68919 |
705 |
0 |
0 |
T124 |
8669 |
29 |
0 |
0 |
T155 |
3496 |
4 |
0 |
0 |
T170 |
7078 |
18 |
0 |
0 |
T175 |
7553 |
30 |
0 |
0 |
T176 |
5590 |
62 |
0 |
0 |
T177 |
5431 |
56 |
0 |
0 |
T178 |
66628 |
592 |
0 |
0 |
T179 |
101033 |
869 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
4974 |
0 |
0 |
T38 |
11762 |
11 |
0 |
0 |
T39 |
68919 |
358 |
0 |
0 |
T124 |
8669 |
33 |
0 |
0 |
T155 |
3496 |
7 |
0 |
0 |
T170 |
7078 |
2 |
0 |
0 |
T175 |
7553 |
21 |
0 |
0 |
T176 |
5590 |
9 |
0 |
0 |
T177 |
5431 |
6 |
0 |
0 |
T178 |
66628 |
374 |
0 |
0 |
T179 |
101033 |
572 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6481 |
0 |
0 |
T38 |
11762 |
15 |
0 |
0 |
T39 |
68919 |
480 |
0 |
0 |
T124 |
8669 |
46 |
0 |
0 |
T155 |
3496 |
2 |
0 |
0 |
T170 |
7078 |
24 |
0 |
0 |
T175 |
7553 |
24 |
0 |
0 |
T176 |
5590 |
3 |
0 |
0 |
T177 |
5431 |
71 |
0 |
0 |
T178 |
66628 |
531 |
0 |
0 |
T179 |
101033 |
863 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5731 |
0 |
0 |
T38 |
11762 |
21 |
0 |
0 |
T39 |
68919 |
473 |
0 |
0 |
T124 |
8669 |
14 |
0 |
0 |
T170 |
7078 |
35 |
0 |
0 |
T175 |
7553 |
12 |
0 |
0 |
T176 |
5590 |
54 |
0 |
0 |
T177 |
5431 |
9 |
0 |
0 |
T178 |
66628 |
666 |
0 |
0 |
T179 |
101033 |
700 |
0 |
0 |
T180 |
10271 |
50 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6541 |
0 |
0 |
T38 |
11762 |
4 |
0 |
0 |
T39 |
68919 |
650 |
0 |
0 |
T124 |
8669 |
33 |
0 |
0 |
T155 |
3496 |
54 |
0 |
0 |
T170 |
7078 |
32 |
0 |
0 |
T175 |
7553 |
38 |
0 |
0 |
T176 |
5590 |
49 |
0 |
0 |
T177 |
5431 |
49 |
0 |
0 |
T178 |
66628 |
379 |
0 |
0 |
T179 |
101033 |
835 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5934 |
0 |
0 |
T38 |
11762 |
35 |
0 |
0 |
T39 |
68919 |
521 |
0 |
0 |
T124 |
8669 |
5 |
0 |
0 |
T155 |
3496 |
7 |
0 |
0 |
T170 |
7078 |
14 |
0 |
0 |
T175 |
7553 |
18 |
0 |
0 |
T176 |
5590 |
38 |
0 |
0 |
T177 |
5431 |
62 |
0 |
0 |
T178 |
66628 |
683 |
0 |
0 |
T179 |
101033 |
753 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5483 |
0 |
0 |
T38 |
11762 |
25 |
0 |
0 |
T39 |
68919 |
592 |
0 |
0 |
T124 |
8669 |
35 |
0 |
0 |
T129 |
15003 |
9 |
0 |
0 |
T155 |
3496 |
3 |
0 |
0 |
T170 |
7078 |
28 |
0 |
0 |
T175 |
7553 |
38 |
0 |
0 |
T176 |
5590 |
66 |
0 |
0 |
T177 |
5431 |
53 |
0 |
0 |
T178 |
66628 |
312 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5592 |
0 |
0 |
T38 |
11762 |
5 |
0 |
0 |
T39 |
68919 |
356 |
0 |
0 |
T124 |
8669 |
52 |
0 |
0 |
T170 |
7078 |
30 |
0 |
0 |
T175 |
7553 |
15 |
0 |
0 |
T176 |
5590 |
63 |
0 |
0 |
T177 |
5431 |
67 |
0 |
0 |
T178 |
66628 |
628 |
0 |
0 |
T179 |
101033 |
746 |
0 |
0 |
T180 |
10271 |
62 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5954 |
0 |
0 |
T38 |
11762 |
16 |
0 |
0 |
T39 |
68919 |
473 |
0 |
0 |
T124 |
8669 |
12 |
0 |
0 |
T155 |
3496 |
33 |
0 |
0 |
T170 |
7078 |
41 |
0 |
0 |
T175 |
7553 |
21 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
13 |
0 |
0 |
T178 |
66628 |
454 |
0 |
0 |
T179 |
101033 |
886 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6111 |
0 |
0 |
T38 |
11762 |
25 |
0 |
0 |
T39 |
68919 |
693 |
0 |
0 |
T124 |
8669 |
71 |
0 |
0 |
T155 |
3496 |
6 |
0 |
0 |
T170 |
7078 |
20 |
0 |
0 |
T175 |
7553 |
35 |
0 |
0 |
T176 |
5590 |
47 |
0 |
0 |
T177 |
5431 |
49 |
0 |
0 |
T178 |
66628 |
612 |
0 |
0 |
T179 |
101033 |
908 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6363 |
0 |
0 |
T38 |
11762 |
17 |
0 |
0 |
T39 |
68919 |
470 |
0 |
0 |
T124 |
8669 |
34 |
0 |
0 |
T155 |
3496 |
43 |
0 |
0 |
T170 |
7078 |
37 |
0 |
0 |
T175 |
7553 |
17 |
0 |
0 |
T176 |
5590 |
3 |
0 |
0 |
T177 |
5431 |
14 |
0 |
0 |
T178 |
66628 |
640 |
0 |
0 |
T179 |
101033 |
897 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5233 |
0 |
0 |
T38 |
11762 |
11 |
0 |
0 |
T39 |
68919 |
389 |
0 |
0 |
T124 |
8669 |
9 |
0 |
0 |
T155 |
3496 |
5 |
0 |
0 |
T170 |
7078 |
35 |
0 |
0 |
T175 |
7553 |
13 |
0 |
0 |
T176 |
5590 |
53 |
0 |
0 |
T177 |
5431 |
59 |
0 |
0 |
T178 |
66628 |
692 |
0 |
0 |
T179 |
101033 |
655 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6087 |
0 |
0 |
T38 |
11762 |
22 |
0 |
0 |
T39 |
68919 |
360 |
0 |
0 |
T124 |
8669 |
26 |
0 |
0 |
T155 |
3496 |
32 |
0 |
0 |
T170 |
7078 |
7 |
0 |
0 |
T175 |
7553 |
29 |
0 |
0 |
T176 |
5590 |
17 |
0 |
0 |
T177 |
5431 |
84 |
0 |
0 |
T178 |
66628 |
527 |
0 |
0 |
T179 |
101033 |
890 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5988 |
0 |
0 |
T38 |
11762 |
31 |
0 |
0 |
T39 |
68919 |
433 |
0 |
0 |
T124 |
8669 |
30 |
0 |
0 |
T155 |
3496 |
7 |
0 |
0 |
T170 |
7078 |
1 |
0 |
0 |
T175 |
7553 |
13 |
0 |
0 |
T177 |
5431 |
11 |
0 |
0 |
T178 |
66628 |
546 |
0 |
0 |
T179 |
101033 |
937 |
0 |
0 |
T180 |
10271 |
15 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
6272 |
0 |
0 |
T38 |
11762 |
18 |
0 |
0 |
T39 |
68919 |
524 |
0 |
0 |
T124 |
8669 |
27 |
0 |
0 |
T155 |
3496 |
63 |
0 |
0 |
T170 |
7078 |
32 |
0 |
0 |
T175 |
7553 |
14 |
0 |
0 |
T176 |
5590 |
51 |
0 |
0 |
T177 |
5431 |
56 |
0 |
0 |
T178 |
66628 |
643 |
0 |
0 |
T179 |
101033 |
1013 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5768 |
0 |
0 |
T38 |
11762 |
12 |
0 |
0 |
T39 |
68919 |
469 |
0 |
0 |
T124 |
8669 |
56 |
0 |
0 |
T129 |
15003 |
5 |
0 |
0 |
T143 |
20773 |
1 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
7 |
0 |
0 |
T175 |
7553 |
10 |
0 |
0 |
T176 |
5590 |
60 |
0 |
0 |
T177 |
5431 |
2 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
5999 |
0 |
0 |
T38 |
11762 |
18 |
0 |
0 |
T39 |
68919 |
561 |
0 |
0 |
T124 |
8669 |
35 |
0 |
0 |
T155 |
3496 |
3 |
0 |
0 |
T170 |
7078 |
43 |
0 |
0 |
T175 |
7553 |
23 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
14 |
0 |
0 |
T178 |
66628 |
462 |
0 |
0 |
T179 |
101033 |
757 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1828 |
0 |
0 |
T38 |
11762 |
22 |
0 |
0 |
T39 |
68919 |
105 |
0 |
0 |
T124 |
8669 |
7 |
0 |
0 |
T155 |
3496 |
14 |
0 |
0 |
T170 |
7078 |
18 |
0 |
0 |
T175 |
7553 |
22 |
0 |
0 |
T176 |
5590 |
5 |
0 |
0 |
T177 |
5431 |
13 |
0 |
0 |
T178 |
66628 |
117 |
0 |
0 |
T179 |
101033 |
206 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1815 |
0 |
0 |
T38 |
11762 |
38 |
0 |
0 |
T39 |
68919 |
101 |
0 |
0 |
T124 |
8669 |
6 |
0 |
0 |
T143 |
20773 |
8 |
0 |
0 |
T155 |
3496 |
5 |
0 |
0 |
T170 |
7078 |
30 |
0 |
0 |
T175 |
7553 |
26 |
0 |
0 |
T176 |
5590 |
11 |
0 |
0 |
T177 |
5431 |
6 |
0 |
0 |
T178 |
66628 |
115 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1889 |
0 |
0 |
T38 |
11762 |
43 |
0 |
0 |
T39 |
68919 |
136 |
0 |
0 |
T124 |
8669 |
3 |
0 |
0 |
T155 |
3496 |
5 |
0 |
0 |
T170 |
7078 |
24 |
0 |
0 |
T175 |
7553 |
30 |
0 |
0 |
T176 |
5590 |
18 |
0 |
0 |
T177 |
5431 |
2 |
0 |
0 |
T178 |
66628 |
114 |
0 |
0 |
T179 |
101033 |
189 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1755 |
0 |
0 |
T38 |
11762 |
19 |
0 |
0 |
T39 |
68919 |
112 |
0 |
0 |
T124 |
8669 |
9 |
0 |
0 |
T155 |
3496 |
3 |
0 |
0 |
T170 |
7078 |
7 |
0 |
0 |
T175 |
7553 |
35 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
11 |
0 |
0 |
T178 |
66628 |
101 |
0 |
0 |
T179 |
101033 |
168 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
2470 |
0 |
0 |
T38 |
11762 |
9 |
0 |
0 |
T39 |
68919 |
174 |
0 |
0 |
T124 |
8669 |
15 |
0 |
0 |
T155 |
3496 |
2 |
0 |
0 |
T170 |
7078 |
9 |
0 |
0 |
T175 |
7553 |
31 |
0 |
0 |
T176 |
5590 |
18 |
0 |
0 |
T177 |
5431 |
9 |
0 |
0 |
T178 |
66628 |
179 |
0 |
0 |
T179 |
101033 |
263 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
4448 |
0 |
0 |
T38 |
11762 |
19 |
0 |
0 |
T39 |
68919 |
392 |
0 |
0 |
T124 |
8669 |
23 |
0 |
0 |
T170 |
7078 |
36 |
0 |
0 |
T176 |
5590 |
24 |
0 |
0 |
T177 |
5431 |
12 |
0 |
0 |
T178 |
66628 |
448 |
0 |
0 |
T179 |
101033 |
582 |
0 |
0 |
T180 |
10271 |
57 |
0 |
0 |
T182 |
916 |
4 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1761 |
0 |
0 |
T38 |
11762 |
13 |
0 |
0 |
T39 |
68919 |
95 |
0 |
0 |
T124 |
8669 |
8 |
0 |
0 |
T170 |
7078 |
13 |
0 |
0 |
T175 |
7553 |
5 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
10 |
0 |
0 |
T178 |
66628 |
97 |
0 |
0 |
T179 |
101033 |
202 |
0 |
0 |
T180 |
10271 |
26 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1785 |
0 |
0 |
T38 |
11762 |
22 |
0 |
0 |
T39 |
68919 |
106 |
0 |
0 |
T124 |
8669 |
6 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
13 |
0 |
0 |
T175 |
7553 |
41 |
0 |
0 |
T176 |
5590 |
14 |
0 |
0 |
T177 |
5431 |
16 |
0 |
0 |
T178 |
66628 |
117 |
0 |
0 |
T179 |
101033 |
177 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1454 |
0 |
0 |
T38 |
11762 |
17 |
0 |
0 |
T39 |
68919 |
72 |
0 |
0 |
T124 |
8669 |
9 |
0 |
0 |
T155 |
3496 |
2 |
0 |
0 |
T170 |
7078 |
15 |
0 |
0 |
T175 |
7553 |
22 |
0 |
0 |
T176 |
5590 |
5 |
0 |
0 |
T177 |
5431 |
13 |
0 |
0 |
T178 |
66628 |
74 |
0 |
0 |
T179 |
101033 |
122 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1477 |
0 |
0 |
T38 |
11762 |
34 |
0 |
0 |
T39 |
68919 |
84 |
0 |
0 |
T124 |
8669 |
13 |
0 |
0 |
T170 |
7078 |
11 |
0 |
0 |
T175 |
7553 |
48 |
0 |
0 |
T176 |
5590 |
14 |
0 |
0 |
T177 |
5431 |
17 |
0 |
0 |
T178 |
66628 |
64 |
0 |
0 |
T179 |
101033 |
122 |
0 |
0 |
T180 |
10271 |
12 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1288 |
0 |
0 |
T38 |
11762 |
46 |
0 |
0 |
T39 |
68919 |
67 |
0 |
0 |
T124 |
8669 |
10 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
13 |
0 |
0 |
T175 |
7553 |
31 |
0 |
0 |
T176 |
5590 |
7 |
0 |
0 |
T177 |
5431 |
14 |
0 |
0 |
T178 |
66628 |
69 |
0 |
0 |
T179 |
101033 |
87 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1375 |
0 |
0 |
T38 |
11762 |
18 |
0 |
0 |
T39 |
68919 |
73 |
0 |
0 |
T124 |
8669 |
1 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
20 |
0 |
0 |
T175 |
7553 |
32 |
0 |
0 |
T176 |
5590 |
6 |
0 |
0 |
T177 |
5431 |
3 |
0 |
0 |
T178 |
66628 |
64 |
0 |
0 |
T179 |
101033 |
108 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
2615 |
0 |
0 |
T38 |
11762 |
42 |
0 |
0 |
T39 |
68919 |
213 |
0 |
0 |
T124 |
8669 |
9 |
0 |
0 |
T155 |
3496 |
25 |
0 |
0 |
T170 |
7078 |
39 |
0 |
0 |
T175 |
7553 |
6 |
0 |
0 |
T176 |
5590 |
6 |
0 |
0 |
T177 |
5431 |
2 |
0 |
0 |
T178 |
66628 |
187 |
0 |
0 |
T179 |
101033 |
377 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1307 |
0 |
0 |
T38 |
11762 |
10 |
0 |
0 |
T39 |
68919 |
65 |
0 |
0 |
T124 |
8669 |
16 |
0 |
0 |
T143 |
20773 |
5 |
0 |
0 |
T155 |
3496 |
5 |
0 |
0 |
T170 |
7078 |
3 |
0 |
0 |
T175 |
7553 |
37 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
9 |
0 |
0 |
T178 |
66628 |
77 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
2938 |
0 |
0 |
T38 |
11762 |
24 |
0 |
0 |
T39 |
68919 |
282 |
0 |
0 |
T124 |
8669 |
19 |
0 |
0 |
T143 |
20773 |
10 |
0 |
0 |
T155 |
3496 |
17 |
0 |
0 |
T170 |
7078 |
4 |
0 |
0 |
T175 |
7553 |
29 |
0 |
0 |
T176 |
5590 |
5 |
0 |
0 |
T177 |
5431 |
13 |
0 |
0 |
T178 |
66628 |
267 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1780 |
0 |
0 |
T38 |
11762 |
18 |
0 |
0 |
T39 |
68919 |
124 |
0 |
0 |
T124 |
8669 |
7 |
0 |
0 |
T155 |
3496 |
7 |
0 |
0 |
T170 |
7078 |
52 |
0 |
0 |
T175 |
7553 |
22 |
0 |
0 |
T176 |
5590 |
8 |
0 |
0 |
T177 |
5431 |
4 |
0 |
0 |
T178 |
66628 |
127 |
0 |
0 |
T179 |
101033 |
130 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1431 |
0 |
0 |
T38 |
11762 |
15 |
0 |
0 |
T39 |
68919 |
99 |
0 |
0 |
T124 |
8669 |
13 |
0 |
0 |
T155 |
3496 |
1 |
0 |
0 |
T170 |
7078 |
55 |
0 |
0 |
T175 |
7553 |
11 |
0 |
0 |
T177 |
5431 |
10 |
0 |
0 |
T178 |
66628 |
56 |
0 |
0 |
T179 |
101033 |
94 |
0 |
0 |
T180 |
10271 |
20 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1379 |
0 |
0 |
T38 |
11762 |
26 |
0 |
0 |
T39 |
68919 |
71 |
0 |
0 |
T124 |
8669 |
15 |
0 |
0 |
T155 |
3496 |
5 |
0 |
0 |
T175 |
7553 |
15 |
0 |
0 |
T176 |
5590 |
6 |
0 |
0 |
T177 |
5431 |
5 |
0 |
0 |
T178 |
66628 |
66 |
0 |
0 |
T179 |
101033 |
118 |
0 |
0 |
T180 |
10271 |
8 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1451 |
0 |
0 |
T38 |
11762 |
23 |
0 |
0 |
T39 |
68919 |
77 |
0 |
0 |
T124 |
8669 |
17 |
0 |
0 |
T155 |
3496 |
4 |
0 |
0 |
T170 |
7078 |
36 |
0 |
0 |
T175 |
7553 |
36 |
0 |
0 |
T176 |
5590 |
16 |
0 |
0 |
T177 |
5431 |
5 |
0 |
0 |
T178 |
66628 |
68 |
0 |
0 |
T179 |
101033 |
99 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1436 |
0 |
0 |
T38 |
11762 |
18 |
0 |
0 |
T39 |
68919 |
61 |
0 |
0 |
T124 |
8669 |
11 |
0 |
0 |
T155 |
3496 |
9 |
0 |
0 |
T170 |
7078 |
33 |
0 |
0 |
T175 |
7553 |
19 |
0 |
0 |
T176 |
5590 |
9 |
0 |
0 |
T177 |
5431 |
10 |
0 |
0 |
T178 |
66628 |
82 |
0 |
0 |
T179 |
101033 |
108 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1380 |
0 |
0 |
T38 |
11762 |
23 |
0 |
0 |
T39 |
68919 |
58 |
0 |
0 |
T124 |
8669 |
9 |
0 |
0 |
T129 |
15003 |
2 |
0 |
0 |
T170 |
7078 |
33 |
0 |
0 |
T175 |
7553 |
27 |
0 |
0 |
T176 |
5590 |
13 |
0 |
0 |
T177 |
5431 |
6 |
0 |
0 |
T178 |
66628 |
78 |
0 |
0 |
T179 |
101033 |
119 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
119716422 |
1519 |
0 |
0 |
T38 |
11762 |
73 |
0 |
0 |
T39 |
68919 |
76 |
0 |
0 |
T124 |
8669 |
12 |
0 |
0 |
T155 |
3496 |
7 |
0 |
0 |
T175 |
7553 |
16 |
0 |
0 |
T176 |
5590 |
4 |
0 |
0 |
T177 |
5431 |
4 |
0 |
0 |
T178 |
66628 |
55 |
0 |
0 |
T179 |
101033 |
159 |
0 |
0 |
T180 |
10271 |
22 |
0 |
0 |