T635 |
/workspace/coverage/default/23.spi_device_flash_mode.1670495033 |
|
|
Apr 04 01:00:46 PM PDT 24 |
Apr 04 01:01:23 PM PDT 24 |
2522567687 ps |
T636 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.443289108 |
|
|
Apr 04 01:02:59 PM PDT 24 |
Apr 04 01:03:01 PM PDT 24 |
24946790 ps |
T229 |
/workspace/coverage/default/48.spi_device_mailbox.2011279677 |
|
|
Apr 04 01:06:03 PM PDT 24 |
Apr 04 01:06:05 PM PDT 24 |
341181302 ps |
T355 |
/workspace/coverage/default/7.spi_device_intercept.1593709245 |
|
|
Apr 04 12:57:39 PM PDT 24 |
Apr 04 12:57:44 PM PDT 24 |
735351100 ps |
T637 |
/workspace/coverage/default/29.spi_device_tpm_rw.3358074510 |
|
|
Apr 04 01:01:45 PM PDT 24 |
Apr 04 01:01:48 PM PDT 24 |
903434298 ps |
T638 |
/workspace/coverage/default/40.spi_device_tpm_sts_read.4284647685 |
|
|
Apr 04 01:04:03 PM PDT 24 |
Apr 04 01:04:05 PM PDT 24 |
1040612724 ps |
T639 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.3843226446 |
|
|
Apr 04 01:03:48 PM PDT 24 |
Apr 04 01:04:00 PM PDT 24 |
6535776817 ps |
T640 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.611994888 |
|
|
Apr 04 01:04:19 PM PDT 24 |
Apr 04 01:04:20 PM PDT 24 |
145886274 ps |
T341 |
/workspace/coverage/default/7.spi_device_mailbox.567311189 |
|
|
Apr 04 12:57:39 PM PDT 24 |
Apr 04 12:58:02 PM PDT 24 |
10730784874 ps |
T641 |
/workspace/coverage/default/47.spi_device_csb_read.1082135574 |
|
|
Apr 04 01:05:43 PM PDT 24 |
Apr 04 01:05:43 PM PDT 24 |
229012449 ps |
T346 |
/workspace/coverage/default/6.spi_device_mailbox.1641747676 |
|
|
Apr 04 12:57:27 PM PDT 24 |
Apr 04 01:00:07 PM PDT 24 |
41303429249 ps |
T642 |
/workspace/coverage/default/21.spi_device_tpm_all.166852039 |
|
|
Apr 04 01:00:16 PM PDT 24 |
Apr 04 01:00:51 PM PDT 24 |
9234722822 ps |
T643 |
/workspace/coverage/default/23.spi_device_tpm_read_hw_reg.3490326203 |
|
|
Apr 04 01:00:36 PM PDT 24 |
Apr 04 01:00:53 PM PDT 24 |
6231298356 ps |
T644 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.434825309 |
|
|
Apr 04 01:02:53 PM PDT 24 |
Apr 04 01:02:54 PM PDT 24 |
305086538 ps |
T291 |
/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.160909653 |
|
|
Apr 04 01:03:47 PM PDT 24 |
Apr 04 01:04:10 PM PDT 24 |
91422935164 ps |
T645 |
/workspace/coverage/default/27.spi_device_read_buffer_direct.2672739047 |
|
|
Apr 04 01:01:29 PM PDT 24 |
Apr 04 01:01:48 PM PDT 24 |
7019288502 ps |
T646 |
/workspace/coverage/default/14.spi_device_tpm_read_hw_reg.1488596639 |
|
|
Apr 04 12:59:02 PM PDT 24 |
Apr 04 12:59:05 PM PDT 24 |
823643585 ps |
T647 |
/workspace/coverage/default/20.spi_device_alert_test.1131820272 |
|
|
Apr 04 01:00:16 PM PDT 24 |
Apr 04 01:00:17 PM PDT 24 |
25244908 ps |
T648 |
/workspace/coverage/default/17.spi_device_mem_parity.1461183752 |
|
|
Apr 04 12:59:36 PM PDT 24 |
Apr 04 12:59:37 PM PDT 24 |
33965822 ps |
T649 |
/workspace/coverage/default/24.spi_device_alert_test.2323115226 |
|
|
Apr 04 01:00:54 PM PDT 24 |
Apr 04 01:00:56 PM PDT 24 |
46683247 ps |
T296 |
/workspace/coverage/default/13.spi_device_pass_addr_payload_swap.1287270368 |
|
|
Apr 04 12:58:58 PM PDT 24 |
Apr 04 12:59:09 PM PDT 24 |
841801341 ps |
T128 |
/workspace/coverage/default/46.spi_device_intercept.1634917669 |
|
|
Apr 04 01:05:40 PM PDT 24 |
Apr 04 01:05:59 PM PDT 24 |
2503964550 ps |
T650 |
/workspace/coverage/default/8.spi_device_ram_cfg.1794673566 |
|
|
Apr 04 12:57:46 PM PDT 24 |
Apr 04 12:57:47 PM PDT 24 |
18316745 ps |
T324 |
/workspace/coverage/default/17.spi_device_upload.4132678962 |
|
|
Apr 04 12:59:31 PM PDT 24 |
Apr 04 12:59:34 PM PDT 24 |
165116538 ps |
T298 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.22470897 |
|
|
Apr 04 12:59:14 PM PDT 24 |
Apr 04 12:59:17 PM PDT 24 |
791147882 ps |
T651 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.1813754749 |
|
|
Apr 04 12:58:16 PM PDT 24 |
Apr 04 12:58:21 PM PDT 24 |
112986956 ps |
T390 |
/workspace/coverage/default/28.spi_device_tpm_all.2249198458 |
|
|
Apr 04 01:01:34 PM PDT 24 |
Apr 04 01:02:07 PM PDT 24 |
3275483755 ps |
T245 |
/workspace/coverage/default/46.spi_device_upload.3528635337 |
|
|
Apr 04 01:05:38 PM PDT 24 |
Apr 04 01:05:43 PM PDT 24 |
2144098708 ps |
T274 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.930459152 |
|
|
Apr 04 12:57:16 PM PDT 24 |
Apr 04 12:57:20 PM PDT 24 |
445739349 ps |
T652 |
/workspace/coverage/default/36.spi_device_flash_mode.2959786095 |
|
|
Apr 04 01:03:22 PM PDT 24 |
Apr 04 01:03:46 PM PDT 24 |
646741016 ps |
T311 |
/workspace/coverage/default/31.spi_device_flash_mode.3632105295 |
|
|
Apr 04 01:02:16 PM PDT 24 |
Apr 04 01:05:06 PM PDT 24 |
50973514733 ps |
T653 |
/workspace/coverage/default/31.spi_device_read_buffer_direct.4156479212 |
|
|
Apr 04 01:02:18 PM PDT 24 |
Apr 04 01:02:32 PM PDT 24 |
1117480838 ps |
T293 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.1446347998 |
|
|
Apr 04 01:06:10 PM PDT 24 |
Apr 04 01:06:17 PM PDT 24 |
6341643447 ps |
T654 |
/workspace/coverage/default/1.spi_device_alert_test.1571176704 |
|
|
Apr 04 12:56:33 PM PDT 24 |
Apr 04 12:56:33 PM PDT 24 |
18068660 ps |
T655 |
/workspace/coverage/default/10.spi_device_tpm_sts_read.2956305643 |
|
|
Apr 04 12:58:15 PM PDT 24 |
Apr 04 12:58:16 PM PDT 24 |
518689234 ps |
T656 |
/workspace/coverage/default/33.spi_device_csb_read.550449738 |
|
|
Apr 04 01:02:36 PM PDT 24 |
Apr 04 01:02:37 PM PDT 24 |
14521120 ps |
T362 |
/workspace/coverage/default/1.spi_device_flash_mode.234300735 |
|
|
Apr 04 12:56:21 PM PDT 24 |
Apr 04 12:57:24 PM PDT 24 |
15587523816 ps |
T657 |
/workspace/coverage/default/13.spi_device_ram_cfg.3211462844 |
|
|
Apr 04 12:58:49 PM PDT 24 |
Apr 04 12:58:50 PM PDT 24 |
27080348 ps |
T658 |
/workspace/coverage/default/35.spi_device_alert_test.2532254625 |
|
|
Apr 04 01:03:13 PM PDT 24 |
Apr 04 01:03:14 PM PDT 24 |
58463383 ps |
T271 |
/workspace/coverage/default/33.spi_device_pass_addr_payload_swap.4172206484 |
|
|
Apr 04 01:02:35 PM PDT 24 |
Apr 04 01:02:56 PM PDT 24 |
6769855131 ps |
T206 |
/workspace/coverage/default/20.spi_device_mailbox.2164831627 |
|
|
Apr 04 01:00:08 PM PDT 24 |
Apr 04 01:00:50 PM PDT 24 |
3025617845 ps |
T659 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.1954164336 |
|
|
Apr 04 12:59:24 PM PDT 24 |
Apr 04 12:59:27 PM PDT 24 |
88975831 ps |
T660 |
/workspace/coverage/default/15.spi_device_mem_parity.2274141567 |
|
|
Apr 04 12:59:09 PM PDT 24 |
Apr 04 12:59:11 PM PDT 24 |
28758921 ps |
T661 |
/workspace/coverage/default/3.spi_device_mem_parity.1999792056 |
|
|
Apr 04 12:56:41 PM PDT 24 |
Apr 04 12:56:42 PM PDT 24 |
42108203 ps |
T662 |
/workspace/coverage/default/1.spi_device_csb_read.3395467266 |
|
|
Apr 04 12:56:10 PM PDT 24 |
Apr 04 12:56:11 PM PDT 24 |
34715594 ps |
T663 |
/workspace/coverage/default/30.spi_device_alert_test.4028011173 |
|
|
Apr 04 01:02:16 PM PDT 24 |
Apr 04 01:02:18 PM PDT 24 |
15747671 ps |
T276 |
/workspace/coverage/default/36.spi_device_intercept.677734347 |
|
|
Apr 04 01:03:12 PM PDT 24 |
Apr 04 01:03:15 PM PDT 24 |
162499990 ps |
T343 |
/workspace/coverage/default/34.spi_device_mailbox.2834847127 |
|
|
Apr 04 01:02:52 PM PDT 24 |
Apr 04 01:03:23 PM PDT 24 |
4052468394 ps |
T664 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.3189740633 |
|
|
Apr 04 01:05:08 PM PDT 24 |
Apr 04 01:05:15 PM PDT 24 |
8234073539 ps |
T665 |
/workspace/coverage/default/13.spi_device_csb_read.280532012 |
|
|
Apr 04 12:58:48 PM PDT 24 |
Apr 04 12:58:49 PM PDT 24 |
20517545 ps |
T666 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.4042775344 |
|
|
Apr 04 01:00:07 PM PDT 24 |
Apr 04 01:00:08 PM PDT 24 |
83193548 ps |
T250 |
/workspace/coverage/default/4.spi_device_intercept.2543583013 |
|
|
Apr 04 12:57:08 PM PDT 24 |
Apr 04 12:57:12 PM PDT 24 |
871089660 ps |
T241 |
/workspace/coverage/default/4.spi_device_upload.1073053014 |
|
|
Apr 04 12:57:08 PM PDT 24 |
Apr 04 12:57:17 PM PDT 24 |
3067503049 ps |
T667 |
/workspace/coverage/default/18.spi_device_flash_mode.252265905 |
|
|
Apr 04 12:59:48 PM PDT 24 |
Apr 04 01:00:23 PM PDT 24 |
1967322937 ps |
T668 |
/workspace/coverage/default/45.spi_device_alert_test.300218688 |
|
|
Apr 04 01:05:29 PM PDT 24 |
Apr 04 01:05:31 PM PDT 24 |
45318583 ps |
T353 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.1373376432 |
|
|
Apr 04 01:00:54 PM PDT 24 |
Apr 04 01:01:03 PM PDT 24 |
3322338119 ps |
T669 |
/workspace/coverage/default/24.spi_device_tpm_rw.979623299 |
|
|
Apr 04 01:00:55 PM PDT 24 |
Apr 04 01:00:57 PM PDT 24 |
141561755 ps |
T670 |
/workspace/coverage/default/32.spi_device_tpm_all.2688791805 |
|
|
Apr 04 01:02:33 PM PDT 24 |
Apr 04 01:02:45 PM PDT 24 |
9280086102 ps |
T671 |
/workspace/coverage/default/38.spi_device_tpm_all.2333646308 |
|
|
Apr 04 01:03:47 PM PDT 24 |
Apr 04 01:04:07 PM PDT 24 |
1937245598 ps |
T672 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.3081627375 |
|
|
Apr 04 12:58:50 PM PDT 24 |
Apr 04 12:59:12 PM PDT 24 |
31705687500 ps |
T246 |
/workspace/coverage/default/36.spi_device_pass_cmd_filtering.4219551305 |
|
|
Apr 04 01:03:13 PM PDT 24 |
Apr 04 01:03:19 PM PDT 24 |
288303070 ps |
T297 |
/workspace/coverage/default/2.spi_device_pass_addr_payload_swap.4133222913 |
|
|
Apr 04 12:56:31 PM PDT 24 |
Apr 04 12:56:34 PM PDT 24 |
140748566 ps |
T673 |
/workspace/coverage/default/17.spi_device_csb_read.3083097520 |
|
|
Apr 04 12:59:31 PM PDT 24 |
Apr 04 12:59:32 PM PDT 24 |
21533615 ps |
T323 |
/workspace/coverage/default/11.spi_device_pass_cmd_filtering.2962728108 |
|
|
Apr 04 12:58:24 PM PDT 24 |
Apr 04 12:58:43 PM PDT 24 |
13874422816 ps |
T254 |
/workspace/coverage/default/16.spi_device_intercept.3313267688 |
|
|
Apr 04 12:59:22 PM PDT 24 |
Apr 04 12:59:25 PM PDT 24 |
127298941 ps |
T321 |
/workspace/coverage/default/40.spi_device_mailbox.2998246188 |
|
|
Apr 04 01:04:04 PM PDT 24 |
Apr 04 01:04:41 PM PDT 24 |
4087633556 ps |
T674 |
/workspace/coverage/default/19.spi_device_tpm_all.3805343856 |
|
|
Apr 04 12:59:56 PM PDT 24 |
Apr 04 01:00:08 PM PDT 24 |
1430209075 ps |
T347 |
/workspace/coverage/default/21.spi_device_upload.1797695425 |
|
|
Apr 04 01:00:27 PM PDT 24 |
Apr 04 01:00:33 PM PDT 24 |
1138096377 ps |
T675 |
/workspace/coverage/default/25.spi_device_alert_test.2216667336 |
|
|
Apr 04 01:01:05 PM PDT 24 |
Apr 04 01:01:06 PM PDT 24 |
11896847 ps |
T676 |
/workspace/coverage/default/16.spi_device_alert_test.1592830727 |
|
|
Apr 04 12:59:36 PM PDT 24 |
Apr 04 12:59:37 PM PDT 24 |
28132795 ps |
T351 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.2569830788 |
|
|
Apr 04 12:59:41 PM PDT 24 |
Apr 04 12:59:54 PM PDT 24 |
11225517831 ps |
T257 |
/workspace/coverage/default/12.spi_device_upload.778597938 |
|
|
Apr 04 12:58:42 PM PDT 24 |
Apr 04 12:58:56 PM PDT 24 |
7611430567 ps |
T328 |
/workspace/coverage/default/18.spi_device_cfg_cmd.4094383813 |
|
|
Apr 04 12:59:49 PM PDT 24 |
Apr 04 01:00:15 PM PDT 24 |
13986203144 ps |
T677 |
/workspace/coverage/default/14.spi_device_mem_parity.919191901 |
|
|
Apr 04 12:59:01 PM PDT 24 |
Apr 04 12:59:02 PM PDT 24 |
154643512 ps |
T242 |
/workspace/coverage/default/47.spi_device_mailbox.2286375748 |
|
|
Apr 04 01:05:40 PM PDT 24 |
Apr 04 01:05:55 PM PDT 24 |
1548682324 ps |
T678 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.2265895570 |
|
|
Apr 04 01:00:25 PM PDT 24 |
Apr 04 01:00:27 PM PDT 24 |
74028505 ps |
T679 |
/workspace/coverage/default/8.spi_device_alert_test.1952825678 |
|
|
Apr 04 12:57:56 PM PDT 24 |
Apr 04 12:57:57 PM PDT 24 |
11277440 ps |
T680 |
/workspace/coverage/default/21.spi_device_tpm_read_hw_reg.2006549081 |
|
|
Apr 04 01:00:18 PM PDT 24 |
Apr 04 01:00:48 PM PDT 24 |
45396812680 ps |
T358 |
/workspace/coverage/default/26.spi_device_intercept.170432527 |
|
|
Apr 04 01:01:21 PM PDT 24 |
Apr 04 01:01:35 PM PDT 24 |
1023921227 ps |
T197 |
/workspace/coverage/default/40.spi_device_upload.2293275947 |
|
|
Apr 04 01:04:05 PM PDT 24 |
Apr 04 01:04:17 PM PDT 24 |
12682839233 ps |
T681 |
/workspace/coverage/default/2.spi_device_read_buffer_direct.1189163761 |
|
|
Apr 04 12:56:41 PM PDT 24 |
Apr 04 12:56:46 PM PDT 24 |
170473121 ps |
T682 |
/workspace/coverage/default/10.spi_device_ram_cfg.2416561110 |
|
|
Apr 04 12:58:15 PM PDT 24 |
Apr 04 12:58:16 PM PDT 24 |
123632454 ps |
T226 |
/workspace/coverage/default/39.spi_device_upload.2977298886 |
|
|
Apr 04 01:03:55 PM PDT 24 |
Apr 04 01:04:07 PM PDT 24 |
4012431884 ps |
T244 |
/workspace/coverage/default/46.spi_device_mailbox.970024819 |
|
|
Apr 04 01:05:39 PM PDT 24 |
Apr 04 01:06:18 PM PDT 24 |
4604701913 ps |
T683 |
/workspace/coverage/default/14.spi_device_tpm_rw.2165321728 |
|
|
Apr 04 12:59:08 PM PDT 24 |
Apr 04 12:59:09 PM PDT 24 |
78036054 ps |
T684 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.3530263010 |
|
|
Apr 04 01:01:05 PM PDT 24 |
Apr 04 01:01:10 PM PDT 24 |
852627582 ps |
T350 |
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.3617324774 |
|
|
Apr 04 12:58:09 PM PDT 24 |
Apr 04 12:58:12 PM PDT 24 |
187564187 ps |
T268 |
/workspace/coverage/default/10.spi_device_pass_addr_payload_swap.3274401591 |
|
|
Apr 04 12:58:18 PM PDT 24 |
Apr 04 12:58:43 PM PDT 24 |
6532029995 ps |
T685 |
/workspace/coverage/default/46.spi_device_tpm_rw.3807972688 |
|
|
Apr 04 01:05:39 PM PDT 24 |
Apr 04 01:05:44 PM PDT 24 |
131823016 ps |
T397 |
/workspace/coverage/default/44.spi_device_tpm_all.1935439011 |
|
|
Apr 04 01:04:55 PM PDT 24 |
Apr 04 01:05:22 PM PDT 24 |
2104138353 ps |
T686 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.176773177 |
|
|
Apr 04 01:03:24 PM PDT 24 |
Apr 04 01:03:27 PM PDT 24 |
1793502944 ps |
T687 |
/workspace/coverage/default/47.spi_device_tpm_all.40111200 |
|
|
Apr 04 01:05:40 PM PDT 24 |
Apr 04 01:05:52 PM PDT 24 |
6407956802 ps |
T252 |
/workspace/coverage/default/0.spi_device_upload.194438563 |
|
|
Apr 04 12:55:51 PM PDT 24 |
Apr 04 12:55:54 PM PDT 24 |
103159995 ps |
T688 |
/workspace/coverage/default/33.spi_device_flash_mode.286449723 |
|
|
Apr 04 01:02:41 PM PDT 24 |
Apr 04 01:03:22 PM PDT 24 |
3121388288 ps |
T689 |
/workspace/coverage/default/21.spi_device_csb_read.2256800357 |
|
|
Apr 04 01:00:16 PM PDT 24 |
Apr 04 01:00:17 PM PDT 24 |
28463750 ps |
T300 |
/workspace/coverage/default/22.spi_device_pass_cmd_filtering.4049661607 |
|
|
Apr 04 01:00:25 PM PDT 24 |
Apr 04 01:00:42 PM PDT 24 |
4348459646 ps |
T52 |
/workspace/coverage/default/2.spi_device_sec_cm.2916360485 |
|
|
Apr 04 12:56:40 PM PDT 24 |
Apr 04 12:56:41 PM PDT 24 |
34145431 ps |
T690 |
/workspace/coverage/default/20.spi_device_flash_mode.1536914999 |
|
|
Apr 04 01:00:07 PM PDT 24 |
Apr 04 01:00:14 PM PDT 24 |
892772017 ps |
T691 |
/workspace/coverage/default/42.spi_device_mailbox.8601337 |
|
|
Apr 04 01:04:42 PM PDT 24 |
Apr 04 01:04:46 PM PDT 24 |
413595779 ps |
T692 |
/workspace/coverage/default/9.spi_device_tpm_sts_read.3029466684 |
|
|
Apr 04 12:58:10 PM PDT 24 |
Apr 04 12:58:11 PM PDT 24 |
706811830 ps |
T693 |
/workspace/coverage/default/5.spi_device_ram_cfg.3277661270 |
|
|
Apr 04 12:57:16 PM PDT 24 |
Apr 04 12:57:17 PM PDT 24 |
42289663 ps |
T694 |
/workspace/coverage/default/4.spi_device_tpm_sts_read.2276534304 |
|
|
Apr 04 12:57:00 PM PDT 24 |
Apr 04 12:57:00 PM PDT 24 |
299991345 ps |
T215 |
/workspace/coverage/default/42.spi_device_pass_cmd_filtering.2174588724 |
|
|
Apr 04 01:04:28 PM PDT 24 |
Apr 04 01:04:36 PM PDT 24 |
1275398918 ps |
T345 |
/workspace/coverage/default/14.spi_device_intercept.2389648890 |
|
|
Apr 04 12:59:09 PM PDT 24 |
Apr 04 12:59:23 PM PDT 24 |
1140198259 ps |
T282 |
/workspace/coverage/default/43.spi_device_mailbox.3617023159 |
|
|
Apr 04 01:04:54 PM PDT 24 |
Apr 04 01:05:13 PM PDT 24 |
7144282002 ps |
T334 |
/workspace/coverage/default/31.spi_device_upload.4143737496 |
|
|
Apr 04 01:02:16 PM PDT 24 |
Apr 04 01:02:52 PM PDT 24 |
11903080853 ps |
T333 |
/workspace/coverage/default/28.spi_device_pass_cmd_filtering.4155332488 |
|
|
Apr 04 01:01:37 PM PDT 24 |
Apr 04 01:01:45 PM PDT 24 |
7474257243 ps |
T695 |
/workspace/coverage/default/21.spi_device_cfg_cmd.3891518677 |
|
|
Apr 04 01:00:25 PM PDT 24 |
Apr 04 01:00:29 PM PDT 24 |
164687001 ps |
T338 |
/workspace/coverage/default/4.spi_device_pass_cmd_filtering.1172894927 |
|
|
Apr 04 12:56:59 PM PDT 24 |
Apr 04 12:57:10 PM PDT 24 |
13557355744 ps |
T696 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.2994207814 |
|
|
Apr 04 12:55:51 PM PDT 24 |
Apr 04 12:56:00 PM PDT 24 |
2886965592 ps |
T697 |
/workspace/coverage/default/4.spi_device_csb_read.838203383 |
|
|
Apr 04 12:56:58 PM PDT 24 |
Apr 04 12:56:59 PM PDT 24 |
260885477 ps |
T698 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.92861143 |
|
|
Apr 04 01:02:41 PM PDT 24 |
Apr 04 01:03:04 PM PDT 24 |
8991051107 ps |
T699 |
/workspace/coverage/default/4.spi_device_ram_cfg.3721489737 |
|
|
Apr 04 12:56:59 PM PDT 24 |
Apr 04 12:56:59 PM PDT 24 |
16945184 ps |
T357 |
/workspace/coverage/default/45.spi_device_pass_cmd_filtering.2484424983 |
|
|
Apr 04 01:05:18 PM PDT 24 |
Apr 04 01:05:26 PM PDT 24 |
3622593629 ps |
T700 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.398614437 |
|
|
Apr 04 12:56:00 PM PDT 24 |
Apr 04 12:56:09 PM PDT 24 |
567724110 ps |
T701 |
/workspace/coverage/default/33.spi_device_tpm_rw.11020051 |
|
|
Apr 04 01:02:35 PM PDT 24 |
Apr 04 01:02:36 PM PDT 24 |
46001012 ps |
T702 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.982720376 |
|
|
Apr 04 01:02:36 PM PDT 24 |
Apr 04 01:02:40 PM PDT 24 |
1944137136 ps |
T703 |
/workspace/coverage/default/34.spi_device_read_buffer_direct.233806110 |
|
|
Apr 04 01:02:53 PM PDT 24 |
Apr 04 01:03:03 PM PDT 24 |
1278765220 ps |
T704 |
/workspace/coverage/default/9.spi_device_ram_cfg.2355390611 |
|
|
Apr 04 12:58:09 PM PDT 24 |
Apr 04 12:58:10 PM PDT 24 |
26580514 ps |
T705 |
/workspace/coverage/default/37.spi_device_csb_read.2605183184 |
|
|
Apr 04 01:03:22 PM PDT 24 |
Apr 04 01:03:24 PM PDT 24 |
16284776 ps |
T706 |
/workspace/coverage/default/29.spi_device_tpm_read_hw_reg.4127643913 |
|
|
Apr 04 01:01:46 PM PDT 24 |
Apr 04 01:01:51 PM PDT 24 |
620636426 ps |
T707 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.398851483 |
|
|
Apr 04 12:57:09 PM PDT 24 |
Apr 04 12:57:18 PM PDT 24 |
743382010 ps |
T708 |
/workspace/coverage/default/16.spi_device_mem_parity.3508309726 |
|
|
Apr 04 12:59:25 PM PDT 24 |
Apr 04 12:59:26 PM PDT 24 |
32336304 ps |
T709 |
/workspace/coverage/default/9.spi_device_tpm_all.656593121 |
|
|
Apr 04 12:58:07 PM PDT 24 |
Apr 04 12:58:36 PM PDT 24 |
5926548161 ps |
T710 |
/workspace/coverage/default/27.spi_device_tpm_sts_read.2261710445 |
|
|
Apr 04 01:01:30 PM PDT 24 |
Apr 04 01:01:31 PM PDT 24 |
96290463 ps |
T711 |
/workspace/coverage/default/43.spi_device_tpm_rw.347758630 |
|
|
Apr 04 01:04:55 PM PDT 24 |
Apr 04 01:04:59 PM PDT 24 |
475395426 ps |
T336 |
/workspace/coverage/default/7.spi_device_upload.678561619 |
|
|
Apr 04 12:57:44 PM PDT 24 |
Apr 04 12:57:46 PM PDT 24 |
371630304 ps |
T712 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.2709986821 |
|
|
Apr 04 01:03:22 PM PDT 24 |
Apr 04 01:03:28 PM PDT 24 |
167290212 ps |
T713 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3263601434 |
|
|
Apr 04 12:59:40 PM PDT 24 |
Apr 04 12:59:49 PM PDT 24 |
2621766755 ps |
T714 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.3765916345 |
|
|
Apr 04 12:59:18 PM PDT 24 |
Apr 04 12:59:20 PM PDT 24 |
163332585 ps |
T715 |
/workspace/coverage/default/38.spi_device_tpm_sts_read.829637458 |
|
|
Apr 04 01:03:46 PM PDT 24 |
Apr 04 01:03:47 PM PDT 24 |
87164523 ps |
T716 |
/workspace/coverage/default/35.spi_device_tpm_all.403440819 |
|
|
Apr 04 01:03:00 PM PDT 24 |
Apr 04 01:03:18 PM PDT 24 |
18622351445 ps |
T337 |
/workspace/coverage/default/13.spi_device_mailbox.3313532846 |
|
|
Apr 04 12:58:59 PM PDT 24 |
Apr 04 12:59:21 PM PDT 24 |
5675801926 ps |
T280 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.4069817784 |
|
|
Apr 04 01:05:22 PM PDT 24 |
Apr 04 01:05:28 PM PDT 24 |
2829207273 ps |
T717 |
/workspace/coverage/default/20.spi_device_pass_cmd_filtering.4115089202 |
|
|
Apr 04 01:00:07 PM PDT 24 |
Apr 04 01:00:20 PM PDT 24 |
3161146435 ps |
T285 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.1913381366 |
|
|
Apr 04 12:59:08 PM PDT 24 |
Apr 04 12:59:22 PM PDT 24 |
2794087542 ps |
T718 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.3493717855 |
|
|
Apr 04 01:04:55 PM PDT 24 |
Apr 04 01:05:03 PM PDT 24 |
896114113 ps |
T719 |
/workspace/coverage/default/11.spi_device_intercept.227485321 |
|
|
Apr 04 12:58:28 PM PDT 24 |
Apr 04 12:58:31 PM PDT 24 |
380368679 ps |
T720 |
/workspace/coverage/default/31.spi_device_csb_read.3009102088 |
|
|
Apr 04 01:02:19 PM PDT 24 |
Apr 04 01:02:20 PM PDT 24 |
33986916 ps |
T342 |
/workspace/coverage/default/15.spi_device_upload.1393867835 |
|
|
Apr 04 12:59:14 PM PDT 24 |
Apr 04 12:59:22 PM PDT 24 |
1274325821 ps |
T721 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.1629701878 |
|
|
Apr 04 12:56:13 PM PDT 24 |
Apr 04 12:56:15 PM PDT 24 |
385094654 ps |
T283 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.4097863255 |
|
|
Apr 04 01:02:51 PM PDT 24 |
Apr 04 01:03:10 PM PDT 24 |
12571647471 ps |
T722 |
/workspace/coverage/default/20.spi_device_tpm_rw.3269001427 |
|
|
Apr 04 01:00:06 PM PDT 24 |
Apr 04 01:00:08 PM PDT 24 |
42156548 ps |
T312 |
/workspace/coverage/default/40.spi_device_flash_mode.2031553265 |
|
|
Apr 04 01:04:17 PM PDT 24 |
Apr 04 01:04:31 PM PDT 24 |
1852705785 ps |
T361 |
/workspace/coverage/default/32.spi_device_flash_mode.2148719131 |
|
|
Apr 04 01:02:33 PM PDT 24 |
Apr 04 01:03:02 PM PDT 24 |
5230019398 ps |
T370 |
/workspace/coverage/default/7.spi_device_stress_all.1325999236 |
|
|
Apr 04 12:57:49 PM PDT 24 |
Apr 04 12:57:50 PM PDT 24 |
118952057 ps |
T723 |
/workspace/coverage/default/0.spi_device_mem_parity.3280043670 |
|
|
Apr 04 12:55:44 PM PDT 24 |
Apr 04 12:55:46 PM PDT 24 |
86613174 ps |
T219 |
/workspace/coverage/default/11.spi_device_upload.1103291017 |
|
|
Apr 04 12:58:25 PM PDT 24 |
Apr 04 12:58:52 PM PDT 24 |
26363378415 ps |
T724 |
/workspace/coverage/default/6.spi_device_mem_parity.2111894388 |
|
|
Apr 04 12:57:24 PM PDT 24 |
Apr 04 12:57:26 PM PDT 24 |
43394579 ps |
T725 |
/workspace/coverage/default/29.spi_device_intercept.3276794389 |
|
|
Apr 04 01:01:49 PM PDT 24 |
Apr 04 01:01:52 PM PDT 24 |
67352141 ps |
T331 |
/workspace/coverage/default/41.spi_device_pass_cmd_filtering.3402479430 |
|
|
Apr 04 01:04:16 PM PDT 24 |
Apr 04 01:04:30 PM PDT 24 |
9165277456 ps |
T344 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.3203690339 |
|
|
Apr 04 12:58:41 PM PDT 24 |
Apr 04 12:58:56 PM PDT 24 |
8979791220 ps |
T726 |
/workspace/coverage/default/46.spi_device_flash_mode.2704016030 |
|
|
Apr 04 01:05:41 PM PDT 24 |
Apr 04 01:05:57 PM PDT 24 |
3611909785 ps |
T727 |
/workspace/coverage/default/49.spi_device_alert_test.2608613509 |
|
|
Apr 04 01:06:20 PM PDT 24 |
Apr 04 01:06:21 PM PDT 24 |
38332145 ps |
T728 |
/workspace/coverage/default/13.spi_device_alert_test.4098023779 |
|
|
Apr 04 12:58:58 PM PDT 24 |
Apr 04 12:59:00 PM PDT 24 |
50026425 ps |
T356 |
/workspace/coverage/default/11.spi_device_mailbox.1500453561 |
|
|
Apr 04 12:58:24 PM PDT 24 |
Apr 04 12:58:32 PM PDT 24 |
363284523 ps |
T396 |
/workspace/coverage/default/8.spi_device_tpm_all.1053251799 |
|
|
Apr 04 12:57:48 PM PDT 24 |
Apr 04 12:58:38 PM PDT 24 |
34133558850 ps |
T729 |
/workspace/coverage/default/20.spi_device_read_buffer_direct.1042712262 |
|
|
Apr 04 01:00:08 PM PDT 24 |
Apr 04 01:00:20 PM PDT 24 |
3252254744 ps |
T730 |
/workspace/coverage/default/20.spi_device_cfg_cmd.3065385080 |
|
|
Apr 04 01:00:07 PM PDT 24 |
Apr 04 01:00:11 PM PDT 24 |
214952925 ps |
T354 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.2236157272 |
|
|
Apr 04 12:57:40 PM PDT 24 |
Apr 04 12:57:50 PM PDT 24 |
9359731397 ps |
T731 |
/workspace/coverage/default/10.spi_device_tpm_all.2348428356 |
|
|
Apr 04 12:58:15 PM PDT 24 |
Apr 04 12:58:47 PM PDT 24 |
2917873857 ps |
T322 |
/workspace/coverage/default/43.spi_device_intercept.3699691189 |
|
|
Apr 04 01:04:55 PM PDT 24 |
Apr 04 01:05:00 PM PDT 24 |
162116915 ps |
T732 |
/workspace/coverage/default/28.spi_device_csb_read.2346863971 |
|
|
Apr 04 01:01:36 PM PDT 24 |
Apr 04 01:01:37 PM PDT 24 |
15707741 ps |
T733 |
/workspace/coverage/default/27.spi_device_tpm_read_hw_reg.2626174081 |
|
|
Apr 04 01:01:18 PM PDT 24 |
Apr 04 01:01:36 PM PDT 24 |
8052169074 ps |
T734 |
/workspace/coverage/default/28.spi_device_tpm_read_hw_reg.18702820 |
|
|
Apr 04 01:01:35 PM PDT 24 |
Apr 04 01:01:42 PM PDT 24 |
8382165306 ps |
T330 |
/workspace/coverage/default/41.spi_device_upload.1619206722 |
|
|
Apr 04 01:04:26 PM PDT 24 |
Apr 04 01:04:30 PM PDT 24 |
324055034 ps |
T735 |
/workspace/coverage/default/16.spi_device_tpm_sts_read.3758075487 |
|
|
Apr 04 12:59:24 PM PDT 24 |
Apr 04 12:59:25 PM PDT 24 |
51141044 ps |
T736 |
/workspace/coverage/default/24.spi_device_tpm_all.3936975315 |
|
|
Apr 04 01:00:53 PM PDT 24 |
Apr 04 01:00:56 PM PDT 24 |
190175537 ps |
T737 |
/workspace/coverage/default/41.spi_device_read_buffer_direct.454276026 |
|
|
Apr 04 01:04:28 PM PDT 24 |
Apr 04 01:04:33 PM PDT 24 |
688510338 ps |
T738 |
/workspace/coverage/default/13.spi_device_mem_parity.1186663887 |
|
|
Apr 04 12:58:50 PM PDT 24 |
Apr 04 12:58:51 PM PDT 24 |
42338183 ps |
T739 |
/workspace/coverage/default/7.spi_device_csb_read.3697564856 |
|
|
Apr 04 12:57:33 PM PDT 24 |
Apr 04 12:57:34 PM PDT 24 |
17517703 ps |
T255 |
/workspace/coverage/default/1.spi_device_mailbox.52729675 |
|
|
Apr 04 12:56:11 PM PDT 24 |
Apr 04 12:57:43 PM PDT 24 |
33295581357 ps |
T740 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.332624169 |
|
|
Apr 04 01:05:22 PM PDT 24 |
Apr 04 01:05:31 PM PDT 24 |
4010056084 ps |
T741 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.1924669331 |
|
|
Apr 04 01:02:31 PM PDT 24 |
Apr 04 01:02:52 PM PDT 24 |
7251404412 ps |
T742 |
/workspace/coverage/default/15.spi_device_alert_test.1030809173 |
|
|
Apr 04 12:59:23 PM PDT 24 |
Apr 04 12:59:24 PM PDT 24 |
32190915 ps |
T743 |
/workspace/coverage/default/10.spi_device_alert_test.3838307103 |
|
|
Apr 04 12:58:24 PM PDT 24 |
Apr 04 12:58:25 PM PDT 24 |
14964354 ps |
T208 |
/workspace/coverage/default/35.spi_device_pass_addr_payload_swap.3867225536 |
|
|
Apr 04 01:03:01 PM PDT 24 |
Apr 04 01:03:12 PM PDT 24 |
2746437964 ps |
T744 |
/workspace/coverage/default/7.spi_device_mem_parity.1048665042 |
|
|
Apr 04 12:57:40 PM PDT 24 |
Apr 04 12:57:42 PM PDT 24 |
15752561 ps |
T121 |
/workspace/coverage/default/14.spi_device_cfg_cmd.2232035112 |
|
|
Apr 04 12:59:07 PM PDT 24 |
Apr 04 12:59:21 PM PDT 24 |
4638401079 ps |
T745 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.2009098584 |
|
|
Apr 04 01:00:25 PM PDT 24 |
Apr 04 01:00:31 PM PDT 24 |
6557507371 ps |
T329 |
/workspace/coverage/default/34.spi_device_intercept.23460499 |
|
|
Apr 04 01:02:52 PM PDT 24 |
Apr 04 01:03:27 PM PDT 24 |
16462588356 ps |
T746 |
/workspace/coverage/default/8.spi_device_mem_parity.214137117 |
|
|
Apr 04 12:57:46 PM PDT 24 |
Apr 04 12:57:48 PM PDT 24 |
33838891 ps |
T747 |
/workspace/coverage/default/11.spi_device_csb_read.762847986 |
|
|
Apr 04 12:58:25 PM PDT 24 |
Apr 04 12:58:26 PM PDT 24 |
40354220 ps |
T748 |
/workspace/coverage/default/47.spi_device_read_buffer_direct.3132697974 |
|
|
Apr 04 01:05:50 PM PDT 24 |
Apr 04 01:05:55 PM PDT 24 |
171924057 ps |
T749 |
/workspace/coverage/default/18.spi_device_tpm_all.701560415 |
|
|
Apr 04 12:59:41 PM PDT 24 |
Apr 04 01:00:00 PM PDT 24 |
3887522394 ps |
T750 |
/workspace/coverage/default/35.spi_device_csb_read.2207502402 |
|
|
Apr 04 01:02:53 PM PDT 24 |
Apr 04 01:02:54 PM PDT 24 |
163779740 ps |
T751 |
/workspace/coverage/default/47.spi_device_tpm_rw.3377677543 |
|
|
Apr 04 01:05:38 PM PDT 24 |
Apr 04 01:05:41 PM PDT 24 |
291752253 ps |
T288 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.2099000134 |
|
|
Apr 04 01:02:03 PM PDT 24 |
Apr 04 01:02:28 PM PDT 24 |
10679758101 ps |
T335 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.1485900305 |
|
|
Apr 04 12:57:17 PM PDT 24 |
Apr 04 12:57:24 PM PDT 24 |
938384831 ps |
T294 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.1774243468 |
|
|
Apr 04 01:01:47 PM PDT 24 |
Apr 04 01:01:51 PM PDT 24 |
221117182 ps |
T752 |
/workspace/coverage/default/5.spi_device_csb_read.2769344043 |
|
|
Apr 04 12:57:15 PM PDT 24 |
Apr 04 12:57:16 PM PDT 24 |
173180551 ps |
T753 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.2310698140 |
|
|
Apr 04 12:56:22 PM PDT 24 |
Apr 04 12:56:41 PM PDT 24 |
3195426835 ps |
T754 |
/workspace/coverage/default/15.spi_device_intercept.3985310414 |
|
|
Apr 04 12:59:14 PM PDT 24 |
Apr 04 12:59:44 PM PDT 24 |
3469891303 ps |
T755 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.2025622323 |
|
|
Apr 04 01:05:41 PM PDT 24 |
Apr 04 01:05:48 PM PDT 24 |
1017351039 ps |
T258 |
/workspace/coverage/default/20.spi_device_upload.1125523903 |
|
|
Apr 04 01:00:06 PM PDT 24 |
Apr 04 01:00:13 PM PDT 24 |
1596087161 ps |
T756 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.1406881258 |
|
|
Apr 04 01:04:14 PM PDT 24 |
Apr 04 01:04:38 PM PDT 24 |
8291311330 ps |
T757 |
/workspace/coverage/default/25.spi_device_csb_read.1587074085 |
|
|
Apr 04 01:00:55 PM PDT 24 |
Apr 04 01:00:56 PM PDT 24 |
57869296 ps |
T182 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.354967926 |
|
|
Apr 04 02:46:51 PM PDT 24 |
Apr 04 02:46:52 PM PDT 24 |
27822698 ps |
T758 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.530696488 |
|
|
Apr 04 02:46:45 PM PDT 24 |
Apr 04 02:46:45 PM PDT 24 |
42657266 ps |
T122 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1038886413 |
|
|
Apr 04 02:46:33 PM PDT 24 |
Apr 04 02:46:35 PM PDT 24 |
178794519 ps |
T759 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.2856369197 |
|
|
Apr 04 02:46:27 PM PDT 24 |
Apr 04 02:46:27 PM PDT 24 |
16969122 ps |
T38 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1561808027 |
|
|
Apr 04 02:46:27 PM PDT 24 |
Apr 04 02:46:30 PM PDT 24 |
470592124 ps |
T39 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.3661597582 |
|
|
Apr 04 02:46:20 PM PDT 24 |
Apr 04 02:46:37 PM PDT 24 |
703271722 ps |
T145 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.2425601886 |
|
|
Apr 04 02:46:49 PM PDT 24 |
Apr 04 02:46:51 PM PDT 24 |
30486901 ps |
T760 |
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.339840860 |
|
|
Apr 04 02:47:05 PM PDT 24 |
Apr 04 02:47:06 PM PDT 24 |
14557621 ps |
T761 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.3057097084 |
|
|
Apr 04 02:47:08 PM PDT 24 |
Apr 04 02:47:09 PM PDT 24 |
14440545 ps |
T40 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.529533692 |
|
|
Apr 04 02:46:49 PM PDT 24 |
Apr 04 02:47:08 PM PDT 24 |
376540930 ps |
T762 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.2683542145 |
|
|
Apr 04 02:46:52 PM PDT 24 |
Apr 04 02:46:53 PM PDT 24 |
101334980 ps |
T123 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.2350775628 |
|
|
Apr 04 02:46:35 PM PDT 24 |
Apr 04 02:46:39 PM PDT 24 |
132667612 ps |
T763 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1072319049 |
|
|
Apr 04 02:46:54 PM PDT 24 |
Apr 04 02:46:55 PM PDT 24 |
12645924 ps |
T125 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.469015252 |
|
|
Apr 04 02:46:22 PM PDT 24 |
Apr 04 02:46:35 PM PDT 24 |
1105316172 ps |
T764 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.2458883508 |
|
|
Apr 04 02:46:53 PM PDT 24 |
Apr 04 02:46:53 PM PDT 24 |
26401946 ps |
T149 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.3243197313 |
|
|
Apr 04 02:46:11 PM PDT 24 |
Apr 04 02:46:27 PM PDT 24 |
2009360191 ps |
T124 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.787438615 |
|
|
Apr 04 02:46:36 PM PDT 24 |
Apr 04 02:46:38 PM PDT 24 |
188476290 ps |
T165 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.522989428 |
|
|
Apr 04 02:46:36 PM PDT 24 |
Apr 04 02:46:37 PM PDT 24 |
191423716 ps |
T765 |
/workspace/coverage/cover_reg_top/9.spi_device_intr_test.1188237251 |
|
|
Apr 04 02:46:37 PM PDT 24 |
Apr 04 02:46:38 PM PDT 24 |
45103118 ps |
T154 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.550007846 |
|
|
Apr 04 02:46:21 PM PDT 24 |
Apr 04 02:46:35 PM PDT 24 |
858983044 ps |
T166 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1465366749 |
|
|
Apr 04 02:46:35 PM PDT 24 |
Apr 04 02:46:40 PM PDT 24 |
1340084214 ps |
T766 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.2804400029 |
|
|
Apr 04 02:46:41 PM PDT 24 |
Apr 04 02:46:42 PM PDT 24 |
33017777 ps |
T767 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.149436786 |
|
|
Apr 04 02:46:21 PM PDT 24 |
Apr 04 02:46:22 PM PDT 24 |
39676763 ps |
T768 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.444900475 |
|
|
Apr 04 02:46:34 PM PDT 24 |
Apr 04 02:46:35 PM PDT 24 |
79390065 ps |
T167 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.2612253457 |
|
|
Apr 04 02:46:35 PM PDT 24 |
Apr 04 02:46:40 PM PDT 24 |
654067342 ps |
T150 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3011994951 |
|
|
Apr 04 02:46:50 PM PDT 24 |
Apr 04 02:46:52 PM PDT 24 |
328210592 ps |
T129 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.516071926 |
|
|
Apr 04 02:46:34 PM PDT 24 |
Apr 04 02:46:39 PM PDT 24 |
625197036 ps |
T168 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.3812732868 |
|
|
Apr 04 02:46:37 PM PDT 24 |
Apr 04 02:46:41 PM PDT 24 |
126437008 ps |
T769 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.2833366258 |
|
|
Apr 04 02:47:07 PM PDT 24 |
Apr 04 02:47:08 PM PDT 24 |
50630070 ps |
T130 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.3133541832 |
|
|
Apr 04 02:46:48 PM PDT 24 |
Apr 04 02:46:52 PM PDT 24 |
53791929 ps |
T151 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.534910742 |
|
|
Apr 04 02:46:24 PM PDT 24 |
Apr 04 02:46:27 PM PDT 24 |
866348432 ps |
T770 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3434487555 |
|
|
Apr 04 02:46:23 PM PDT 24 |
Apr 04 02:46:34 PM PDT 24 |
753856776 ps |
T771 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.3938805622 |
|
|
Apr 04 02:47:02 PM PDT 24 |
Apr 04 02:47:03 PM PDT 24 |
34903074 ps |
T152 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.1886128335 |
|
|
Apr 04 02:46:23 PM PDT 24 |
Apr 04 02:46:27 PM PDT 24 |
486681908 ps |
T169 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1472466934 |
|
|
Apr 04 02:46:34 PM PDT 24 |
Apr 04 02:46:37 PM PDT 24 |
48232996 ps |
T155 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.2537100572 |
|
|
Apr 04 02:46:21 PM PDT 24 |
Apr 04 02:46:23 PM PDT 24 |
109306524 ps |
T170 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.4277500219 |
|
|
Apr 04 02:46:22 PM PDT 24 |
Apr 04 02:46:25 PM PDT 24 |
272288954 ps |
T772 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.3384710357 |
|
|
Apr 04 02:46:50 PM PDT 24 |
Apr 04 02:46:51 PM PDT 24 |
24481807 ps |
T773 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2660151936 |
|
|
Apr 04 02:46:23 PM PDT 24 |
Apr 04 02:47:00 PM PDT 24 |
3612766351 ps |
T774 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.296951933 |
|
|
Apr 04 02:46:12 PM PDT 24 |
Apr 04 02:46:15 PM PDT 24 |
15539495 ps |
T163 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.3976651152 |
|
|
Apr 04 02:46:24 PM PDT 24 |
Apr 04 02:46:36 PM PDT 24 |
187815239 ps |
T775 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.126600496 |
|
|
Apr 04 02:46:50 PM PDT 24 |
Apr 04 02:46:51 PM PDT 24 |
166489342 ps |
T171 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.1128183581 |
|
|
Apr 04 02:46:56 PM PDT 24 |
Apr 04 02:47:00 PM PDT 24 |
2542297429 ps |
T142 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.3852126105 |
|
|
Apr 04 02:46:52 PM PDT 24 |
Apr 04 02:46:54 PM PDT 24 |
27652531 ps |
T175 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.2734927437 |
|
|
Apr 04 02:46:51 PM PDT 24 |
Apr 04 02:46:53 PM PDT 24 |
148143553 ps |
T176 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.2916679241 |
|
|
Apr 04 02:46:36 PM PDT 24 |
Apr 04 02:46:37 PM PDT 24 |
58257688 ps |
T144 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2023356269 |
|
|
Apr 04 02:46:35 PM PDT 24 |
Apr 04 02:46:37 PM PDT 24 |
198341612 ps |
T776 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.2531077099 |
|
|
Apr 04 02:46:52 PM PDT 24 |
Apr 04 02:46:53 PM PDT 24 |
45392181 ps |
T777 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.3951840272 |
|
|
Apr 04 02:46:51 PM PDT 24 |
Apr 04 02:46:52 PM PDT 24 |
14544962 ps |
T778 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.3876729587 |
|
|
Apr 04 02:46:37 PM PDT 24 |
Apr 04 02:46:40 PM PDT 24 |
45627091 ps |
T143 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.2386118940 |
|
|
Apr 04 02:46:24 PM PDT 24 |
Apr 04 02:46:29 PM PDT 24 |
506673247 ps |
T779 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.922979889 |
|
|
Apr 04 02:47:04 PM PDT 24 |
Apr 04 02:47:05 PM PDT 24 |
18866605 ps |
T177 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2250507781 |
|
|
Apr 04 02:46:49 PM PDT 24 |
Apr 04 02:46:51 PM PDT 24 |
452701061 ps |