Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
86.03	90.27	78.43	96.94		78.12	86.36	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	121538991	3374	0	0
addr_swap_data_rd_A	121538991	2285	0	0
addr_swap_mask_rd_A	121538991	2241	0	0
cfg_rd_A	121538991	2687	0	0
cmd_filter_0_rd_A	121538991	9761	0	0
cmd_filter_1_rd_A	121538991	10822	0	0
cmd_filter_2_rd_A	121538991	10378	0	0
cmd_filter_3_rd_A	121538991	10377	0	0
cmd_filter_4_rd_A	121538991	10379	0	0
cmd_filter_5_rd_A	121538991	9615	0	0
cmd_filter_6_rd_A	121538991	10391	0	0
cmd_filter_7_rd_A	121538991	10414	0	0
cmd_info_0_rd_A	121538991	5622	0	0
cmd_info_10_rd_A	121538991	5502	0	0
cmd_info_11_rd_A	121538991	5783	0	0
cmd_info_12_rd_A	121538991	5189	0	0
cmd_info_13_rd_A	121538991	5380	0	0
cmd_info_14_rd_A	121538991	4959	0	0
cmd_info_15_rd_A	121538991	5320	0	0
cmd_info_16_rd_A	121538991	5174	0	0
cmd_info_17_rd_A	121538991	5269	0	0
cmd_info_18_rd_A	121538991	5486	0	0
cmd_info_19_rd_A	121538991	4736	0	0
cmd_info_1_rd_A	121538991	5142	0	0
cmd_info_20_rd_A	121538991	4943	0	0
cmd_info_21_rd_A	121538991	5342	0	0
cmd_info_22_rd_A	121538991	5640	0	0
cmd_info_23_rd_A	121538991	5151	0	0
cmd_info_2_rd_A	121538991	5298	0	0
cmd_info_3_rd_A	121538991	5115	0	0
cmd_info_4_rd_A	121538991	4774	0	0
cmd_info_5_rd_A	121538991	4824	0	0
cmd_info_6_rd_A	121538991	4638	0	0
cmd_info_7_rd_A	121538991	5206	0	0
cmd_info_8_rd_A	121538991	5026	0	0
cmd_info_9_rd_A	121538991	5444	0	0
cmd_info_en4b_rd_A	121538991	2409	0	0
cmd_info_ex4b_rd_A	121538991	2303	0	0
cmd_info_wrdi_rd_A	121538991	2626	0	0
cmd_info_wren_rd_A	121538991	2442	0	0
intercept_en_rd_A	121538991	3069	0	0
intr_enable_rd_A	121538991	4175	0	0
jedec_cc_rd_A	121538991	2391	0	0
jedec_id_rd_A	121538991	2505	0	0
mailbox_addr_rd_A	121538991	2098	0	0
payload_swap_data_rd_A	121538991	2146	0	0
payload_swap_mask_rd_A	121538991	2072	0	0
read_threshold_rd_A	121538991	2250	0	0
tpm_access_0_rd_A	121538991	3052	0	0
tpm_access_1_rd_A	121538991	2155	0	0
tpm_cfg_rd_A	121538991	3161	0	0
tpm_did_vid_rd_A	121538991	2463	0	0
tpm_int_enable_rd_A	121538991	2102	0	0
tpm_int_status_rd_A	121538991	2198	0	0
tpm_int_vector_rd_A	121538991	2200	0	0
tpm_intf_capability_rd_A	121538991	2155	0	0
tpm_rid_rd_A	121538991	2260	0	0
tpm_sts_rd_A	121538991	2158	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	3374	0	0
T108	18074	242	0	0
T109	5528	8	0	0
T110	19048	3	0	0
T111	10348	161	0	0
T117	36689	2	0	0
T118	65194	5	0	0
T125	3468	9	0	0
T129	14449	6	0	0
T131	54939	2	0	0
T132	78451	4	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2285	0	0
T32	3248	6	0	0
T33	5970	12	0	0
T34	7448	18	0	0
T117	36689	46	0	0
T118	65194	86	0	0
T129	14449	27	0	0
T136	4302	7	0	0
T137	7290	8	0	0
T150	19351	62	0	0
T155	42462	215	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2241	0	0
T32	3248	4	0	0
T33	5970	26	0	0
T34	7448	28	0	0
T117	36689	23	0	0
T118	65194	85	0	0
T129	14449	31	0	0
T134	102938	107	0	0
T136	4302	1	0	0
T150	19351	93	0	0
T155	42462	266	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2687	0	0
T32	3248	15	0	0
T33	5970	13	0	0
T34	7448	13	0	0
T117	36689	74	0	0
T118	65194	140	0	0
T129	14449	38	0	0
T136	4302	1	0	0
T137	7290	1	0	0
T150	19351	75	0	0
T155	42462	242	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	9761	0	0
T32	3248	16	0	0
T33	5970	3	0	0
T34	7448	36	0	0
T117	36689	346	0	0
T118	65194	1213	0	0
T129	14449	87	0	0
T136	4302	103	0	0
T137	7290	128	0	0
T150	19351	72	0	0
T155	42462	284	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	10822	0	0
T32	3248	5	0	0
T33	5970	20	0	0
T34	7448	31	0	0
T117	36689	636	0	0
T118	65194	1393	0	0
T129	14449	252	0	0
T136	4302	9	0	0
T137	7290	109	0	0
T150	19351	45	0	0
T155	42462	272	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	10378	0	0
T32	3248	6	0	0
T33	5970	2	0	0
T34	7448	9	0	0
T117	36689	892	0	0
T118	65194	1335	0	0
T129	14449	351	0	0
T136	4302	96	0	0
T137	7290	97	0	0
T150	19351	58	0	0
T155	42462	257	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	10377	0	0
T32	3248	11	0	0
T33	5970	18	0	0
T34	7448	1	0	0
T117	36689	827	0	0
T118	65194	752	0	0
T129	14449	235	0	0
T136	4302	138	0	0
T137	7290	134	0	0
T150	19351	67	0	0
T155	42462	273	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	10379	0	0
T32	3248	6	0	0
T33	5970	15	0	0
T34	7448	20	0	0
T117	36689	911	0	0
T118	65194	1232	0	0
T129	14449	128	0	0
T136	4302	4	0	0
T137	7290	71	0	0
T150	19351	14	0	0
T155	42462	259	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	9615	0	0
T32	3248	1	0	0
T33	5970	4	0	0
T34	7448	24	0	0
T117	36689	229	0	0
T118	65194	1073	0	0
T129	14449	110	0	0
T136	4302	91	0	0
T137	7290	84	0	0
T150	19351	69	0	0
T155	42462	288	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	10391	0	0
T32	3248	9	0	0
T34	7448	29	0	0
T117	36689	588	0	0
T118	65194	1257	0	0
T129	14449	303	0	0
T134	102938	1954	0	0
T136	4302	94	0	0
T137	7290	67	0	0
T150	19351	111	0	0
T155	42462	248	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	10414	0	0
T32	3248	16	0	0
T33	5970	10	0	0
T34	7448	18	0	0
T117	36689	733	0	0
T118	65194	1206	0	0
T129	14449	21	0	0
T136	4302	8	0	0
T137	7290	133	0	0
T150	19351	38	0	0
T155	42462	281	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5622	0	0
T33	5970	2	0	0
T34	7448	26	0	0
T117	36689	393	0	0
T118	65194	464	0	0
T129	14449	131	0	0
T134	102938	740	0	0
T136	4302	49	0	0
T137	7290	41	0	0
T150	19351	52	0	0
T155	42462	279	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5502	0	0
T32	3248	3	0	0
T33	5970	2	0	0
T34	7448	34	0	0
T117	36689	185	0	0
T118	65194	594	0	0
T129	14449	61	0	0
T136	4302	47	0	0
T137	7290	23	0	0
T150	19351	58	0	0
T155	42462	279	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5783	0	0
T32	3248	4	0	0
T33	5970	3	0	0
T34	7448	10	0	0
T117	36689	286	0	0
T118	65194	592	0	0
T129	14449	170	0	0
T136	4302	32	0	0
T137	7290	49	0	0
T150	19351	78	0	0
T155	42462	272	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5189	0	0
T32	3248	9	0	0
T33	5970	12	0	0
T34	7448	14	0	0
T117	36689	327	0	0
T118	65194	542	0	0
T129	14449	71	0	0
T136	4302	49	0	0
T137	7290	7	0	0
T150	19351	62	0	0
T155	42462	264	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5380	0	0
T32	3248	7	0	0
T34	7448	38	0	0
T117	36689	276	0	0
T118	65194	690	0	0
T129	14449	70	0	0
T134	102938	681	0	0
T136	4302	57	0	0
T137	7290	4	0	0
T150	19351	70	0	0
T155	42462	229	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	4959	0	0
T32	3248	8	0	0
T33	5970	8	0	0
T34	7448	16	0	0
T117	36689	298	0	0
T118	65194	615	0	0
T129	14449	119	0	0
T136	4302	45	0	0
T137	7290	7	0	0
T150	19351	101	0	0
T155	42462	247	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5320	0	0
T32	3248	4	0	0
T33	5970	4	0	0
T34	7448	46	0	0
T111	10348	6	0	0
T117	36689	298	0	0
T118	65194	442	0	0
T136	4302	58	0	0
T137	7290	40	0	0
T150	19351	59	0	0
T155	42462	257	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5174	0	0
T32	3248	13	0	0
T33	5970	1	0	0
T34	7448	23	0	0
T117	36689	333	0	0
T118	65194	572	0	0
T129	14449	137	0	0
T136	4302	8	0	0
T137	7290	4	0	0
T150	19351	53	0	0
T155	42462	216	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5269	0	0
T32	3248	5	0	0
T33	5970	7	0	0
T34	7448	41	0	0
T117	36689	167	0	0
T118	65194	626	0	0
T129	14449	73	0	0
T136	4302	50	0	0
T137	7290	13	0	0
T150	19351	53	0	0
T155	42462	237	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5486	0	0
T32	3248	8	0	0
T33	5970	6	0	0
T34	7448	34	0	0
T117	36689	296	0	0
T118	65194	619	0	0
T129	14449	70	0	0
T134	102938	631	0	0
T137	7290	70	0	0
T150	19351	52	0	0
T155	42462	268	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	4736	0	0
T32	3248	5	0	0
T33	5970	3	0	0
T34	7448	25	0	0
T117	36689	99	0	0
T118	65194	533	0	0
T129	14449	62	0	0
T134	102938	708	0	0
T136	4302	4	0	0
T150	19351	101	0	0
T155	42462	274	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5142	0	0
T32	3248	4	0	0
T33	5970	5	0	0
T34	7448	41	0	0
T117	36689	311	0	0
T118	65194	390	0	0
T129	14449	109	0	0
T134	102938	677	0	0
T136	4302	8	0	0
T150	19351	67	0	0
T155	42462	277	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	4943	0	0
T32	3248	5	0	0
T33	5970	21	0	0
T34	7448	5	0	0
T117	36689	343	0	0
T118	65194	424	0	0
T129	14449	112	0	0
T136	4302	43	0	0
T137	7290	50	0	0
T150	19351	70	0	0
T155	42462	251	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5342	0	0
T32	3248	9	0	0
T33	5970	43	0	0
T34	7448	38	0	0
T117	36689	359	0	0
T118	65194	483	0	0
T129	14449	63	0	0
T136	4302	34	0	0
T137	7290	5	0	0
T150	19351	66	0	0
T155	42462	276	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5640	0	0
T32	3248	15	0	0
T33	5970	7	0	0
T34	7448	32	0	0
T117	36689	279	0	0
T118	65194	459	0	0
T129	14449	78	0	0
T136	4302	58	0	0
T137	7290	32	0	0
T150	19351	98	0	0
T155	42462	290	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5151	0	0
T32	3248	8	0	0
T34	7448	29	0	0
T117	36689	254	0	0
T118	65194	586	0	0
T129	14449	113	0	0
T134	102938	687	0	0
T136	4302	46	0	0
T137	7290	36	0	0
T150	19351	74	0	0
T155	42462	246	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5298	0	0
T32	3248	11	0	0
T33	5970	19	0	0
T34	7448	46	0	0
T117	36689	243	0	0
T118	65194	693	0	0
T129	14449	15	0	0
T136	4302	3	0	0
T137	7290	1	0	0
T150	19351	57	0	0
T155	42462	271	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5115	0	0
T32	3248	15	0	0
T33	5970	4	0	0
T34	7448	18	0	0
T117	36689	312	0	0
T118	65194	502	0	0
T129	14449	44	0	0
T136	4302	46	0	0
T137	7290	29	0	0
T150	19351	52	0	0
T155	42462	243	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	4774	0	0
T32	3248	8	0	0
T33	5970	31	0	0
T34	7448	12	0	0
T108	18074	2	0	0
T117	36689	171	0	0
T118	65194	481	0	0
T129	14449	83	0	0
T137	7290	4	0	0
T150	19351	67	0	0
T155	42462	256	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	4824	0	0
T32	3248	6	0	0
T33	5970	6	0	0
T34	7448	26	0	0
T117	36689	227	0	0
T118	65194	446	0	0
T129	14449	63	0	0
T136	4302	1	0	0
T137	7290	16	0	0
T150	19351	25	0	0
T155	42462	234	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	4638	0	0
T32	3248	1	0	0
T33	5970	13	0	0
T34	7448	12	0	0
T117	36689	229	0	0
T118	65194	496	0	0
T129	14449	55	0	0
T136	4302	4	0	0
T137	7290	38	0	0
T150	19351	73	0	0
T155	42462	229	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5206	0	0
T32	3248	12	0	0
T33	5970	7	0	0
T34	7448	44	0	0
T117	36689	250	0	0
T118	65194	478	0	0
T129	14449	41	0	0
T136	4302	3	0	0
T137	7290	20	0	0
T150	19351	51	0	0
T155	42462	276	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5026	0	0
T32	3248	8	0	0
T33	5970	7	0	0
T34	7448	18	0	0
T117	36689	343	0	0
T118	65194	463	0	0
T129	14449	24	0	0
T136	4302	28	0	0
T137	7290	40	0	0
T150	19351	39	0	0
T155	42462	244	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	5444	0	0
T32	3248	5	0	0
T33	5970	1	0	0
T34	7448	30	0	0
T117	36689	364	0	0
T118	65194	491	0	0
T129	14449	83	0	0
T134	102938	763	0	0
T137	7290	64	0	0
T150	19351	75	0	0
T155	42462	259	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2409	0	0
T32	3248	4	0	0
T33	5970	1	0	0
T117	36689	59	0	0
T118	65194	107	0	0
T129	14449	35	0	0
T134	102938	178	0	0
T137	7290	7	0	0
T140	7859	9	0	0
T150	19351	44	0	0
T155	42462	293	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2303	0	0
T32	3248	8	0	0
T33	5970	14	0	0
T34	7448	8	0	0
T117	36689	34	0	0
T118	65194	114	0	0
T129	14449	23	0	0
T136	4302	1	0	0
T137	7290	1	0	0
T150	19351	58	0	0
T155	42462	259	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2626	0	0
T32	3248	7	0	0
T33	5970	7	0	0
T34	7448	40	0	0
T117	36689	44	0	0
T118	65194	132	0	0
T129	14449	39	0	0
T134	102938	178	0	0
T136	4302	7	0	0
T150	19351	40	0	0
T155	42462	256	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2442	0	0
T32	3248	12	0	0
T33	5970	24	0	0
T34	7448	2	0	0
T117	36689	36	0	0
T118	65194	120	0	0
T129	14449	29	0	0
T136	4302	10	0	0
T137	7290	8	0	0
T150	19351	59	0	0
T155	42462	254	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	3069	0	0
T32	3248	3	0	0
T33	5970	35	0	0
T34	7448	40	0	0
T108	18074	5	0	0
T117	36689	92	0	0
T118	65194	178	0	0
T136	4302	11	0	0
T137	7290	5	0	0
T150	19351	40	0	0
T155	42462	248	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	4175	0	0
T16	328893	0	0	0
T17	286054	0	0	0
T22	5274	12	0	0
T23	1037	0	0	0
T29	1196	0	0	0
T32	0	9	0	0
T33	0	10	0	0
T34	0	5	0	0
T36	143841	0	0	0
T54	1739	0	0	0
T55	2459	0	0	0
T67	16525	0	0	0
T87	16989	0	0	0
T150	0	43	0	0
T155	0	232	0	0
T156	0	42	0	0
T157	0	2	0	0
T158	0	8	0	0
T159	0	24	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2391	0	0
T32	3248	7	0	0
T33	5970	18	0	0
T34	7448	51	0	0
T117	36689	58	0	0
T118	65194	103	0	0
T129	14449	37	0	0
T136	4302	3	0	0
T137	7290	14	0	0
T150	19351	80	0	0
T155	42462	264	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2505	0	0
T32	3248	2	0	0
T33	5970	13	0	0
T34	7448	24	0	0
T117	36689	58	0	0
T118	65194	105	0	0
T129	14449	22	0	0
T134	102938	186	0	0
T137	7290	3	0	0
T150	19351	41	0	0
T155	42462	299	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2098	0	0
T32	3248	12	0	0
T34	7448	28	0	0
T117	36689	44	0	0
T118	65194	81	0	0
T129	14449	24	0	0
T134	102938	111	0	0
T136	4302	4	0	0
T140	7859	17	0	0
T150	19351	67	0	0
T155	42462	241	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2146	0	0
T32	3248	14	0	0
T33	5970	46	0	0
T34	7448	21	0	0
T117	36689	33	0	0
T118	65194	87	0	0
T129	14449	27	0	0
T136	4302	3	0	0
T137	7290	9	0	0
T150	19351	46	0	0
T155	42462	240	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2072	0	0
T32	3248	6	0	0
T33	5970	10	0	0
T34	7448	22	0	0
T117	36689	41	0	0
T118	65194	80	0	0
T129	14449	17	0	0
T136	4302	1	0	0
T137	7290	3	0	0
T150	19351	41	0	0
T155	42462	264	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2250	0	0
T32	3248	15	0	0
T33	5970	26	0	0
T34	7448	8	0	0
T117	36689	39	0	0
T118	65194	92	0	0
T129	14449	28	0	0
T136	4302	2	0	0
T137	7290	2	0	0
T150	19351	50	0	0
T155	42462	267	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	3052	0	0
T32	3248	12	0	0
T34	7448	55	0	0
T117	36689	73	0	0
T118	65194	164	0	0
T129	14449	51	0	0
T134	102938	282	0	0
T137	7290	20	0	0
T140	7859	13	0	0
T150	19351	56	0	0
T155	42462	289	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2155	0	0
T32	3248	1	0	0
T33	5970	11	0	0
T34	7448	5	0	0
T117	36689	30	0	0
T118	65194	90	0	0
T129	14449	17	0	0
T136	4302	1	0	0
T137	7290	1	0	0
T150	19351	69	0	0
T155	42462	236	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	3161	0	0
T32	3248	8	0	0
T33	5970	2	0	0
T34	7448	11	0	0
T117	36689	127	0	0
T118	65194	160	0	0
T129	14449	42	0	0
T134	102938	305	0	0
T136	4302	1	0	0
T150	19351	102	0	0
T155	42462	276	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2463	0	0
T32	3248	4	0	0
T33	5970	4	0	0
T34	7448	19	0	0
T117	36689	60	0	0
T118	65194	152	0	0
T129	14449	27	0	0
T136	4302	4	0	0
T137	7290	13	0	0
T150	19351	106	0	0
T155	42462	270	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2102	0	0
T32	3248	4	0	0
T33	5970	14	0	0
T34	7448	7	0	0
T111	10348	6	0	0
T117	36689	34	0	0
T118	65194	70	0	0
T136	4302	1	0	0
T137	7290	7	0	0
T150	19351	36	0	0
T155	42462	269	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2198	0	0
T32	3248	4	0	0
T34	7448	18	0	0
T117	36689	57	0	0
T118	65194	93	0	0
T129	14449	33	0	0
T134	102938	86	0	0
T137	7290	6	0	0
T140	7859	7	0	0
T150	19351	79	0	0
T155	42462	288	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2200	0	0
T32	3248	6	0	0
T33	5970	20	0	0
T34	7448	14	0	0
T117	36689	35	0	0
T118	65194	68	0	0
T129	14449	26	0	0
T136	4302	3	0	0
T137	7290	5	0	0
T150	19351	60	0	0
T155	42462	244	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2155	0	0
T32	3248	13	0	0
T33	5970	13	0	0
T34	7448	13	0	0
T117	36689	33	0	0
T118	65194	91	0	0
T129	14449	11	0	0
T136	4302	3	0	0
T137	7290	2	0	0
T150	19351	64	0	0
T155	42462	272	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2260	0	0
T32	3248	11	0	0
T33	5970	9	0	0
T34	7448	29	0	0
T117	36689	51	0	0
T118	65194	84	0	0
T129	14449	30	0	0
T134	102938	94	0	0
T137	7290	1	0	0
T150	19351	94	0	0
T155	42462	281	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	121538991	2158	0	0
T32	3248	16	0	0
T33	5970	9	0	0
T34	7448	35	0	0
T117	36689	34	0	0
T118	65194	55	0	0
T129	14449	14	0	0
T136	4302	1	0	0
T137	7290	6	0	0
T150	19351	112	0	0
T155	42462	264	0	0