| T617 |
/workspace/coverage/default/5.spi_device_mem_parity.2904270348 |
|
|
Apr 18 02:27:31 PM PDT 24 |
Apr 18 02:27:32 PM PDT 24 |
95976015 ps |
| T377 |
/workspace/coverage/default/13.spi_device_tpm_all.1638374753 |
|
|
Apr 18 02:27:58 PM PDT 24 |
Apr 18 02:28:24 PM PDT 24 |
4981941648 ps |
| T316 |
/workspace/coverage/default/16.spi_device_pass_cmd_filtering.1914076021 |
|
|
Apr 18 02:28:06 PM PDT 24 |
Apr 18 02:28:09 PM PDT 24 |
224094496 ps |
| T618 |
/workspace/coverage/default/11.spi_device_alert_test.251689182 |
|
|
Apr 18 02:27:55 PM PDT 24 |
Apr 18 02:27:56 PM PDT 24 |
18844159 ps |
| T166 |
/workspace/coverage/default/7.spi_device_stress_all.3745008358 |
|
|
Apr 18 02:27:47 PM PDT 24 |
Apr 18 02:27:48 PM PDT 24 |
57027607 ps |
| T619 |
/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.4284966185 |
|
|
Apr 18 02:30:27 PM PDT 24 |
Apr 18 02:30:45 PM PDT 24 |
5968983943 ps |
| T620 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.946894916 |
|
|
Apr 18 02:29:49 PM PDT 24 |
Apr 18 02:29:50 PM PDT 24 |
239543905 ps |
| T258 |
/workspace/coverage/default/18.spi_device_intercept.1501158530 |
|
|
Apr 18 02:28:11 PM PDT 24 |
Apr 18 02:28:20 PM PDT 24 |
4328398136 ps |
| T621 |
/workspace/coverage/default/2.spi_device_tpm_all.4272440901 |
|
|
Apr 18 02:27:24 PM PDT 24 |
Apr 18 02:27:41 PM PDT 24 |
1289725954 ps |
| T622 |
/workspace/coverage/default/20.spi_device_csb_read.2289127278 |
|
|
Apr 18 02:28:20 PM PDT 24 |
Apr 18 02:28:22 PM PDT 24 |
16416689 ps |
| T623 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.762410278 |
|
|
Apr 18 02:28:03 PM PDT 24 |
Apr 18 02:28:04 PM PDT 24 |
106182396 ps |
| T624 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.293626041 |
|
|
Apr 18 02:30:05 PM PDT 24 |
Apr 18 02:30:11 PM PDT 24 |
3415551944 ps |
| T305 |
/workspace/coverage/default/9.spi_device_intercept.1784378389 |
|
|
Apr 18 02:27:45 PM PDT 24 |
Apr 18 02:27:50 PM PDT 24 |
193596631 ps |
| T625 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.316652358 |
|
|
Apr 18 02:30:04 PM PDT 24 |
Apr 18 02:30:17 PM PDT 24 |
6432137977 ps |
| T626 |
/workspace/coverage/default/49.spi_device_upload.2821916865 |
|
|
Apr 18 02:30:30 PM PDT 24 |
Apr 18 02:30:34 PM PDT 24 |
902979465 ps |
| T627 |
/workspace/coverage/default/40.spi_device_tpm_sts_read.3001607207 |
|
|
Apr 18 02:29:40 PM PDT 24 |
Apr 18 02:29:41 PM PDT 24 |
160148452 ps |
| T628 |
/workspace/coverage/default/37.spi_device_csb_read.203640633 |
|
|
Apr 18 02:29:25 PM PDT 24 |
Apr 18 02:29:26 PM PDT 24 |
71456446 ps |
| T278 |
/workspace/coverage/default/49.spi_device_intercept.2535100763 |
|
|
Apr 18 02:30:26 PM PDT 24 |
Apr 18 02:30:45 PM PDT 24 |
1799264672 ps |
| T629 |
/workspace/coverage/default/45.spi_device_tpm_rw.1447973326 |
|
|
Apr 18 02:30:05 PM PDT 24 |
Apr 18 02:30:11 PM PDT 24 |
136557749 ps |
| T630 |
/workspace/coverage/default/29.spi_device_tpm_rw.1388319140 |
|
|
Apr 18 02:28:55 PM PDT 24 |
Apr 18 02:28:56 PM PDT 24 |
15114708 ps |
| T631 |
/workspace/coverage/default/8.spi_device_read_buffer_direct.805653230 |
|
|
Apr 18 02:27:51 PM PDT 24 |
Apr 18 02:27:58 PM PDT 24 |
587252708 ps |
| T632 |
/workspace/coverage/default/46.spi_device_read_buffer_direct.667188895 |
|
|
Apr 18 02:30:11 PM PDT 24 |
Apr 18 02:30:20 PM PDT 24 |
3696524509 ps |
| T633 |
/workspace/coverage/default/4.spi_device_csb_read.920854251 |
|
|
Apr 18 02:27:33 PM PDT 24 |
Apr 18 02:27:35 PM PDT 24 |
41610928 ps |
| T634 |
/workspace/coverage/default/7.spi_device_mem_parity.3999244000 |
|
|
Apr 18 02:27:40 PM PDT 24 |
Apr 18 02:27:41 PM PDT 24 |
24672666 ps |
| T347 |
/workspace/coverage/default/4.spi_device_flash_mode.1558251053 |
|
|
Apr 18 02:27:29 PM PDT 24 |
Apr 18 02:28:00 PM PDT 24 |
4735593407 ps |
| T635 |
/workspace/coverage/default/46.spi_device_stress_all.1505343019 |
|
|
Apr 18 02:30:57 PM PDT 24 |
Apr 18 02:30:59 PM PDT 24 |
114042299 ps |
| T636 |
/workspace/coverage/default/12.spi_device_csb_read.1149171566 |
|
|
Apr 18 02:27:49 PM PDT 24 |
Apr 18 02:27:50 PM PDT 24 |
20337664 ps |
| T637 |
/workspace/coverage/default/10.spi_device_tpm_all.3309299321 |
|
|
Apr 18 02:27:45 PM PDT 24 |
Apr 18 02:27:48 PM PDT 24 |
226907915 ps |
| T638 |
/workspace/coverage/default/39.spi_device_tpm_rw.1162633303 |
|
|
Apr 18 02:29:36 PM PDT 24 |
Apr 18 02:29:44 PM PDT 24 |
643002311 ps |
| T639 |
/workspace/coverage/default/14.spi_device_csb_read.734217129 |
|
|
Apr 18 02:28:00 PM PDT 24 |
Apr 18 02:28:01 PM PDT 24 |
74305660 ps |
| T640 |
/workspace/coverage/default/2.spi_device_tpm_rw.3860874959 |
|
|
Apr 18 02:27:24 PM PDT 24 |
Apr 18 02:27:37 PM PDT 24 |
325998339 ps |
| T641 |
/workspace/coverage/default/46.spi_device_tpm_sts_read.3461191674 |
|
|
Apr 18 02:30:14 PM PDT 24 |
Apr 18 02:30:15 PM PDT 24 |
1428425931 ps |
| T253 |
/workspace/coverage/default/47.spi_device_pass_addr_payload_swap.1637081159 |
|
|
Apr 18 02:30:16 PM PDT 24 |
Apr 18 02:30:49 PM PDT 24 |
12067150032 ps |
| T642 |
/workspace/coverage/default/12.spi_device_upload.1536771426 |
|
|
Apr 18 02:28:00 PM PDT 24 |
Apr 18 02:28:21 PM PDT 24 |
4616912415 ps |
| T643 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.1825559937 |
|
|
Apr 18 02:28:48 PM PDT 24 |
Apr 18 02:28:55 PM PDT 24 |
632478906 ps |
| T644 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.254432744 |
|
|
Apr 18 02:27:36 PM PDT 24 |
Apr 18 02:28:03 PM PDT 24 |
71928523709 ps |
| T340 |
/workspace/coverage/default/7.spi_device_flash_mode.914653141 |
|
|
Apr 18 02:27:41 PM PDT 24 |
Apr 18 02:28:07 PM PDT 24 |
2618615645 ps |
| T645 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.875093890 |
|
|
Apr 18 02:27:46 PM PDT 24 |
Apr 18 02:28:00 PM PDT 24 |
2362678085 ps |
| T646 |
/workspace/coverage/default/25.spi_device_tpm_all.387439279 |
|
|
Apr 18 02:28:40 PM PDT 24 |
Apr 18 02:29:10 PM PDT 24 |
98411689733 ps |
| T647 |
/workspace/coverage/default/40.spi_device_tpm_rw.917557184 |
|
|
Apr 18 02:29:41 PM PDT 24 |
Apr 18 02:29:43 PM PDT 24 |
258268501 ps |
| T648 |
/workspace/coverage/default/13.spi_device_tpm_read_hw_reg.2526453546 |
|
|
Apr 18 02:28:01 PM PDT 24 |
Apr 18 02:28:10 PM PDT 24 |
1801706709 ps |
| T224 |
/workspace/coverage/default/24.spi_device_pass_cmd_filtering.367841621 |
|
|
Apr 18 02:28:35 PM PDT 24 |
Apr 18 02:28:44 PM PDT 24 |
5666659229 ps |
| T649 |
/workspace/coverage/default/47.spi_device_tpm_rw.1613275648 |
|
|
Apr 18 02:30:19 PM PDT 24 |
Apr 18 02:30:21 PM PDT 24 |
210734310 ps |
| T200 |
/workspace/coverage/default/7.spi_device_mailbox.3621561720 |
|
|
Apr 18 02:27:38 PM PDT 24 |
Apr 18 02:27:53 PM PDT 24 |
1758935779 ps |
| T650 |
/workspace/coverage/default/41.spi_device_intercept.541841673 |
|
|
Apr 18 02:29:46 PM PDT 24 |
Apr 18 02:29:51 PM PDT 24 |
381289831 ps |
| T651 |
/workspace/coverage/default/2.spi_device_tpm_sts_read.2743954992 |
|
|
Apr 18 02:27:22 PM PDT 24 |
Apr 18 02:27:25 PM PDT 24 |
12919972 ps |
| T652 |
/workspace/coverage/default/18.spi_device_tpm_rw.3612938074 |
|
|
Apr 18 02:28:14 PM PDT 24 |
Apr 18 02:28:16 PM PDT 24 |
359877653 ps |
| T310 |
/workspace/coverage/default/43.spi_device_intercept.576711882 |
|
|
Apr 18 02:29:56 PM PDT 24 |
Apr 18 02:30:05 PM PDT 24 |
3083025775 ps |
| T653 |
/workspace/coverage/default/25.spi_device_alert_test.1122545593 |
|
|
Apr 18 02:28:38 PM PDT 24 |
Apr 18 02:28:40 PM PDT 24 |
12079998 ps |
| T654 |
/workspace/coverage/default/46.spi_device_mailbox.3731833378 |
|
|
Apr 18 02:30:12 PM PDT 24 |
Apr 18 02:30:16 PM PDT 24 |
80620782 ps |
| T274 |
/workspace/coverage/default/45.spi_device_upload.2063475132 |
|
|
Apr 18 02:30:06 PM PDT 24 |
Apr 18 02:30:13 PM PDT 24 |
521691075 ps |
| T655 |
/workspace/coverage/default/29.spi_device_tpm_read_hw_reg.1848951797 |
|
|
Apr 18 02:28:58 PM PDT 24 |
Apr 18 02:29:11 PM PDT 24 |
3965985998 ps |
| T656 |
/workspace/coverage/default/29.spi_device_csb_read.1476704986 |
|
|
Apr 18 02:28:58 PM PDT 24 |
Apr 18 02:29:00 PM PDT 24 |
35250498 ps |
| T657 |
/workspace/coverage/default/27.spi_device_csb_read.3427301470 |
|
|
Apr 18 02:28:44 PM PDT 24 |
Apr 18 02:28:46 PM PDT 24 |
18674984 ps |
| T327 |
/workspace/coverage/default/24.spi_device_mailbox.3632853815 |
|
|
Apr 18 02:28:35 PM PDT 24 |
Apr 18 02:29:11 PM PDT 24 |
15856015896 ps |
| T658 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.3925452334 |
|
|
Apr 18 02:28:26 PM PDT 24 |
Apr 18 02:28:27 PM PDT 24 |
182380982 ps |
| T659 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.2848907102 |
|
|
Apr 18 02:29:17 PM PDT 24 |
Apr 18 02:29:18 PM PDT 24 |
148834594 ps |
| T333 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.991141076 |
|
|
Apr 18 02:29:34 PM PDT 24 |
Apr 18 02:29:39 PM PDT 24 |
477656409 ps |
| T660 |
/workspace/coverage/default/2.spi_device_read_buffer_direct.1266471614 |
|
|
Apr 18 02:27:25 PM PDT 24 |
Apr 18 02:27:37 PM PDT 24 |
1217737778 ps |
| T661 |
/workspace/coverage/default/4.spi_device_tpm_rw.2746896352 |
|
|
Apr 18 02:27:30 PM PDT 24 |
Apr 18 02:27:34 PM PDT 24 |
130630885 ps |
| T324 |
/workspace/coverage/default/21.spi_device_cfg_cmd.2508349154 |
|
|
Apr 18 02:28:20 PM PDT 24 |
Apr 18 02:28:27 PM PDT 24 |
779818183 ps |
| T187 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.198933514 |
|
|
Apr 18 02:27:25 PM PDT 24 |
Apr 18 02:27:59 PM PDT 24 |
82501969192 ps |
| T354 |
/workspace/coverage/default/41.spi_device_mailbox.4148154273 |
|
|
Apr 18 02:29:45 PM PDT 24 |
Apr 18 02:29:57 PM PDT 24 |
7402945460 ps |
| T205 |
/workspace/coverage/default/4.spi_device_pass_cmd_filtering.133735538 |
|
|
Apr 18 02:27:38 PM PDT 24 |
Apr 18 02:27:41 PM PDT 24 |
397648236 ps |
| T201 |
/workspace/coverage/default/22.spi_device_intercept.2102788366 |
|
|
Apr 18 02:28:30 PM PDT 24 |
Apr 18 02:28:44 PM PDT 24 |
4983536785 ps |
| T662 |
/workspace/coverage/default/22.spi_device_csb_read.2232222471 |
|
|
Apr 18 02:28:26 PM PDT 24 |
Apr 18 02:28:27 PM PDT 24 |
31849001 ps |
| T322 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.3270768548 |
|
|
Apr 18 02:27:54 PM PDT 24 |
Apr 18 02:28:08 PM PDT 24 |
2935315025 ps |
| T663 |
/workspace/coverage/default/10.spi_device_tpm_sts_read.2494521935 |
|
|
Apr 18 02:27:45 PM PDT 24 |
Apr 18 02:27:46 PM PDT 24 |
38326297 ps |
| T378 |
/workspace/coverage/default/46.spi_device_tpm_all.2413738860 |
|
|
Apr 18 02:30:08 PM PDT 24 |
Apr 18 02:31:01 PM PDT 24 |
88991079399 ps |
| T664 |
/workspace/coverage/default/12.spi_device_tpm_sts_read.4159844295 |
|
|
Apr 18 02:27:57 PM PDT 24 |
Apr 18 02:27:59 PM PDT 24 |
39325843 ps |
| T665 |
/workspace/coverage/default/8.spi_device_mem_parity.1501997885 |
|
|
Apr 18 02:27:42 PM PDT 24 |
Apr 18 02:27:44 PM PDT 24 |
18703942 ps |
| T323 |
/workspace/coverage/default/27.spi_device_pass_cmd_filtering.470020169 |
|
|
Apr 18 02:28:49 PM PDT 24 |
Apr 18 02:28:54 PM PDT 24 |
908538639 ps |
| T666 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.443236778 |
|
|
Apr 18 02:30:03 PM PDT 24 |
Apr 18 02:30:06 PM PDT 24 |
113927471 ps |
| T667 |
/workspace/coverage/default/37.spi_device_tpm_sts_read.4156074156 |
|
|
Apr 18 02:29:33 PM PDT 24 |
Apr 18 02:29:34 PM PDT 24 |
145959695 ps |
| T668 |
/workspace/coverage/default/9.spi_device_mailbox.4021052360 |
|
|
Apr 18 02:27:45 PM PDT 24 |
Apr 18 02:29:05 PM PDT 24 |
7989537444 ps |
| T226 |
/workspace/coverage/default/24.spi_device_cfg_cmd.128195341 |
|
|
Apr 18 02:28:33 PM PDT 24 |
Apr 18 02:28:42 PM PDT 24 |
2059582233 ps |
| T669 |
/workspace/coverage/default/45.spi_device_alert_test.994222423 |
|
|
Apr 18 02:30:07 PM PDT 24 |
Apr 18 02:30:09 PM PDT 24 |
24755317 ps |
| T53 |
/workspace/coverage/default/0.spi_device_sec_cm.3000791695 |
|
|
Apr 18 02:27:22 PM PDT 24 |
Apr 18 02:27:24 PM PDT 24 |
216107519 ps |
| T254 |
/workspace/coverage/default/3.spi_device_pass_cmd_filtering.908145590 |
|
|
Apr 18 02:27:27 PM PDT 24 |
Apr 18 02:27:51 PM PDT 24 |
9604525292 ps |
| T312 |
/workspace/coverage/default/34.spi_device_intercept.542080618 |
|
|
Apr 18 02:29:16 PM PDT 24 |
Apr 18 02:29:22 PM PDT 24 |
730881129 ps |
| T670 |
/workspace/coverage/default/37.spi_device_intercept.1973047633 |
|
|
Apr 18 02:29:29 PM PDT 24 |
Apr 18 02:29:46 PM PDT 24 |
8292254407 ps |
| T329 |
/workspace/coverage/default/19.spi_device_pass_addr_payload_swap.2877446016 |
|
|
Apr 18 02:28:16 PM PDT 24 |
Apr 18 02:28:25 PM PDT 24 |
750119008 ps |
| T366 |
/workspace/coverage/default/32.spi_device_upload.964933463 |
|
|
Apr 18 02:29:03 PM PDT 24 |
Apr 18 02:29:17 PM PDT 24 |
8328250582 ps |
| T279 |
/workspace/coverage/default/22.spi_device_pass_cmd_filtering.628051169 |
|
|
Apr 18 02:28:29 PM PDT 24 |
Apr 18 02:28:37 PM PDT 24 |
1061759225 ps |
| T671 |
/workspace/coverage/default/32.spi_device_tpm_sts_read.1084412842 |
|
|
Apr 18 02:29:06 PM PDT 24 |
Apr 18 02:29:08 PM PDT 24 |
131020203 ps |
| T672 |
/workspace/coverage/default/46.spi_device_csb_read.1837863621 |
|
|
Apr 18 02:30:12 PM PDT 24 |
Apr 18 02:30:14 PM PDT 24 |
26849126 ps |
| T673 |
/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.4251031162 |
|
|
Apr 18 02:29:51 PM PDT 24 |
Apr 18 02:30:16 PM PDT 24 |
8990264120 ps |
| T674 |
/workspace/coverage/default/29.spi_device_tpm_sts_read.1546178328 |
|
|
Apr 18 02:28:57 PM PDT 24 |
Apr 18 02:28:58 PM PDT 24 |
132391063 ps |
| T210 |
/workspace/coverage/default/23.spi_device_cfg_cmd.1776028622 |
|
|
Apr 18 02:28:47 PM PDT 24 |
Apr 18 02:28:52 PM PDT 24 |
230705202 ps |
| T675 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.2018277138 |
|
|
Apr 18 02:27:45 PM PDT 24 |
Apr 18 02:27:51 PM PDT 24 |
1046996271 ps |
| T676 |
/workspace/coverage/default/42.spi_device_tpm_rw.2843090308 |
|
|
Apr 18 02:29:51 PM PDT 24 |
Apr 18 02:29:52 PM PDT 24 |
15547180 ps |
| T275 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.2006112398 |
|
|
Apr 18 02:27:39 PM PDT 24 |
Apr 18 02:27:43 PM PDT 24 |
1369761629 ps |
| T677 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.549846422 |
|
|
Apr 18 02:27:54 PM PDT 24 |
Apr 18 02:27:59 PM PDT 24 |
640857380 ps |
| T337 |
/workspace/coverage/default/39.spi_device_upload.2154525478 |
|
|
Apr 18 02:29:40 PM PDT 24 |
Apr 18 02:29:49 PM PDT 24 |
4306802957 ps |
| T678 |
/workspace/coverage/default/39.spi_device_alert_test.4156508226 |
|
|
Apr 18 02:29:41 PM PDT 24 |
Apr 18 02:29:42 PM PDT 24 |
14342079 ps |
| T679 |
/workspace/coverage/default/11.spi_device_tpm_sts_read.2004707594 |
|
|
Apr 18 02:27:52 PM PDT 24 |
Apr 18 02:27:53 PM PDT 24 |
38538849 ps |
| T680 |
/workspace/coverage/default/32.spi_device_intercept.1409589707 |
|
|
Apr 18 02:29:05 PM PDT 24 |
Apr 18 02:29:08 PM PDT 24 |
542477390 ps |
| T681 |
/workspace/coverage/default/3.spi_device_mem_parity.2064239770 |
|
|
Apr 18 02:27:25 PM PDT 24 |
Apr 18 02:27:27 PM PDT 24 |
92780849 ps |
| T682 |
/workspace/coverage/default/2.spi_device_tpm_read_hw_reg.613848851 |
|
|
Apr 18 02:27:21 PM PDT 24 |
Apr 18 02:27:28 PM PDT 24 |
5113133008 ps |
| T683 |
/workspace/coverage/default/17.spi_device_tpm_read_hw_reg.2267912008 |
|
|
Apr 18 02:28:06 PM PDT 24 |
Apr 18 02:28:09 PM PDT 24 |
652989416 ps |
| T54 |
/workspace/coverage/default/4.spi_device_sec_cm.2005990704 |
|
|
Apr 18 02:27:31 PM PDT 24 |
Apr 18 02:27:32 PM PDT 24 |
98327772 ps |
| T281 |
/workspace/coverage/default/40.spi_device_pass_addr_payload_swap.792792925 |
|
|
Apr 18 02:29:41 PM PDT 24 |
Apr 18 02:29:47 PM PDT 24 |
2036255400 ps |
| T684 |
/workspace/coverage/default/28.spi_device_alert_test.73700806 |
|
|
Apr 18 02:28:54 PM PDT 24 |
Apr 18 02:28:55 PM PDT 24 |
140987386 ps |
| T685 |
/workspace/coverage/default/23.spi_device_tpm_rw.3246086946 |
|
|
Apr 18 02:28:35 PM PDT 24 |
Apr 18 02:28:36 PM PDT 24 |
17456972 ps |
| T227 |
/workspace/coverage/default/17.spi_device_pass_addr_payload_swap.2768404065 |
|
|
Apr 18 02:28:16 PM PDT 24 |
Apr 18 02:28:19 PM PDT 24 |
269672034 ps |
| T686 |
/workspace/coverage/default/16.spi_device_tpm_sts_read.3842222907 |
|
|
Apr 18 02:28:07 PM PDT 24 |
Apr 18 02:28:09 PM PDT 24 |
162186144 ps |
| T687 |
/workspace/coverage/default/47.spi_device_read_buffer_direct.1107498125 |
|
|
Apr 18 02:30:17 PM PDT 24 |
Apr 18 02:30:22 PM PDT 24 |
155045543 ps |
| T282 |
/workspace/coverage/default/26.spi_device_pass_addr_payload_swap.3338235908 |
|
|
Apr 18 02:28:43 PM PDT 24 |
Apr 18 02:28:53 PM PDT 24 |
728735254 ps |
| T688 |
/workspace/coverage/default/21.spi_device_tpm_read_hw_reg.3822645919 |
|
|
Apr 18 02:28:22 PM PDT 24 |
Apr 18 02:28:25 PM PDT 24 |
2308318375 ps |
| T689 |
/workspace/coverage/default/1.spi_device_alert_test.3910228541 |
|
|
Apr 18 02:27:20 PM PDT 24 |
Apr 18 02:27:21 PM PDT 24 |
25103715 ps |
| T344 |
/workspace/coverage/default/18.spi_device_flash_mode.3372625852 |
|
|
Apr 18 02:28:18 PM PDT 24 |
Apr 18 02:29:45 PM PDT 24 |
24716036677 ps |
| T690 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.2358075605 |
|
|
Apr 18 02:29:11 PM PDT 24 |
Apr 18 02:29:17 PM PDT 24 |
2861448525 ps |
| T346 |
/workspace/coverage/default/36.spi_device_flash_mode.2952176609 |
|
|
Apr 18 02:29:28 PM PDT 24 |
Apr 18 02:29:49 PM PDT 24 |
860734126 ps |
| T691 |
/workspace/coverage/default/20.spi_device_tpm_all.2084129527 |
|
|
Apr 18 02:28:21 PM PDT 24 |
Apr 18 02:28:49 PM PDT 24 |
2838621549 ps |
| T692 |
/workspace/coverage/default/25.spi_device_tpm_read_hw_reg.204056855 |
|
|
Apr 18 02:28:40 PM PDT 24 |
Apr 18 02:28:47 PM PDT 24 |
2258244315 ps |
| T693 |
/workspace/coverage/default/41.spi_device_upload.3017835614 |
|
|
Apr 18 02:29:45 PM PDT 24 |
Apr 18 02:29:52 PM PDT 24 |
2413755555 ps |
| T694 |
/workspace/coverage/default/23.spi_device_tpm_all.1517401861 |
|
|
Apr 18 02:28:33 PM PDT 24 |
Apr 18 02:28:42 PM PDT 24 |
5155748101 ps |
| T695 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.3439417252 |
|
|
Apr 18 02:29:58 PM PDT 24 |
Apr 18 02:29:59 PM PDT 24 |
187092046 ps |
| T189 |
/workspace/coverage/default/11.spi_device_mailbox.3132779720 |
|
|
Apr 18 02:27:52 PM PDT 24 |
Apr 18 02:30:18 PM PDT 24 |
86196796079 ps |
| T319 |
/workspace/coverage/default/22.spi_device_upload.1589639994 |
|
|
Apr 18 02:28:28 PM PDT 24 |
Apr 18 02:28:33 PM PDT 24 |
209466273 ps |
| T696 |
/workspace/coverage/default/3.spi_device_intercept.262658788 |
|
|
Apr 18 02:27:27 PM PDT 24 |
Apr 18 02:27:53 PM PDT 24 |
2683261993 ps |
| T697 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.1198036247 |
|
|
Apr 18 02:28:40 PM PDT 24 |
Apr 18 02:28:59 PM PDT 24 |
24626610438 ps |
| T698 |
/workspace/coverage/default/11.spi_device_tpm_rw.2787529421 |
|
|
Apr 18 02:27:51 PM PDT 24 |
Apr 18 02:27:55 PM PDT 24 |
2072442299 ps |
| T699 |
/workspace/coverage/default/3.spi_device_read_buffer_direct.740593634 |
|
|
Apr 18 02:27:29 PM PDT 24 |
Apr 18 02:27:35 PM PDT 24 |
597439130 ps |
| T243 |
/workspace/coverage/default/37.spi_device_mailbox.261933226 |
|
|
Apr 18 02:29:30 PM PDT 24 |
Apr 18 02:29:55 PM PDT 24 |
7442720450 ps |
| T700 |
/workspace/coverage/default/27.spi_device_tpm_read_hw_reg.3808331690 |
|
|
Apr 18 02:28:42 PM PDT 24 |
Apr 18 02:28:51 PM PDT 24 |
2399088871 ps |
| T342 |
/workspace/coverage/default/14.spi_device_flash_mode.4207505845 |
|
|
Apr 18 02:28:02 PM PDT 24 |
Apr 18 02:28:33 PM PDT 24 |
4097122596 ps |
| T701 |
/workspace/coverage/default/30.spi_device_tpm_rw.1448126199 |
|
|
Apr 18 02:29:00 PM PDT 24 |
Apr 18 02:29:02 PM PDT 24 |
40416014 ps |
| T202 |
/workspace/coverage/default/35.spi_device_pass_cmd_filtering.1801354534 |
|
|
Apr 18 02:29:20 PM PDT 24 |
Apr 18 02:29:40 PM PDT 24 |
28231476905 ps |
| T313 |
/workspace/coverage/default/38.spi_device_intercept.1149712092 |
|
|
Apr 18 02:29:32 PM PDT 24 |
Apr 18 02:29:53 PM PDT 24 |
3436382403 ps |
| T702 |
/workspace/coverage/default/6.spi_device_tpm_rw.275953845 |
|
|
Apr 18 02:27:37 PM PDT 24 |
Apr 18 02:27:43 PM PDT 24 |
165682086 ps |
| T703 |
/workspace/coverage/default/29.spi_device_intercept.3847545762 |
|
|
Apr 18 02:28:58 PM PDT 24 |
Apr 18 02:29:01 PM PDT 24 |
128178433 ps |
| T704 |
/workspace/coverage/default/33.spi_device_tpm_rw.4101465283 |
|
|
Apr 18 02:29:09 PM PDT 24 |
Apr 18 02:29:13 PM PDT 24 |
351800014 ps |
| T44 |
/workspace/coverage/default/0.spi_device_ram_cfg.390053571 |
|
|
Apr 18 02:27:17 PM PDT 24 |
Apr 18 02:27:18 PM PDT 24 |
39772064 ps |
| T112 |
/workspace/coverage/default/47.spi_device_tpm_all.2816879028 |
|
|
Apr 18 02:30:18 PM PDT 24 |
Apr 18 02:31:03 PM PDT 24 |
7713265572 ps |
| T705 |
/workspace/coverage/default/29.spi_device_tpm_all.1422892264 |
|
|
Apr 18 02:28:58 PM PDT 24 |
Apr 18 02:29:24 PM PDT 24 |
12104623724 ps |
| T706 |
/workspace/coverage/default/30.spi_device_tpm_all.1206872543 |
|
|
Apr 18 02:28:56 PM PDT 24 |
Apr 18 02:29:07 PM PDT 24 |
5282150313 ps |
| T707 |
/workspace/coverage/default/17.spi_device_flash_mode.3128742853 |
|
|
Apr 18 02:28:13 PM PDT 24 |
Apr 18 02:30:19 PM PDT 24 |
43561534810 ps |
| T293 |
/workspace/coverage/default/42.spi_device_flash_mode.1001766493 |
|
|
Apr 18 02:30:00 PM PDT 24 |
Apr 18 02:30:50 PM PDT 24 |
16898156269 ps |
| T318 |
/workspace/coverage/default/2.spi_device_mailbox.805873482 |
|
|
Apr 18 02:27:44 PM PDT 24 |
Apr 18 02:28:20 PM PDT 24 |
3078138652 ps |
| T262 |
/workspace/coverage/default/40.spi_device_upload.1794680189 |
|
|
Apr 18 02:29:47 PM PDT 24 |
Apr 18 02:30:08 PM PDT 24 |
23979478424 ps |
| T708 |
/workspace/coverage/default/20.spi_device_alert_test.2560253415 |
|
|
Apr 18 02:28:20 PM PDT 24 |
Apr 18 02:28:22 PM PDT 24 |
21633033 ps |
| T709 |
/workspace/coverage/default/23.spi_device_alert_test.1468768707 |
|
|
Apr 18 02:28:34 PM PDT 24 |
Apr 18 02:28:35 PM PDT 24 |
44769459 ps |
| T301 |
/workspace/coverage/default/15.spi_device_cfg_cmd.4293840968 |
|
|
Apr 18 02:28:05 PM PDT 24 |
Apr 18 02:28:10 PM PDT 24 |
1988953105 ps |
| T710 |
/workspace/coverage/default/15.spi_device_intercept.1694578068 |
|
|
Apr 18 02:28:04 PM PDT 24 |
Apr 18 02:28:08 PM PDT 24 |
1008850465 ps |
| T325 |
/workspace/coverage/default/25.spi_device_mailbox.1409694186 |
|
|
Apr 18 02:28:41 PM PDT 24 |
Apr 18 02:28:52 PM PDT 24 |
752914572 ps |
| T711 |
/workspace/coverage/default/23.spi_device_csb_read.3522612721 |
|
|
Apr 18 02:28:27 PM PDT 24 |
Apr 18 02:28:28 PM PDT 24 |
17917330 ps |
| T712 |
/workspace/coverage/default/7.spi_device_alert_test.2720793300 |
|
|
Apr 18 02:27:48 PM PDT 24 |
Apr 18 02:27:49 PM PDT 24 |
44301773 ps |
| T713 |
/workspace/coverage/default/0.spi_device_tpm_rw.3531055729 |
|
|
Apr 18 02:27:14 PM PDT 24 |
Apr 18 02:27:18 PM PDT 24 |
327436286 ps |
| T229 |
/workspace/coverage/default/36.spi_device_pass_cmd_filtering.1744628877 |
|
|
Apr 18 02:29:24 PM PDT 24 |
Apr 18 02:29:28 PM PDT 24 |
780622069 ps |
| T714 |
/workspace/coverage/default/39.spi_device_flash_mode.3460587852 |
|
|
Apr 18 02:29:45 PM PDT 24 |
Apr 18 02:31:12 PM PDT 24 |
39854332449 ps |
| T715 |
/workspace/coverage/default/13.spi_device_flash_mode.90883311 |
|
|
Apr 18 02:28:00 PM PDT 24 |
Apr 18 02:29:41 PM PDT 24 |
30286241524 ps |
| T716 |
/workspace/coverage/default/34.spi_device_tpm_all.2322887015 |
|
|
Apr 18 02:29:09 PM PDT 24 |
Apr 18 02:29:15 PM PDT 24 |
4712767256 ps |
| T717 |
/workspace/coverage/default/42.spi_device_tpm_sts_read.1166812437 |
|
|
Apr 18 02:29:50 PM PDT 24 |
Apr 18 02:29:52 PM PDT 24 |
159262950 ps |
| T718 |
/workspace/coverage/default/11.spi_device_flash_mode.1262237234 |
|
|
Apr 18 02:27:55 PM PDT 24 |
Apr 18 02:29:33 PM PDT 24 |
25472686181 ps |
| T280 |
/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.1570162646 |
|
|
Apr 18 02:28:38 PM PDT 24 |
Apr 18 02:28:43 PM PDT 24 |
232078206 ps |
| T719 |
/workspace/coverage/default/49.spi_device_alert_test.2227037909 |
|
|
Apr 18 02:30:26 PM PDT 24 |
Apr 18 02:30:28 PM PDT 24 |
30177652 ps |
| T720 |
/workspace/coverage/default/31.spi_device_tpm_sts_read.1060097539 |
|
|
Apr 18 02:29:01 PM PDT 24 |
Apr 18 02:29:03 PM PDT 24 |
71468512 ps |
| T396 |
/workspace/coverage/default/19.spi_device_tpm_all.3159636257 |
|
|
Apr 18 02:28:18 PM PDT 24 |
Apr 18 02:28:49 PM PDT 24 |
5318377928 ps |
| T256 |
/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.1621965020 |
|
|
Apr 18 02:29:32 PM PDT 24 |
Apr 18 02:29:39 PM PDT 24 |
9004535093 ps |
| T721 |
/workspace/coverage/default/14.spi_device_tpm_sts_read.3045503859 |
|
|
Apr 18 02:28:00 PM PDT 24 |
Apr 18 02:28:01 PM PDT 24 |
48840637 ps |
| T722 |
/workspace/coverage/default/42.spi_device_alert_test.1406691011 |
|
|
Apr 18 02:30:01 PM PDT 24 |
Apr 18 02:30:02 PM PDT 24 |
35546636 ps |
| T723 |
/workspace/coverage/default/38.spi_device_read_buffer_direct.802455574 |
|
|
Apr 18 02:29:34 PM PDT 24 |
Apr 18 02:29:38 PM PDT 24 |
124926577 ps |
| T320 |
/workspace/coverage/default/19.spi_device_upload.954955197 |
|
|
Apr 18 02:28:16 PM PDT 24 |
Apr 18 02:28:19 PM PDT 24 |
368705402 ps |
| T724 |
/workspace/coverage/default/14.spi_device_mailbox.3816448696 |
|
|
Apr 18 02:28:08 PM PDT 24 |
Apr 18 02:28:14 PM PDT 24 |
1744647666 ps |
| T725 |
/workspace/coverage/default/30.spi_device_tpm_sts_read.632842171 |
|
|
Apr 18 02:29:01 PM PDT 24 |
Apr 18 02:29:03 PM PDT 24 |
91279145 ps |
| T336 |
/workspace/coverage/default/2.spi_device_upload.388827869 |
|
|
Apr 18 02:27:21 PM PDT 24 |
Apr 18 02:27:33 PM PDT 24 |
3405381950 ps |
| T726 |
/workspace/coverage/default/12.spi_device_cfg_cmd.740260018 |
|
|
Apr 18 02:27:57 PM PDT 24 |
Apr 18 02:28:03 PM PDT 24 |
484290226 ps |
| T727 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.36952976 |
|
|
Apr 18 02:29:41 PM PDT 24 |
Apr 18 02:29:45 PM PDT 24 |
440483916 ps |
| T728 |
/workspace/coverage/default/30.spi_device_read_buffer_direct.1521620814 |
|
|
Apr 18 02:29:03 PM PDT 24 |
Apr 18 02:29:20 PM PDT 24 |
8340739601 ps |
| T729 |
/workspace/coverage/default/1.spi_device_mem_parity.985415502 |
|
|
Apr 18 02:27:21 PM PDT 24 |
Apr 18 02:27:23 PM PDT 24 |
112556821 ps |
| T181 |
/workspace/coverage/default/24.spi_device_upload.4140846929 |
|
|
Apr 18 02:28:35 PM PDT 24 |
Apr 18 02:28:38 PM PDT 24 |
100180648 ps |
| T730 |
/workspace/coverage/default/31.spi_device_alert_test.54973583 |
|
|
Apr 18 02:29:03 PM PDT 24 |
Apr 18 02:29:04 PM PDT 24 |
14900636 ps |
| T731 |
/workspace/coverage/default/3.spi_device_csb_read.3328132872 |
|
|
Apr 18 02:27:24 PM PDT 24 |
Apr 18 02:27:26 PM PDT 24 |
38326665 ps |
| T353 |
/workspace/coverage/default/8.spi_device_mailbox.2096083710 |
|
|
Apr 18 02:27:47 PM PDT 24 |
Apr 18 02:27:50 PM PDT 24 |
128486449 ps |
| T328 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.2658879380 |
|
|
Apr 18 02:28:50 PM PDT 24 |
Apr 18 02:28:53 PM PDT 24 |
233433303 ps |
| T133 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.2749517646 |
|
|
Apr 18 12:55:15 PM PDT 24 |
Apr 18 12:55:18 PM PDT 24 |
151070072 ps |
| T119 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.2464353056 |
|
|
Apr 18 12:55:08 PM PDT 24 |
Apr 18 12:55:14 PM PDT 24 |
133655467 ps |
| T732 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.24309513 |
|
|
Apr 18 12:55:28 PM PDT 24 |
Apr 18 12:55:30 PM PDT 24 |
44628700 ps |
| T134 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2415996460 |
|
|
Apr 18 12:54:55 PM PDT 24 |
Apr 18 12:55:17 PM PDT 24 |
3352043380 ps |
| T733 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.1053400164 |
|
|
Apr 18 12:55:29 PM PDT 24 |
Apr 18 12:55:31 PM PDT 24 |
23991514 ps |
| T734 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.416911447 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:26 PM PDT 24 |
34985075 ps |
| T120 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.4141471731 |
|
|
Apr 18 12:55:01 PM PDT 24 |
Apr 18 12:55:03 PM PDT 24 |
41397968 ps |
| T141 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.4008968430 |
|
|
Apr 18 12:55:01 PM PDT 24 |
Apr 18 12:55:03 PM PDT 24 |
33786183 ps |
| T142 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3398469819 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:27 PM PDT 24 |
47326832 ps |
| T143 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.201844483 |
|
|
Apr 18 12:55:18 PM PDT 24 |
Apr 18 12:55:21 PM PDT 24 |
35354730 ps |
| T735 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.3921540550 |
|
|
Apr 18 12:55:00 PM PDT 24 |
Apr 18 12:55:09 PM PDT 24 |
222148152 ps |
| T39 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.3103219270 |
|
|
Apr 18 12:55:05 PM PDT 24 |
Apr 18 12:55:08 PM PDT 24 |
48792643 ps |
| T736 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.4002389249 |
|
|
Apr 18 12:54:56 PM PDT 24 |
Apr 18 12:55:04 PM PDT 24 |
221753820 ps |
| T737 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.979046324 |
|
|
Apr 18 12:55:25 PM PDT 24 |
Apr 18 12:55:27 PM PDT 24 |
14128789 ps |
| T738 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.359580783 |
|
|
Apr 18 12:54:59 PM PDT 24 |
Apr 18 12:55:00 PM PDT 24 |
29735670 ps |
| T121 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2712041313 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:27 PM PDT 24 |
49253703 ps |
| T40 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.1346229078 |
|
|
Apr 18 12:55:08 PM PDT 24 |
Apr 18 12:55:23 PM PDT 24 |
4901554157 ps |
| T135 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1152319247 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:27 PM PDT 24 |
240615878 ps |
| T41 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.3629610075 |
|
|
Apr 18 12:55:27 PM PDT 24 |
Apr 18 12:55:32 PM PDT 24 |
57924611 ps |
| T144 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.3580247924 |
|
|
Apr 18 12:55:27 PM PDT 24 |
Apr 18 12:55:30 PM PDT 24 |
293709373 ps |
| T145 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.3404265952 |
|
|
Apr 18 12:54:55 PM PDT 24 |
Apr 18 12:54:58 PM PDT 24 |
58374581 ps |
| T167 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.2042367496 |
|
|
Apr 18 12:55:29 PM PDT 24 |
Apr 18 12:55:31 PM PDT 24 |
25883461 ps |
| T739 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.1039572096 |
|
|
Apr 18 12:55:23 PM PDT 24 |
Apr 18 12:55:24 PM PDT 24 |
35365670 ps |
| T124 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2317297924 |
|
|
Apr 18 12:54:48 PM PDT 24 |
Apr 18 12:55:06 PM PDT 24 |
281746154 ps |
| T740 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.3869172497 |
|
|
Apr 18 12:55:07 PM PDT 24 |
Apr 18 12:55:08 PM PDT 24 |
13556176 ps |
| T146 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.560360240 |
|
|
Apr 18 12:54:45 PM PDT 24 |
Apr 18 12:55:10 PM PDT 24 |
1157219581 ps |
| T741 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3089855932 |
|
|
Apr 18 12:54:48 PM PDT 24 |
Apr 18 12:54:51 PM PDT 24 |
16285770 ps |
| T742 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.2345267361 |
|
|
Apr 18 12:55:28 PM PDT 24 |
Apr 18 12:55:29 PM PDT 24 |
34446383 ps |
| T147 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.450849548 |
|
|
Apr 18 12:55:09 PM PDT 24 |
Apr 18 12:55:11 PM PDT 24 |
75257167 ps |
| T126 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.493622863 |
|
|
Apr 18 12:55:20 PM PDT 24 |
Apr 18 12:55:22 PM PDT 24 |
27201547 ps |
| T125 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.3463663339 |
|
|
Apr 18 12:55:29 PM PDT 24 |
Apr 18 12:55:55 PM PDT 24 |
5992915898 ps |
| T139 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.241165697 |
|
|
Apr 18 12:54:49 PM PDT 24 |
Apr 18 12:55:05 PM PDT 24 |
558097061 ps |
| T743 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.787105232 |
|
|
Apr 18 12:55:25 PM PDT 24 |
Apr 18 12:55:27 PM PDT 24 |
30732083 ps |
| T156 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.2118561695 |
|
|
Apr 18 12:55:09 PM PDT 24 |
Apr 18 12:55:11 PM PDT 24 |
142263184 ps |
| T150 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2253178031 |
|
|
Apr 18 12:54:50 PM PDT 24 |
Apr 18 12:55:03 PM PDT 24 |
3266538128 ps |
| T157 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.483685723 |
|
|
Apr 18 12:55:08 PM PDT 24 |
Apr 18 12:55:13 PM PDT 24 |
1986149912 ps |
| T130 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1305526548 |
|
|
Apr 18 12:55:11 PM PDT 24 |
Apr 18 12:55:15 PM PDT 24 |
457337891 ps |
| T131 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.871328371 |
|
|
Apr 18 12:54:44 PM PDT 24 |
Apr 18 12:54:49 PM PDT 24 |
157604199 ps |
| T158 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.773299445 |
|
|
Apr 18 12:55:25 PM PDT 24 |
Apr 18 12:55:29 PM PDT 24 |
100449636 ps |
| T105 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.966411126 |
|
|
Apr 18 12:55:00 PM PDT 24 |
Apr 18 12:55:02 PM PDT 24 |
18384512 ps |
| T744 |
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.483695098 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:26 PM PDT 24 |
67942625 ps |
| T745 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.250323067 |
|
|
Apr 18 12:54:55 PM PDT 24 |
Apr 18 12:54:56 PM PDT 24 |
19208042 ps |
| T746 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.114267675 |
|
|
Apr 18 12:55:29 PM PDT 24 |
Apr 18 12:55:31 PM PDT 24 |
13567081 ps |
| T747 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.4113561216 |
|
|
Apr 18 12:54:48 PM PDT 24 |
Apr 18 12:54:50 PM PDT 24 |
12366792 ps |
| T748 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.1557916674 |
|
|
Apr 18 12:55:12 PM PDT 24 |
Apr 18 12:55:15 PM PDT 24 |
609054834 ps |
| T360 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1384632754 |
|
|
Apr 18 12:54:55 PM PDT 24 |
Apr 18 12:55:04 PM PDT 24 |
296523575 ps |
| T749 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.114715659 |
|
|
Apr 18 12:55:07 PM PDT 24 |
Apr 18 12:55:09 PM PDT 24 |
23519079 ps |
| T160 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.2856615047 |
|
|
Apr 18 12:55:27 PM PDT 24 |
Apr 18 12:55:32 PM PDT 24 |
840321018 ps |
| T750 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.2488395298 |
|
|
Apr 18 12:54:44 PM PDT 24 |
Apr 18 12:54:46 PM PDT 24 |
30367689 ps |
| T132 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.1553744146 |
|
|
Apr 18 12:54:54 PM PDT 24 |
Apr 18 12:54:59 PM PDT 24 |
267134136 ps |
| T751 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.3913007408 |
|
|
Apr 18 12:54:55 PM PDT 24 |
Apr 18 12:54:56 PM PDT 24 |
14456583 ps |
| T752 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.863835536 |
|
|
Apr 18 12:55:29 PM PDT 24 |
Apr 18 12:55:31 PM PDT 24 |
32878313 ps |
| T753 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.2083605038 |
|
|
Apr 18 12:55:31 PM PDT 24 |
Apr 18 12:55:33 PM PDT 24 |
16643916 ps |
| T754 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.1756495441 |
|
|
Apr 18 12:55:23 PM PDT 24 |
Apr 18 12:55:26 PM PDT 24 |
45716794 ps |
| T136 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.309841983 |
|
|
Apr 18 12:55:11 PM PDT 24 |
Apr 18 12:55:15 PM PDT 24 |
168300359 ps |
| T161 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.1577613714 |
|
|
Apr 18 12:55:06 PM PDT 24 |
Apr 18 12:55:11 PM PDT 24 |
730496945 ps |
| T162 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.1942284038 |
|
|
Apr 18 12:55:01 PM PDT 24 |
Apr 18 12:55:05 PM PDT 24 |
1499674188 ps |
| T755 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.2026294594 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:26 PM PDT 24 |
22707781 ps |
| T756 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.587488764 |
|
|
Apr 18 12:55:30 PM PDT 24 |
Apr 18 12:55:34 PM PDT 24 |
407640669 ps |
| T757 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.650557160 |
|
|
Apr 18 12:55:23 PM PDT 24 |
Apr 18 12:55:24 PM PDT 24 |
42329530 ps |
| T148 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1428200975 |
|
|
Apr 18 12:55:08 PM PDT 24 |
Apr 18 12:55:11 PM PDT 24 |
30918698 ps |
| T758 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.2190262146 |
|
|
Apr 18 12:55:18 PM PDT 24 |
Apr 18 12:55:19 PM PDT 24 |
13597488 ps |
| T759 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.311972953 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:26 PM PDT 24 |
35960841 ps |
| T149 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.539897841 |
|
|
Apr 18 12:54:44 PM PDT 24 |
Apr 18 12:55:20 PM PDT 24 |
9762167770 ps |
| T760 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.719450676 |
|
|
Apr 18 12:54:49 PM PDT 24 |
Apr 18 12:54:53 PM PDT 24 |
109398342 ps |
| T761 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2467237191 |
|
|
Apr 18 12:55:07 PM PDT 24 |
Apr 18 12:55:10 PM PDT 24 |
106813031 ps |
| T762 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.1340827400 |
|
|
Apr 18 12:54:50 PM PDT 24 |
Apr 18 12:54:54 PM PDT 24 |
382538215 ps |
| T763 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.1150385972 |
|
|
Apr 18 12:54:54 PM PDT 24 |
Apr 18 12:54:56 PM PDT 24 |
224603521 ps |
| T764 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.2653015152 |
|
|
Apr 18 12:55:23 PM PDT 24 |
Apr 18 12:55:28 PM PDT 24 |
221188136 ps |
| T765 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.2567056725 |
|
|
Apr 18 12:55:18 PM PDT 24 |
Apr 18 12:55:20 PM PDT 24 |
392591152 ps |
| T766 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.1447061861 |
|
|
Apr 18 12:55:12 PM PDT 24 |
Apr 18 12:55:16 PM PDT 24 |
123304000 ps |
| T767 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1428281827 |
|
|
Apr 18 12:55:19 PM PDT 24 |
Apr 18 12:55:23 PM PDT 24 |
53354707 ps |
| T768 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.2901399130 |
|
|
Apr 18 12:54:43 PM PDT 24 |
Apr 18 12:54:45 PM PDT 24 |
20944480 ps |
| T138 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3498506638 |
|
|
Apr 18 12:55:24 PM PDT 24 |
Apr 18 12:55:28 PM PDT 24 |
77101850 ps |