| T623 |
/workspace/coverage/default/18.spi_device_mem_parity.2913118436 |
|
|
Apr 21 01:26:29 PM PDT 24 |
Apr 21 01:26:30 PM PDT 24 |
14851261 ps |
| T624 |
/workspace/coverage/default/13.spi_device_read_buffer_direct.3584912378 |
|
|
Apr 21 01:26:00 PM PDT 24 |
Apr 21 01:26:06 PM PDT 24 |
213874671 ps |
| T229 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.28619051 |
|
|
Apr 21 01:27:30 PM PDT 24 |
Apr 21 01:27:41 PM PDT 24 |
1687917430 ps |
| T209 |
/workspace/coverage/default/10.spi_device_upload.2713622012 |
|
|
Apr 21 01:25:47 PM PDT 24 |
Apr 21 01:25:58 PM PDT 24 |
8907691236 ps |
| T625 |
/workspace/coverage/default/3.spi_device_read_buffer_direct.3006957973 |
|
|
Apr 21 01:25:03 PM PDT 24 |
Apr 21 01:25:09 PM PDT 24 |
7652194710 ps |
| T626 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.2611390010 |
|
|
Apr 21 01:26:21 PM PDT 24 |
Apr 21 01:26:26 PM PDT 24 |
475485357 ps |
| T627 |
/workspace/coverage/default/17.spi_device_tpm_rw.3246480501 |
|
|
Apr 21 01:26:21 PM PDT 24 |
Apr 21 01:26:22 PM PDT 24 |
14871808 ps |
| T628 |
/workspace/coverage/default/15.spi_device_tpm_read_hw_reg.2070973855 |
|
|
Apr 21 01:26:11 PM PDT 24 |
Apr 21 01:26:22 PM PDT 24 |
3479651794 ps |
| T629 |
/workspace/coverage/default/4.spi_device_csb_read.1375591038 |
|
|
Apr 21 01:25:05 PM PDT 24 |
Apr 21 01:25:06 PM PDT 24 |
16846903 ps |
| T297 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.787584554 |
|
|
Apr 21 01:27:18 PM PDT 24 |
Apr 21 01:27:34 PM PDT 24 |
14117926695 ps |
| T630 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.1264666435 |
|
|
Apr 21 01:29:31 PM PDT 24 |
Apr 21 01:29:32 PM PDT 24 |
80631805 ps |
| T631 |
/workspace/coverage/default/0.spi_device_mem_parity.3479710597 |
|
|
Apr 21 01:24:31 PM PDT 24 |
Apr 21 01:24:33 PM PDT 24 |
26921844 ps |
| T632 |
/workspace/coverage/default/25.spi_device_csb_read.2692056143 |
|
|
Apr 21 01:27:08 PM PDT 24 |
Apr 21 01:27:09 PM PDT 24 |
22580804 ps |
| T633 |
/workspace/coverage/default/46.spi_device_tpm_read_hw_reg.3150629392 |
|
|
Apr 21 01:29:13 PM PDT 24 |
Apr 21 01:29:33 PM PDT 24 |
7354754555 ps |
| T634 |
/workspace/coverage/default/48.spi_device_tpm_all.4028362016 |
|
|
Apr 21 01:29:32 PM PDT 24 |
Apr 21 01:29:34 PM PDT 24 |
1156312568 ps |
| T635 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.1397929391 |
|
|
Apr 21 01:28:36 PM PDT 24 |
Apr 21 01:28:52 PM PDT 24 |
1390166572 ps |
| T363 |
/workspace/coverage/default/24.spi_device_flash_mode.1336549609 |
|
|
Apr 21 01:27:06 PM PDT 24 |
Apr 21 01:28:25 PM PDT 24 |
52015530711 ps |
| T290 |
/workspace/coverage/default/39.spi_device_pass_cmd_filtering.1423847508 |
|
|
Apr 21 01:28:31 PM PDT 24 |
Apr 21 01:28:47 PM PDT 24 |
4419985001 ps |
| T636 |
/workspace/coverage/default/37.spi_device_tpm_rw.3013088850 |
|
|
Apr 21 01:28:17 PM PDT 24 |
Apr 21 01:28:23 PM PDT 24 |
128572201 ps |
| T637 |
/workspace/coverage/default/5.spi_device_csb_read.2407140733 |
|
|
Apr 21 01:25:07 PM PDT 24 |
Apr 21 01:25:08 PM PDT 24 |
67272187 ps |
| T638 |
/workspace/coverage/default/9.spi_device_tpm_all.3633159282 |
|
|
Apr 21 01:25:38 PM PDT 24 |
Apr 21 01:26:01 PM PDT 24 |
3423620950 ps |
| T639 |
/workspace/coverage/default/21.spi_device_alert_test.3491809903 |
|
|
Apr 21 01:26:50 PM PDT 24 |
Apr 21 01:26:52 PM PDT 24 |
21998900 ps |
| T640 |
/workspace/coverage/default/13.spi_device_tpm_rw.1141549695 |
|
|
Apr 21 01:26:03 PM PDT 24 |
Apr 21 01:26:04 PM PDT 24 |
139593599 ps |
| T324 |
/workspace/coverage/default/23.spi_device_mailbox.4044365287 |
|
|
Apr 21 01:26:56 PM PDT 24 |
Apr 21 01:27:17 PM PDT 24 |
3512363449 ps |
| T641 |
/workspace/coverage/default/21.spi_device_csb_read.4139545089 |
|
|
Apr 21 01:26:46 PM PDT 24 |
Apr 21 01:26:47 PM PDT 24 |
57782386 ps |
| T300 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.1580653776 |
|
|
Apr 21 01:29:31 PM PDT 24 |
Apr 21 01:29:41 PM PDT 24 |
3429933699 ps |
| T642 |
/workspace/coverage/default/15.spi_device_csb_read.1839673778 |
|
|
Apr 21 01:26:15 PM PDT 24 |
Apr 21 01:26:16 PM PDT 24 |
18221989 ps |
| T643 |
/workspace/coverage/default/37.spi_device_alert_test.3965122005 |
|
|
Apr 21 01:28:19 PM PDT 24 |
Apr 21 01:28:20 PM PDT 24 |
11719865 ps |
| T644 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.3490917285 |
|
|
Apr 21 01:25:16 PM PDT 24 |
Apr 21 01:25:27 PM PDT 24 |
3557541494 ps |
| T645 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.106718263 |
|
|
Apr 21 01:26:11 PM PDT 24 |
Apr 21 01:26:12 PM PDT 24 |
103925578 ps |
| T218 |
/workspace/coverage/default/43.spi_device_mailbox.3089264029 |
|
|
Apr 21 01:28:53 PM PDT 24 |
Apr 21 01:29:18 PM PDT 24 |
1771268869 ps |
| T270 |
/workspace/coverage/default/39.spi_device_intercept.1876343998 |
|
|
Apr 21 01:28:28 PM PDT 24 |
Apr 21 01:28:45 PM PDT 24 |
1467245693 ps |
| T646 |
/workspace/coverage/default/26.spi_device_tpm_sts_read.778232997 |
|
|
Apr 21 01:27:15 PM PDT 24 |
Apr 21 01:27:16 PM PDT 24 |
252865386 ps |
| T49 |
/workspace/coverage/default/3.spi_device_sec_cm.306133242 |
|
|
Apr 21 01:25:03 PM PDT 24 |
Apr 21 01:25:04 PM PDT 24 |
61495551 ps |
| T360 |
/workspace/coverage/default/47.spi_device_upload.2423716736 |
|
|
Apr 21 01:29:21 PM PDT 24 |
Apr 21 01:29:29 PM PDT 24 |
9289688884 ps |
| T647 |
/workspace/coverage/default/40.spi_device_tpm_read_hw_reg.90122970 |
|
|
Apr 21 01:28:31 PM PDT 24 |
Apr 21 01:28:41 PM PDT 24 |
75703917790 ps |
| T368 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.574880098 |
|
|
Apr 21 01:28:18 PM PDT 24 |
Apr 21 01:28:27 PM PDT 24 |
4066231733 ps |
| T648 |
/workspace/coverage/default/11.spi_device_csb_read.2542434254 |
|
|
Apr 21 01:25:47 PM PDT 24 |
Apr 21 01:25:48 PM PDT 24 |
19321987 ps |
| T328 |
/workspace/coverage/default/20.spi_device_intercept.1124543794 |
|
|
Apr 21 01:26:45 PM PDT 24 |
Apr 21 01:26:54 PM PDT 24 |
779257336 ps |
| T649 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.805866477 |
|
|
Apr 21 01:28:03 PM PDT 24 |
Apr 21 01:28:12 PM PDT 24 |
8993840524 ps |
| T212 |
/workspace/coverage/default/36.spi_device_upload.4214545172 |
|
|
Apr 21 01:28:09 PM PDT 24 |
Apr 21 01:28:17 PM PDT 24 |
3199531980 ps |
| T252 |
/workspace/coverage/default/25.spi_device_upload.1672018898 |
|
|
Apr 21 01:27:12 PM PDT 24 |
Apr 21 01:27:20 PM PDT 24 |
1130954842 ps |
| T265 |
/workspace/coverage/default/2.spi_device_intercept.1360891010 |
|
|
Apr 21 01:24:49 PM PDT 24 |
Apr 21 01:25:05 PM PDT 24 |
6252278116 ps |
| T650 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.3639216477 |
|
|
Apr 21 01:29:30 PM PDT 24 |
Apr 21 01:29:39 PM PDT 24 |
1336400626 ps |
| T334 |
/workspace/coverage/default/25.spi_device_pass_cmd_filtering.2767293944 |
|
|
Apr 21 01:27:11 PM PDT 24 |
Apr 21 01:27:13 PM PDT 24 |
860795974 ps |
| T651 |
/workspace/coverage/default/36.spi_device_csb_read.1058840997 |
|
|
Apr 21 01:28:09 PM PDT 24 |
Apr 21 01:28:10 PM PDT 24 |
16394959 ps |
| T652 |
/workspace/coverage/default/43.spi_device_tpm_all.4024096780 |
|
|
Apr 21 01:28:53 PM PDT 24 |
Apr 21 01:29:12 PM PDT 24 |
4229018472 ps |
| T362 |
/workspace/coverage/default/15.spi_device_intercept.874874625 |
|
|
Apr 21 01:26:13 PM PDT 24 |
Apr 21 01:26:20 PM PDT 24 |
954514664 ps |
| T330 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.1137865958 |
|
|
Apr 21 01:26:24 PM PDT 24 |
Apr 21 01:26:43 PM PDT 24 |
10129414050 ps |
| T653 |
/workspace/coverage/default/24.spi_device_pass_cmd_filtering.2412466217 |
|
|
Apr 21 01:27:06 PM PDT 24 |
Apr 21 01:27:25 PM PDT 24 |
103596902034 ps |
| T654 |
/workspace/coverage/default/29.spi_device_alert_test.1303297252 |
|
|
Apr 21 01:27:34 PM PDT 24 |
Apr 21 01:27:36 PM PDT 24 |
16648448 ps |
| T655 |
/workspace/coverage/default/41.spi_device_read_buffer_direct.767075329 |
|
|
Apr 21 01:28:43 PM PDT 24 |
Apr 21 01:29:01 PM PDT 24 |
6609779104 ps |
| T656 |
/workspace/coverage/default/10.spi_device_tpm_rw.4101883963 |
|
|
Apr 21 01:25:42 PM PDT 24 |
Apr 21 01:25:44 PM PDT 24 |
31617780 ps |
| T657 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.83281114 |
|
|
Apr 21 01:28:50 PM PDT 24 |
Apr 21 01:28:51 PM PDT 24 |
51088554 ps |
| T335 |
/workspace/coverage/default/40.spi_device_intercept.3743780071 |
|
|
Apr 21 01:28:36 PM PDT 24 |
Apr 21 01:29:00 PM PDT 24 |
9972999952 ps |
| T390 |
/workspace/coverage/default/27.spi_device_tpm_all.1310790334 |
|
|
Apr 21 01:27:22 PM PDT 24 |
Apr 21 01:27:50 PM PDT 24 |
14833823072 ps |
| T240 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.1355695235 |
|
|
Apr 21 01:26:17 PM PDT 24 |
Apr 21 01:26:35 PM PDT 24 |
12516433027 ps |
| T361 |
/workspace/coverage/default/38.spi_device_intercept.1146056588 |
|
|
Apr 21 01:28:21 PM PDT 24 |
Apr 21 01:28:25 PM PDT 24 |
276575337 ps |
| T228 |
/workspace/coverage/default/27.spi_device_cfg_cmd.1505595030 |
|
|
Apr 21 01:27:20 PM PDT 24 |
Apr 21 01:27:35 PM PDT 24 |
6404351303 ps |
| T345 |
/workspace/coverage/default/20.spi_device_pass_addr_payload_swap.3720298845 |
|
|
Apr 21 01:26:44 PM PDT 24 |
Apr 21 01:26:50 PM PDT 24 |
2788626370 ps |
| T354 |
/workspace/coverage/default/16.spi_device_pass_addr_payload_swap.4035197747 |
|
|
Apr 21 01:26:23 PM PDT 24 |
Apr 21 01:26:26 PM PDT 24 |
254067383 ps |
| T658 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.3217479381 |
|
|
Apr 21 01:28:43 PM PDT 24 |
Apr 21 01:28:48 PM PDT 24 |
1067128636 ps |
| T347 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.4059351874 |
|
|
Apr 21 01:29:34 PM PDT 24 |
Apr 21 01:29:46 PM PDT 24 |
15303475456 ps |
| T659 |
/workspace/coverage/default/34.spi_device_tpm_all.3191003143 |
|
|
Apr 21 01:27:59 PM PDT 24 |
Apr 21 01:28:02 PM PDT 24 |
590530678 ps |
| T660 |
/workspace/coverage/default/20.spi_device_tpm_rw.3449374293 |
|
|
Apr 21 01:26:39 PM PDT 24 |
Apr 21 01:26:41 PM PDT 24 |
34579637 ps |
| T222 |
/workspace/coverage/default/5.spi_device_intercept.3280588991 |
|
|
Apr 21 01:25:11 PM PDT 24 |
Apr 21 01:25:29 PM PDT 24 |
8358231506 ps |
| T661 |
/workspace/coverage/default/23.spi_device_tpm_read_hw_reg.3580785673 |
|
|
Apr 21 01:26:55 PM PDT 24 |
Apr 21 01:27:10 PM PDT 24 |
80715302072 ps |
| T662 |
/workspace/coverage/default/20.spi_device_mailbox.535171322 |
|
|
Apr 21 01:26:42 PM PDT 24 |
Apr 21 01:27:12 PM PDT 24 |
16911140652 ps |
| T663 |
/workspace/coverage/default/32.spi_device_cfg_cmd.1089304612 |
|
|
Apr 21 01:27:50 PM PDT 24 |
Apr 21 01:27:53 PM PDT 24 |
301905142 ps |
| T164 |
/workspace/coverage/default/31.spi_device_stress_all.2651188947 |
|
|
Apr 21 01:27:49 PM PDT 24 |
Apr 21 01:27:50 PM PDT 24 |
56586368 ps |
| T664 |
/workspace/coverage/default/40.spi_device_tpm_sts_read.994705945 |
|
|
Apr 21 01:28:35 PM PDT 24 |
Apr 21 01:28:36 PM PDT 24 |
27612022 ps |
| T190 |
/workspace/coverage/default/12.spi_device_upload.513694735 |
|
|
Apr 21 01:25:58 PM PDT 24 |
Apr 21 01:26:04 PM PDT 24 |
1144041786 ps |
| T391 |
/workspace/coverage/default/49.spi_device_tpm_all.2116429263 |
|
|
Apr 21 01:29:34 PM PDT 24 |
Apr 21 01:29:59 PM PDT 24 |
5170855947 ps |
| T665 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.3000819866 |
|
|
Apr 21 01:26:50 PM PDT 24 |
Apr 21 01:27:21 PM PDT 24 |
13550974995 ps |
| T666 |
/workspace/coverage/default/37.spi_device_mailbox.1501960838 |
|
|
Apr 21 01:28:16 PM PDT 24 |
Apr 21 01:28:37 PM PDT 24 |
1056026335 ps |
| T667 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.2937944609 |
|
|
Apr 21 01:28:39 PM PDT 24 |
Apr 21 01:28:40 PM PDT 24 |
170125559 ps |
| T668 |
/workspace/coverage/default/49.spi_device_csb_read.507483364 |
|
|
Apr 21 01:29:31 PM PDT 24 |
Apr 21 01:29:32 PM PDT 24 |
18956578 ps |
| T669 |
/workspace/coverage/default/6.spi_device_csb_read.2324702041 |
|
|
Apr 21 01:25:14 PM PDT 24 |
Apr 21 01:25:15 PM PDT 24 |
292206046 ps |
| T344 |
/workspace/coverage/default/26.spi_device_intercept.795785455 |
|
|
Apr 21 01:27:16 PM PDT 24 |
Apr 21 01:27:22 PM PDT 24 |
414722369 ps |
| T670 |
/workspace/coverage/default/2.spi_device_tpm_sts_read.2026594004 |
|
|
Apr 21 01:24:45 PM PDT 24 |
Apr 21 01:24:47 PM PDT 24 |
119459448 ps |
| T50 |
/workspace/coverage/default/4.spi_device_sec_cm.4257687450 |
|
|
Apr 21 01:25:07 PM PDT 24 |
Apr 21 01:25:09 PM PDT 24 |
255713377 ps |
| T671 |
/workspace/coverage/default/10.spi_device_alert_test.1054739710 |
|
|
Apr 21 01:25:46 PM PDT 24 |
Apr 21 01:25:47 PM PDT 24 |
32072443 ps |
| T672 |
/workspace/coverage/default/5.spi_device_mem_parity.3020818376 |
|
|
Apr 21 01:25:10 PM PDT 24 |
Apr 21 01:25:11 PM PDT 24 |
16504067 ps |
| T673 |
/workspace/coverage/default/4.spi_device_cfg_cmd.804058947 |
|
|
Apr 21 01:25:05 PM PDT 24 |
Apr 21 01:25:08 PM PDT 24 |
283552014 ps |
| T674 |
/workspace/coverage/default/27.spi_device_alert_test.390880819 |
|
|
Apr 21 01:27:24 PM PDT 24 |
Apr 21 01:27:25 PM PDT 24 |
12607907 ps |
| T675 |
/workspace/coverage/default/26.spi_device_tpm_read_hw_reg.2513360175 |
|
|
Apr 21 01:27:16 PM PDT 24 |
Apr 21 01:27:24 PM PDT 24 |
8886136400 ps |
| T100 |
/workspace/coverage/default/47.spi_device_flash_mode.3104083603 |
|
|
Apr 21 01:29:22 PM PDT 24 |
Apr 21 01:29:34 PM PDT 24 |
310754695 ps |
| T237 |
/workspace/coverage/default/44.spi_device_mailbox.3167881074 |
|
|
Apr 21 01:29:03 PM PDT 24 |
Apr 21 01:29:09 PM PDT 24 |
388739243 ps |
| T676 |
/workspace/coverage/default/45.spi_device_alert_test.1879351591 |
|
|
Apr 21 01:29:12 PM PDT 24 |
Apr 21 01:29:13 PM PDT 24 |
18094055 ps |
| T677 |
/workspace/coverage/default/36.spi_device_tpm_rw.3856262283 |
|
|
Apr 21 01:28:09 PM PDT 24 |
Apr 21 01:28:14 PM PDT 24 |
783232037 ps |
| T678 |
/workspace/coverage/default/30.spi_device_tpm_read_hw_reg.2340499496 |
|
|
Apr 21 01:27:33 PM PDT 24 |
Apr 21 01:27:38 PM PDT 24 |
533972458 ps |
| T679 |
/workspace/coverage/default/22.spi_device_alert_test.2144474610 |
|
|
Apr 21 01:26:53 PM PDT 24 |
Apr 21 01:26:54 PM PDT 24 |
72361168 ps |
| T680 |
/workspace/coverage/default/3.spi_device_tpm_sts_read.2297571289 |
|
|
Apr 21 01:24:59 PM PDT 24 |
Apr 21 01:25:00 PM PDT 24 |
292478144 ps |
| T681 |
/workspace/coverage/default/35.spi_device_intercept.2184052650 |
|
|
Apr 21 01:28:06 PM PDT 24 |
Apr 21 01:28:10 PM PDT 24 |
201859704 ps |
| T682 |
/workspace/coverage/default/43.spi_device_tpm_rw.458055800 |
|
|
Apr 21 01:28:51 PM PDT 24 |
Apr 21 01:28:54 PM PDT 24 |
149005891 ps |
| T683 |
/workspace/coverage/default/39.spi_device_alert_test.1097744913 |
|
|
Apr 21 01:28:34 PM PDT 24 |
Apr 21 01:28:35 PM PDT 24 |
39792983 ps |
| T684 |
/workspace/coverage/default/37.spi_device_tpm_read_hw_reg.2782606670 |
|
|
Apr 21 01:28:13 PM PDT 24 |
Apr 21 01:28:20 PM PDT 24 |
6837017128 ps |
| T267 |
/workspace/coverage/default/7.spi_device_upload.1718697548 |
|
|
Apr 21 01:25:26 PM PDT 24 |
Apr 21 01:25:32 PM PDT 24 |
1973593076 ps |
| T225 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.2334794046 |
|
|
Apr 21 01:25:42 PM PDT 24 |
Apr 21 01:26:02 PM PDT 24 |
31205299929 ps |
| T685 |
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.3081290301 |
|
|
Apr 21 01:25:35 PM PDT 24 |
Apr 21 01:25:42 PM PDT 24 |
2812088481 ps |
| T348 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.1563121682 |
|
|
Apr 21 01:26:32 PM PDT 24 |
Apr 21 01:26:56 PM PDT 24 |
8318028935 ps |
| T686 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.3058418832 |
|
|
Apr 21 01:26:59 PM PDT 24 |
Apr 21 01:27:04 PM PDT 24 |
1160235085 ps |
| T318 |
/workspace/coverage/default/8.spi_device_intercept.3749907094 |
|
|
Apr 21 01:25:32 PM PDT 24 |
Apr 21 01:25:38 PM PDT 24 |
228723386 ps |
| T687 |
/workspace/coverage/default/43.spi_device_read_buffer_direct.2890329259 |
|
|
Apr 21 01:28:56 PM PDT 24 |
Apr 21 01:29:04 PM PDT 24 |
2465016272 ps |
| T284 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.3984440508 |
|
|
Apr 21 01:26:07 PM PDT 24 |
Apr 21 01:26:15 PM PDT 24 |
1177851133 ps |
| T688 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.2119183235 |
|
|
Apr 21 01:26:29 PM PDT 24 |
Apr 21 01:26:35 PM PDT 24 |
10259150474 ps |
| T689 |
/workspace/coverage/default/30.spi_device_cfg_cmd.3756084953 |
|
|
Apr 21 01:27:40 PM PDT 24 |
Apr 21 01:27:45 PM PDT 24 |
342596976 ps |
| T346 |
/workspace/coverage/default/5.spi_device_pass_addr_payload_swap.593968305 |
|
|
Apr 21 01:25:13 PM PDT 24 |
Apr 21 01:25:32 PM PDT 24 |
4293025144 ps |
| T386 |
/workspace/coverage/default/6.spi_device_tpm_all.2958165906 |
|
|
Apr 21 01:25:13 PM PDT 24 |
Apr 21 01:26:10 PM PDT 24 |
56623916143 ps |
| T690 |
/workspace/coverage/default/14.spi_device_tpm_rw.1125617611 |
|
|
Apr 21 01:26:05 PM PDT 24 |
Apr 21 01:26:07 PM PDT 24 |
386934910 ps |
| T691 |
/workspace/coverage/default/13.spi_device_tpm_all.3362574981 |
|
|
Apr 21 01:26:00 PM PDT 24 |
Apr 21 01:26:30 PM PDT 24 |
26316383433 ps |
| T387 |
/workspace/coverage/default/12.spi_device_tpm_all.4238373927 |
|
|
Apr 21 01:25:55 PM PDT 24 |
Apr 21 01:26:45 PM PDT 24 |
10019310487 ps |
| T692 |
/workspace/coverage/default/14.spi_device_cfg_cmd.2960454551 |
|
|
Apr 21 01:26:08 PM PDT 24 |
Apr 21 01:26:11 PM PDT 24 |
58167823 ps |
| T693 |
/workspace/coverage/default/11.spi_device_mem_parity.202825116 |
|
|
Apr 21 01:25:47 PM PDT 24 |
Apr 21 01:25:48 PM PDT 24 |
24345666 ps |
| T331 |
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.563333858 |
|
|
Apr 21 01:25:36 PM PDT 24 |
Apr 21 01:25:39 PM PDT 24 |
166911670 ps |
| T694 |
/workspace/coverage/default/42.spi_device_tpm_rw.268562342 |
|
|
Apr 21 01:28:47 PM PDT 24 |
Apr 21 01:28:53 PM PDT 24 |
381057757 ps |
| T695 |
/workspace/coverage/default/28.spi_device_upload.2247140458 |
|
|
Apr 21 01:27:23 PM PDT 24 |
Apr 21 01:27:25 PM PDT 24 |
73058758 ps |
| T165 |
/workspace/coverage/default/35.spi_device_stress_all.3420992169 |
|
|
Apr 21 01:28:06 PM PDT 24 |
Apr 21 01:28:07 PM PDT 24 |
169180107 ps |
| T696 |
/workspace/coverage/default/48.spi_device_pass_cmd_filtering.1027888000 |
|
|
Apr 21 01:29:30 PM PDT 24 |
Apr 21 01:29:39 PM PDT 24 |
758221348 ps |
| T697 |
/workspace/coverage/default/32.spi_device_csb_read.4209112995 |
|
|
Apr 21 01:27:46 PM PDT 24 |
Apr 21 01:27:47 PM PDT 24 |
65843961 ps |
| T349 |
/workspace/coverage/default/3.spi_device_pass_addr_payload_swap.3006527213 |
|
|
Apr 21 01:25:02 PM PDT 24 |
Apr 21 01:25:07 PM PDT 24 |
879906872 ps |
| T698 |
/workspace/coverage/default/2.spi_device_tpm_rw.1174960139 |
|
|
Apr 21 01:24:46 PM PDT 24 |
Apr 21 01:24:47 PM PDT 24 |
66432734 ps |
| T699 |
/workspace/coverage/default/23.spi_device_tpm_all.1690681068 |
|
|
Apr 21 01:26:59 PM PDT 24 |
Apr 21 01:27:33 PM PDT 24 |
6128453616 ps |
| T700 |
/workspace/coverage/default/30.spi_device_alert_test.1533794515 |
|
|
Apr 21 01:27:39 PM PDT 24 |
Apr 21 01:27:40 PM PDT 24 |
16707284 ps |
| T289 |
/workspace/coverage/default/39.spi_device_pass_addr_payload_swap.3004303388 |
|
|
Apr 21 01:28:28 PM PDT 24 |
Apr 21 01:28:49 PM PDT 24 |
48678440742 ps |
| T701 |
/workspace/coverage/default/5.spi_device_alert_test.2659854564 |
|
|
Apr 21 01:25:12 PM PDT 24 |
Apr 21 01:25:13 PM PDT 24 |
32154809 ps |
| T285 |
/workspace/coverage/default/4.spi_device_intercept.1579680700 |
|
|
Apr 21 01:25:06 PM PDT 24 |
Apr 21 01:25:32 PM PDT 24 |
5213399964 ps |
| T253 |
/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.2667761729 |
|
|
Apr 21 01:27:12 PM PDT 24 |
Apr 21 01:27:18 PM PDT 24 |
360445069 ps |
| T702 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.3372762512 |
|
|
Apr 21 01:28:06 PM PDT 24 |
Apr 21 01:28:13 PM PDT 24 |
1468390099 ps |
| T703 |
/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.3933407776 |
|
|
Apr 21 01:28:44 PM PDT 24 |
Apr 21 01:28:52 PM PDT 24 |
10023250808 ps |
| T704 |
/workspace/coverage/default/1.spi_device_tpm_rw.2529513515 |
|
|
Apr 21 01:24:36 PM PDT 24 |
Apr 21 01:24:41 PM PDT 24 |
202186268 ps |
| T340 |
/workspace/coverage/default/46.spi_device_intercept.3170481983 |
|
|
Apr 21 01:29:18 PM PDT 24 |
Apr 21 01:29:21 PM PDT 24 |
126194500 ps |
| T210 |
/workspace/coverage/default/26.spi_device_pass_cmd_filtering.1210627347 |
|
|
Apr 21 01:27:14 PM PDT 24 |
Apr 21 01:27:17 PM PDT 24 |
324219071 ps |
| T705 |
/workspace/coverage/default/11.spi_device_tpm_read_hw_reg.721605869 |
|
|
Apr 21 01:25:48 PM PDT 24 |
Apr 21 01:25:58 PM PDT 24 |
14007209438 ps |
| T706 |
/workspace/coverage/default/38.spi_device_alert_test.3912546857 |
|
|
Apr 21 01:28:26 PM PDT 24 |
Apr 21 01:28:27 PM PDT 24 |
31822530 ps |
| T359 |
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.1515307206 |
|
|
Apr 21 01:25:32 PM PDT 24 |
Apr 21 01:25:47 PM PDT 24 |
3420698658 ps |
| T707 |
/workspace/coverage/default/13.spi_device_flash_mode.3916178254 |
|
|
Apr 21 01:26:01 PM PDT 24 |
Apr 21 01:26:24 PM PDT 24 |
2884802581 ps |
| T708 |
/workspace/coverage/default/39.spi_device_csb_read.4216780765 |
|
|
Apr 21 01:28:30 PM PDT 24 |
Apr 21 01:28:31 PM PDT 24 |
19513828 ps |
| T327 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.2589925855 |
|
|
Apr 21 01:28:23 PM PDT 24 |
Apr 21 01:28:30 PM PDT 24 |
286581596 ps |
| T203 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.3373518144 |
|
|
Apr 21 01:27:33 PM PDT 24 |
Apr 21 01:27:39 PM PDT 24 |
1026867802 ps |
| T709 |
/workspace/coverage/default/27.spi_device_tpm_rw.1330977345 |
|
|
Apr 21 01:27:22 PM PDT 24 |
Apr 21 01:27:24 PM PDT 24 |
49406120 ps |
| T286 |
/workspace/coverage/default/7.spi_device_pass_cmd_filtering.363846800 |
|
|
Apr 21 01:25:23 PM PDT 24 |
Apr 21 01:25:40 PM PDT 24 |
3554771020 ps |
| T710 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.1239870918 |
|
|
Apr 21 01:25:14 PM PDT 24 |
Apr 21 01:25:23 PM PDT 24 |
24569589914 ps |
| T711 |
/workspace/coverage/default/9.spi_device_upload.3553596893 |
|
|
Apr 21 01:25:41 PM PDT 24 |
Apr 21 01:25:48 PM PDT 24 |
1718249101 ps |
| T712 |
/workspace/coverage/default/32.spi_device_alert_test.341363935 |
|
|
Apr 21 01:27:53 PM PDT 24 |
Apr 21 01:27:54 PM PDT 24 |
64857961 ps |
| T713 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.2676966522 |
|
|
Apr 21 01:25:30 PM PDT 24 |
Apr 21 01:25:31 PM PDT 24 |
219123949 ps |
| T714 |
/workspace/coverage/default/17.spi_device_mem_parity.1146033913 |
|
|
Apr 21 01:26:21 PM PDT 24 |
Apr 21 01:26:22 PM PDT 24 |
66264891 ps |
| T715 |
/workspace/coverage/default/19.spi_device_tpm_all.762485449 |
|
|
Apr 21 01:26:35 PM PDT 24 |
Apr 21 01:26:55 PM PDT 24 |
8613843373 ps |
| T716 |
/workspace/coverage/default/8.spi_device_tpm_all.4225616199 |
|
|
Apr 21 01:25:30 PM PDT 24 |
Apr 21 01:25:49 PM PDT 24 |
3259421259 ps |
| T717 |
/workspace/coverage/default/19.spi_device_tpm_sts_read.1568474379 |
|
|
Apr 21 01:26:35 PM PDT 24 |
Apr 21 01:26:36 PM PDT 24 |
86928419 ps |
| T718 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.2781763158 |
|
|
Apr 21 01:26:02 PM PDT 24 |
Apr 21 01:26:06 PM PDT 24 |
69986258 ps |
| T319 |
/workspace/coverage/default/32.spi_device_upload.2455843948 |
|
|
Apr 21 01:27:50 PM PDT 24 |
Apr 21 01:27:53 PM PDT 24 |
475361986 ps |
| T292 |
/workspace/coverage/default/14.spi_device_intercept.1122491121 |
|
|
Apr 21 01:26:08 PM PDT 24 |
Apr 21 01:26:21 PM PDT 24 |
7046176738 ps |
| T719 |
/workspace/coverage/default/16.spi_device_tpm_all.1877241075 |
|
|
Apr 21 01:26:17 PM PDT 24 |
Apr 21 01:26:35 PM PDT 24 |
13669686390 ps |
| T342 |
/workspace/coverage/default/48.spi_device_intercept.3869205780 |
|
|
Apr 21 01:29:32 PM PDT 24 |
Apr 21 01:29:48 PM PDT 24 |
1966036119 ps |
| T720 |
/workspace/coverage/default/26.spi_device_tpm_rw.1740444182 |
|
|
Apr 21 01:27:17 PM PDT 24 |
Apr 21 01:27:23 PM PDT 24 |
194151733 ps |
| T721 |
/workspace/coverage/default/17.spi_device_csb_read.732772953 |
|
|
Apr 21 01:26:19 PM PDT 24 |
Apr 21 01:26:20 PM PDT 24 |
58734229 ps |
| T722 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.2432253789 |
|
|
Apr 21 01:24:44 PM PDT 24 |
Apr 21 01:24:59 PM PDT 24 |
5308094750 ps |
| T392 |
/workspace/coverage/default/30.spi_device_tpm_all.951068754 |
|
|
Apr 21 01:27:34 PM PDT 24 |
Apr 21 01:28:39 PM PDT 24 |
55760551463 ps |
| T723 |
/workspace/coverage/default/7.spi_device_csb_read.1324473207 |
|
|
Apr 21 01:25:19 PM PDT 24 |
Apr 21 01:25:20 PM PDT 24 |
13772677 ps |
| T724 |
/workspace/coverage/default/45.spi_device_read_buffer_direct.917551110 |
|
|
Apr 21 01:29:13 PM PDT 24 |
Apr 21 01:29:18 PM PDT 24 |
1525628628 ps |
| T725 |
/workspace/coverage/default/10.spi_device_tpm_all.4289534850 |
|
|
Apr 21 01:25:42 PM PDT 24 |
Apr 21 01:26:08 PM PDT 24 |
1733577213 ps |
| T186 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.2058334769 |
|
|
Apr 21 01:24:37 PM PDT 24 |
Apr 21 01:25:03 PM PDT 24 |
10101786954 ps |
| T726 |
/workspace/coverage/default/12.spi_device_tpm_rw.3586185272 |
|
|
Apr 21 01:25:54 PM PDT 24 |
Apr 21 01:25:58 PM PDT 24 |
2728614620 ps |
| T727 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.1480887492 |
|
|
Apr 21 01:27:46 PM PDT 24 |
Apr 21 01:27:56 PM PDT 24 |
3388259688 ps |
| T728 |
/workspace/coverage/default/38.spi_device_tpm_all.3443234859 |
|
|
Apr 21 01:28:20 PM PDT 24 |
Apr 21 01:28:37 PM PDT 24 |
2151327934 ps |
| T729 |
/workspace/coverage/default/35.spi_device_csb_read.399004229 |
|
|
Apr 21 01:28:03 PM PDT 24 |
Apr 21 01:28:04 PM PDT 24 |
34050204 ps |
| T730 |
/workspace/coverage/default/49.spi_device_alert_test.1415912220 |
|
|
Apr 21 01:29:44 PM PDT 24 |
Apr 21 01:29:45 PM PDT 24 |
31496758 ps |
| T731 |
/workspace/coverage/default/24.spi_device_alert_test.2803123509 |
|
|
Apr 21 01:27:08 PM PDT 24 |
Apr 21 01:27:09 PM PDT 24 |
41865671 ps |
| T732 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.3014013279 |
|
|
Apr 21 01:29:20 PM PDT 24 |
Apr 21 01:29:42 PM PDT 24 |
33600319361 ps |
| T358 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.2771604418 |
|
|
Apr 21 01:27:51 PM PDT 24 |
Apr 21 01:28:02 PM PDT 24 |
2009525545 ps |
| T208 |
/workspace/coverage/default/15.spi_device_upload.3956834640 |
|
|
Apr 21 01:26:12 PM PDT 24 |
Apr 21 01:26:16 PM PDT 24 |
1911211843 ps |
| T343 |
/workspace/coverage/default/5.spi_device_mailbox.3853249127 |
|
|
Apr 21 01:25:09 PM PDT 24 |
Apr 21 01:25:16 PM PDT 24 |
753237374 ps |
| T733 |
/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.991107771 |
|
|
Apr 21 01:29:30 PM PDT 24 |
Apr 21 01:29:48 PM PDT 24 |
5343287402 ps |
| T734 |
/workspace/coverage/default/8.spi_device_csb_read.1018825035 |
|
|
Apr 21 01:25:31 PM PDT 24 |
Apr 21 01:25:32 PM PDT 24 |
31623387 ps |
| T166 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.3735248895 |
|
|
Apr 21 12:50:27 PM PDT 24 |
Apr 21 12:50:28 PM PDT 24 |
16065267 ps |
| T735 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1368948647 |
|
|
Apr 21 12:50:17 PM PDT 24 |
Apr 21 12:50:18 PM PDT 24 |
73333348 ps |
| T35 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.2760124756 |
|
|
Apr 21 12:49:59 PM PDT 24 |
Apr 21 12:50:21 PM PDT 24 |
3060593697 ps |
| T132 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.1920148479 |
|
|
Apr 21 12:50:05 PM PDT 24 |
Apr 21 12:50:08 PM PDT 24 |
42631084 ps |
| T167 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.1244944320 |
|
|
Apr 21 12:50:17 PM PDT 24 |
Apr 21 12:50:18 PM PDT 24 |
61733744 ps |
| T736 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.1899970147 |
|
|
Apr 21 12:50:15 PM PDT 24 |
Apr 21 12:50:16 PM PDT 24 |
13750368 ps |
| T120 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3360495886 |
|
|
Apr 21 12:50:05 PM PDT 24 |
Apr 21 12:50:08 PM PDT 24 |
102922913 ps |
| T101 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.2306221158 |
|
|
Apr 21 12:50:01 PM PDT 24 |
Apr 21 12:50:08 PM PDT 24 |
212325409 ps |
| T737 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1097396945 |
|
|
Apr 21 12:50:22 PM PDT 24 |
Apr 21 12:50:23 PM PDT 24 |
12029758 ps |
| T36 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.969288922 |
|
|
Apr 21 12:49:57 PM PDT 24 |
Apr 21 12:50:13 PM PDT 24 |
2267191897 ps |
| T146 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.4094996831 |
|
|
Apr 21 12:50:14 PM PDT 24 |
Apr 21 12:50:17 PM PDT 24 |
172384396 ps |
| T133 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.831040531 |
|
|
Apr 21 12:49:55 PM PDT 24 |
Apr 21 12:49:57 PM PDT 24 |
56001053 ps |
| T168 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.1588340251 |
|
|
Apr 21 12:50:16 PM PDT 24 |
Apr 21 12:50:17 PM PDT 24 |
12209983 ps |
| T102 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.330884173 |
|
|
Apr 21 12:50:06 PM PDT 24 |
Apr 21 12:50:09 PM PDT 24 |
587754594 ps |
| T37 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.1319531879 |
|
|
Apr 21 12:50:15 PM PDT 24 |
Apr 21 12:50:38 PM PDT 24 |
2060592563 ps |
| T147 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.3477247327 |
|
|
Apr 21 12:50:14 PM PDT 24 |
Apr 21 12:50:16 PM PDT 24 |
133988650 ps |
| T103 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.1687546766 |
|
|
Apr 21 12:50:00 PM PDT 24 |
Apr 21 12:50:05 PM PDT 24 |
103217785 ps |
| T124 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.1323003817 |
|
|
Apr 21 12:49:54 PM PDT 24 |
Apr 21 12:49:58 PM PDT 24 |
45564838 ps |
| T738 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.997770071 |
|
|
Apr 21 12:50:17 PM PDT 24 |
Apr 21 12:50:18 PM PDT 24 |
37917594 ps |
| T125 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1269440235 |
|
|
Apr 21 12:50:08 PM PDT 24 |
Apr 21 12:50:16 PM PDT 24 |
106946048 ps |
| T134 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.2427838489 |
|
|
Apr 21 12:50:00 PM PDT 24 |
Apr 21 12:50:04 PM PDT 24 |
131290475 ps |
| T739 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1167627371 |
|
|
Apr 21 12:50:11 PM PDT 24 |
Apr 21 12:50:12 PM PDT 24 |
45504281 ps |
| T148 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.3660922455 |
|
|
Apr 21 12:50:17 PM PDT 24 |
Apr 21 12:50:21 PM PDT 24 |
2021066946 ps |
| T740 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.3399590856 |
|
|
Apr 21 12:50:01 PM PDT 24 |
Apr 21 12:50:04 PM PDT 24 |
138253289 ps |
| T741 |
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.2111520023 |
|
|
Apr 21 12:50:25 PM PDT 24 |
Apr 21 12:50:26 PM PDT 24 |
54140960 ps |
| T149 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.3045130073 |
|
|
Apr 21 12:50:04 PM PDT 24 |
Apr 21 12:50:08 PM PDT 24 |
90738146 ps |
| T108 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.3043932060 |
|
|
Apr 21 12:50:12 PM PDT 24 |
Apr 21 12:50:15 PM PDT 24 |
36476981 ps |
| T742 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.69111155 |
|
|
Apr 21 12:50:16 PM PDT 24 |
Apr 21 12:50:18 PM PDT 24 |
15268047 ps |
| T743 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.4043546689 |
|
|
Apr 21 12:50:16 PM PDT 24 |
Apr 21 12:50:25 PM PDT 24 |
1284514659 ps |
| T109 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.2183581411 |
|
|
Apr 21 12:50:13 PM PDT 24 |
Apr 21 12:50:18 PM PDT 24 |
163353969 ps |
| T150 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.195602827 |
|
|
Apr 21 12:50:05 PM PDT 24 |
Apr 21 12:50:09 PM PDT 24 |
157795788 ps |
| T135 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.4014734715 |
|
|
Apr 21 12:50:03 PM PDT 24 |
Apr 21 12:50:06 PM PDT 24 |
24078576 ps |
| T136 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3125905502 |
|
|
Apr 21 12:50:09 PM PDT 24 |
Apr 21 12:50:11 PM PDT 24 |
19524179 ps |
| T126 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.276900690 |
|
|
Apr 21 12:50:11 PM PDT 24 |
Apr 21 12:50:14 PM PDT 24 |
244581064 ps |
| T127 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1854297581 |
|
|
Apr 21 12:50:22 PM PDT 24 |
Apr 21 12:50:24 PM PDT 24 |
54506971 ps |
| T151 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.721807205 |
|
|
Apr 21 12:50:18 PM PDT 24 |
Apr 21 12:50:20 PM PDT 24 |
325705591 ps |
| T141 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1375578629 |
|
|
Apr 21 12:50:03 PM PDT 24 |
Apr 21 12:50:17 PM PDT 24 |
788381943 ps |
| T116 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.3125524843 |
|
|
Apr 21 12:50:03 PM PDT 24 |
Apr 21 12:50:07 PM PDT 24 |
156877813 ps |
| T744 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.1075837967 |
|
|
Apr 21 12:50:12 PM PDT 24 |
Apr 21 12:50:14 PM PDT 24 |
91285496 ps |
| T745 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.2087774350 |
|
|
Apr 21 12:50:01 PM PDT 24 |
Apr 21 12:50:04 PM PDT 24 |
21382666 ps |
| T746 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.586827083 |
|
|
Apr 21 12:50:02 PM PDT 24 |
Apr 21 12:50:06 PM PDT 24 |
233460088 ps |
| T137 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.1821250693 |
|
|
Apr 21 12:50:05 PM PDT 24 |
Apr 21 12:50:30 PM PDT 24 |
1096927415 ps |
| T747 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.800804703 |
|
|
Apr 21 12:50:12 PM PDT 24 |
Apr 21 12:50:15 PM PDT 24 |
101546795 ps |
| T118 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1043502047 |
|
|
Apr 21 12:50:10 PM PDT 24 |
Apr 21 12:50:13 PM PDT 24 |
245751493 ps |
| T748 |
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.938830858 |
|
|
Apr 21 12:50:19 PM PDT 24 |
Apr 21 12:50:20 PM PDT 24 |
72535929 ps |
| T156 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3900953052 |
|
|
Apr 21 12:50:04 PM PDT 24 |
Apr 21 12:50:14 PM PDT 24 |
788964634 ps |
| T749 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.1224234751 |
|
|
Apr 21 12:50:14 PM PDT 24 |
Apr 21 12:50:16 PM PDT 24 |
32243154 ps |
| T750 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.1734299185 |
|
|
Apr 21 12:50:15 PM PDT 24 |
Apr 21 12:50:16 PM PDT 24 |
13906348 ps |
| T751 |
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.4276740986 |
|
|
Apr 21 12:50:20 PM PDT 24 |
Apr 21 12:50:25 PM PDT 24 |
347601476 ps |
| T752 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.183300417 |
|
|
Apr 21 12:50:29 PM PDT 24 |
Apr 21 12:50:30 PM PDT 24 |
16104890 ps |
| T753 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.1049741769 |
|
|
Apr 21 12:50:12 PM PDT 24 |
Apr 21 12:50:13 PM PDT 24 |
37241369 ps |
| T157 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.1804545796 |
|
|
Apr 21 12:49:59 PM PDT 24 |
Apr 21 12:50:03 PM PDT 24 |
1157484447 ps |
| T374 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.4225790013 |
|
|
Apr 21 12:50:16 PM PDT 24 |
Apr 21 12:50:35 PM PDT 24 |
301106136 ps |
| T754 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.1679178440 |
|
|
Apr 21 12:50:25 PM PDT 24 |
Apr 21 12:50:26 PM PDT 24 |
17512486 ps |
| T755 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.1501424575 |
|
|
Apr 21 12:49:57 PM PDT 24 |
Apr 21 12:50:00 PM PDT 24 |
357542431 ps |
| T756 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.423527156 |
|
|
Apr 21 12:50:08 PM PDT 24 |
Apr 21 12:50:10 PM PDT 24 |
82018036 ps |
| T757 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2315057282 |
|
|
Apr 21 12:50:19 PM PDT 24 |
Apr 21 12:50:22 PM PDT 24 |
325766653 ps |
| T158 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3626042171 |
|
|
Apr 21 12:49:59 PM PDT 24 |
Apr 21 12:50:09 PM PDT 24 |
373433628 ps |
| T758 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.4265942879 |
|
|
Apr 21 12:50:18 PM PDT 24 |
Apr 21 12:50:21 PM PDT 24 |
40811397 ps |
| T115 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3241390136 |
|
|
Apr 21 12:50:11 PM PDT 24 |
Apr 21 12:50:16 PM PDT 24 |
138905518 ps |
| T759 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.547079673 |
|
|
Apr 21 12:50:14 PM PDT 24 |
Apr 21 12:50:15 PM PDT 24 |
102121870 ps |
| T760 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.3707398474 |
|
|
Apr 21 12:50:15 PM PDT 24 |
Apr 21 12:50:16 PM PDT 24 |
255465105 ps |
| T761 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.3404952574 |
|
|
Apr 21 12:50:03 PM PDT 24 |
Apr 21 12:50:07 PM PDT 24 |
331196588 ps |
| T762 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2709311566 |
|
|
Apr 21 12:50:13 PM PDT 24 |
Apr 21 12:50:15 PM PDT 24 |
13842644 ps |
| T138 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.2343770287 |
|
|
Apr 21 12:50:27 PM PDT 24 |
Apr 21 12:50:30 PM PDT 24 |
124201567 ps |
| T763 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.3310259568 |
|
|
Apr 21 12:50:04 PM PDT 24 |
Apr 21 12:50:05 PM PDT 24 |
25936656 ps |
| T159 |
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1030556673 |
|
|
Apr 21 12:50:01 PM PDT 24 |
Apr 21 12:50:11 PM PDT 24 |
1265497992 ps |
| T117 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2256584217 |
|
|
Apr 21 12:50:12 PM PDT 24 |
Apr 21 12:50:15 PM PDT 24 |
55926711 ps |
| T764 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.1095833129 |
|
|
Apr 21 12:50:01 PM PDT 24 |
Apr 21 12:50:06 PM PDT 24 |
792043089 ps |
| T765 |
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.2084145661 |
|
|
Apr 21 12:49:53 PM PDT 24 |
Apr 21 12:49:54 PM PDT 24 |
131301337 ps |
| T766 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.1962977010 |
|
|
Apr 21 12:50:10 PM PDT 24 |
Apr 21 12:50:12 PM PDT 24 |
15173488 ps |
| T119 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.3398818889 |
|
|
Apr 21 12:49:57 PM PDT 24 |
Apr 21 12:50:00 PM PDT 24 |
79393823 ps |
| T767 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.125360520 |
|
|
Apr 21 12:50:17 PM PDT 24 |
Apr 21 12:50:18 PM PDT 24 |
17933200 ps |
| T768 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.12523402 |
|
|
Apr 21 12:50:17 PM PDT 24 |
Apr 21 12:50:19 PM PDT 24 |
25316905 ps |
| T769 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.3906390789 |
|
|
Apr 21 12:50:18 PM PDT 24 |
Apr 21 12:50:19 PM PDT 24 |
36859170 ps |