| T621 |
/workspace/coverage/default/33.spi_device_tpm_all.489946697 |
|
|
Apr 25 02:06:06 PM PDT 24 |
Apr 25 02:07:00 PM PDT 24 |
33706036824 ps |
| T622 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.3246231254 |
|
|
Apr 25 02:02:51 PM PDT 24 |
Apr 25 02:02:53 PM PDT 24 |
194392385 ps |
| T211 |
/workspace/coverage/default/14.spi_device_pass_cmd_filtering.2161725900 |
|
|
Apr 25 02:01:23 PM PDT 24 |
Apr 25 02:01:28 PM PDT 24 |
619438256 ps |
| T623 |
/workspace/coverage/default/12.spi_device_tpm_rw.1717010945 |
|
|
Apr 25 02:00:57 PM PDT 24 |
Apr 25 02:01:01 PM PDT 24 |
215494674 ps |
| T624 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.3882463915 |
|
|
Apr 25 02:02:24 PM PDT 24 |
Apr 25 02:02:29 PM PDT 24 |
1440543170 ps |
| T253 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.1624614307 |
|
|
Apr 25 02:10:05 PM PDT 24 |
Apr 25 02:10:14 PM PDT 24 |
20751659442 ps |
| T625 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.4288515680 |
|
|
Apr 25 01:59:42 PM PDT 24 |
Apr 25 01:59:46 PM PDT 24 |
194223524 ps |
| T626 |
/workspace/coverage/default/20.spi_device_tpm_read_hw_reg.2696089629 |
|
|
Apr 25 02:02:36 PM PDT 24 |
Apr 25 02:02:41 PM PDT 24 |
1507272260 ps |
| T230 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.3111917817 |
|
|
Apr 25 02:02:32 PM PDT 24 |
Apr 25 02:02:38 PM PDT 24 |
1270720834 ps |
| T381 |
/workspace/coverage/default/31.spi_device_tpm_all.3852802157 |
|
|
Apr 25 02:05:28 PM PDT 24 |
Apr 25 02:06:09 PM PDT 24 |
28221389940 ps |
| T243 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.2470065425 |
|
|
Apr 25 02:03:54 PM PDT 24 |
Apr 25 02:03:58 PM PDT 24 |
923967806 ps |
| T303 |
/workspace/coverage/default/12.spi_device_upload.780429605 |
|
|
Apr 25 02:01:03 PM PDT 24 |
Apr 25 02:01:08 PM PDT 24 |
695747188 ps |
| T221 |
/workspace/coverage/default/45.spi_device_intercept.731696728 |
|
|
Apr 25 02:10:16 PM PDT 24 |
Apr 25 02:10:20 PM PDT 24 |
219780344 ps |
| T627 |
/workspace/coverage/default/19.spi_device_csb_read.771607160 |
|
|
Apr 25 02:02:19 PM PDT 24 |
Apr 25 02:02:21 PM PDT 24 |
13977606 ps |
| T359 |
/workspace/coverage/default/41.spi_device_flash_mode.437184765 |
|
|
Apr 25 02:09:01 PM PDT 24 |
Apr 25 02:09:42 PM PDT 24 |
6399632738 ps |
| T628 |
/workspace/coverage/default/12.spi_device_csb_read.3853100772 |
|
|
Apr 25 02:00:46 PM PDT 24 |
Apr 25 02:00:48 PM PDT 24 |
54226548 ps |
| T219 |
/workspace/coverage/default/46.spi_device_pass_cmd_filtering.1710531923 |
|
|
Apr 25 02:10:29 PM PDT 24 |
Apr 25 02:10:37 PM PDT 24 |
7490915103 ps |
| T167 |
/workspace/coverage/default/36.spi_device_stress_all.2761583785 |
|
|
Apr 25 02:07:22 PM PDT 24 |
Apr 25 02:07:23 PM PDT 24 |
242699807 ps |
| T629 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.1870180617 |
|
|
Apr 25 02:08:39 PM PDT 24 |
Apr 25 02:08:52 PM PDT 24 |
2077427488 ps |
| T630 |
/workspace/coverage/default/4.spi_device_tpm_read_hw_reg.52956495 |
|
|
Apr 25 01:58:58 PM PDT 24 |
Apr 25 01:59:01 PM PDT 24 |
626795648 ps |
| T631 |
/workspace/coverage/default/27.spi_device_intercept.664369374 |
|
|
Apr 25 02:04:25 PM PDT 24 |
Apr 25 02:04:30 PM PDT 24 |
689861202 ps |
| T632 |
/workspace/coverage/default/19.spi_device_tpm_sts_read.441480250 |
|
|
Apr 25 02:02:24 PM PDT 24 |
Apr 25 02:02:26 PM PDT 24 |
26468287 ps |
| T249 |
/workspace/coverage/default/25.spi_device_intercept.369481837 |
|
|
Apr 25 02:03:48 PM PDT 24 |
Apr 25 02:03:51 PM PDT 24 |
210600404 ps |
| T284 |
/workspace/coverage/default/29.spi_device_pass_cmd_filtering.3947797181 |
|
|
Apr 25 02:05:04 PM PDT 24 |
Apr 25 02:05:12 PM PDT 24 |
938734835 ps |
| T633 |
/workspace/coverage/default/21.spi_device_tpm_rw.2633989076 |
|
|
Apr 25 02:02:53 PM PDT 24 |
Apr 25 02:02:55 PM PDT 24 |
103061366 ps |
| T634 |
/workspace/coverage/default/39.spi_device_flash_mode.2840088125 |
|
|
Apr 25 02:08:23 PM PDT 24 |
Apr 25 02:10:21 PM PDT 24 |
7479120513 ps |
| T315 |
/workspace/coverage/default/6.spi_device_cfg_cmd.3819448885 |
|
|
Apr 25 01:59:34 PM PDT 24 |
Apr 25 01:59:56 PM PDT 24 |
2647327545 ps |
| T387 |
/workspace/coverage/default/6.spi_device_tpm_all.3230033618 |
|
|
Apr 25 01:59:23 PM PDT 24 |
Apr 25 01:59:41 PM PDT 24 |
2029271506 ps |
| T635 |
/workspace/coverage/default/18.spi_device_tpm_all.3548280025 |
|
|
Apr 25 02:02:13 PM PDT 24 |
Apr 25 02:03:08 PM PDT 24 |
11028768853 ps |
| T636 |
/workspace/coverage/default/49.spi_device_tpm_rw.4222195530 |
|
|
Apr 25 02:10:48 PM PDT 24 |
Apr 25 02:10:51 PM PDT 24 |
1634440816 ps |
| T357 |
/workspace/coverage/default/36.spi_device_flash_mode.2976286454 |
|
|
Apr 25 02:07:22 PM PDT 24 |
Apr 25 02:07:56 PM PDT 24 |
2908893232 ps |
| T637 |
/workspace/coverage/default/4.spi_device_alert_test.1256381464 |
|
|
Apr 25 01:59:11 PM PDT 24 |
Apr 25 01:59:13 PM PDT 24 |
27118022 ps |
| T638 |
/workspace/coverage/default/34.spi_device_read_buffer_direct.3828293184 |
|
|
Apr 25 02:06:37 PM PDT 24 |
Apr 25 02:06:42 PM PDT 24 |
878293317 ps |
| T639 |
/workspace/coverage/default/9.spi_device_intercept.1820355487 |
|
|
Apr 25 02:00:16 PM PDT 24 |
Apr 25 02:00:20 PM PDT 24 |
1025621112 ps |
| T640 |
/workspace/coverage/default/3.spi_device_tpm_read_hw_reg.2867355026 |
|
|
Apr 25 01:58:42 PM PDT 24 |
Apr 25 01:59:02 PM PDT 24 |
10650352576 ps |
| T641 |
/workspace/coverage/default/7.spi_device_tpm_read_hw_reg.1580037351 |
|
|
Apr 25 01:59:45 PM PDT 24 |
Apr 25 02:00:02 PM PDT 24 |
7186934123 ps |
| T49 |
/workspace/coverage/default/2.spi_device_sec_cm.1664345020 |
|
|
Apr 25 01:58:41 PM PDT 24 |
Apr 25 01:58:43 PM PDT 24 |
60524899 ps |
| T642 |
/workspace/coverage/default/18.spi_device_csb_read.116747293 |
|
|
Apr 25 02:02:09 PM PDT 24 |
Apr 25 02:02:10 PM PDT 24 |
30768911 ps |
| T208 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.2868845205 |
|
|
Apr 25 01:58:19 PM PDT 24 |
Apr 25 01:58:25 PM PDT 24 |
1108975734 ps |
| T285 |
/workspace/coverage/default/15.spi_device_flash_mode.3859048789 |
|
|
Apr 25 02:01:40 PM PDT 24 |
Apr 25 02:02:21 PM PDT 24 |
8281008865 ps |
| T643 |
/workspace/coverage/default/31.spi_device_csb_read.791151680 |
|
|
Apr 25 02:05:28 PM PDT 24 |
Apr 25 02:05:30 PM PDT 24 |
42479650 ps |
| T644 |
/workspace/coverage/default/18.spi_device_mem_parity.3594271386 |
|
|
Apr 25 02:02:08 PM PDT 24 |
Apr 25 02:02:10 PM PDT 24 |
50920662 ps |
| T349 |
/workspace/coverage/default/9.spi_device_mailbox.3993687926 |
|
|
Apr 25 02:00:14 PM PDT 24 |
Apr 25 02:05:05 PM PDT 24 |
44826511893 ps |
| T382 |
/workspace/coverage/default/34.spi_device_tpm_all.2781505691 |
|
|
Apr 25 02:06:24 PM PDT 24 |
Apr 25 02:06:48 PM PDT 24 |
3574059161 ps |
| T314 |
/workspace/coverage/default/46.spi_device_mailbox.2415977316 |
|
|
Apr 25 02:10:30 PM PDT 24 |
Apr 25 02:11:05 PM PDT 24 |
10800784590 ps |
| T645 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.3700907441 |
|
|
Apr 25 01:57:47 PM PDT 24 |
Apr 25 01:57:49 PM PDT 24 |
489774751 ps |
| T388 |
/workspace/coverage/default/25.spi_device_tpm_all.2123693273 |
|
|
Apr 25 02:03:43 PM PDT 24 |
Apr 25 02:03:47 PM PDT 24 |
629717297 ps |
| T353 |
/workspace/coverage/default/45.spi_device_flash_mode.3916118420 |
|
|
Apr 25 02:10:16 PM PDT 24 |
Apr 25 02:10:40 PM PDT 24 |
3939310421 ps |
| T646 |
/workspace/coverage/default/13.spi_device_tpm_read_hw_reg.2523583686 |
|
|
Apr 25 02:01:06 PM PDT 24 |
Apr 25 02:01:09 PM PDT 24 |
3551738324 ps |
| T647 |
/workspace/coverage/default/26.spi_device_alert_test.4088221650 |
|
|
Apr 25 02:04:17 PM PDT 24 |
Apr 25 02:04:18 PM PDT 24 |
18986509 ps |
| T648 |
/workspace/coverage/default/13.spi_device_read_buffer_direct.1502045757 |
|
|
Apr 25 02:01:12 PM PDT 24 |
Apr 25 02:01:27 PM PDT 24 |
2723786830 ps |
| T324 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.1913568160 |
|
|
Apr 25 02:02:14 PM PDT 24 |
Apr 25 02:02:19 PM PDT 24 |
1051352820 ps |
| T323 |
/workspace/coverage/default/26.spi_device_upload.1826914531 |
|
|
Apr 25 02:04:08 PM PDT 24 |
Apr 25 02:04:18 PM PDT 24 |
1714831261 ps |
| T649 |
/workspace/coverage/default/46.spi_device_tpm_sts_read.4183461376 |
|
|
Apr 25 02:10:22 PM PDT 24 |
Apr 25 02:10:24 PM PDT 24 |
42449245 ps |
| T650 |
/workspace/coverage/default/49.spi_device_csb_read.629628720 |
|
|
Apr 25 02:10:47 PM PDT 24 |
Apr 25 02:10:48 PM PDT 24 |
50874398 ps |
| T311 |
/workspace/coverage/default/40.spi_device_cfg_cmd.2350358615 |
|
|
Apr 25 02:08:39 PM PDT 24 |
Apr 25 02:08:52 PM PDT 24 |
1772158303 ps |
| T651 |
/workspace/coverage/default/11.spi_device_tpm_rw.1350124069 |
|
|
Apr 25 02:00:36 PM PDT 24 |
Apr 25 02:00:38 PM PDT 24 |
22772079 ps |
| T652 |
/workspace/coverage/default/44.spi_device_tpm_read_hw_reg.4078842865 |
|
|
Apr 25 02:10:12 PM PDT 24 |
Apr 25 02:10:42 PM PDT 24 |
79172588938 ps |
| T653 |
/workspace/coverage/default/26.spi_device_csb_read.807345816 |
|
|
Apr 25 02:04:01 PM PDT 24 |
Apr 25 02:04:02 PM PDT 24 |
19860658 ps |
| T654 |
/workspace/coverage/default/18.spi_device_flash_mode.3602872149 |
|
|
Apr 25 02:02:22 PM PDT 24 |
Apr 25 02:02:35 PM PDT 24 |
1846874850 ps |
| T307 |
/workspace/coverage/default/22.spi_device_intercept.3019468448 |
|
|
Apr 25 02:03:07 PM PDT 24 |
Apr 25 02:03:11 PM PDT 24 |
192501626 ps |
| T655 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.733886021 |
|
|
Apr 25 02:10:41 PM PDT 24 |
Apr 25 02:10:42 PM PDT 24 |
191439828 ps |
| T656 |
/workspace/coverage/default/13.spi_device_alert_test.211373177 |
|
|
Apr 25 02:01:13 PM PDT 24 |
Apr 25 02:01:15 PM PDT 24 |
14525293 ps |
| T657 |
/workspace/coverage/default/30.spi_device_alert_test.3332739538 |
|
|
Apr 25 02:05:28 PM PDT 24 |
Apr 25 02:05:30 PM PDT 24 |
13904482 ps |
| T272 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.923069557 |
|
|
Apr 25 02:01:34 PM PDT 24 |
Apr 25 02:01:40 PM PDT 24 |
1769970301 ps |
| T270 |
/workspace/coverage/default/14.spi_device_mailbox.1449042001 |
|
|
Apr 25 02:01:23 PM PDT 24 |
Apr 25 02:02:25 PM PDT 24 |
7794537438 ps |
| T658 |
/workspace/coverage/default/14.spi_device_tpm_sts_read.86697840 |
|
|
Apr 25 02:01:18 PM PDT 24 |
Apr 25 02:01:19 PM PDT 24 |
97668003 ps |
| T223 |
/workspace/coverage/default/28.spi_device_mailbox.4174609430 |
|
|
Apr 25 02:04:42 PM PDT 24 |
Apr 25 02:04:56 PM PDT 24 |
5705435820 ps |
| T659 |
/workspace/coverage/default/8.spi_device_csb_read.848399749 |
|
|
Apr 25 01:59:52 PM PDT 24 |
Apr 25 01:59:53 PM PDT 24 |
52030795 ps |
| T383 |
/workspace/coverage/default/22.spi_device_tpm_all.3717103375 |
|
|
Apr 25 02:03:04 PM PDT 24 |
Apr 25 02:03:37 PM PDT 24 |
12621634504 ps |
| T660 |
/workspace/coverage/default/15.spi_device_tpm_all.519309321 |
|
|
Apr 25 02:01:36 PM PDT 24 |
Apr 25 02:01:39 PM PDT 24 |
256301004 ps |
| T661 |
/workspace/coverage/default/2.spi_device_tpm_all.974058163 |
|
|
Apr 25 01:58:29 PM PDT 24 |
Apr 25 01:58:33 PM PDT 24 |
1191426945 ps |
| T662 |
/workspace/coverage/default/13.spi_device_pass_cmd_filtering.4076505737 |
|
|
Apr 25 02:01:09 PM PDT 24 |
Apr 25 02:01:13 PM PDT 24 |
123969880 ps |
| T663 |
/workspace/coverage/default/48.spi_device_alert_test.482400071 |
|
|
Apr 25 02:10:44 PM PDT 24 |
Apr 25 02:10:45 PM PDT 24 |
74641847 ps |
| T664 |
/workspace/coverage/default/41.spi_device_tpm_read_hw_reg.2286360470 |
|
|
Apr 25 02:08:44 PM PDT 24 |
Apr 25 02:08:52 PM PDT 24 |
5207679340 ps |
| T665 |
/workspace/coverage/default/6.spi_device_tpm_read_hw_reg.3858215652 |
|
|
Apr 25 01:59:26 PM PDT 24 |
Apr 25 01:59:43 PM PDT 24 |
22468104266 ps |
| T666 |
/workspace/coverage/default/48.spi_device_tpm_rw.378940439 |
|
|
Apr 25 02:10:39 PM PDT 24 |
Apr 25 02:10:43 PM PDT 24 |
55220760 ps |
| T355 |
/workspace/coverage/default/9.spi_device_flash_mode.1214527912 |
|
|
Apr 25 02:00:20 PM PDT 24 |
Apr 25 02:01:32 PM PDT 24 |
10213952961 ps |
| T667 |
/workspace/coverage/default/4.spi_device_flash_mode.2138014048 |
|
|
Apr 25 01:59:07 PM PDT 24 |
Apr 25 01:59:21 PM PDT 24 |
7556274463 ps |
| T250 |
/workspace/coverage/default/19.spi_device_cfg_cmd.202066560 |
|
|
Apr 25 02:02:26 PM PDT 24 |
Apr 25 02:02:33 PM PDT 24 |
7032576166 ps |
| T256 |
/workspace/coverage/default/15.spi_device_intercept.3731684449 |
|
|
Apr 25 02:01:35 PM PDT 24 |
Apr 25 02:01:41 PM PDT 24 |
432590983 ps |
| T87 |
/workspace/coverage/default/41.spi_device_pass_addr_payload_swap.789400941 |
|
|
Apr 25 02:08:50 PM PDT 24 |
Apr 25 02:09:15 PM PDT 24 |
8664555357 ps |
| T668 |
/workspace/coverage/default/1.spi_device_flash_mode.3106484529 |
|
|
Apr 25 01:58:23 PM PDT 24 |
Apr 25 01:59:28 PM PDT 24 |
23157968041 ps |
| T374 |
/workspace/coverage/default/30.spi_device_upload.856804957 |
|
|
Apr 25 02:05:21 PM PDT 24 |
Apr 25 02:05:28 PM PDT 24 |
3404410660 ps |
| T339 |
/workspace/coverage/default/47.spi_device_pass_cmd_filtering.1248250044 |
|
|
Apr 25 02:10:27 PM PDT 24 |
Apr 25 02:10:44 PM PDT 24 |
33860524672 ps |
| T669 |
/workspace/coverage/default/27.spi_device_flash_mode.1001188010 |
|
|
Apr 25 02:04:32 PM PDT 24 |
Apr 25 02:05:40 PM PDT 24 |
31081263498 ps |
| T205 |
/workspace/coverage/default/29.spi_device_pass_addr_payload_swap.3996905615 |
|
|
Apr 25 02:05:03 PM PDT 24 |
Apr 25 02:05:21 PM PDT 24 |
3214084123 ps |
| T240 |
/workspace/coverage/default/10.spi_device_pass_cmd_filtering.1253361587 |
|
|
Apr 25 02:00:27 PM PDT 24 |
Apr 25 02:00:54 PM PDT 24 |
13358262872 ps |
| T670 |
/workspace/coverage/default/2.spi_device_mem_parity.1211533629 |
|
|
Apr 25 01:58:31 PM PDT 24 |
Apr 25 01:58:33 PM PDT 24 |
32275651 ps |
| T671 |
/workspace/coverage/default/4.spi_device_stress_all.3610070957 |
|
|
Apr 25 01:59:11 PM PDT 24 |
Apr 25 01:59:12 PM PDT 24 |
190908690 ps |
| T672 |
/workspace/coverage/default/42.spi_device_tpm_sts_read.2648464134 |
|
|
Apr 25 02:09:21 PM PDT 24 |
Apr 25 02:09:23 PM PDT 24 |
495824972 ps |
| T673 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.1597007137 |
|
|
Apr 25 02:02:08 PM PDT 24 |
Apr 25 02:02:30 PM PDT 24 |
7579299935 ps |
| T319 |
/workspace/coverage/default/48.spi_device_upload.2330918948 |
|
|
Apr 25 02:10:38 PM PDT 24 |
Apr 25 02:10:52 PM PDT 24 |
4322423913 ps |
| T674 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.2911492886 |
|
|
Apr 25 02:08:49 PM PDT 24 |
Apr 25 02:08:50 PM PDT 24 |
55655981 ps |
| T675 |
/workspace/coverage/default/2.spi_device_tpm_rw.2164171979 |
|
|
Apr 25 01:58:34 PM PDT 24 |
Apr 25 01:58:36 PM PDT 24 |
497112064 ps |
| T676 |
/workspace/coverage/default/14.spi_device_mem_parity.3286339698 |
|
|
Apr 25 02:01:20 PM PDT 24 |
Apr 25 02:01:22 PM PDT 24 |
35592536 ps |
| T677 |
/workspace/coverage/default/4.spi_device_tpm_rw.3547613417 |
|
|
Apr 25 01:59:05 PM PDT 24 |
Apr 25 01:59:07 PM PDT 24 |
132352501 ps |
| T342 |
/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.3189042942 |
|
|
Apr 25 02:06:31 PM PDT 24 |
Apr 25 02:06:47 PM PDT 24 |
22895847143 ps |
| T384 |
/workspace/coverage/default/44.spi_device_tpm_all.442935965 |
|
|
Apr 25 02:09:56 PM PDT 24 |
Apr 25 02:10:31 PM PDT 24 |
20398871759 ps |
| T678 |
/workspace/coverage/default/34.spi_device_flash_mode.2926536640 |
|
|
Apr 25 02:06:36 PM PDT 24 |
Apr 25 02:07:05 PM PDT 24 |
2805270668 ps |
| T679 |
/workspace/coverage/default/3.spi_device_tpm_rw.1377895925 |
|
|
Apr 25 01:58:49 PM PDT 24 |
Apr 25 01:58:52 PM PDT 24 |
946493977 ps |
| T283 |
/workspace/coverage/default/2.spi_device_pass_addr_payload_swap.3867085040 |
|
|
Apr 25 01:58:33 PM PDT 24 |
Apr 25 01:58:45 PM PDT 24 |
3277530102 ps |
| T680 |
/workspace/coverage/default/8.spi_device_tpm_all.3822643226 |
|
|
Apr 25 01:59:53 PM PDT 24 |
Apr 25 02:00:35 PM PDT 24 |
4742206523 ps |
| T337 |
/workspace/coverage/default/22.spi_device_cfg_cmd.2506169437 |
|
|
Apr 25 02:03:08 PM PDT 24 |
Apr 25 02:03:29 PM PDT 24 |
8044055163 ps |
| T681 |
/workspace/coverage/default/3.spi_device_flash_mode.2396934776 |
|
|
Apr 25 01:58:56 PM PDT 24 |
Apr 25 01:59:10 PM PDT 24 |
446834653 ps |
| T682 |
/workspace/coverage/default/4.spi_device_mem_parity.3679540653 |
|
|
Apr 25 01:58:58 PM PDT 24 |
Apr 25 01:59:00 PM PDT 24 |
25066821 ps |
| T683 |
/workspace/coverage/default/14.spi_device_tpm_read_hw_reg.597567980 |
|
|
Apr 25 02:01:20 PM PDT 24 |
Apr 25 02:01:26 PM PDT 24 |
710686750 ps |
| T684 |
/workspace/coverage/default/4.spi_device_tpm_all.3282794420 |
|
|
Apr 25 01:58:59 PM PDT 24 |
Apr 25 01:59:47 PM PDT 24 |
12235891500 ps |
| T308 |
/workspace/coverage/default/42.spi_device_intercept.3572037831 |
|
|
Apr 25 02:09:27 PM PDT 24 |
Apr 25 02:09:31 PM PDT 24 |
191598014 ps |
| T685 |
/workspace/coverage/default/17.spi_device_tpm_sts_read.429695193 |
|
|
Apr 25 02:01:56 PM PDT 24 |
Apr 25 02:01:58 PM PDT 24 |
312797972 ps |
| T686 |
/workspace/coverage/default/24.spi_device_stress_all.73862636 |
|
|
Apr 25 02:03:43 PM PDT 24 |
Apr 25 02:03:44 PM PDT 24 |
47950310 ps |
| T687 |
/workspace/coverage/default/25.spi_device_csb_read.2208982717 |
|
|
Apr 25 02:03:43 PM PDT 24 |
Apr 25 02:03:44 PM PDT 24 |
14381103 ps |
| T688 |
/workspace/coverage/default/44.spi_device_tpm_rw.274141150 |
|
|
Apr 25 02:10:03 PM PDT 24 |
Apr 25 02:10:04 PM PDT 24 |
75650108 ps |
| T358 |
/workspace/coverage/default/4.spi_device_intercept.2589192504 |
|
|
Apr 25 01:59:05 PM PDT 24 |
Apr 25 01:59:09 PM PDT 24 |
339481637 ps |
| T689 |
/workspace/coverage/default/12.spi_device_tpm_sts_read.1585744350 |
|
|
Apr 25 02:00:56 PM PDT 24 |
Apr 25 02:00:57 PM PDT 24 |
52168928 ps |
| T690 |
/workspace/coverage/default/24.spi_device_tpm_rw.551914893 |
|
|
Apr 25 02:03:33 PM PDT 24 |
Apr 25 02:03:35 PM PDT 24 |
182360652 ps |
| T691 |
/workspace/coverage/default/15.spi_device_mailbox.2206939400 |
|
|
Apr 25 02:01:34 PM PDT 24 |
Apr 25 02:01:37 PM PDT 24 |
135175267 ps |
| T692 |
/workspace/coverage/default/30.spi_device_tpm_rw.3947180873 |
|
|
Apr 25 02:05:15 PM PDT 24 |
Apr 25 02:05:17 PM PDT 24 |
195186745 ps |
| T206 |
/workspace/coverage/default/3.spi_device_intercept.3875197052 |
|
|
Apr 25 01:58:55 PM PDT 24 |
Apr 25 01:58:59 PM PDT 24 |
107523334 ps |
| T312 |
/workspace/coverage/default/39.spi_device_mailbox.1325769413 |
|
|
Apr 25 02:08:18 PM PDT 24 |
Apr 25 02:08:35 PM PDT 24 |
807052076 ps |
| T693 |
/workspace/coverage/default/12.spi_device_tpm_read_hw_reg.1868707858 |
|
|
Apr 25 02:00:46 PM PDT 24 |
Apr 25 02:00:59 PM PDT 24 |
7576737698 ps |
| T694 |
/workspace/coverage/default/29.spi_device_flash_mode.1424492203 |
|
|
Apr 25 02:05:08 PM PDT 24 |
Apr 25 02:05:20 PM PDT 24 |
351504603 ps |
| T695 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.1710269396 |
|
|
Apr 25 02:03:04 PM PDT 24 |
Apr 25 02:03:12 PM PDT 24 |
1282522549 ps |
| T696 |
/workspace/coverage/default/33.spi_device_tpm_sts_read.3795915607 |
|
|
Apr 25 02:06:05 PM PDT 24 |
Apr 25 02:06:06 PM PDT 24 |
76229471 ps |
| T697 |
/workspace/coverage/default/31.spi_device_tpm_read_hw_reg.1976084805 |
|
|
Apr 25 02:05:28 PM PDT 24 |
Apr 25 02:05:34 PM PDT 24 |
897331268 ps |
| T287 |
/workspace/coverage/default/32.spi_device_flash_mode.3620797573 |
|
|
Apr 25 02:05:58 PM PDT 24 |
Apr 25 02:07:01 PM PDT 24 |
24998396529 ps |
| T698 |
/workspace/coverage/default/6.spi_device_tpm_sts_read.1498299833 |
|
|
Apr 25 01:59:33 PM PDT 24 |
Apr 25 01:59:34 PM PDT 24 |
109657129 ps |
| T699 |
/workspace/coverage/default/30.spi_device_csb_read.3806197984 |
|
|
Apr 25 02:05:14 PM PDT 24 |
Apr 25 02:05:15 PM PDT 24 |
19734820 ps |
| T700 |
/workspace/coverage/default/45.spi_device_csb_read.3646007436 |
|
|
Apr 25 02:10:09 PM PDT 24 |
Apr 25 02:10:10 PM PDT 24 |
19778236 ps |
| T701 |
/workspace/coverage/default/21.spi_device_tpm_read_hw_reg.2058458142 |
|
|
Apr 25 02:02:53 PM PDT 24 |
Apr 25 02:03:01 PM PDT 24 |
2105341677 ps |
| T702 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.3709430539 |
|
|
Apr 25 01:59:57 PM PDT 24 |
Apr 25 01:59:58 PM PDT 24 |
130512852 ps |
| T245 |
/workspace/coverage/default/47.spi_device_pass_addr_payload_swap.3042924301 |
|
|
Apr 25 02:10:32 PM PDT 24 |
Apr 25 02:10:38 PM PDT 24 |
1837422975 ps |
| T703 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.2940179883 |
|
|
Apr 25 02:00:30 PM PDT 24 |
Apr 25 02:00:50 PM PDT 24 |
3986907939 ps |
| T704 |
/workspace/coverage/default/16.spi_device_tpm_read_hw_reg.60919974 |
|
|
Apr 25 02:01:50 PM PDT 24 |
Apr 25 02:02:06 PM PDT 24 |
5660177273 ps |
| T705 |
/workspace/coverage/default/3.spi_device_tpm_all.3464517695 |
|
|
Apr 25 01:58:48 PM PDT 24 |
Apr 25 01:59:39 PM PDT 24 |
33165581908 ps |
| T50 |
/workspace/coverage/default/3.spi_device_sec_cm.374987435 |
|
|
Apr 25 01:58:59 PM PDT 24 |
Apr 25 01:59:01 PM PDT 24 |
79005518 ps |
| T706 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.1418284529 |
|
|
Apr 25 01:58:11 PM PDT 24 |
Apr 25 01:58:14 PM PDT 24 |
190772361 ps |
| T707 |
/workspace/coverage/default/1.spi_device_read_buffer_direct.1211921824 |
|
|
Apr 25 01:58:23 PM PDT 24 |
Apr 25 01:58:29 PM PDT 24 |
342461723 ps |
| T708 |
/workspace/coverage/default/16.spi_device_tpm_sts_read.3161515167 |
|
|
Apr 25 02:01:46 PM PDT 24 |
Apr 25 02:01:48 PM PDT 24 |
199327799 ps |
| T709 |
/workspace/coverage/default/6.spi_device_tpm_rw.2080004957 |
|
|
Apr 25 01:59:40 PM PDT 24 |
Apr 25 01:59:46 PM PDT 24 |
222179022 ps |
| T168 |
/workspace/coverage/default/25.spi_device_stress_all.1235940240 |
|
|
Apr 25 02:04:01 PM PDT 24 |
Apr 25 02:04:03 PM PDT 24 |
219490049 ps |
| T195 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.363344557 |
|
|
Apr 25 02:07:28 PM PDT 24 |
Apr 25 02:07:35 PM PDT 24 |
2625601880 ps |
| T305 |
/workspace/coverage/default/35.spi_device_upload.857583769 |
|
|
Apr 25 02:06:55 PM PDT 24 |
Apr 25 02:06:58 PM PDT 24 |
1633182921 ps |
| T710 |
/workspace/coverage/default/24.spi_device_mailbox.2026198181 |
|
|
Apr 25 02:03:39 PM PDT 24 |
Apr 25 02:03:47 PM PDT 24 |
461406241 ps |
| T711 |
/workspace/coverage/default/10.spi_device_mem_parity.47143489 |
|
|
Apr 25 02:00:27 PM PDT 24 |
Apr 25 02:00:28 PM PDT 24 |
33940327 ps |
| T246 |
/workspace/coverage/default/38.spi_device_intercept.3314313855 |
|
|
Apr 25 02:07:52 PM PDT 24 |
Apr 25 02:08:06 PM PDT 24 |
2002186970 ps |
| T712 |
/workspace/coverage/default/44.spi_device_tpm_sts_read.4249956538 |
|
|
Apr 25 02:09:58 PM PDT 24 |
Apr 25 02:09:59 PM PDT 24 |
30059061 ps |
| T713 |
/workspace/coverage/default/34.spi_device_alert_test.1244981520 |
|
|
Apr 25 02:06:43 PM PDT 24 |
Apr 25 02:06:44 PM PDT 24 |
48190943 ps |
| T714 |
/workspace/coverage/default/47.spi_device_tpm_sts_read.2293868842 |
|
|
Apr 25 02:10:30 PM PDT 24 |
Apr 25 02:10:31 PM PDT 24 |
59750925 ps |
| T715 |
/workspace/coverage/default/31.spi_device_tpm_rw.1726589936 |
|
|
Apr 25 02:05:28 PM PDT 24 |
Apr 25 02:05:30 PM PDT 24 |
95979507 ps |
| T325 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.3716566032 |
|
|
Apr 25 01:58:18 PM PDT 24 |
Apr 25 01:58:24 PM PDT 24 |
749509030 ps |
| T716 |
/workspace/coverage/default/1.spi_device_intercept.2144596549 |
|
|
Apr 25 01:58:17 PM PDT 24 |
Apr 25 01:58:30 PM PDT 24 |
1519951616 ps |
| T717 |
/workspace/coverage/default/14.spi_device_tpm_rw.2645846827 |
|
|
Apr 25 02:01:24 PM PDT 24 |
Apr 25 02:01:26 PM PDT 24 |
259587495 ps |
| T718 |
/workspace/coverage/default/2.spi_device_tpm_sts_read.883356058 |
|
|
Apr 25 01:58:35 PM PDT 24 |
Apr 25 01:58:37 PM PDT 24 |
297114117 ps |
| T719 |
/workspace/coverage/default/2.spi_device_read_buffer_direct.1681570654 |
|
|
Apr 25 01:58:41 PM PDT 24 |
Apr 25 01:58:46 PM PDT 24 |
148150982 ps |
| T306 |
/workspace/coverage/default/40.spi_device_mailbox.2158588563 |
|
|
Apr 25 02:08:37 PM PDT 24 |
Apr 25 02:09:03 PM PDT 24 |
3008246111 ps |
| T720 |
/workspace/coverage/default/16.spi_device_tpm_all.1777523529 |
|
|
Apr 25 02:01:47 PM PDT 24 |
Apr 25 02:02:04 PM PDT 24 |
2566583536 ps |
| T721 |
/workspace/coverage/default/35.spi_device_tpm_rw.4028621409 |
|
|
Apr 25 02:06:52 PM PDT 24 |
Apr 25 02:06:55 PM PDT 24 |
121141172 ps |
| T722 |
/workspace/coverage/default/13.spi_device_tpm_sts_read.1607347726 |
|
|
Apr 25 02:01:08 PM PDT 24 |
Apr 25 02:01:10 PM PDT 24 |
48052726 ps |
| T723 |
/workspace/coverage/default/27.spi_device_read_buffer_direct.3349175202 |
|
|
Apr 25 02:04:30 PM PDT 24 |
Apr 25 02:04:36 PM PDT 24 |
680307027 ps |
| T385 |
/workspace/coverage/default/20.spi_device_tpm_all.3917956679 |
|
|
Apr 25 02:02:36 PM PDT 24 |
Apr 25 02:02:54 PM PDT 24 |
12625417471 ps |
| T724 |
/workspace/coverage/default/5.spi_device_upload.353156123 |
|
|
Apr 25 01:59:16 PM PDT 24 |
Apr 25 01:59:28 PM PDT 24 |
5999075601 ps |
| T725 |
/workspace/coverage/default/37.spi_device_tpm_all.592269210 |
|
|
Apr 25 02:07:30 PM PDT 24 |
Apr 25 02:07:33 PM PDT 24 |
385697281 ps |
| T726 |
/workspace/coverage/default/32.spi_device_tpm_all.181266407 |
|
|
Apr 25 02:05:51 PM PDT 24 |
Apr 25 02:06:39 PM PDT 24 |
58346246279 ps |
| T727 |
/workspace/coverage/default/5.spi_device_csb_read.2016241044 |
|
|
Apr 25 01:59:11 PM PDT 24 |
Apr 25 01:59:12 PM PDT 24 |
53196494 ps |
| T300 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.857463574 |
|
|
Apr 25 02:00:54 PM PDT 24 |
Apr 25 02:00:59 PM PDT 24 |
1335443143 ps |
| T334 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.1747796965 |
|
|
Apr 25 02:06:31 PM PDT 24 |
Apr 25 02:06:43 PM PDT 24 |
4409713840 ps |
| T728 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.4176740585 |
|
|
Apr 25 02:06:19 PM PDT 24 |
Apr 25 02:06:32 PM PDT 24 |
4377174772 ps |
| T729 |
/workspace/coverage/default/37.spi_device_flash_mode.1760719822 |
|
|
Apr 25 02:07:34 PM PDT 24 |
Apr 25 02:07:52 PM PDT 24 |
508440095 ps |
| T332 |
/workspace/coverage/default/32.spi_device_mailbox.3458758477 |
|
|
Apr 25 02:05:59 PM PDT 24 |
Apr 25 02:06:24 PM PDT 24 |
1827250131 ps |
| T336 |
/workspace/coverage/default/30.spi_device_pass_cmd_filtering.4120670273 |
|
|
Apr 25 02:05:17 PM PDT 24 |
Apr 25 02:05:39 PM PDT 24 |
28078371346 ps |
| T730 |
/workspace/coverage/default/32.spi_device_tpm_read_hw_reg.544619893 |
|
|
Apr 25 02:05:51 PM PDT 24 |
Apr 25 02:05:55 PM PDT 24 |
905027750 ps |
| T731 |
/workspace/coverage/default/46.spi_device_alert_test.4056266116 |
|
|
Apr 25 02:10:30 PM PDT 24 |
Apr 25 02:10:31 PM PDT 24 |
15802556 ps |
| T732 |
/workspace/coverage/default/29.spi_device_alert_test.1427432502 |
|
|
Apr 25 02:05:16 PM PDT 24 |
Apr 25 02:05:17 PM PDT 24 |
13540047 ps |
| T733 |
/workspace/coverage/default/22.spi_device_mailbox.1381625674 |
|
|
Apr 25 02:03:07 PM PDT 24 |
Apr 25 02:04:49 PM PDT 24 |
9970203619 ps |
| T213 |
/workspace/coverage/default/49.spi_device_pass_cmd_filtering.2732182094 |
|
|
Apr 25 02:10:51 PM PDT 24 |
Apr 25 02:11:09 PM PDT 24 |
6938547225 ps |
| T734 |
/workspace/coverage/default/33.spi_device_stress_all.2739411046 |
|
|
Apr 25 02:06:19 PM PDT 24 |
Apr 25 02:06:21 PM PDT 24 |
75370721 ps |
| T735 |
/workspace/coverage/default/26.spi_device_tpm_all.1189724588 |
|
|
Apr 25 02:04:02 PM PDT 24 |
Apr 25 02:04:37 PM PDT 24 |
2756695764 ps |
| T736 |
/workspace/coverage/default/0.spi_device_flash_mode.604470010 |
|
|
Apr 25 01:57:53 PM PDT 24 |
Apr 25 01:58:30 PM PDT 24 |
8569925485 ps |
| T737 |
/workspace/coverage/default/12.spi_device_read_buffer_direct.1381947412 |
|
|
Apr 25 02:00:59 PM PDT 24 |
Apr 25 02:01:07 PM PDT 24 |
449828471 ps |
| T350 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.3002175684 |
|
|
Apr 25 02:07:53 PM PDT 24 |
Apr 25 02:07:58 PM PDT 24 |
209133819 ps |
| T738 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.3957786950 |
|
|
Apr 25 12:42:16 PM PDT 24 |
Apr 25 12:42:21 PM PDT 24 |
12222891 ps |
| T133 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3958589438 |
|
|
Apr 25 12:42:09 PM PDT 24 |
Apr 25 12:42:15 PM PDT 24 |
21626483 ps |
| T169 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.3813968827 |
|
|
Apr 25 12:42:07 PM PDT 24 |
Apr 25 12:42:12 PM PDT 24 |
21005054 ps |
| T170 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.2626693066 |
|
|
Apr 25 12:42:04 PM PDT 24 |
Apr 25 12:42:07 PM PDT 24 |
267293514 ps |
| T39 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1395838686 |
|
|
Apr 25 12:42:04 PM PDT 24 |
Apr 25 12:42:10 PM PDT 24 |
158983175 ps |
| T739 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.1886893430 |
|
|
Apr 25 12:42:31 PM PDT 24 |
Apr 25 12:42:34 PM PDT 24 |
38037192 ps |
| T118 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1980919057 |
|
|
Apr 25 12:42:26 PM PDT 24 |
Apr 25 12:42:31 PM PDT 24 |
238425506 ps |
| T138 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.841589522 |
|
|
Apr 25 12:42:10 PM PDT 24 |
Apr 25 12:42:18 PM PDT 24 |
504850284 ps |
| T40 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.920296294 |
|
|
Apr 25 12:42:14 PM PDT 24 |
Apr 25 12:42:32 PM PDT 24 |
212353614 ps |
| T119 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.4105639214 |
|
|
Apr 25 12:42:08 PM PDT 24 |
Apr 25 12:42:16 PM PDT 24 |
66629894 ps |
| T139 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2237365533 |
|
|
Apr 25 12:42:15 PM PDT 24 |
Apr 25 12:42:33 PM PDT 24 |
833468684 ps |
| T740 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.2393550396 |
|
|
Apr 25 12:42:12 PM PDT 24 |
Apr 25 12:42:19 PM PDT 24 |
36723992 ps |
| T120 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.1783832801 |
|
|
Apr 25 12:42:19 PM PDT 24 |
Apr 25 12:42:25 PM PDT 24 |
202200865 ps |
| T127 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.2956682660 |
|
|
Apr 25 12:41:54 PM PDT 24 |
Apr 25 12:42:01 PM PDT 24 |
387638831 ps |
| T741 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.2336501154 |
|
|
Apr 25 12:42:19 PM PDT 24 |
Apr 25 12:42:23 PM PDT 24 |
15337952 ps |
| T742 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.327099910 |
|
|
Apr 25 12:42:29 PM PDT 24 |
Apr 25 12:42:31 PM PDT 24 |
43450583 ps |
| T150 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.4058131045 |
|
|
Apr 25 12:42:10 PM PDT 24 |
Apr 25 12:42:17 PM PDT 24 |
165870563 ps |
| T743 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.2154890546 |
|
|
Apr 25 12:42:31 PM PDT 24 |
Apr 25 12:42:34 PM PDT 24 |
15764007 ps |
| T128 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.2305898243 |
|
|
Apr 25 12:42:19 PM PDT 24 |
Apr 25 12:42:26 PM PDT 24 |
314871040 ps |
| T41 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.203406038 |
|
|
Apr 25 12:42:08 PM PDT 24 |
Apr 25 12:42:16 PM PDT 24 |
55568803 ps |
| T151 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1186273119 |
|
|
Apr 25 12:41:59 PM PDT 24 |
Apr 25 12:42:03 PM PDT 24 |
65453667 ps |
| T152 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.1132548356 |
|
|
Apr 25 12:42:08 PM PDT 24 |
Apr 25 12:42:14 PM PDT 24 |
1116640817 ps |
| T153 |
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.171124259 |
|
|
Apr 25 12:42:11 PM PDT 24 |
Apr 25 12:42:18 PM PDT 24 |
60875902 ps |
| T154 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.1917562566 |
|
|
Apr 25 12:42:33 PM PDT 24 |
Apr 25 12:42:38 PM PDT 24 |
64039965 ps |
| T171 |
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.3250773071 |
|
|
Apr 25 12:42:04 PM PDT 24 |
Apr 25 12:42:08 PM PDT 24 |
62278497 ps |
| T155 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1970861189 |
|
|
Apr 25 12:42:12 PM PDT 24 |
Apr 25 12:42:19 PM PDT 24 |
18784718 ps |
| T172 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.684271284 |
|
|
Apr 25 12:42:33 PM PDT 24 |
Apr 25 12:42:35 PM PDT 24 |
120454132 ps |
| T744 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.961290948 |
|
|
Apr 25 12:42:31 PM PDT 24 |
Apr 25 12:42:34 PM PDT 24 |
13729886 ps |
| T156 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.2653350807 |
|
|
Apr 25 12:42:07 PM PDT 24 |
Apr 25 12:42:14 PM PDT 24 |
1569981930 ps |
| T140 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.643070964 |
|
|
Apr 25 12:42:05 PM PDT 24 |
Apr 25 12:42:43 PM PDT 24 |
4789933796 ps |
| T745 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1030493316 |
|
|
Apr 25 12:42:28 PM PDT 24 |
Apr 25 12:42:29 PM PDT 24 |
132394560 ps |
| T135 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.2490772801 |
|
|
Apr 25 12:42:13 PM PDT 24 |
Apr 25 12:42:22 PM PDT 24 |
315218448 ps |
| T125 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.3716018842 |
|
|
Apr 25 12:42:17 PM PDT 24 |
Apr 25 12:42:29 PM PDT 24 |
377104877 ps |
| T129 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.934198673 |
|
|
Apr 25 12:42:05 PM PDT 24 |
Apr 25 12:42:12 PM PDT 24 |
840775380 ps |
| T746 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3103892599 |
|
|
Apr 25 12:42:06 PM PDT 24 |
Apr 25 12:42:47 PM PDT 24 |
8213101980 ps |
| T141 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1805245015 |
|
|
Apr 25 12:41:59 PM PDT 24 |
Apr 25 12:42:01 PM PDT 24 |
68353293 ps |
| T747 |
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.2970743368 |
|
|
Apr 25 12:42:00 PM PDT 24 |
Apr 25 12:42:02 PM PDT 24 |
39892048 ps |
| T748 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.1921064399 |
|
|
Apr 25 12:42:29 PM PDT 24 |
Apr 25 12:42:31 PM PDT 24 |
16134231 ps |
| T749 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.4109239853 |
|
|
Apr 25 12:42:06 PM PDT 24 |
Apr 25 12:42:10 PM PDT 24 |
13728705 ps |
| T126 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.2533333322 |
|
|
Apr 25 12:42:23 PM PDT 24 |
Apr 25 12:42:48 PM PDT 24 |
984916838 ps |
| T750 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3918787187 |
|
|
Apr 25 12:42:25 PM PDT 24 |
Apr 25 12:42:28 PM PDT 24 |
42382204 ps |
| T157 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.2690678576 |
|
|
Apr 25 12:42:11 PM PDT 24 |
Apr 25 12:42:21 PM PDT 24 |
1242464379 ps |
| T130 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.2577603662 |
|
|
Apr 25 12:42:20 PM PDT 24 |
Apr 25 12:42:26 PM PDT 24 |
113455250 ps |
| T142 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.377914834 |
|
|
Apr 25 12:42:06 PM PDT 24 |
Apr 25 12:42:12 PM PDT 24 |
66967662 ps |
| T136 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3507085233 |
|
|
Apr 25 12:42:08 PM PDT 24 |
Apr 25 12:42:13 PM PDT 24 |
120229964 ps |
| T365 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.1318345389 |
|
|
Apr 25 12:42:25 PM PDT 24 |
Apr 25 12:42:33 PM PDT 24 |
105871176 ps |
| T134 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.221870492 |
|
|
Apr 25 12:42:12 PM PDT 24 |
Apr 25 12:42:22 PM PDT 24 |
955383000 ps |
| T131 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.4226187109 |
|
|
Apr 25 12:42:06 PM PDT 24 |
Apr 25 12:42:13 PM PDT 24 |
179202114 ps |
| T751 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.1264709315 |
|
|
Apr 25 12:42:18 PM PDT 24 |
Apr 25 12:42:24 PM PDT 24 |
91859771 ps |
| T752 |
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.2478338177 |
|
|
Apr 25 12:42:20 PM PDT 24 |
Apr 25 12:42:24 PM PDT 24 |
91010786 ps |
| T753 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.1213673127 |
|
|
Apr 25 12:41:57 PM PDT 24 |
Apr 25 12:42:00 PM PDT 24 |
21043856 ps |
| T754 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.239051894 |
|
|
Apr 25 12:42:31 PM PDT 24 |
Apr 25 12:42:34 PM PDT 24 |
210979808 ps |
| T143 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.2965047229 |
|
|
Apr 25 12:42:07 PM PDT 24 |
Apr 25 12:42:13 PM PDT 24 |
52579582 ps |
| T144 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.1440332482 |
|
|
Apr 25 12:42:09 PM PDT 24 |
Apr 25 12:42:30 PM PDT 24 |
644804804 ps |
| T755 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.3975542005 |
|
|
Apr 25 12:42:03 PM PDT 24 |
Apr 25 12:42:20 PM PDT 24 |
2256605800 ps |
| T363 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.3635951982 |
|
|
Apr 25 12:42:18 PM PDT 24 |
Apr 25 12:42:28 PM PDT 24 |
437461578 ps |
| T164 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.2020785008 |
|
|
Apr 25 12:42:10 PM PDT 24 |
Apr 25 12:42:30 PM PDT 24 |
2679644305 ps |
| T145 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.2513251088 |
|
|
Apr 25 12:42:10 PM PDT 24 |
Apr 25 12:42:17 PM PDT 24 |
60602714 ps |
| T146 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.1628831138 |
|
|
Apr 25 12:42:26 PM PDT 24 |
Apr 25 12:42:29 PM PDT 24 |
50688938 ps |
| T756 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.4127488172 |
|
|
Apr 25 12:42:26 PM PDT 24 |
Apr 25 12:42:28 PM PDT 24 |
16953872 ps |
| T757 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1245905567 |
|
|
Apr 25 12:42:32 PM PDT 24 |
Apr 25 12:42:36 PM PDT 24 |
31485884 ps |
| T132 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.3710143927 |
|
|
Apr 25 12:42:12 PM PDT 24 |
Apr 25 12:42:23 PM PDT 24 |
409713517 ps |
| T165 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.1064109055 |
|
|
Apr 25 12:42:15 PM PDT 24 |
Apr 25 12:42:23 PM PDT 24 |
613101388 ps |
| T758 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.3993541430 |
|
|
Apr 25 12:42:20 PM PDT 24 |
Apr 25 12:42:23 PM PDT 24 |
31154860 ps |
| T759 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.770827386 |
|
|
Apr 25 12:42:17 PM PDT 24 |
Apr 25 12:42:21 PM PDT 24 |
25540493 ps |
| T364 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.860676789 |
|
|
Apr 25 12:42:12 PM PDT 24 |
Apr 25 12:42:41 PM PDT 24 |
5456289112 ps |
| T760 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.455328946 |
|
|
Apr 25 12:42:41 PM PDT 24 |
Apr 25 12:42:43 PM PDT 24 |
48474442 ps |
| T761 |
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.4121350180 |
|
|
Apr 25 12:42:27 PM PDT 24 |
Apr 25 12:42:29 PM PDT 24 |
12118832 ps |
| T147 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3992562964 |
|
|
Apr 25 12:42:06 PM PDT 24 |
Apr 25 12:42:13 PM PDT 24 |
124477642 ps |