T624 |
/workspace/coverage/default/38.spi_device_csb_read.2828057477 |
|
|
Apr 28 12:45:12 PM PDT 24 |
Apr 28 12:45:14 PM PDT 24 |
55612337 ps |
T625 |
/workspace/coverage/default/15.spi_device_read_buffer_direct.735549054 |
|
|
Apr 28 12:44:18 PM PDT 24 |
Apr 28 12:44:24 PM PDT 24 |
89406298 ps |
T281 |
/workspace/coverage/default/10.spi_device_upload.3582657007 |
|
|
Apr 28 12:44:19 PM PDT 24 |
Apr 28 12:44:27 PM PDT 24 |
3391625111 ps |
T114 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.819694450 |
|
|
Apr 28 12:44:40 PM PDT 24 |
Apr 28 12:44:44 PM PDT 24 |
293644098 ps |
T626 |
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.1529723642 |
|
|
Apr 28 12:45:26 PM PDT 24 |
Apr 28 12:45:35 PM PDT 24 |
3651399661 ps |
T304 |
/workspace/coverage/default/14.spi_device_upload.3220537203 |
|
|
Apr 28 12:44:22 PM PDT 24 |
Apr 28 12:44:28 PM PDT 24 |
516826840 ps |
T202 |
/workspace/coverage/default/39.spi_device_upload.238157623 |
|
|
Apr 28 12:45:38 PM PDT 24 |
Apr 28 12:45:57 PM PDT 24 |
24142054259 ps |
T627 |
/workspace/coverage/default/32.spi_device_csb_read.2198786271 |
|
|
Apr 28 12:44:58 PM PDT 24 |
Apr 28 12:45:01 PM PDT 24 |
116275816 ps |
T337 |
/workspace/coverage/default/18.spi_device_pass_addr_payload_swap.711713727 |
|
|
Apr 28 12:44:26 PM PDT 24 |
Apr 28 12:44:29 PM PDT 24 |
179627495 ps |
T628 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.2644321689 |
|
|
Apr 28 12:44:16 PM PDT 24 |
Apr 28 12:44:26 PM PDT 24 |
825108610 ps |
T354 |
/workspace/coverage/default/17.spi_device_flash_mode.275152621 |
|
|
Apr 28 12:44:21 PM PDT 24 |
Apr 28 12:45:49 PM PDT 24 |
79700104920 ps |
T629 |
/workspace/coverage/default/6.spi_device_mem_parity.3736691850 |
|
|
Apr 28 12:43:59 PM PDT 24 |
Apr 28 12:44:01 PM PDT 24 |
39288608 ps |
T630 |
/workspace/coverage/default/21.spi_device_alert_test.4022248347 |
|
|
Apr 28 12:44:46 PM PDT 24 |
Apr 28 12:44:48 PM PDT 24 |
114799690 ps |
T631 |
/workspace/coverage/default/21.spi_device_tpm_sts_read.3531028923 |
|
|
Apr 28 12:44:43 PM PDT 24 |
Apr 28 12:44:50 PM PDT 24 |
28254051 ps |
T632 |
/workspace/coverage/default/9.spi_device_flash_mode.677029549 |
|
|
Apr 28 12:44:26 PM PDT 24 |
Apr 28 12:47:03 PM PDT 24 |
11779522945 ps |
T633 |
/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.514956621 |
|
|
Apr 28 12:45:07 PM PDT 24 |
Apr 28 12:45:15 PM PDT 24 |
10861274844 ps |
T321 |
/workspace/coverage/default/33.spi_device_cfg_cmd.1684463940 |
|
|
Apr 28 12:45:00 PM PDT 24 |
Apr 28 12:45:24 PM PDT 24 |
5502137792 ps |
T634 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.1147873094 |
|
|
Apr 28 12:44:47 PM PDT 24 |
Apr 28 12:44:50 PM PDT 24 |
68561422 ps |
T635 |
/workspace/coverage/default/32.spi_device_upload.3426573456 |
|
|
Apr 28 12:45:00 PM PDT 24 |
Apr 28 12:45:13 PM PDT 24 |
2673468998 ps |
T300 |
/workspace/coverage/default/28.spi_device_pass_addr_payload_swap.2213983141 |
|
|
Apr 28 12:44:58 PM PDT 24 |
Apr 28 12:45:04 PM PDT 24 |
2301462503 ps |
T636 |
/workspace/coverage/default/18.spi_device_alert_test.2061642219 |
|
|
Apr 28 12:44:20 PM PDT 24 |
Apr 28 12:44:22 PM PDT 24 |
15731561 ps |
T637 |
/workspace/coverage/default/39.spi_device_tpm_rw.2335810690 |
|
|
Apr 28 12:45:26 PM PDT 24 |
Apr 28 12:45:31 PM PDT 24 |
1082203577 ps |
T638 |
/workspace/coverage/default/37.spi_device_alert_test.2649589209 |
|
|
Apr 28 12:45:25 PM PDT 24 |
Apr 28 12:45:27 PM PDT 24 |
80084934 ps |
T115 |
/workspace/coverage/default/34.spi_device_flash_mode.3421340022 |
|
|
Apr 28 12:45:05 PM PDT 24 |
Apr 28 12:45:29 PM PDT 24 |
1229978828 ps |
T639 |
/workspace/coverage/default/13.spi_device_tpm_sts_read.3528878379 |
|
|
Apr 28 12:44:11 PM PDT 24 |
Apr 28 12:44:12 PM PDT 24 |
80198105 ps |
T640 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.11428999 |
|
|
Apr 28 12:45:52 PM PDT 24 |
Apr 28 12:46:01 PM PDT 24 |
1659398045 ps |
T641 |
/workspace/coverage/default/49.spi_device_csb_read.1294998855 |
|
|
Apr 28 12:46:05 PM PDT 24 |
Apr 28 12:46:08 PM PDT 24 |
14144514 ps |
T642 |
/workspace/coverage/default/46.spi_device_alert_test.639088649 |
|
|
Apr 28 12:45:39 PM PDT 24 |
Apr 28 12:45:41 PM PDT 24 |
36756797 ps |
T643 |
/workspace/coverage/default/43.spi_device_alert_test.1907281099 |
|
|
Apr 28 12:45:28 PM PDT 24 |
Apr 28 12:45:30 PM PDT 24 |
13711788 ps |
T644 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.1254117174 |
|
|
Apr 28 12:44:02 PM PDT 24 |
Apr 28 12:44:05 PM PDT 24 |
237307778 ps |
T645 |
/workspace/coverage/default/27.spi_device_csb_read.3731916044 |
|
|
Apr 28 12:45:04 PM PDT 24 |
Apr 28 12:45:06 PM PDT 24 |
47782719 ps |
T646 |
/workspace/coverage/default/38.spi_device_alert_test.4197002437 |
|
|
Apr 28 12:45:16 PM PDT 24 |
Apr 28 12:45:18 PM PDT 24 |
13347579 ps |
T305 |
/workspace/coverage/default/32.spi_device_pass_cmd_filtering.1575612914 |
|
|
Apr 28 12:44:58 PM PDT 24 |
Apr 28 12:45:15 PM PDT 24 |
5941231539 ps |
T647 |
/workspace/coverage/default/23.spi_device_csb_read.1039018038 |
|
|
Apr 28 12:44:51 PM PDT 24 |
Apr 28 12:44:54 PM PDT 24 |
26830904 ps |
T648 |
/workspace/coverage/default/25.spi_device_alert_test.1722555889 |
|
|
Apr 28 12:44:54 PM PDT 24 |
Apr 28 12:44:57 PM PDT 24 |
86894626 ps |
T649 |
/workspace/coverage/default/4.spi_device_alert_test.968032711 |
|
|
Apr 28 12:44:00 PM PDT 24 |
Apr 28 12:44:02 PM PDT 24 |
92010362 ps |
T650 |
/workspace/coverage/default/36.spi_device_flash_mode.3177390850 |
|
|
Apr 28 12:45:20 PM PDT 24 |
Apr 28 12:47:24 PM PDT 24 |
12449881976 ps |
T309 |
/workspace/coverage/default/27.spi_device_intercept.4116587103 |
|
|
Apr 28 12:44:52 PM PDT 24 |
Apr 28 12:45:05 PM PDT 24 |
4368192530 ps |
T651 |
/workspace/coverage/default/5.spi_device_mem_parity.2986424843 |
|
|
Apr 28 12:44:04 PM PDT 24 |
Apr 28 12:44:08 PM PDT 24 |
17972639 ps |
T275 |
/workspace/coverage/default/25.spi_device_intercept.1292540572 |
|
|
Apr 28 12:44:36 PM PDT 24 |
Apr 28 12:44:48 PM PDT 24 |
1165681381 ps |
T652 |
/workspace/coverage/default/8.spi_device_mem_parity.4213714531 |
|
|
Apr 28 12:44:03 PM PDT 24 |
Apr 28 12:44:07 PM PDT 24 |
44005487 ps |
T653 |
/workspace/coverage/default/45.spi_device_tpm_read_hw_reg.511414846 |
|
|
Apr 28 12:45:35 PM PDT 24 |
Apr 28 12:45:50 PM PDT 24 |
4135783050 ps |
T654 |
/workspace/coverage/default/40.spi_device_csb_read.2325920943 |
|
|
Apr 28 12:45:55 PM PDT 24 |
Apr 28 12:45:56 PM PDT 24 |
35747052 ps |
T655 |
/workspace/coverage/default/29.spi_device_tpm_rw.2310791175 |
|
|
Apr 28 12:44:55 PM PDT 24 |
Apr 28 12:45:00 PM PDT 24 |
66029437 ps |
T656 |
/workspace/coverage/default/48.spi_device_tpm_rw.3744633716 |
|
|
Apr 28 12:45:39 PM PDT 24 |
Apr 28 12:45:43 PM PDT 24 |
96003084 ps |
T657 |
/workspace/coverage/default/42.spi_device_tpm_sts_read.3421518817 |
|
|
Apr 28 12:45:37 PM PDT 24 |
Apr 28 12:45:39 PM PDT 24 |
59606885 ps |
T658 |
/workspace/coverage/default/47.spi_device_csb_read.2137488339 |
|
|
Apr 28 12:45:38 PM PDT 24 |
Apr 28 12:45:40 PM PDT 24 |
16483157 ps |
T313 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.3580051839 |
|
|
Apr 28 12:43:56 PM PDT 24 |
Apr 28 12:44:01 PM PDT 24 |
1491383843 ps |
T659 |
/workspace/coverage/default/21.spi_device_read_buffer_direct.1269636835 |
|
|
Apr 28 12:44:40 PM PDT 24 |
Apr 28 12:44:50 PM PDT 24 |
1102837102 ps |
T660 |
/workspace/coverage/default/5.spi_device_tpm_read_hw_reg.1141201472 |
|
|
Apr 28 12:44:03 PM PDT 24 |
Apr 28 12:44:11 PM PDT 24 |
1923801129 ps |
T322 |
/workspace/coverage/default/45.spi_device_pass_cmd_filtering.2619647941 |
|
|
Apr 28 12:45:49 PM PDT 24 |
Apr 28 12:46:10 PM PDT 24 |
12175936708 ps |
T661 |
/workspace/coverage/default/42.spi_device_read_buffer_direct.3729261844 |
|
|
Apr 28 12:45:27 PM PDT 24 |
Apr 28 12:45:35 PM PDT 24 |
1782338794 ps |
T215 |
/workspace/coverage/default/48.spi_device_pass_cmd_filtering.2341740764 |
|
|
Apr 28 12:47:02 PM PDT 24 |
Apr 28 12:47:12 PM PDT 24 |
9314515098 ps |
T241 |
/workspace/coverage/default/7.spi_device_mailbox.2542388941 |
|
|
Apr 28 12:44:08 PM PDT 24 |
Apr 28 12:44:18 PM PDT 24 |
826863260 ps |
T176 |
/workspace/coverage/default/5.spi_device_stress_all.4224006714 |
|
|
Apr 28 12:44:12 PM PDT 24 |
Apr 28 12:44:25 PM PDT 24 |
69688749 ps |
T662 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.2115593699 |
|
|
Apr 28 12:45:28 PM PDT 24 |
Apr 28 12:45:31 PM PDT 24 |
321577824 ps |
T316 |
/workspace/coverage/default/37.spi_device_upload.390745516 |
|
|
Apr 28 12:45:17 PM PDT 24 |
Apr 28 12:45:33 PM PDT 24 |
8059410033 ps |
T298 |
/workspace/coverage/default/40.spi_device_pass_addr_payload_swap.3143020739 |
|
|
Apr 28 12:45:32 PM PDT 24 |
Apr 28 12:45:48 PM PDT 24 |
16464809378 ps |
T268 |
/workspace/coverage/default/22.spi_device_intercept.120399335 |
|
|
Apr 28 12:44:48 PM PDT 24 |
Apr 28 12:45:02 PM PDT 24 |
4872940351 ps |
T314 |
/workspace/coverage/default/2.spi_device_upload.2992581697 |
|
|
Apr 28 12:43:56 PM PDT 24 |
Apr 28 12:44:00 PM PDT 24 |
80657467 ps |
T663 |
/workspace/coverage/default/15.spi_device_alert_test.1386616571 |
|
|
Apr 28 12:44:30 PM PDT 24 |
Apr 28 12:44:32 PM PDT 24 |
37228885 ps |
T664 |
/workspace/coverage/default/7.spi_device_read_buffer_direct.1639471082 |
|
|
Apr 28 12:44:22 PM PDT 24 |
Apr 28 12:44:34 PM PDT 24 |
4505522764 ps |
T665 |
/workspace/coverage/default/18.spi_device_mem_parity.1423647343 |
|
|
Apr 28 12:44:40 PM PDT 24 |
Apr 28 12:44:41 PM PDT 24 |
96296282 ps |
T302 |
/workspace/coverage/default/28.spi_device_intercept.3643322095 |
|
|
Apr 28 12:44:47 PM PDT 24 |
Apr 28 12:45:21 PM PDT 24 |
2614059477 ps |
T666 |
/workspace/coverage/default/16.spi_device_cfg_cmd.569147735 |
|
|
Apr 28 12:44:25 PM PDT 24 |
Apr 28 12:44:32 PM PDT 24 |
1149468786 ps |
T667 |
/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.2781051501 |
|
|
Apr 28 12:43:36 PM PDT 24 |
Apr 28 12:43:43 PM PDT 24 |
2590459699 ps |
T355 |
/workspace/coverage/default/38.spi_device_flash_mode.4151786024 |
|
|
Apr 28 12:45:31 PM PDT 24 |
Apr 28 12:45:45 PM PDT 24 |
1060892625 ps |
T668 |
/workspace/coverage/default/27.spi_device_mailbox.2799137010 |
|
|
Apr 28 12:45:12 PM PDT 24 |
Apr 28 12:46:10 PM PDT 24 |
49498335429 ps |
T334 |
/workspace/coverage/default/17.spi_device_pass_addr_payload_swap.3146756380 |
|
|
Apr 28 12:44:28 PM PDT 24 |
Apr 28 12:44:31 PM PDT 24 |
37072083 ps |
T669 |
/workspace/coverage/default/1.spi_device_flash_mode.4184696422 |
|
|
Apr 28 12:44:00 PM PDT 24 |
Apr 28 12:44:26 PM PDT 24 |
1799687757 ps |
T670 |
/workspace/coverage/default/49.spi_device_alert_test.3254618758 |
|
|
Apr 28 12:46:03 PM PDT 24 |
Apr 28 12:46:05 PM PDT 24 |
12171846 ps |
T671 |
/workspace/coverage/default/0.spi_device_csb_read.2087134942 |
|
|
Apr 28 12:43:49 PM PDT 24 |
Apr 28 12:43:50 PM PDT 24 |
78633877 ps |
T336 |
/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.1531835302 |
|
|
Apr 28 12:44:25 PM PDT 24 |
Apr 28 12:44:31 PM PDT 24 |
292966743 ps |
T672 |
/workspace/coverage/default/18.spi_device_cfg_cmd.3596594536 |
|
|
Apr 28 12:44:18 PM PDT 24 |
Apr 28 12:44:27 PM PDT 24 |
2086407159 ps |
T673 |
/workspace/coverage/default/19.spi_device_tpm_rw.129503060 |
|
|
Apr 28 12:44:53 PM PDT 24 |
Apr 28 12:45:02 PM PDT 24 |
551326260 ps |
T674 |
/workspace/coverage/default/44.spi_device_alert_test.121437236 |
|
|
Apr 28 12:45:47 PM PDT 24 |
Apr 28 12:45:48 PM PDT 24 |
122500325 ps |
T227 |
/workspace/coverage/default/3.spi_device_intercept.3545381671 |
|
|
Apr 28 12:44:09 PM PDT 24 |
Apr 28 12:44:20 PM PDT 24 |
3519743891 ps |
T675 |
/workspace/coverage/default/21.spi_device_tpm_all.2976943057 |
|
|
Apr 28 12:44:42 PM PDT 24 |
Apr 28 12:44:56 PM PDT 24 |
1376437538 ps |
T372 |
/workspace/coverage/default/7.spi_device_flash_mode.1031833132 |
|
|
Apr 28 12:44:06 PM PDT 24 |
Apr 28 12:44:37 PM PDT 24 |
4317080399 ps |
T676 |
/workspace/coverage/default/41.spi_device_csb_read.4170067386 |
|
|
Apr 28 12:45:47 PM PDT 24 |
Apr 28 12:45:48 PM PDT 24 |
74632356 ps |
T308 |
/workspace/coverage/default/48.spi_device_cfg_cmd.420709949 |
|
|
Apr 28 12:45:52 PM PDT 24 |
Apr 28 12:45:56 PM PDT 24 |
499999313 ps |
T250 |
/workspace/coverage/default/49.spi_device_mailbox.2581698032 |
|
|
Apr 28 12:45:45 PM PDT 24 |
Apr 28 12:46:04 PM PDT 24 |
1782900423 ps |
T328 |
/workspace/coverage/default/22.spi_device_cfg_cmd.131292978 |
|
|
Apr 28 12:44:44 PM PDT 24 |
Apr 28 12:44:56 PM PDT 24 |
3188865837 ps |
T331 |
/workspace/coverage/default/13.spi_device_intercept.1529995494 |
|
|
Apr 28 12:44:26 PM PDT 24 |
Apr 28 12:44:31 PM PDT 24 |
70330220 ps |
T373 |
/workspace/coverage/default/28.spi_device_flash_mode.2715223860 |
|
|
Apr 28 12:44:58 PM PDT 24 |
Apr 28 12:46:06 PM PDT 24 |
60764324690 ps |
T677 |
/workspace/coverage/default/29.spi_device_stress_all.2911889583 |
|
|
Apr 28 12:44:56 PM PDT 24 |
Apr 28 12:44:59 PM PDT 24 |
161611237 ps |
T678 |
/workspace/coverage/default/17.spi_device_tpm_sts_read.2563604032 |
|
|
Apr 28 12:44:25 PM PDT 24 |
Apr 28 12:44:27 PM PDT 24 |
198979005 ps |
T679 |
/workspace/coverage/default/41.spi_device_tpm_rw.3283169899 |
|
|
Apr 28 12:45:53 PM PDT 24 |
Apr 28 12:45:56 PM PDT 24 |
159334466 ps |
T680 |
/workspace/coverage/default/28.spi_device_tpm_rw.1469321733 |
|
|
Apr 28 12:45:01 PM PDT 24 |
Apr 28 12:45:04 PM PDT 24 |
374696392 ps |
T681 |
/workspace/coverage/default/2.spi_device_tpm_sts_read.2540587759 |
|
|
Apr 28 12:43:49 PM PDT 24 |
Apr 28 12:43:51 PM PDT 24 |
162237750 ps |
T340 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.229206482 |
|
|
Apr 28 12:44:46 PM PDT 24 |
Apr 28 12:44:53 PM PDT 24 |
1637324331 ps |
T277 |
/workspace/coverage/default/0.spi_device_mailbox.2066581525 |
|
|
Apr 28 12:43:55 PM PDT 24 |
Apr 28 12:44:10 PM PDT 24 |
1440667925 ps |
T682 |
/workspace/coverage/default/8.spi_device_alert_test.814432632 |
|
|
Apr 28 12:44:05 PM PDT 24 |
Apr 28 12:44:08 PM PDT 24 |
42900266 ps |
T683 |
/workspace/coverage/default/48.spi_device_tpm_all.3021910313 |
|
|
Apr 28 12:45:48 PM PDT 24 |
Apr 28 12:46:40 PM PDT 24 |
8317000957 ps |
T684 |
/workspace/coverage/default/21.spi_device_tpm_read_hw_reg.3400058535 |
|
|
Apr 28 12:44:54 PM PDT 24 |
Apr 28 12:45:03 PM PDT 24 |
1154722054 ps |
T685 |
/workspace/coverage/default/28.spi_device_csb_read.2731147540 |
|
|
Apr 28 12:44:57 PM PDT 24 |
Apr 28 12:44:59 PM PDT 24 |
56295736 ps |
T686 |
/workspace/coverage/default/40.spi_device_cfg_cmd.1317444069 |
|
|
Apr 28 12:45:25 PM PDT 24 |
Apr 28 12:45:38 PM PDT 24 |
12712315029 ps |
T687 |
/workspace/coverage/default/7.spi_device_tpm_all.927384077 |
|
|
Apr 28 12:44:17 PM PDT 24 |
Apr 28 12:45:42 PM PDT 24 |
17353971227 ps |
T332 |
/workspace/coverage/default/43.spi_device_upload.113737849 |
|
|
Apr 28 12:45:30 PM PDT 24 |
Apr 28 12:45:37 PM PDT 24 |
725383373 ps |
T688 |
/workspace/coverage/default/24.spi_device_alert_test.2297374548 |
|
|
Apr 28 12:44:56 PM PDT 24 |
Apr 28 12:44:58 PM PDT 24 |
11566445 ps |
T689 |
/workspace/coverage/default/7.spi_device_tpm_sts_read.2907928007 |
|
|
Apr 28 12:44:13 PM PDT 24 |
Apr 28 12:44:14 PM PDT 24 |
92644187 ps |
T690 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.1444182944 |
|
|
Apr 28 12:45:06 PM PDT 24 |
Apr 28 12:45:08 PM PDT 24 |
108514967 ps |
T356 |
/workspace/coverage/default/35.spi_device_flash_mode.396999688 |
|
|
Apr 28 12:45:07 PM PDT 24 |
Apr 28 12:45:27 PM PDT 24 |
1319940161 ps |
T691 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.4145939797 |
|
|
Apr 28 12:44:15 PM PDT 24 |
Apr 28 12:44:20 PM PDT 24 |
1097644938 ps |
T692 |
/workspace/coverage/default/10.spi_device_tpm_read_hw_reg.3301785986 |
|
|
Apr 28 12:44:15 PM PDT 24 |
Apr 28 12:44:23 PM PDT 24 |
1458451294 ps |
T693 |
/workspace/coverage/default/27.spi_device_tpm_rw.1023537693 |
|
|
Apr 28 12:44:56 PM PDT 24 |
Apr 28 12:45:00 PM PDT 24 |
163447025 ps |
T694 |
/workspace/coverage/default/22.spi_device_alert_test.266405678 |
|
|
Apr 28 12:44:51 PM PDT 24 |
Apr 28 12:44:53 PM PDT 24 |
11898110 ps |
T324 |
/workspace/coverage/default/27.spi_device_upload.4234718904 |
|
|
Apr 28 12:44:56 PM PDT 24 |
Apr 28 12:45:03 PM PDT 24 |
5178538484 ps |
T695 |
/workspace/coverage/default/11.spi_device_pass_cmd_filtering.1781045674 |
|
|
Apr 28 12:43:59 PM PDT 24 |
Apr 28 12:44:02 PM PDT 24 |
119202476 ps |
T271 |
/workspace/coverage/default/20.spi_device_upload.1449028009 |
|
|
Apr 28 12:44:38 PM PDT 24 |
Apr 28 12:45:12 PM PDT 24 |
29209958768 ps |
T696 |
/workspace/coverage/default/49.spi_device_read_buffer_direct.2798134443 |
|
|
Apr 28 12:45:57 PM PDT 24 |
Apr 28 12:46:06 PM PDT 24 |
467681483 ps |
T697 |
/workspace/coverage/default/17.spi_device_tpm_rw.802420288 |
|
|
Apr 28 12:44:22 PM PDT 24 |
Apr 28 12:44:25 PM PDT 24 |
28533939 ps |
T698 |
/workspace/coverage/default/29.spi_device_tpm_read_hw_reg.1242389302 |
|
|
Apr 28 12:44:58 PM PDT 24 |
Apr 28 12:45:02 PM PDT 24 |
881308671 ps |
T699 |
/workspace/coverage/default/4.spi_device_tpm_read_hw_reg.545530319 |
|
|
Apr 28 12:43:59 PM PDT 24 |
Apr 28 12:44:14 PM PDT 24 |
4174521912 ps |
T385 |
/workspace/coverage/default/12.spi_device_upload.2856432177 |
|
|
Apr 28 12:44:31 PM PDT 24 |
Apr 28 12:44:37 PM PDT 24 |
18703643491 ps |
T700 |
/workspace/coverage/default/0.spi_device_read_buffer_direct.493029593 |
|
|
Apr 28 12:44:16 PM PDT 24 |
Apr 28 12:44:23 PM PDT 24 |
285592490 ps |
T209 |
/workspace/coverage/default/21.spi_device_mailbox.536692818 |
|
|
Apr 28 12:44:36 PM PDT 24 |
Apr 28 12:46:31 PM PDT 24 |
40058459797 ps |
T701 |
/workspace/coverage/default/32.spi_device_alert_test.3947120841 |
|
|
Apr 28 12:45:11 PM PDT 24 |
Apr 28 12:45:13 PM PDT 24 |
54506052 ps |
T702 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.793682463 |
|
|
Apr 28 12:44:15 PM PDT 24 |
Apr 28 12:44:17 PM PDT 24 |
293817549 ps |
T325 |
/workspace/coverage/default/18.spi_device_mailbox.2407963185 |
|
|
Apr 28 12:44:34 PM PDT 24 |
Apr 28 12:44:58 PM PDT 24 |
9569596526 ps |
T338 |
/workspace/coverage/default/11.spi_device_pass_addr_payload_swap.1249524211 |
|
|
Apr 28 12:45:25 PM PDT 24 |
Apr 28 12:45:47 PM PDT 24 |
11493688540 ps |
T703 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.2098407530 |
|
|
Apr 28 12:45:02 PM PDT 24 |
Apr 28 12:45:17 PM PDT 24 |
2934700808 ps |
T358 |
/workspace/coverage/default/17.spi_device_mailbox.2146517719 |
|
|
Apr 28 12:44:19 PM PDT 24 |
Apr 28 12:44:28 PM PDT 24 |
573959454 ps |
T704 |
/workspace/coverage/default/6.spi_device_alert_test.681623145 |
|
|
Apr 28 12:44:17 PM PDT 24 |
Apr 28 12:44:18 PM PDT 24 |
44391903 ps |
T705 |
/workspace/coverage/default/3.spi_device_stress_all.829052529 |
|
|
Apr 28 12:44:15 PM PDT 24 |
Apr 28 12:44:17 PM PDT 24 |
127044588 ps |
T706 |
/workspace/coverage/default/22.spi_device_tpm_all.1469900883 |
|
|
Apr 28 12:44:41 PM PDT 24 |
Apr 28 12:45:05 PM PDT 24 |
4018232859 ps |
T318 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.3420801355 |
|
|
Apr 28 12:44:24 PM PDT 24 |
Apr 28 12:44:41 PM PDT 24 |
5164629110 ps |
T707 |
/workspace/coverage/default/49.spi_device_cfg_cmd.1472355567 |
|
|
Apr 28 12:45:47 PM PDT 24 |
Apr 28 12:45:52 PM PDT 24 |
320323751 ps |
T315 |
/workspace/coverage/default/18.spi_device_pass_cmd_filtering.631043541 |
|
|
Apr 28 12:44:41 PM PDT 24 |
Apr 28 12:44:46 PM PDT 24 |
1160064622 ps |
T708 |
/workspace/coverage/default/26.spi_device_alert_test.3197965214 |
|
|
Apr 28 12:44:47 PM PDT 24 |
Apr 28 12:44:49 PM PDT 24 |
55885217 ps |
T709 |
/workspace/coverage/default/31.spi_device_upload.3753300868 |
|
|
Apr 28 12:45:14 PM PDT 24 |
Apr 28 12:45:42 PM PDT 24 |
38687384552 ps |
T710 |
/workspace/coverage/default/32.spi_device_tpm_all.1776153630 |
|
|
Apr 28 12:45:14 PM PDT 24 |
Apr 28 12:45:55 PM PDT 24 |
25647753934 ps |
T225 |
/workspace/coverage/default/27.spi_device_pass_addr_payload_swap.3998062380 |
|
|
Apr 28 12:45:12 PM PDT 24 |
Apr 28 12:45:16 PM PDT 24 |
467141422 ps |
T711 |
/workspace/coverage/default/49.spi_device_tpm_rw.3819905412 |
|
|
Apr 28 12:45:53 PM PDT 24 |
Apr 28 12:45:55 PM PDT 24 |
117752364 ps |
T712 |
/workspace/coverage/default/29.spi_device_csb_read.2103413300 |
|
|
Apr 28 12:45:01 PM PDT 24 |
Apr 28 12:45:04 PM PDT 24 |
21135822 ps |
T713 |
/workspace/coverage/default/46.spi_device_stress_all.1608078181 |
|
|
Apr 28 12:47:02 PM PDT 24 |
Apr 28 12:47:06 PM PDT 24 |
89688821 ps |
T714 |
/workspace/coverage/default/44.spi_device_flash_mode.1534519306 |
|
|
Apr 28 12:45:37 PM PDT 24 |
Apr 28 12:46:13 PM PDT 24 |
2895566503 ps |
T715 |
/workspace/coverage/default/9.spi_device_tpm_sts_read.2434031885 |
|
|
Apr 28 12:44:06 PM PDT 24 |
Apr 28 12:44:09 PM PDT 24 |
60299149 ps |
T716 |
/workspace/coverage/default/27.spi_device_tpm_all.71959043 |
|
|
Apr 28 12:44:43 PM PDT 24 |
Apr 28 12:45:02 PM PDT 24 |
14138571766 ps |
T717 |
/workspace/coverage/default/38.spi_device_tpm_rw.3421477264 |
|
|
Apr 28 12:45:33 PM PDT 24 |
Apr 28 12:45:36 PM PDT 24 |
395510930 ps |
T718 |
/workspace/coverage/default/25.spi_device_tpm_sts_read.492681023 |
|
|
Apr 28 12:44:41 PM PDT 24 |
Apr 28 12:44:43 PM PDT 24 |
745862128 ps |
T102 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.2799870238 |
|
|
Apr 28 12:45:45 PM PDT 24 |
Apr 28 12:46:06 PM PDT 24 |
8366477589 ps |
T719 |
/workspace/coverage/default/43.spi_device_tpm_sts_read.1857445131 |
|
|
Apr 28 12:45:28 PM PDT 24 |
Apr 28 12:45:31 PM PDT 24 |
76555561 ps |
T720 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.1197396415 |
|
|
Apr 28 12:43:59 PM PDT 24 |
Apr 28 12:44:04 PM PDT 24 |
3997360599 ps |
T721 |
/workspace/coverage/default/47.spi_device_alert_test.3468960241 |
|
|
Apr 28 12:45:40 PM PDT 24 |
Apr 28 12:45:42 PM PDT 24 |
11001357 ps |
T722 |
/workspace/coverage/default/29.spi_device_tpm_all.3065463440 |
|
|
Apr 28 12:44:55 PM PDT 24 |
Apr 28 12:45:05 PM PDT 24 |
3343297876 ps |
T723 |
/workspace/coverage/default/6.spi_device_tpm_sts_read.2861840707 |
|
|
Apr 28 12:44:01 PM PDT 24 |
Apr 28 12:44:04 PM PDT 24 |
110250810 ps |
T724 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.3652524438 |
|
|
Apr 28 12:44:10 PM PDT 24 |
Apr 28 12:44:17 PM PDT 24 |
548155273 ps |
T725 |
/workspace/coverage/default/46.spi_device_tpm_rw.1908667510 |
|
|
Apr 28 12:45:52 PM PDT 24 |
Apr 28 12:45:58 PM PDT 24 |
956201148 ps |
T726 |
/workspace/coverage/default/31.spi_device_csb_read.443319260 |
|
|
Apr 28 12:45:09 PM PDT 24 |
Apr 28 12:45:11 PM PDT 24 |
13046496 ps |
T727 |
/workspace/coverage/default/13.spi_device_read_buffer_direct.392256743 |
|
|
Apr 28 12:44:07 PM PDT 24 |
Apr 28 12:44:12 PM PDT 24 |
102042890 ps |
T200 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.2370314363 |
|
|
Apr 28 12:45:41 PM PDT 24 |
Apr 28 12:46:06 PM PDT 24 |
28625252417 ps |
T323 |
/workspace/coverage/default/4.spi_device_mailbox.387633559 |
|
|
Apr 28 12:44:02 PM PDT 24 |
Apr 28 12:45:13 PM PDT 24 |
32460412769 ps |
T728 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.1669897971 |
|
|
Apr 28 12:47:03 PM PDT 24 |
Apr 28 12:47:06 PM PDT 24 |
169810749 ps |
T729 |
/workspace/coverage/default/23.spi_device_tpm_sts_read.1718390258 |
|
|
Apr 28 12:44:46 PM PDT 24 |
Apr 28 12:44:48 PM PDT 24 |
36022247 ps |
T730 |
/workspace/coverage/default/0.spi_device_tpm_sts_read.81992097 |
|
|
Apr 28 12:43:47 PM PDT 24 |
Apr 28 12:43:48 PM PDT 24 |
14591003 ps |
T731 |
/workspace/coverage/default/41.spi_device_flash_mode.2271390057 |
|
|
Apr 28 12:45:43 PM PDT 24 |
Apr 28 12:46:24 PM PDT 24 |
6994161556 ps |
T732 |
/workspace/coverage/default/5.spi_device_cfg_cmd.2353637543 |
|
|
Apr 28 12:44:04 PM PDT 24 |
Apr 28 12:44:13 PM PDT 24 |
556316176 ps |
T733 |
/workspace/coverage/default/21.spi_device_tpm_rw.1584113913 |
|
|
Apr 28 12:44:43 PM PDT 24 |
Apr 28 12:44:49 PM PDT 24 |
1897389392 ps |
T734 |
/workspace/coverage/default/13.spi_device_tpm_rw.301422605 |
|
|
Apr 28 12:44:15 PM PDT 24 |
Apr 28 12:44:32 PM PDT 24 |
1583210467 ps |
T51 |
/workspace/coverage/default/2.spi_device_sec_cm.521792382 |
|
|
Apr 28 12:43:57 PM PDT 24 |
Apr 28 12:43:59 PM PDT 24 |
432439312 ps |
T735 |
/workspace/coverage/default/11.spi_device_flash_mode.1793228744 |
|
|
Apr 28 12:44:22 PM PDT 24 |
Apr 28 12:44:45 PM PDT 24 |
2232245702 ps |
T736 |
/workspace/coverage/default/1.spi_device_alert_test.2218682482 |
|
|
Apr 28 12:43:38 PM PDT 24 |
Apr 28 12:43:39 PM PDT 24 |
18087739 ps |
T737 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.2975152229 |
|
|
Apr 28 12:43:59 PM PDT 24 |
Apr 28 12:44:07 PM PDT 24 |
1780949339 ps |
T738 |
/workspace/coverage/default/30.spi_device_csb_read.499447909 |
|
|
Apr 28 12:45:03 PM PDT 24 |
Apr 28 12:45:04 PM PDT 24 |
79564052 ps |
T366 |
/workspace/coverage/default/25.spi_device_mailbox.3404130585 |
|
|
Apr 28 12:44:50 PM PDT 24 |
Apr 28 12:45:19 PM PDT 24 |
5007073430 ps |
T739 |
/workspace/coverage/default/28.spi_device_tpm_read_hw_reg.3899624486 |
|
|
Apr 28 12:44:51 PM PDT 24 |
Apr 28 12:45:02 PM PDT 24 |
1878768155 ps |
T740 |
/workspace/coverage/default/47.spi_device_tpm_read_hw_reg.927336494 |
|
|
Apr 28 12:45:43 PM PDT 24 |
Apr 28 12:45:54 PM PDT 24 |
6780796856 ps |
T741 |
/workspace/coverage/default/34.spi_device_read_buffer_direct.1135213174 |
|
|
Apr 28 12:45:02 PM PDT 24 |
Apr 28 12:45:20 PM PDT 24 |
1564232087 ps |
T742 |
/workspace/coverage/default/10.spi_device_flash_mode.611882098 |
|
|
Apr 28 12:44:05 PM PDT 24 |
Apr 28 12:44:46 PM PDT 24 |
4403115822 ps |
T743 |
/workspace/coverage/default/38.spi_device_mailbox.2172865669 |
|
|
Apr 28 12:45:21 PM PDT 24 |
Apr 28 12:45:28 PM PDT 24 |
1453960017 ps |
T52 |
/workspace/coverage/default/0.spi_device_sec_cm.3697965532 |
|
|
Apr 28 12:43:57 PM PDT 24 |
Apr 28 12:43:58 PM PDT 24 |
273698352 ps |
T744 |
/workspace/coverage/default/11.spi_device_tpm_rw.4159534046 |
|
|
Apr 28 12:44:03 PM PDT 24 |
Apr 28 12:44:08 PM PDT 24 |
140047676 ps |
T278 |
/workspace/coverage/default/46.spi_device_intercept.252575896 |
|
|
Apr 28 12:45:54 PM PDT 24 |
Apr 28 12:46:02 PM PDT 24 |
2196441973 ps |
T745 |
/workspace/coverage/default/6.spi_device_tpm_all.643747742 |
|
|
Apr 28 12:44:04 PM PDT 24 |
Apr 28 12:44:27 PM PDT 24 |
3064040191 ps |
T746 |
/workspace/coverage/default/44.spi_device_tpm_all.3271043501 |
|
|
Apr 28 12:45:49 PM PDT 24 |
Apr 28 12:45:57 PM PDT 24 |
538670885 ps |
T246 |
/workspace/coverage/default/33.spi_device_pass_addr_payload_swap.3364499718 |
|
|
Apr 28 12:45:10 PM PDT 24 |
Apr 28 12:45:29 PM PDT 24 |
4667658541 ps |
T747 |
/workspace/coverage/default/17.spi_device_alert_test.3597083348 |
|
|
Apr 28 12:44:34 PM PDT 24 |
Apr 28 12:44:36 PM PDT 24 |
15730802 ps |
T748 |
/workspace/coverage/default/11.spi_device_csb_read.3253903506 |
|
|
Apr 28 12:44:12 PM PDT 24 |
Apr 28 12:44:14 PM PDT 24 |
16508129 ps |
T749 |
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.3875002885 |
|
|
Apr 28 12:40:30 PM PDT 24 |
Apr 28 12:40:33 PM PDT 24 |
22063818 ps |
T38 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.3690450167 |
|
|
Apr 28 12:40:23 PM PDT 24 |
Apr 28 12:40:33 PM PDT 24 |
787159690 ps |
T39 |
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.2640974445 |
|
|
Apr 28 12:39:59 PM PDT 24 |
Apr 28 12:40:02 PM PDT 24 |
57640609 ps |
T116 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.1317851101 |
|
|
Apr 28 12:40:28 PM PDT 24 |
Apr 28 12:40:33 PM PDT 24 |
44510399 ps |
T40 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.2128120819 |
|
|
Apr 28 12:40:32 PM PDT 24 |
Apr 28 12:40:38 PM PDT 24 |
53621047 ps |
T750 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.4207457648 |
|
|
Apr 28 12:40:41 PM PDT 24 |
Apr 28 12:40:42 PM PDT 24 |
11978461 ps |
T751 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.1381169167 |
|
|
Apr 28 12:40:45 PM PDT 24 |
Apr 28 12:40:47 PM PDT 24 |
29463995 ps |
T177 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.3524582371 |
|
|
Apr 28 12:40:37 PM PDT 24 |
Apr 28 12:40:39 PM PDT 24 |
18782949 ps |
T157 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3065537324 |
|
|
Apr 28 12:40:26 PM PDT 24 |
Apr 28 12:40:29 PM PDT 24 |
188311455 ps |
T117 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.84419905 |
|
|
Apr 28 12:40:22 PM PDT 24 |
Apr 28 12:40:28 PM PDT 24 |
243287355 ps |
T158 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.1581685717 |
|
|
Apr 28 12:40:32 PM PDT 24 |
Apr 28 12:40:36 PM PDT 24 |
62914386 ps |
T159 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.1430557967 |
|
|
Apr 28 12:40:11 PM PDT 24 |
Apr 28 12:40:19 PM PDT 24 |
88307020 ps |
T140 |
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.1904689197 |
|
|
Apr 28 12:40:06 PM PDT 24 |
Apr 28 12:40:09 PM PDT 24 |
175543810 ps |
T178 |
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.1832152837 |
|
|
Apr 28 12:40:36 PM PDT 24 |
Apr 28 12:40:38 PM PDT 24 |
69056862 ps |
T179 |
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.1410787308 |
|
|
Apr 28 12:40:28 PM PDT 24 |
Apr 28 12:40:30 PM PDT 24 |
20262031 ps |
T127 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.3472566074 |
|
|
Apr 28 12:40:21 PM PDT 24 |
Apr 28 12:40:26 PM PDT 24 |
260386210 ps |
T103 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2995785590 |
|
|
Apr 28 12:40:20 PM PDT 24 |
Apr 28 12:40:23 PM PDT 24 |
182046720 ps |
T118 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.200398829 |
|
|
Apr 28 12:40:14 PM PDT 24 |
Apr 28 12:40:22 PM PDT 24 |
692264041 ps |
T160 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.968718250 |
|
|
Apr 28 12:40:27 PM PDT 24 |
Apr 28 12:40:31 PM PDT 24 |
595050244 ps |
T122 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.2081542528 |
|
|
Apr 28 12:40:25 PM PDT 24 |
Apr 28 12:40:39 PM PDT 24 |
196395814 ps |
T752 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.25058253 |
|
|
Apr 28 12:40:37 PM PDT 24 |
Apr 28 12:40:38 PM PDT 24 |
47224326 ps |
T141 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.3729821873 |
|
|
Apr 28 12:40:22 PM PDT 24 |
Apr 28 12:40:25 PM PDT 24 |
35939085 ps |
T753 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.1876911941 |
|
|
Apr 28 12:40:47 PM PDT 24 |
Apr 28 12:40:49 PM PDT 24 |
11616661 ps |
T136 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.234958343 |
|
|
Apr 28 12:40:25 PM PDT 24 |
Apr 28 12:40:34 PM PDT 24 |
1385671844 ps |
T134 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.3200710060 |
|
|
Apr 28 12:40:38 PM PDT 24 |
Apr 28 12:40:45 PM PDT 24 |
1162192391 ps |
T161 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.1853147796 |
|
|
Apr 28 12:40:27 PM PDT 24 |
Apr 28 12:40:31 PM PDT 24 |
350445300 ps |
T162 |
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.1632365999 |
|
|
Apr 28 12:40:14 PM PDT 24 |
Apr 28 12:40:20 PM PDT 24 |
408870291 ps |
T135 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.1772952004 |
|
|
Apr 28 12:40:22 PM PDT 24 |
Apr 28 12:40:24 PM PDT 24 |
80618107 ps |
T163 |
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.2388112568 |
|
|
Apr 28 12:40:01 PM PDT 24 |
Apr 28 12:40:05 PM PDT 24 |
227677516 ps |
T142 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.1165072078 |
|
|
Apr 28 12:40:25 PM PDT 24 |
Apr 28 12:40:48 PM PDT 24 |
306182389 ps |
T125 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.4000756293 |
|
|
Apr 28 12:40:24 PM PDT 24 |
Apr 28 12:40:28 PM PDT 24 |
294579714 ps |
T164 |
/workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2017924317 |
|
|
Apr 28 12:40:26 PM PDT 24 |
Apr 28 12:40:31 PM PDT 24 |
1827046493 ps |
T754 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.1398209272 |
|
|
Apr 28 12:40:11 PM PDT 24 |
Apr 28 12:40:14 PM PDT 24 |
38856312 ps |
T168 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.4161202399 |
|
|
Apr 28 12:40:46 PM PDT 24 |
Apr 28 12:40:49 PM PDT 24 |
74174191 ps |
T755 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.4186206834 |
|
|
Apr 28 12:40:13 PM PDT 24 |
Apr 28 12:40:15 PM PDT 24 |
81341343 ps |
T129 |
/workspace/coverage/cover_reg_top/8.spi_device_tl_errors.454531205 |
|
|
Apr 28 12:40:28 PM PDT 24 |
Apr 28 12:40:33 PM PDT 24 |
103457432 ps |
T756 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.2924760336 |
|
|
Apr 28 12:40:43 PM PDT 24 |
Apr 28 12:40:45 PM PDT 24 |
16576230 ps |
T757 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.4237380966 |
|
|
Apr 28 12:40:30 PM PDT 24 |
Apr 28 12:40:33 PM PDT 24 |
12699950 ps |
T133 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.1615047617 |
|
|
Apr 28 12:40:16 PM PDT 24 |
Apr 28 12:40:19 PM PDT 24 |
24890001 ps |
T758 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.3971037507 |
|
|
Apr 28 12:40:19 PM PDT 24 |
Apr 28 12:40:21 PM PDT 24 |
12876615 ps |
T759 |
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.2418407430 |
|
|
Apr 28 12:40:42 PM PDT 24 |
Apr 28 12:40:44 PM PDT 24 |
70728376 ps |
T137 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.2543258072 |
|
|
Apr 28 12:40:32 PM PDT 24 |
Apr 28 12:40:36 PM PDT 24 |
293503768 ps |
T143 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.537605807 |
|
|
Apr 28 12:40:16 PM PDT 24 |
Apr 28 12:40:20 PM PDT 24 |
213622231 ps |
T144 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3012285095 |
|
|
Apr 28 12:40:21 PM PDT 24 |
Apr 28 12:40:50 PM PDT 24 |
3597125924 ps |
T138 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.3730769693 |
|
|
Apr 28 12:40:10 PM PDT 24 |
Apr 28 12:40:15 PM PDT 24 |
113056324 ps |
T172 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.2728493562 |
|
|
Apr 28 12:39:55 PM PDT 24 |
Apr 28 12:39:59 PM PDT 24 |
79954227 ps |
T126 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.4135563801 |
|
|
Apr 28 12:40:36 PM PDT 24 |
Apr 28 12:40:40 PM PDT 24 |
212303337 ps |
T169 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.1536729459 |
|
|
Apr 28 12:40:13 PM PDT 24 |
Apr 28 12:40:17 PM PDT 24 |
633263077 ps |
T170 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.3543628035 |
|
|
Apr 28 12:40:11 PM PDT 24 |
Apr 28 12:40:52 PM PDT 24 |
10856064564 ps |
T171 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.353467348 |
|
|
Apr 28 12:40:32 PM PDT 24 |
Apr 28 12:40:37 PM PDT 24 |
363955979 ps |
T760 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.4138061503 |
|
|
Apr 28 12:40:40 PM PDT 24 |
Apr 28 12:40:42 PM PDT 24 |
14191926 ps |
T145 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.3202642547 |
|
|
Apr 28 12:40:09 PM PDT 24 |
Apr 28 12:40:12 PM PDT 24 |
70138018 ps |
T761 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.1191353071 |
|
|
Apr 28 12:40:12 PM PDT 24 |
Apr 28 12:40:15 PM PDT 24 |
196596312 ps |
T762 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.3354878919 |
|
|
Apr 28 12:40:14 PM PDT 24 |
Apr 28 12:40:17 PM PDT 24 |
114500385 ps |
T376 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.2639546681 |
|
|
Apr 28 12:40:18 PM PDT 24 |
Apr 28 12:40:27 PM PDT 24 |
1118886523 ps |
T146 |
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.1711716721 |
|
|
Apr 28 12:40:14 PM PDT 24 |
Apr 28 12:40:17 PM PDT 24 |
63847241 ps |
T763 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.1895336508 |
|
|
Apr 28 12:40:49 PM PDT 24 |
Apr 28 12:40:50 PM PDT 24 |
83232086 ps |
T173 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.16822341 |
|
|
Apr 28 12:40:30 PM PDT 24 |
Apr 28 12:40:35 PM PDT 24 |
613416926 ps |
T383 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.3790236998 |
|
|
Apr 28 12:40:16 PM PDT 24 |
Apr 28 12:40:36 PM PDT 24 |
293046275 ps |
T764 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3974402345 |
|
|
Apr 28 12:40:21 PM PDT 24 |
Apr 28 12:40:26 PM PDT 24 |
600238435 ps |
T765 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.3677152784 |
|
|
Apr 28 12:40:24 PM PDT 24 |
Apr 28 12:40:29 PM PDT 24 |
665402611 ps |
T766 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3384849144 |
|
|
Apr 28 12:40:12 PM PDT 24 |
Apr 28 12:40:21 PM PDT 24 |
129832675 ps |
T767 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.81239500 |
|
|
Apr 28 12:40:24 PM PDT 24 |
Apr 28 12:40:27 PM PDT 24 |
92758233 ps |
T147 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3038139146 |
|
|
Apr 28 12:40:20 PM PDT 24 |
Apr 28 12:40:58 PM PDT 24 |
10657204500 ps |
T768 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.1975051086 |
|
|
Apr 28 12:40:01 PM PDT 24 |
Apr 28 12:40:03 PM PDT 24 |
12203542 ps |
T769 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.1225504965 |
|
|
Apr 28 12:40:30 PM PDT 24 |
Apr 28 12:40:33 PM PDT 24 |
14248684 ps |
T148 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.519228019 |
|
|
Apr 28 12:40:24 PM PDT 24 |
Apr 28 12:40:27 PM PDT 24 |
384233994 ps |
T770 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.1905166066 |
|
|
Apr 28 12:40:24 PM PDT 24 |
Apr 28 12:40:26 PM PDT 24 |
26777804 ps |
T771 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.3946763088 |
|
|
Apr 28 12:40:27 PM PDT 24 |
Apr 28 12:40:29 PM PDT 24 |
13298371 ps |
T772 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.3955797749 |
|
|
Apr 28 12:40:14 PM PDT 24 |
Apr 28 12:40:18 PM PDT 24 |
84978704 ps |
T773 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.1257939571 |
|
|
Apr 28 12:40:26 PM PDT 24 |
Apr 28 12:40:28 PM PDT 24 |
27655515 ps |