| T395 |
/workspace/coverage/default/27.spi_device_tpm_all.2635186040 |
|
|
Apr 30 12:34:25 PM PDT 24 |
Apr 30 12:34:41 PM PDT 24 |
5344790878 ps |
| T285 |
/workspace/coverage/default/33.spi_device_intercept.3434504132 |
|
|
Apr 30 12:35:01 PM PDT 24 |
Apr 30 12:35:08 PM PDT 24 |
2904201953 ps |
| T288 |
/workspace/coverage/default/37.spi_device_upload.75788996 |
|
|
Apr 30 12:35:02 PM PDT 24 |
Apr 30 12:35:09 PM PDT 24 |
1339662849 ps |
| T386 |
/workspace/coverage/default/44.spi_device_upload.697978857 |
|
|
Apr 30 12:35:14 PM PDT 24 |
Apr 30 12:35:36 PM PDT 24 |
63495240487 ps |
| T632 |
/workspace/coverage/default/43.spi_device_tpm_all.3332678069 |
|
|
Apr 30 12:35:23 PM PDT 24 |
Apr 30 12:35:41 PM PDT 24 |
2886277841 ps |
| T315 |
/workspace/coverage/default/44.spi_device_flash_mode.1292441253 |
|
|
Apr 30 12:35:13 PM PDT 24 |
Apr 30 12:36:10 PM PDT 24 |
18231990829 ps |
| T633 |
/workspace/coverage/default/38.spi_device_cfg_cmd.3953267557 |
|
|
Apr 30 12:35:03 PM PDT 24 |
Apr 30 12:35:42 PM PDT 24 |
17088150540 ps |
| T634 |
/workspace/coverage/default/37.spi_device_pass_cmd_filtering.3746835086 |
|
|
Apr 30 12:35:14 PM PDT 24 |
Apr 30 12:35:23 PM PDT 24 |
11430418590 ps |
| T281 |
/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.2239295241 |
|
|
Apr 30 12:35:09 PM PDT 24 |
Apr 30 12:35:19 PM PDT 24 |
1219649787 ps |
| T8 |
/workspace/coverage/default/36.spi_device_upload.1068140893 |
|
|
Apr 30 12:35:02 PM PDT 24 |
Apr 30 12:35:34 PM PDT 24 |
8850608117 ps |
| T367 |
/workspace/coverage/default/30.spi_device_intercept.451864905 |
|
|
Apr 30 12:34:32 PM PDT 24 |
Apr 30 12:35:04 PM PDT 24 |
6910470745 ps |
| T635 |
/workspace/coverage/default/0.spi_device_tpm_sts_read.771895883 |
|
|
Apr 30 12:33:27 PM PDT 24 |
Apr 30 12:33:30 PM PDT 24 |
179940633 ps |
| T636 |
/workspace/coverage/default/46.spi_device_intercept.1579771676 |
|
|
Apr 30 12:35:22 PM PDT 24 |
Apr 30 12:35:50 PM PDT 24 |
16560418048 ps |
| T286 |
/workspace/coverage/default/12.spi_device_intercept.1728743433 |
|
|
Apr 30 12:33:47 PM PDT 24 |
Apr 30 12:34:18 PM PDT 24 |
3278939902 ps |
| T637 |
/workspace/coverage/default/17.spi_device_mem_parity.3875606357 |
|
|
Apr 30 12:34:08 PM PDT 24 |
Apr 30 12:34:10 PM PDT 24 |
26907698 ps |
| T638 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.3563098533 |
|
|
Apr 30 12:33:37 PM PDT 24 |
Apr 30 12:33:43 PM PDT 24 |
156920604 ps |
| T222 |
/workspace/coverage/default/16.spi_device_intercept.255567982 |
|
|
Apr 30 12:34:04 PM PDT 24 |
Apr 30 12:34:25 PM PDT 24 |
1967007050 ps |
| T639 |
/workspace/coverage/default/20.spi_device_csb_read.3990173594 |
|
|
Apr 30 12:34:22 PM PDT 24 |
Apr 30 12:34:24 PM PDT 24 |
16713865 ps |
| T640 |
/workspace/coverage/default/16.spi_device_cfg_cmd.1991931829 |
|
|
Apr 30 12:34:04 PM PDT 24 |
Apr 30 12:34:07 PM PDT 24 |
88787792 ps |
| T203 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.265972871 |
|
|
Apr 30 12:33:32 PM PDT 24 |
Apr 30 12:33:47 PM PDT 24 |
5896122682 ps |
| T641 |
/workspace/coverage/default/34.spi_device_tpm_sts_read.399810318 |
|
|
Apr 30 12:34:57 PM PDT 24 |
Apr 30 12:34:59 PM PDT 24 |
97692745 ps |
| T325 |
/workspace/coverage/default/42.spi_device_pass_cmd_filtering.1144938470 |
|
|
Apr 30 12:35:17 PM PDT 24 |
Apr 30 12:35:22 PM PDT 24 |
601595229 ps |
| T642 |
/workspace/coverage/default/14.spi_device_tpm_rw.3575167390 |
|
|
Apr 30 12:33:39 PM PDT 24 |
Apr 30 12:33:44 PM PDT 24 |
224813264 ps |
| T232 |
/workspace/coverage/default/38.spi_device_upload.2559823536 |
|
|
Apr 30 12:35:02 PM PDT 24 |
Apr 30 12:35:15 PM PDT 24 |
10930742873 ps |
| T643 |
/workspace/coverage/default/21.spi_device_csb_read.3905233792 |
|
|
Apr 30 12:34:14 PM PDT 24 |
Apr 30 12:34:16 PM PDT 24 |
34919476 ps |
| T339 |
/workspace/coverage/default/47.spi_device_intercept.2313234917 |
|
|
Apr 30 12:35:18 PM PDT 24 |
Apr 30 12:35:24 PM PDT 24 |
362364089 ps |
| T644 |
/workspace/coverage/default/27.spi_device_csb_read.6161816 |
|
|
Apr 30 12:34:26 PM PDT 24 |
Apr 30 12:34:33 PM PDT 24 |
107791996 ps |
| T645 |
/workspace/coverage/default/44.spi_device_alert_test.1616710176 |
|
|
Apr 30 12:35:21 PM PDT 24 |
Apr 30 12:35:23 PM PDT 24 |
13306866 ps |
| T646 |
/workspace/coverage/default/24.spi_device_tpm_sts_read.3325351931 |
|
|
Apr 30 12:34:24 PM PDT 24 |
Apr 30 12:34:26 PM PDT 24 |
295545809 ps |
| T647 |
/workspace/coverage/default/22.spi_device_tpm_all.2381002557 |
|
|
Apr 30 12:34:17 PM PDT 24 |
Apr 30 12:34:57 PM PDT 24 |
24086778722 ps |
| T648 |
/workspace/coverage/default/41.spi_device_tpm_sts_read.1609680611 |
|
|
Apr 30 12:35:17 PM PDT 24 |
Apr 30 12:35:19 PM PDT 24 |
27071725 ps |
| T649 |
/workspace/coverage/default/23.spi_device_alert_test.481809018 |
|
|
Apr 30 12:34:23 PM PDT 24 |
Apr 30 12:34:25 PM PDT 24 |
14029600 ps |
| T650 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.431904313 |
|
|
Apr 30 12:34:24 PM PDT 24 |
Apr 30 12:34:37 PM PDT 24 |
10689724012 ps |
| T651 |
/workspace/coverage/default/46.spi_device_tpm_read_hw_reg.3863460591 |
|
|
Apr 30 12:35:17 PM PDT 24 |
Apr 30 12:35:31 PM PDT 24 |
3514483333 ps |
| T118 |
/workspace/coverage/default/21.spi_device_cfg_cmd.291139018 |
|
|
Apr 30 12:34:14 PM PDT 24 |
Apr 30 12:34:21 PM PDT 24 |
1054862040 ps |
| T652 |
/workspace/coverage/default/3.spi_device_tpm_read_hw_reg.1692781404 |
|
|
Apr 30 12:33:33 PM PDT 24 |
Apr 30 12:33:39 PM PDT 24 |
2297135425 ps |
| T653 |
/workspace/coverage/default/47.spi_device_upload.1985260172 |
|
|
Apr 30 12:35:28 PM PDT 24 |
Apr 30 12:35:31 PM PDT 24 |
93486084 ps |
| T654 |
/workspace/coverage/default/15.spi_device_tpm_all.2431139138 |
|
|
Apr 30 12:34:02 PM PDT 24 |
Apr 30 12:34:32 PM PDT 24 |
27850489601 ps |
| T655 |
/workspace/coverage/default/31.spi_device_alert_test.2081455604 |
|
|
Apr 30 12:34:40 PM PDT 24 |
Apr 30 12:34:41 PM PDT 24 |
13387088 ps |
| T656 |
/workspace/coverage/default/36.spi_device_read_buffer_direct.4082659034 |
|
|
Apr 30 12:35:03 PM PDT 24 |
Apr 30 12:35:08 PM PDT 24 |
802090367 ps |
| T657 |
/workspace/coverage/default/49.spi_device_alert_test.245798074 |
|
|
Apr 30 12:35:35 PM PDT 24 |
Apr 30 12:35:36 PM PDT 24 |
20807339 ps |
| T658 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.4212941269 |
|
|
Apr 30 12:34:17 PM PDT 24 |
Apr 30 12:34:38 PM PDT 24 |
5576924115 ps |
| T659 |
/workspace/coverage/default/4.spi_device_tpm_all.2249491256 |
|
|
Apr 30 12:33:30 PM PDT 24 |
Apr 30 12:33:49 PM PDT 24 |
2179255209 ps |
| T349 |
/workspace/coverage/default/45.spi_device_mailbox.1484070882 |
|
|
Apr 30 12:35:19 PM PDT 24 |
Apr 30 12:35:48 PM PDT 24 |
2744029426 ps |
| T660 |
/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.3656719301 |
|
|
Apr 30 12:33:21 PM PDT 24 |
Apr 30 12:33:35 PM PDT 24 |
4454789942 ps |
| T250 |
/workspace/coverage/default/45.spi_device_intercept.1612908714 |
|
|
Apr 30 12:35:20 PM PDT 24 |
Apr 30 12:35:53 PM PDT 24 |
19556482977 ps |
| T661 |
/workspace/coverage/default/12.spi_device_tpm_all.233433256 |
|
|
Apr 30 12:33:49 PM PDT 24 |
Apr 30 12:34:15 PM PDT 24 |
3784326181 ps |
| T662 |
/workspace/coverage/default/29.spi_device_tpm_read_hw_reg.3985164799 |
|
|
Apr 30 12:34:29 PM PDT 24 |
Apr 30 12:34:39 PM PDT 24 |
10429570281 ps |
| T663 |
/workspace/coverage/default/9.spi_device_tpm_all.1320797361 |
|
|
Apr 30 12:33:51 PM PDT 24 |
Apr 30 12:34:25 PM PDT 24 |
2299877846 ps |
| T664 |
/workspace/coverage/default/6.spi_device_read_buffer_direct.689113441 |
|
|
Apr 30 12:33:35 PM PDT 24 |
Apr 30 12:34:00 PM PDT 24 |
7038299399 ps |
| T665 |
/workspace/coverage/default/39.spi_device_cfg_cmd.2184909104 |
|
|
Apr 30 12:35:16 PM PDT 24 |
Apr 30 12:35:25 PM PDT 24 |
2527792238 ps |
| T666 |
/workspace/coverage/default/34.spi_device_cfg_cmd.2720743307 |
|
|
Apr 30 12:34:55 PM PDT 24 |
Apr 30 12:35:07 PM PDT 24 |
870102385 ps |
| T667 |
/workspace/coverage/default/48.spi_device_read_buffer_direct.1581653016 |
|
|
Apr 30 12:35:25 PM PDT 24 |
Apr 30 12:35:38 PM PDT 24 |
1845262892 ps |
| T215 |
/workspace/coverage/default/8.spi_device_intercept.2325751668 |
|
|
Apr 30 12:33:32 PM PDT 24 |
Apr 30 12:33:44 PM PDT 24 |
7102353970 ps |
| T668 |
/workspace/coverage/default/49.spi_device_read_buffer_direct.2298415978 |
|
|
Apr 30 12:35:32 PM PDT 24 |
Apr 30 12:35:39 PM PDT 24 |
1336378669 ps |
| T52 |
/workspace/coverage/default/2.spi_device_sec_cm.3316522217 |
|
|
Apr 30 12:33:30 PM PDT 24 |
Apr 30 12:33:33 PM PDT 24 |
232489655 ps |
| T669 |
/workspace/coverage/default/6.spi_device_tpm_rw.2554055831 |
|
|
Apr 30 12:33:32 PM PDT 24 |
Apr 30 12:33:37 PM PDT 24 |
109863872 ps |
| T670 |
/workspace/coverage/default/3.spi_device_tpm_sts_read.3623892748 |
|
|
Apr 30 12:33:33 PM PDT 24 |
Apr 30 12:33:37 PM PDT 24 |
124252854 ps |
| T333 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.35122583 |
|
|
Apr 30 12:35:05 PM PDT 24 |
Apr 30 12:35:18 PM PDT 24 |
3218572980 ps |
| T671 |
/workspace/coverage/default/3.spi_device_read_buffer_direct.1678858808 |
|
|
Apr 30 12:33:29 PM PDT 24 |
Apr 30 12:33:34 PM PDT 24 |
176481487 ps |
| T361 |
/workspace/coverage/default/20.spi_device_intercept.638557706 |
|
|
Apr 30 12:34:16 PM PDT 24 |
Apr 30 12:34:24 PM PDT 24 |
5071985176 ps |
| T672 |
/workspace/coverage/default/1.spi_device_tpm_all.4134797253 |
|
|
Apr 30 12:33:28 PM PDT 24 |
Apr 30 12:33:38 PM PDT 24 |
3180282563 ps |
| T365 |
/workspace/coverage/default/25.spi_device_intercept.2672331834 |
|
|
Apr 30 12:34:22 PM PDT 24 |
Apr 30 12:34:32 PM PDT 24 |
670764033 ps |
| T673 |
/workspace/coverage/default/26.spi_device_tpm_sts_read.3056320672 |
|
|
Apr 30 12:34:24 PM PDT 24 |
Apr 30 12:34:27 PM PDT 24 |
171689573 ps |
| T674 |
/workspace/coverage/default/32.spi_device_tpm_rw.1258928125 |
|
|
Apr 30 12:34:45 PM PDT 24 |
Apr 30 12:34:47 PM PDT 24 |
41747417 ps |
| T675 |
/workspace/coverage/default/24.spi_device_tpm_all.538451941 |
|
|
Apr 30 12:34:25 PM PDT 24 |
Apr 30 12:35:10 PM PDT 24 |
5565886296 ps |
| T676 |
/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.2625483838 |
|
|
Apr 30 12:35:09 PM PDT 24 |
Apr 30 12:35:12 PM PDT 24 |
629477457 ps |
| T277 |
/workspace/coverage/default/8.spi_device_mailbox.295290250 |
|
|
Apr 30 12:33:34 PM PDT 24 |
Apr 30 12:34:12 PM PDT 24 |
9671119826 ps |
| T53 |
/workspace/coverage/default/1.spi_device_sec_cm.1084687169 |
|
|
Apr 30 12:33:32 PM PDT 24 |
Apr 30 12:33:35 PM PDT 24 |
234234439 ps |
| T247 |
/workspace/coverage/default/10.spi_device_intercept.2796703789 |
|
|
Apr 30 12:33:32 PM PDT 24 |
Apr 30 12:33:44 PM PDT 24 |
2002052368 ps |
| T677 |
/workspace/coverage/default/17.spi_device_alert_test.828446287 |
|
|
Apr 30 12:34:11 PM PDT 24 |
Apr 30 12:34:13 PM PDT 24 |
13842811 ps |
| T678 |
/workspace/coverage/default/38.spi_device_tpm_read_hw_reg.1402311322 |
|
|
Apr 30 12:35:11 PM PDT 24 |
Apr 30 12:35:36 PM PDT 24 |
27111421457 ps |
| T679 |
/workspace/coverage/default/39.spi_device_alert_test.2576449356 |
|
|
Apr 30 12:35:06 PM PDT 24 |
Apr 30 12:35:08 PM PDT 24 |
12472305 ps |
| T680 |
/workspace/coverage/default/33.spi_device_tpm_all.1137010548 |
|
|
Apr 30 12:34:54 PM PDT 24 |
Apr 30 12:35:06 PM PDT 24 |
1829012750 ps |
| T340 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.4021872612 |
|
|
Apr 30 12:34:11 PM PDT 24 |
Apr 30 12:34:17 PM PDT 24 |
3752259338 ps |
| T681 |
/workspace/coverage/default/48.spi_device_alert_test.1924676418 |
|
|
Apr 30 12:35:35 PM PDT 24 |
Apr 30 12:35:36 PM PDT 24 |
45717301 ps |
| T682 |
/workspace/coverage/default/11.spi_device_alert_test.189402839 |
|
|
Apr 30 12:33:55 PM PDT 24 |
Apr 30 12:33:57 PM PDT 24 |
13805530 ps |
| T683 |
/workspace/coverage/default/19.spi_device_alert_test.436648525 |
|
|
Apr 30 12:34:15 PM PDT 24 |
Apr 30 12:34:17 PM PDT 24 |
41826704 ps |
| T684 |
/workspace/coverage/default/11.spi_device_tpm_rw.1155048466 |
|
|
Apr 30 12:33:35 PM PDT 24 |
Apr 30 12:33:44 PM PDT 24 |
660009519 ps |
| T287 |
/workspace/coverage/default/46.spi_device_pass_addr_payload_swap.1119953841 |
|
|
Apr 30 12:35:19 PM PDT 24 |
Apr 30 12:35:47 PM PDT 24 |
32320355037 ps |
| T77 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.1091872799 |
|
|
Apr 30 12:35:16 PM PDT 24 |
Apr 30 12:35:37 PM PDT 24 |
6613945294 ps |
| T685 |
/workspace/coverage/default/3.spi_device_pass_cmd_filtering.284727912 |
|
|
Apr 30 12:33:28 PM PDT 24 |
Apr 30 12:33:32 PM PDT 24 |
1307118054 ps |
| T686 |
/workspace/coverage/default/35.spi_device_tpm_sts_read.3573895324 |
|
|
Apr 30 12:34:54 PM PDT 24 |
Apr 30 12:34:55 PM PDT 24 |
106926774 ps |
| T687 |
/workspace/coverage/default/39.spi_device_flash_mode.3698314713 |
|
|
Apr 30 12:35:14 PM PDT 24 |
Apr 30 12:35:33 PM PDT 24 |
804676380 ps |
| T688 |
/workspace/coverage/default/36.spi_device_tpm_all.2934757614 |
|
|
Apr 30 12:35:01 PM PDT 24 |
Apr 30 12:35:23 PM PDT 24 |
1820484524 ps |
| T689 |
/workspace/coverage/default/18.spi_device_flash_mode.3458296213 |
|
|
Apr 30 12:34:10 PM PDT 24 |
Apr 30 12:35:57 PM PDT 24 |
7824477108 ps |
| T690 |
/workspace/coverage/default/38.spi_device_tpm_sts_read.419803079 |
|
|
Apr 30 12:35:06 PM PDT 24 |
Apr 30 12:35:08 PM PDT 24 |
74239236 ps |
| T691 |
/workspace/coverage/default/34.spi_device_tpm_rw.3596541976 |
|
|
Apr 30 12:34:58 PM PDT 24 |
Apr 30 12:35:00 PM PDT 24 |
20120897 ps |
| T692 |
/workspace/coverage/default/49.spi_device_flash_mode.1117857565 |
|
|
Apr 30 12:35:34 PM PDT 24 |
Apr 30 12:37:13 PM PDT 24 |
8186143739 ps |
| T693 |
/workspace/coverage/default/12.spi_device_cfg_cmd.3342362307 |
|
|
Apr 30 12:33:52 PM PDT 24 |
Apr 30 12:33:58 PM PDT 24 |
883340855 ps |
| T694 |
/workspace/coverage/default/25.spi_device_tpm_sts_read.930394125 |
|
|
Apr 30 12:34:22 PM PDT 24 |
Apr 30 12:34:24 PM PDT 24 |
160128509 ps |
| T269 |
/workspace/coverage/default/10.spi_device_upload.2319482379 |
|
|
Apr 30 12:33:57 PM PDT 24 |
Apr 30 12:34:03 PM PDT 24 |
665402099 ps |
| T695 |
/workspace/coverage/default/16.spi_device_read_buffer_direct.1689434211 |
|
|
Apr 30 12:34:04 PM PDT 24 |
Apr 30 12:34:10 PM PDT 24 |
249340736 ps |
| T289 |
/workspace/coverage/default/14.spi_device_mailbox.690650082 |
|
|
Apr 30 12:34:08 PM PDT 24 |
Apr 30 12:34:24 PM PDT 24 |
1302900488 ps |
| T696 |
/workspace/coverage/default/1.spi_device_csb_read.3929554648 |
|
|
Apr 30 12:33:20 PM PDT 24 |
Apr 30 12:33:21 PM PDT 24 |
268588208 ps |
| T697 |
/workspace/coverage/default/44.spi_device_read_buffer_direct.1845956403 |
|
|
Apr 30 12:35:20 PM PDT 24 |
Apr 30 12:35:26 PM PDT 24 |
412751723 ps |
| T302 |
/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.1635494568 |
|
|
Apr 30 12:34:45 PM PDT 24 |
Apr 30 12:35:01 PM PDT 24 |
9085957419 ps |
| T698 |
/workspace/coverage/default/3.spi_device_alert_test.3318038322 |
|
|
Apr 30 12:33:28 PM PDT 24 |
Apr 30 12:33:30 PM PDT 24 |
20292099 ps |
| T699 |
/workspace/coverage/default/16.spi_device_tpm_read_hw_reg.3255923283 |
|
|
Apr 30 12:34:03 PM PDT 24 |
Apr 30 12:34:13 PM PDT 24 |
5194828568 ps |
| T700 |
/workspace/coverage/default/49.spi_device_tpm_sts_read.3374878952 |
|
|
Apr 30 12:35:38 PM PDT 24 |
Apr 30 12:35:39 PM PDT 24 |
72530542 ps |
| T305 |
/workspace/coverage/default/15.spi_device_upload.3934348963 |
|
|
Apr 30 12:33:59 PM PDT 24 |
Apr 30 12:34:08 PM PDT 24 |
4201871999 ps |
| T701 |
/workspace/coverage/default/44.spi_device_stress_all.641262503 |
|
|
Apr 30 12:35:21 PM PDT 24 |
Apr 30 12:35:23 PM PDT 24 |
41482039 ps |
| T702 |
/workspace/coverage/default/41.spi_device_tpm_rw.2726454768 |
|
|
Apr 30 12:35:06 PM PDT 24 |
Apr 30 12:35:09 PM PDT 24 |
221018656 ps |
| T347 |
/workspace/coverage/default/36.spi_device_intercept.3942701785 |
|
|
Apr 30 12:34:56 PM PDT 24 |
Apr 30 12:35:06 PM PDT 24 |
862369818 ps |
| T334 |
/workspace/coverage/default/13.spi_device_upload.2944464657 |
|
|
Apr 30 12:34:03 PM PDT 24 |
Apr 30 12:34:11 PM PDT 24 |
2867759455 ps |
| T703 |
/workspace/coverage/default/27.spi_device_tpm_rw.1298995515 |
|
|
Apr 30 12:34:25 PM PDT 24 |
Apr 30 12:34:27 PM PDT 24 |
47618942 ps |
| T366 |
/workspace/coverage/default/8.spi_device_upload.1265894651 |
|
|
Apr 30 12:33:30 PM PDT 24 |
Apr 30 12:33:39 PM PDT 24 |
970313254 ps |
| T704 |
/workspace/coverage/default/3.spi_device_csb_read.815724094 |
|
|
Apr 30 12:33:31 PM PDT 24 |
Apr 30 12:33:33 PM PDT 24 |
20760893 ps |
| T705 |
/workspace/coverage/default/13.spi_device_csb_read.996127298 |
|
|
Apr 30 12:33:51 PM PDT 24 |
Apr 30 12:33:52 PM PDT 24 |
59229759 ps |
| T706 |
/workspace/coverage/default/31.spi_device_mailbox.1254342423 |
|
|
Apr 30 12:34:35 PM PDT 24 |
Apr 30 12:34:49 PM PDT 24 |
3109334030 ps |
| T248 |
/workspace/coverage/default/12.spi_device_upload.254755563 |
|
|
Apr 30 12:33:59 PM PDT 24 |
Apr 30 12:34:10 PM PDT 24 |
5318693627 ps |
| T707 |
/workspace/coverage/default/38.spi_device_csb_read.3236958485 |
|
|
Apr 30 12:35:10 PM PDT 24 |
Apr 30 12:35:12 PM PDT 24 |
44336313 ps |
| T372 |
/workspace/coverage/default/29.spi_device_flash_mode.300938645 |
|
|
Apr 30 12:34:32 PM PDT 24 |
Apr 30 12:35:16 PM PDT 24 |
13929824506 ps |
| T336 |
/workspace/coverage/default/39.spi_device_pass_cmd_filtering.2422225597 |
|
|
Apr 30 12:35:14 PM PDT 24 |
Apr 30 12:35:29 PM PDT 24 |
9163578361 ps |
| T708 |
/workspace/coverage/default/30.spi_device_tpm_all.974165787 |
|
|
Apr 30 12:34:32 PM PDT 24 |
Apr 30 12:34:39 PM PDT 24 |
544021886 ps |
| T709 |
/workspace/coverage/default/16.spi_device_alert_test.96370826 |
|
|
Apr 30 12:34:06 PM PDT 24 |
Apr 30 12:34:08 PM PDT 24 |
77150888 ps |
| T710 |
/workspace/coverage/default/23.spi_device_tpm_rw.4263656323 |
|
|
Apr 30 12:34:22 PM PDT 24 |
Apr 30 12:34:25 PM PDT 24 |
22270272 ps |
| T208 |
/workspace/coverage/default/3.spi_device_upload.2691014153 |
|
|
Apr 30 12:33:29 PM PDT 24 |
Apr 30 12:33:39 PM PDT 24 |
11075601038 ps |
| T119 |
/workspace/coverage/default/5.spi_device_flash_mode.230947585 |
|
|
Apr 30 12:33:33 PM PDT 24 |
Apr 30 12:34:05 PM PDT 24 |
6710766808 ps |
| T352 |
/workspace/coverage/default/13.spi_device_pass_addr_payload_swap.3097841227 |
|
|
Apr 30 12:33:57 PM PDT 24 |
Apr 30 12:34:06 PM PDT 24 |
3651807780 ps |
| T711 |
/workspace/coverage/default/31.spi_device_tpm_all.1423258665 |
|
|
Apr 30 12:34:29 PM PDT 24 |
Apr 30 12:34:53 PM PDT 24 |
3421513896 ps |
| T712 |
/workspace/coverage/default/19.spi_device_mailbox.2082125404 |
|
|
Apr 30 12:34:19 PM PDT 24 |
Apr 30 12:35:03 PM PDT 24 |
14257453470 ps |
| T713 |
/workspace/coverage/default/10.spi_device_stress_all.2452827875 |
|
|
Apr 30 12:33:36 PM PDT 24 |
Apr 30 12:33:39 PM PDT 24 |
50350857 ps |
| T226 |
/workspace/coverage/default/6.spi_device_intercept.3462788001 |
|
|
Apr 30 12:33:37 PM PDT 24 |
Apr 30 12:33:44 PM PDT 24 |
288137388 ps |
| T54 |
/workspace/coverage/default/0.spi_device_sec_cm.763032452 |
|
|
Apr 30 12:33:19 PM PDT 24 |
Apr 30 12:33:21 PM PDT 24 |
130636679 ps |
| T714 |
/workspace/coverage/default/23.spi_device_tpm_all.3847781520 |
|
|
Apr 30 12:34:25 PM PDT 24 |
Apr 30 12:35:06 PM PDT 24 |
2803717342 ps |
| T715 |
/workspace/coverage/default/28.spi_device_alert_test.349780174 |
|
|
Apr 30 12:34:45 PM PDT 24 |
Apr 30 12:34:46 PM PDT 24 |
23691471 ps |
| T716 |
/workspace/coverage/default/2.spi_device_alert_test.3312761754 |
|
|
Apr 30 12:33:24 PM PDT 24 |
Apr 30 12:33:26 PM PDT 24 |
33504685 ps |
| T717 |
/workspace/coverage/default/12.spi_device_flash_mode.3370993671 |
|
|
Apr 30 12:33:46 PM PDT 24 |
Apr 30 12:34:36 PM PDT 24 |
7417750935 ps |
| T263 |
/workspace/coverage/default/20.spi_device_mailbox.4208694765 |
|
|
Apr 30 12:34:12 PM PDT 24 |
Apr 30 12:34:27 PM PDT 24 |
2171634921 ps |
| T718 |
/workspace/coverage/default/24.spi_device_tpm_read_hw_reg.638364699 |
|
|
Apr 30 12:34:25 PM PDT 24 |
Apr 30 12:34:34 PM PDT 24 |
5863633141 ps |
| T225 |
/workspace/coverage/default/32.spi_device_pass_cmd_filtering.1554085734 |
|
|
Apr 30 12:34:45 PM PDT 24 |
Apr 30 12:35:00 PM PDT 24 |
45714452861 ps |
| T719 |
/workspace/coverage/default/49.spi_device_tpm_rw.1451117290 |
|
|
Apr 30 12:35:34 PM PDT 24 |
Apr 30 12:35:37 PM PDT 24 |
351331079 ps |
| T346 |
/workspace/coverage/default/12.spi_device_pass_cmd_filtering.468478130 |
|
|
Apr 30 12:34:00 PM PDT 24 |
Apr 30 12:34:05 PM PDT 24 |
1431219357 ps |
| T720 |
/workspace/coverage/default/4.spi_device_read_buffer_direct.2523815507 |
|
|
Apr 30 12:33:31 PM PDT 24 |
Apr 30 12:33:54 PM PDT 24 |
17964632483 ps |
| T332 |
/workspace/coverage/default/19.spi_device_pass_cmd_filtering.3718690884 |
|
|
Apr 30 12:34:13 PM PDT 24 |
Apr 30 12:34:30 PM PDT 24 |
13910000445 ps |
| T721 |
/workspace/coverage/default/22.spi_device_tpm_sts_read.3224985489 |
|
|
Apr 30 12:34:12 PM PDT 24 |
Apr 30 12:34:14 PM PDT 24 |
110265299 ps |
| T245 |
/workspace/coverage/default/34.spi_device_pass_cmd_filtering.3099790687 |
|
|
Apr 30 12:34:56 PM PDT 24 |
Apr 30 12:35:11 PM PDT 24 |
21883066226 ps |
| T722 |
/workspace/coverage/default/40.spi_device_csb_read.628889919 |
|
|
Apr 30 12:35:14 PM PDT 24 |
Apr 30 12:35:15 PM PDT 24 |
69501925 ps |
| T723 |
/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3287467159 |
|
|
Apr 30 12:34:15 PM PDT 24 |
Apr 30 12:34:44 PM PDT 24 |
67433294276 ps |
| T370 |
/workspace/coverage/default/27.spi_device_upload.384332345 |
|
|
Apr 30 12:34:28 PM PDT 24 |
Apr 30 12:34:39 PM PDT 24 |
6333313034 ps |
| T354 |
/workspace/coverage/default/21.spi_device_pass_addr_payload_swap.3045212854 |
|
|
Apr 30 12:34:19 PM PDT 24 |
Apr 30 12:34:22 PM PDT 24 |
846497231 ps |
| T363 |
/workspace/coverage/default/0.spi_device_mailbox.2919128847 |
|
|
Apr 30 12:33:22 PM PDT 24 |
Apr 30 12:36:09 PM PDT 24 |
40086268779 ps |
| T724 |
/workspace/coverage/default/49.spi_device_csb_read.2688797740 |
|
|
Apr 30 12:35:36 PM PDT 24 |
Apr 30 12:35:37 PM PDT 24 |
22464774 ps |
| T358 |
/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.45056054 |
|
|
Apr 30 12:34:25 PM PDT 24 |
Apr 30 12:34:45 PM PDT 24 |
4625683027 ps |
| T725 |
/workspace/coverage/default/37.spi_device_flash_mode.3786554061 |
|
|
Apr 30 12:35:13 PM PDT 24 |
Apr 30 12:36:19 PM PDT 24 |
32600473608 ps |
| T726 |
/workspace/coverage/default/2.spi_device_tpm_all.900423396 |
|
|
Apr 30 12:33:33 PM PDT 24 |
Apr 30 12:34:11 PM PDT 24 |
13918429942 ps |
| T727 |
/workspace/coverage/default/32.spi_device_alert_test.3106793990 |
|
|
Apr 30 12:34:51 PM PDT 24 |
Apr 30 12:34:52 PM PDT 24 |
20799563 ps |
| T330 |
/workspace/coverage/default/48.spi_device_cfg_cmd.1228375964 |
|
|
Apr 30 12:35:26 PM PDT 24 |
Apr 30 12:35:29 PM PDT 24 |
210065633 ps |
| T728 |
/workspace/coverage/default/18.spi_device_tpm_sts_read.4079097898 |
|
|
Apr 30 12:34:08 PM PDT 24 |
Apr 30 12:34:10 PM PDT 24 |
90050260 ps |
| T729 |
/workspace/coverage/default/19.spi_device_cfg_cmd.381532714 |
|
|
Apr 30 12:34:24 PM PDT 24 |
Apr 30 12:35:06 PM PDT 24 |
11209454453 ps |
| T235 |
/workspace/coverage/default/39.spi_device_mailbox.2852608528 |
|
|
Apr 30 12:35:07 PM PDT 24 |
Apr 30 12:36:25 PM PDT 24 |
7555659966 ps |
| T357 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.3093942656 |
|
|
Apr 30 12:33:38 PM PDT 24 |
Apr 30 12:33:45 PM PDT 24 |
2194807700 ps |
| T337 |
/workspace/coverage/default/23.spi_device_upload.3492219011 |
|
|
Apr 30 12:34:28 PM PDT 24 |
Apr 30 12:34:34 PM PDT 24 |
492129688 ps |
| T730 |
/workspace/coverage/default/36.spi_device_alert_test.324391403 |
|
|
Apr 30 12:34:59 PM PDT 24 |
Apr 30 12:35:00 PM PDT 24 |
22355780 ps |
| T252 |
/workspace/coverage/default/17.spi_device_mailbox.86876468 |
|
|
Apr 30 12:34:09 PM PDT 24 |
Apr 30 12:34:17 PM PDT 24 |
218274733 ps |
| T731 |
/workspace/coverage/default/10.spi_device_mem_parity.988835578 |
|
|
Apr 30 12:33:30 PM PDT 24 |
Apr 30 12:33:32 PM PDT 24 |
114057077 ps |
| T227 |
/workspace/coverage/default/33.spi_device_pass_addr_payload_swap.3568141395 |
|
|
Apr 30 12:34:53 PM PDT 24 |
Apr 30 12:34:56 PM PDT 24 |
101336050 ps |
| T324 |
/workspace/coverage/default/40.spi_device_intercept.1607596095 |
|
|
Apr 30 12:35:17 PM PDT 24 |
Apr 30 12:35:30 PM PDT 24 |
3547972943 ps |
| T328 |
/workspace/coverage/default/29.spi_device_intercept.4288507117 |
|
|
Apr 30 12:34:59 PM PDT 24 |
Apr 30 12:35:15 PM PDT 24 |
1667116940 ps |
| T732 |
/workspace/coverage/default/35.spi_device_tpm_all.223463377 |
|
|
Apr 30 12:34:58 PM PDT 24 |
Apr 30 12:35:33 PM PDT 24 |
6243719325 ps |
| T733 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.799228213 |
|
|
Apr 30 12:35:19 PM PDT 24 |
Apr 30 12:35:29 PM PDT 24 |
1366539935 ps |
| T734 |
/workspace/coverage/default/6.spi_device_tpm_all.2779867640 |
|
|
Apr 30 12:33:27 PM PDT 24 |
Apr 30 12:34:10 PM PDT 24 |
15755851898 ps |
| T735 |
/workspace/coverage/default/15.spi_device_intercept.3427043635 |
|
|
Apr 30 12:34:03 PM PDT 24 |
Apr 30 12:34:07 PM PDT 24 |
39515580 ps |
| T736 |
/workspace/coverage/default/0.spi_device_mem_parity.3198610666 |
|
|
Apr 30 12:33:22 PM PDT 24 |
Apr 30 12:33:24 PM PDT 24 |
98621212 ps |
| T737 |
/workspace/coverage/default/44.spi_device_tpm_sts_read.1918668605 |
|
|
Apr 30 12:35:18 PM PDT 24 |
Apr 30 12:35:20 PM PDT 24 |
81334749 ps |
| T331 |
/workspace/coverage/default/7.spi_device_cfg_cmd.1436850761 |
|
|
Apr 30 12:33:32 PM PDT 24 |
Apr 30 12:33:37 PM PDT 24 |
35991545 ps |
| T738 |
/workspace/coverage/default/30.spi_device_alert_test.1699333899 |
|
|
Apr 30 12:34:59 PM PDT 24 |
Apr 30 12:35:00 PM PDT 24 |
39974529 ps |
| T739 |
/workspace/coverage/default/22.spi_device_flash_mode.3970188350 |
|
|
Apr 30 12:34:21 PM PDT 24 |
Apr 30 12:35:31 PM PDT 24 |
5160280548 ps |
| T740 |
/workspace/coverage/default/48.spi_device_flash_mode.1896760576 |
|
|
Apr 30 12:35:30 PM PDT 24 |
Apr 30 12:35:40 PM PDT 24 |
794560833 ps |
| T218 |
/workspace/coverage/default/48.spi_device_pass_addr_payload_swap.2208280435 |
|
|
Apr 30 12:35:31 PM PDT 24 |
Apr 30 12:35:52 PM PDT 24 |
7627553300 ps |
| T298 |
/workspace/coverage/default/21.spi_device_mailbox.2549072202 |
|
|
Apr 30 12:34:20 PM PDT 24 |
Apr 30 12:36:47 PM PDT 24 |
53877920523 ps |
| T741 |
/workspace/coverage/default/40.spi_device_tpm_rw.784269276 |
|
|
Apr 30 12:35:11 PM PDT 24 |
Apr 30 12:35:13 PM PDT 24 |
38488906 ps |
| T742 |
/workspace/coverage/default/45.spi_device_csb_read.2132302282 |
|
|
Apr 30 12:35:19 PM PDT 24 |
Apr 30 12:35:21 PM PDT 24 |
17222705 ps |
| T743 |
/workspace/coverage/default/6.spi_device_tpm_sts_read.3053487077 |
|
|
Apr 30 12:33:30 PM PDT 24 |
Apr 30 12:33:32 PM PDT 24 |
52683685 ps |
| T744 |
/workspace/coverage/default/48.spi_device_tpm_sts_read.1785244514 |
|
|
Apr 30 12:35:24 PM PDT 24 |
Apr 30 12:35:26 PM PDT 24 |
98144817 ps |
| T745 |
/workspace/coverage/default/30.spi_device_mailbox.1045325986 |
|
|
Apr 30 12:34:32 PM PDT 24 |
Apr 30 12:34:50 PM PDT 24 |
5380357438 ps |
| T746 |
/workspace/coverage/default/15.spi_device_tpm_sts_read.1861945909 |
|
|
Apr 30 12:34:03 PM PDT 24 |
Apr 30 12:34:05 PM PDT 24 |
123161157 ps |
| T335 |
/workspace/coverage/default/11.spi_device_mailbox.3268440032 |
|
|
Apr 30 12:34:02 PM PDT 24 |
Apr 30 12:34:18 PM PDT 24 |
4330869400 ps |
| T342 |
/workspace/coverage/default/44.spi_device_pass_cmd_filtering.1725237131 |
|
|
Apr 30 12:35:21 PM PDT 24 |
Apr 30 12:35:26 PM PDT 24 |
947762614 ps |
| T174 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.2271603086 |
|
|
Apr 30 12:29:55 PM PDT 24 |
Apr 30 12:29:57 PM PDT 24 |
29179980 ps |
| T37 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.2598943919 |
|
|
Apr 30 12:29:22 PM PDT 24 |
Apr 30 12:29:23 PM PDT 24 |
23453367 ps |
| T140 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.1715365259 |
|
|
Apr 30 12:29:29 PM PDT 24 |
Apr 30 12:29:32 PM PDT 24 |
287895114 ps |
| T747 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.3890758638 |
|
|
Apr 30 12:29:48 PM PDT 24 |
Apr 30 12:29:49 PM PDT 24 |
14629427 ps |
| T141 |
/workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.2589825552 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
87950450 ps |
| T142 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.2222954605 |
|
|
Apr 30 12:29:38 PM PDT 24 |
Apr 30 12:29:42 PM PDT 24 |
542334280 ps |
| T150 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.1594479586 |
|
|
Apr 30 12:29:35 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
3423313573 ps |
| T38 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1079809816 |
|
|
Apr 30 12:29:26 PM PDT 24 |
Apr 30 12:29:38 PM PDT 24 |
392867081 ps |
| T748 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.1274048414 |
|
|
Apr 30 12:29:48 PM PDT 24 |
Apr 30 12:29:49 PM PDT 24 |
15207080 ps |
| T749 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.3326318808 |
|
|
Apr 30 12:29:55 PM PDT 24 |
Apr 30 12:29:56 PM PDT 24 |
21177056 ps |
| T151 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.2390793805 |
|
|
Apr 30 12:29:42 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
32280289 ps |
| T121 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.4041109027 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:44 PM PDT 24 |
73403450 ps |
| T122 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.1217469438 |
|
|
Apr 30 12:29:40 PM PDT 24 |
Apr 30 12:29:43 PM PDT 24 |
145889411 ps |
| T152 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1530072578 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:44 PM PDT 24 |
34316939 ps |
| T39 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.2368280974 |
|
|
Apr 30 12:29:36 PM PDT 24 |
Apr 30 12:29:57 PM PDT 24 |
861445784 ps |
| T123 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2862260085 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
97119435 ps |
| T175 |
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.412017855 |
|
|
Apr 30 12:29:50 PM PDT 24 |
Apr 30 12:29:52 PM PDT 24 |
44462246 ps |
| T161 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2685397040 |
|
|
Apr 30 12:29:35 PM PDT 24 |
Apr 30 12:29:39 PM PDT 24 |
134129990 ps |
| T750 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2071100999 |
|
|
Apr 30 12:29:47 PM PDT 24 |
Apr 30 12:29:48 PM PDT 24 |
11423158 ps |
| T162 |
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.3290386196 |
|
|
Apr 30 12:29:31 PM PDT 24 |
Apr 30 12:29:33 PM PDT 24 |
27888428 ps |
| T176 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.1270731314 |
|
|
Apr 30 12:29:50 PM PDT 24 |
Apr 30 12:29:52 PM PDT 24 |
224430430 ps |
| T146 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.2700051459 |
|
|
Apr 30 12:29:33 PM PDT 24 |
Apr 30 12:29:38 PM PDT 24 |
114009985 ps |
| T124 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.4249585060 |
|
|
Apr 30 12:29:33 PM PDT 24 |
Apr 30 12:29:36 PM PDT 24 |
96293835 ps |
| T147 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3604835156 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
23736049 ps |
| T148 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.3122734517 |
|
|
Apr 30 12:29:27 PM PDT 24 |
Apr 30 12:29:29 PM PDT 24 |
48065665 ps |
| T126 |
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2278686454 |
|
|
Apr 30 12:29:40 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
95275453 ps |
| T125 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.1429677105 |
|
|
Apr 30 12:29:24 PM PDT 24 |
Apr 30 12:29:43 PM PDT 24 |
1207744204 ps |
| T149 |
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.4230241668 |
|
|
Apr 30 12:29:40 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
149098069 ps |
| T377 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3218194683 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:56 PM PDT 24 |
840045164 ps |
| T378 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.2608357444 |
|
|
Apr 30 12:29:34 PM PDT 24 |
Apr 30 12:29:48 PM PDT 24 |
1162954540 ps |
| T104 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.1614127721 |
|
|
Apr 30 12:29:25 PM PDT 24 |
Apr 30 12:29:27 PM PDT 24 |
76952477 ps |
| T751 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.397184106 |
|
|
Apr 30 12:29:39 PM PDT 24 |
Apr 30 12:29:41 PM PDT 24 |
13320839 ps |
| T177 |
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.2687908975 |
|
|
Apr 30 12:29:42 PM PDT 24 |
Apr 30 12:29:44 PM PDT 24 |
71022340 ps |
| T153 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.1533998059 |
|
|
Apr 30 12:29:39 PM PDT 24 |
Apr 30 12:29:41 PM PDT 24 |
66443666 ps |
| T163 |
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.4140472765 |
|
|
Apr 30 12:29:25 PM PDT 24 |
Apr 30 12:29:30 PM PDT 24 |
166135958 ps |
| T376 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2541521286 |
|
|
Apr 30 12:29:40 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
213031168 ps |
| T143 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.3682145466 |
|
|
Apr 30 12:29:37 PM PDT 24 |
Apr 30 12:29:42 PM PDT 24 |
54608713 ps |
| T136 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.3173479113 |
|
|
Apr 30 12:29:23 PM PDT 24 |
Apr 30 12:29:27 PM PDT 24 |
289326380 ps |
| T752 |
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.1817861305 |
|
|
Apr 30 12:29:51 PM PDT 24 |
Apr 30 12:29:53 PM PDT 24 |
19525227 ps |
| T164 |
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3208245354 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:46 PM PDT 24 |
462979805 ps |
| T753 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.1446167003 |
|
|
Apr 30 12:29:33 PM PDT 24 |
Apr 30 12:29:34 PM PDT 24 |
16091342 ps |
| T380 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2114380744 |
|
|
Apr 30 12:29:26 PM PDT 24 |
Apr 30 12:29:47 PM PDT 24 |
1156839245 ps |
| T154 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.2918155548 |
|
|
Apr 30 12:29:34 PM PDT 24 |
Apr 30 12:29:37 PM PDT 24 |
46540230 ps |
| T131 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.484357626 |
|
|
Apr 30 12:29:42 PM PDT 24 |
Apr 30 12:29:47 PM PDT 24 |
548193070 ps |
| T155 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_rw.338351607 |
|
|
Apr 30 12:29:39 PM PDT 24 |
Apr 30 12:29:43 PM PDT 24 |
155499722 ps |
| T754 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.2565560586 |
|
|
Apr 30 12:29:43 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
85915574 ps |
| T755 |
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.2094071637 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:44 PM PDT 24 |
14877557 ps |
| T384 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.3378479103 |
|
|
Apr 30 12:29:44 PM PDT 24 |
Apr 30 12:29:51 PM PDT 24 |
111507973 ps |
| T144 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.56808616 |
|
|
Apr 30 12:29:36 PM PDT 24 |
Apr 30 12:29:57 PM PDT 24 |
807379483 ps |
| T156 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.1032529788 |
|
|
Apr 30 12:29:34 PM PDT 24 |
Apr 30 12:29:59 PM PDT 24 |
1607502702 ps |
| T145 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.2794349173 |
|
|
Apr 30 12:29:44 PM PDT 24 |
Apr 30 12:29:58 PM PDT 24 |
209752501 ps |
| T756 |
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.1280922050 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:43 PM PDT 24 |
13188728 ps |
| T137 |
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.277277094 |
|
|
Apr 30 12:29:33 PM PDT 24 |
Apr 30 12:29:35 PM PDT 24 |
98566995 ps |
| T385 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1071478280 |
|
|
Apr 30 12:29:40 PM PDT 24 |
Apr 30 12:30:01 PM PDT 24 |
1732977975 ps |
| T132 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.2109556972 |
|
|
Apr 30 12:29:45 PM PDT 24 |
Apr 30 12:29:50 PM PDT 24 |
70050918 ps |
| T157 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.2654989322 |
|
|
Apr 30 12:29:45 PM PDT 24 |
Apr 30 12:29:48 PM PDT 24 |
112066598 ps |
| T757 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.2664453877 |
|
|
Apr 30 12:29:43 PM PDT 24 |
Apr 30 12:29:47 PM PDT 24 |
201590069 ps |
| T758 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.3916529607 |
|
|
Apr 30 12:29:49 PM PDT 24 |
Apr 30 12:29:51 PM PDT 24 |
37906635 ps |
| T759 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.2137441159 |
|
|
Apr 30 12:29:38 PM PDT 24 |
Apr 30 12:29:40 PM PDT 24 |
28546175 ps |
| T381 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.2076660158 |
|
|
Apr 30 12:29:42 PM PDT 24 |
Apr 30 12:29:51 PM PDT 24 |
600568073 ps |
| T168 |
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.2894721792 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:30:05 PM PDT 24 |
2723994434 ps |
| T760 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.2906134332 |
|
|
Apr 30 12:29:32 PM PDT 24 |
Apr 30 12:29:36 PM PDT 24 |
75267271 ps |
| T158 |
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3971115838 |
|
|
Apr 30 12:29:32 PM PDT 24 |
Apr 30 12:29:34 PM PDT 24 |
208899990 ps |
| T761 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.2853522228 |
|
|
Apr 30 12:29:45 PM PDT 24 |
Apr 30 12:29:46 PM PDT 24 |
45912601 ps |
| T135 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.1730749004 |
|
|
Apr 30 12:29:36 PM PDT 24 |
Apr 30 12:29:39 PM PDT 24 |
38873158 ps |
| T762 |
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.713445076 |
|
|
Apr 30 12:29:42 PM PDT 24 |
Apr 30 12:29:48 PM PDT 24 |
63742799 ps |
| T169 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.1181516318 |
|
|
Apr 30 12:29:40 PM PDT 24 |
Apr 30 12:29:43 PM PDT 24 |
334397792 ps |
| T763 |
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.1876312358 |
|
|
Apr 30 12:29:31 PM PDT 24 |
Apr 30 12:29:35 PM PDT 24 |
902886553 ps |
| T764 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.3607915112 |
|
|
Apr 30 12:29:41 PM PDT 24 |
Apr 30 12:29:45 PM PDT 24 |
94108585 ps |
| T159 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.1510125431 |
|
|
Apr 30 12:29:35 PM PDT 24 |
Apr 30 12:29:38 PM PDT 24 |
157554684 ps |