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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
92.15 97.67 93.02 98.61 80.85 96.09 90.90 87.88


Total test records in report: 845
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T622 /workspace/coverage/default/3.spi_device_tpm_rw.3216633567 May 02 12:50:08 PM PDT 24 May 02 12:50:14 PM PDT 24 101499594 ps
T623 /workspace/coverage/default/45.spi_device_csb_read.3884039682 May 02 12:51:50 PM PDT 24 May 02 12:51:54 PM PDT 24 26576476 ps
T624 /workspace/coverage/default/26.spi_device_tpm_rw.2890065575 May 02 12:50:52 PM PDT 24 May 02 12:51:00 PM PDT 24 48978276 ps
T625 /workspace/coverage/default/40.spi_device_read_buffer_direct.3140624310 May 02 12:51:29 PM PDT 24 May 02 12:51:35 PM PDT 24 113987105 ps
T626 /workspace/coverage/default/36.spi_device_read_buffer_direct.1582157440 May 02 12:51:17 PM PDT 24 May 02 12:51:25 PM PDT 24 959050884 ps
T627 /workspace/coverage/default/6.spi_device_mailbox.588665929 May 02 12:50:08 PM PDT 24 May 02 12:50:14 PM PDT 24 48316544 ps
T335 /workspace/coverage/default/36.spi_device_intercept.2792183798 May 02 12:51:09 PM PDT 24 May 02 12:51:21 PM PDT 24 485060361 ps
T628 /workspace/coverage/default/13.spi_device_flash_mode.1880314727 May 02 12:50:32 PM PDT 24 May 02 12:51:08 PM PDT 24 1725007920 ps
T629 /workspace/coverage/default/19.spi_device_tpm_sts_read.998778655 May 02 12:50:36 PM PDT 24 May 02 12:50:39 PM PDT 24 131179410 ps
T348 /workspace/coverage/default/27.spi_device_pass_addr_payload_swap.3127222413 May 02 12:50:53 PM PDT 24 May 02 12:51:06 PM PDT 24 924490110 ps
T630 /workspace/coverage/default/30.spi_device_tpm_sts_read.1756960417 May 02 12:51:10 PM PDT 24 May 02 12:51:15 PM PDT 24 104768400 ps
T631 /workspace/coverage/default/40.spi_device_tpm_sts_read.1225552557 May 02 12:51:21 PM PDT 24 May 02 12:51:26 PM PDT 24 149949007 ps
T632 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.3520600789 May 02 12:50:10 PM PDT 24 May 02 12:50:20 PM PDT 24 1846990125 ps
T633 /workspace/coverage/default/25.spi_device_tpm_all.2490525792 May 02 12:50:47 PM PDT 24 May 02 12:51:22 PM PDT 24 18338160817 ps
T634 /workspace/coverage/default/10.spi_device_tpm_all.268419290 May 02 12:50:25 PM PDT 24 May 02 12:51:09 PM PDT 24 61538654234 ps
T281 /workspace/coverage/default/25.spi_device_cfg_cmd.2012653087 May 02 12:50:47 PM PDT 24 May 02 12:51:02 PM PDT 24 3489663009 ps
T635 /workspace/coverage/default/0.spi_device_tpm_read_hw_reg.2781318128 May 02 12:49:51 PM PDT 24 May 02 12:50:00 PM PDT 24 796385433 ps
T310 /workspace/coverage/default/47.spi_device_flash_mode.1024157930 May 02 12:51:49 PM PDT 24 May 02 12:52:04 PM PDT 24 5060298519 ps
T636 /workspace/coverage/default/45.spi_device_read_buffer_direct.402611872 May 02 12:51:52 PM PDT 24 May 02 12:52:01 PM PDT 24 1623657535 ps
T51 /workspace/coverage/default/4.spi_device_sec_cm.469183719 May 02 12:50:05 PM PDT 24 May 02 12:50:09 PM PDT 24 662717437 ps
T637 /workspace/coverage/default/23.spi_device_alert_test.1893877923 May 02 12:50:59 PM PDT 24 May 02 12:51:05 PM PDT 24 52303477 ps
T276 /workspace/coverage/default/29.spi_device_pass_cmd_filtering.4231174654 May 02 12:50:52 PM PDT 24 May 02 12:51:04 PM PDT 24 1472029663 ps
T638 /workspace/coverage/default/9.spi_device_tpm_rw.3650487657 May 02 12:50:17 PM PDT 24 May 02 12:50:21 PM PDT 24 196817679 ps
T639 /workspace/coverage/default/45.spi_device_tpm_read_hw_reg.195602453 May 02 12:51:52 PM PDT 24 May 02 12:52:17 PM PDT 24 6245647688 ps
T241 /workspace/coverage/default/29.spi_device_pass_addr_payload_swap.631893028 May 02 12:50:50 PM PDT 24 May 02 12:50:57 PM PDT 24 87866824 ps
T640 /workspace/coverage/default/9.spi_device_mem_parity.1513914007 May 02 12:50:27 PM PDT 24 May 02 12:50:31 PM PDT 24 105864975 ps
T641 /workspace/coverage/default/0.spi_device_tpm_sts_read.2899683362 May 02 12:49:55 PM PDT 24 May 02 12:49:59 PM PDT 24 36329977 ps
T291 /workspace/coverage/default/30.spi_device_pass_addr_payload_swap.2743445355 May 02 12:50:55 PM PDT 24 May 02 12:51:22 PM PDT 24 13766344929 ps
T299 /workspace/coverage/default/38.spi_device_flash_mode.683907412 May 02 12:51:18 PM PDT 24 May 02 12:51:49 PM PDT 24 12604133629 ps
T642 /workspace/coverage/default/22.spi_device_tpm_rw.2706000737 May 02 12:50:57 PM PDT 24 May 02 12:51:04 PM PDT 24 127951605 ps
T349 /workspace/coverage/default/17.spi_device_pass_addr_payload_swap.2952100998 May 02 12:50:28 PM PDT 24 May 02 12:50:39 PM PDT 24 1231926744 ps
T643 /workspace/coverage/default/49.spi_device_read_buffer_direct.3286215081 May 02 12:51:53 PM PDT 24 May 02 12:52:02 PM PDT 24 1236270592 ps
T259 /workspace/coverage/default/25.spi_device_pass_addr_payload_swap.3508910640 May 02 12:50:45 PM PDT 24 May 02 12:50:56 PM PDT 24 6812632303 ps
T364 /workspace/coverage/default/42.spi_device_flash_mode.208999580 May 02 12:51:33 PM PDT 24 May 02 12:51:46 PM PDT 24 427815105 ps
T644 /workspace/coverage/default/35.spi_device_csb_read.1846994290 May 02 12:51:15 PM PDT 24 May 02 12:51:20 PM PDT 24 34291507 ps
T645 /workspace/coverage/default/30.spi_device_tpm_rw.2223413583 May 02 12:51:14 PM PDT 24 May 02 12:51:21 PM PDT 24 252651818 ps
T646 /workspace/coverage/default/35.spi_device_tpm_read_hw_reg.4223422946 May 02 12:51:14 PM PDT 24 May 02 12:51:22 PM PDT 24 1733707375 ps
T647 /workspace/coverage/default/18.spi_device_tpm_sts_read.2812241927 May 02 12:50:34 PM PDT 24 May 02 12:50:38 PM PDT 24 301464872 ps
T648 /workspace/coverage/default/6.spi_device_read_buffer_direct.4151711243 May 02 12:50:00 PM PDT 24 May 02 12:50:08 PM PDT 24 190608557 ps
T649 /workspace/coverage/default/34.spi_device_tpm_sts_read.3413712138 May 02 12:51:09 PM PDT 24 May 02 12:51:14 PM PDT 24 114642418 ps
T650 /workspace/coverage/default/6.spi_device_csb_read.2962615672 May 02 12:50:21 PM PDT 24 May 02 12:50:23 PM PDT 24 46832258 ps
T651 /workspace/coverage/default/38.spi_device_csb_read.2617491601 May 02 12:51:32 PM PDT 24 May 02 12:51:36 PM PDT 24 18831437 ps
T652 /workspace/coverage/default/39.spi_device_tpm_read_hw_reg.4004239519 May 02 12:51:17 PM PDT 24 May 02 12:51:36 PM PDT 24 37565348749 ps
T653 /workspace/coverage/default/30.spi_device_flash_mode.1731427296 May 02 12:50:57 PM PDT 24 May 02 12:52:46 PM PDT 24 31594626663 ps
T654 /workspace/coverage/default/29.spi_device_tpm_sts_read.725809088 May 02 12:50:48 PM PDT 24 May 02 12:50:52 PM PDT 24 32172653 ps
T292 /workspace/coverage/default/37.spi_device_pass_addr_payload_swap.1009191084 May 02 12:51:25 PM PDT 24 May 02 12:51:33 PM PDT 24 20765358453 ps
T655 /workspace/coverage/default/11.spi_device_mem_parity.1534940364 May 02 12:50:23 PM PDT 24 May 02 12:50:26 PM PDT 24 46555574 ps
T404 /workspace/coverage/default/20.spi_device_tpm_all.1741932472 May 02 12:50:32 PM PDT 24 May 02 12:51:00 PM PDT 24 11240736344 ps
T656 /workspace/coverage/default/31.spi_device_tpm_sts_read.1998815834 May 02 12:51:10 PM PDT 24 May 02 12:51:15 PM PDT 24 68857210 ps
T361 /workspace/coverage/default/32.spi_device_pass_cmd_filtering.2642456039 May 02 12:51:13 PM PDT 24 May 02 12:51:46 PM PDT 24 11718985893 ps
T233 /workspace/coverage/default/13.spi_device_intercept.1459670101 May 02 12:50:23 PM PDT 24 May 02 12:50:38 PM PDT 24 1401264706 ps
T410 /workspace/coverage/default/5.spi_device_tpm_all.3688442701 May 02 12:50:16 PM PDT 24 May 02 12:51:05 PM PDT 24 156821395962 ps
T319 /workspace/coverage/default/25.spi_device_mailbox.531852798 May 02 12:50:50 PM PDT 24 May 02 12:52:22 PM PDT 24 53102280676 ps
T657 /workspace/coverage/default/8.spi_device_tpm_read_hw_reg.2598092931 May 02 12:50:23 PM PDT 24 May 02 12:50:43 PM PDT 24 5287049582 ps
T658 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.120614537 May 02 12:50:41 PM PDT 24 May 02 12:50:46 PM PDT 24 530807638 ps
T659 /workspace/coverage/default/32.spi_device_tpm_all.3953681632 May 02 12:51:08 PM PDT 24 May 02 12:51:21 PM PDT 24 659364918 ps
T660 /workspace/coverage/default/48.spi_device_pass_cmd_filtering.1521782987 May 02 12:51:51 PM PDT 24 May 02 12:52:14 PM PDT 24 4391640660 ps
T661 /workspace/coverage/default/41.spi_device_csb_read.2260472502 May 02 12:51:38 PM PDT 24 May 02 12:51:41 PM PDT 24 15910642 ps
T662 /workspace/coverage/default/36.spi_device_tpm_rw.1346937638 May 02 12:51:18 PM PDT 24 May 02 12:51:34 PM PDT 24 1230535034 ps
T222 /workspace/coverage/default/47.spi_device_upload.478620476 May 02 12:51:46 PM PDT 24 May 02 12:51:51 PM PDT 24 464020970 ps
T663 /workspace/coverage/default/3.spi_device_tpm_read_hw_reg.2043955288 May 02 12:50:01 PM PDT 24 May 02 12:50:08 PM PDT 24 1719586222 ps
T333 /workspace/coverage/default/39.spi_device_intercept.3987774532 May 02 12:51:18 PM PDT 24 May 02 12:51:29 PM PDT 24 880447690 ps
T664 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.1590541262 May 02 12:50:23 PM PDT 24 May 02 12:50:29 PM PDT 24 478109765 ps
T665 /workspace/coverage/default/30.spi_device_alert_test.3954360915 May 02 12:51:15 PM PDT 24 May 02 12:51:20 PM PDT 24 39011071 ps
T666 /workspace/coverage/default/34.spi_device_read_buffer_direct.2614534676 May 02 12:51:16 PM PDT 24 May 02 12:51:25 PM PDT 24 934962992 ps
T667 /workspace/coverage/default/39.spi_device_tpm_rw.1252122451 May 02 12:51:20 PM PDT 24 May 02 12:51:26 PM PDT 24 184989788 ps
T231 /workspace/coverage/default/5.spi_device_mailbox.3994666053 May 02 12:49:59 PM PDT 24 May 02 12:50:06 PM PDT 24 144630983 ps
T668 /workspace/coverage/default/23.spi_device_mailbox.2602090704 May 02 12:50:58 PM PDT 24 May 02 12:51:06 PM PDT 24 2458916340 ps
T343 /workspace/coverage/default/1.spi_device_pass_addr_payload_swap.917888646 May 02 12:50:04 PM PDT 24 May 02 12:50:14 PM PDT 24 1407504731 ps
T669 /workspace/coverage/default/3.spi_device_read_buffer_direct.2385230670 May 02 12:50:11 PM PDT 24 May 02 12:50:29 PM PDT 24 1345715264 ps
T226 /workspace/coverage/default/9.spi_device_pass_cmd_filtering.4008285100 May 02 12:50:25 PM PDT 24 May 02 12:50:49 PM PDT 24 5768273245 ps
T670 /workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3826690653 May 02 12:50:41 PM PDT 24 May 02 12:50:55 PM PDT 24 6613684288 ps
T671 /workspace/coverage/default/7.spi_device_tpm_read_hw_reg.3920511078 May 02 12:50:03 PM PDT 24 May 02 12:50:13 PM PDT 24 1857092874 ps
T346 /workspace/coverage/default/49.spi_device_pass_addr_payload_swap.1312096593 May 02 12:51:52 PM PDT 24 May 02 12:52:03 PM PDT 24 1738015080 ps
T269 /workspace/coverage/default/20.spi_device_mailbox.2619477006 May 02 12:50:39 PM PDT 24 May 02 12:52:06 PM PDT 24 46313813167 ps
T672 /workspace/coverage/default/45.spi_device_alert_test.3614165781 May 02 12:51:48 PM PDT 24 May 02 12:51:52 PM PDT 24 21977108 ps
T331 /workspace/coverage/default/11.spi_device_intercept.3753431571 May 02 12:50:21 PM PDT 24 May 02 12:50:41 PM PDT 24 2645921381 ps
T673 /workspace/coverage/default/18.spi_device_alert_test.1085102136 May 02 12:50:38 PM PDT 24 May 02 12:50:41 PM PDT 24 22388193 ps
T282 /workspace/coverage/default/23.spi_device_upload.640829171 May 02 12:50:53 PM PDT 24 May 02 12:51:01 PM PDT 24 228394255 ps
T674 /workspace/coverage/default/30.spi_device_read_buffer_direct.2253140614 May 02 12:51:05 PM PDT 24 May 02 12:51:18 PM PDT 24 481711181 ps
T211 /workspace/coverage/default/33.spi_device_pass_addr_payload_swap.270714579 May 02 12:51:06 PM PDT 24 May 02 12:51:16 PM PDT 24 4064214573 ps
T342 /workspace/coverage/default/34.spi_device_pass_addr_payload_swap.3811362985 May 02 12:51:19 PM PDT 24 May 02 12:51:27 PM PDT 24 193063552 ps
T675 /workspace/coverage/default/32.spi_device_alert_test.342324721 May 02 12:51:19 PM PDT 24 May 02 12:51:25 PM PDT 24 12469975 ps
T676 /workspace/coverage/default/20.spi_device_tpm_read_hw_reg.3288159938 May 02 12:50:39 PM PDT 24 May 02 12:50:57 PM PDT 24 3722014776 ps
T677 /workspace/coverage/default/24.spi_device_tpm_read_hw_reg.453360683 May 02 12:50:49 PM PDT 24 May 02 12:50:59 PM PDT 24 757911735 ps
T678 /workspace/coverage/default/31.spi_device_alert_test.458371909 May 02 12:51:02 PM PDT 24 May 02 12:51:08 PM PDT 24 31323028 ps
T338 /workspace/coverage/default/8.spi_device_upload.1226919055 May 02 12:50:40 PM PDT 24 May 02 12:51:13 PM PDT 24 10239679552 ps
T679 /workspace/coverage/default/13.spi_device_tpm_all.1733414611 May 02 12:50:34 PM PDT 24 May 02 12:51:21 PM PDT 24 15158821441 ps
T680 /workspace/coverage/default/18.spi_device_tpm_all.3885111041 May 02 12:50:36 PM PDT 24 May 02 12:51:14 PM PDT 24 4593300227 ps
T256 /workspace/coverage/default/20.spi_device_pass_cmd_filtering.4131979587 May 02 12:50:52 PM PDT 24 May 02 12:51:02 PM PDT 24 1255542175 ps
T681 /workspace/coverage/default/36.spi_device_tpm_all.2009209685 May 02 12:51:25 PM PDT 24 May 02 12:52:05 PM PDT 24 29658759420 ps
T290 /workspace/coverage/default/35.spi_device_upload.2578100113 May 02 12:51:18 PM PDT 24 May 02 12:51:32 PM PDT 24 4592075101 ps
T375 /workspace/coverage/default/28.spi_device_pass_cmd_filtering.145647369 May 02 12:51:09 PM PDT 24 May 02 12:51:18 PM PDT 24 652667508 ps
T377 /workspace/coverage/default/48.spi_device_upload.3916685041 May 02 12:51:49 PM PDT 24 May 02 12:51:55 PM PDT 24 248204589 ps
T682 /workspace/coverage/default/49.spi_device_alert_test.866140726 May 02 12:51:56 PM PDT 24 May 02 12:52:01 PM PDT 24 13431663 ps
T683 /workspace/coverage/default/31.spi_device_read_buffer_direct.224977553 May 02 12:50:51 PM PDT 24 May 02 12:51:01 PM PDT 24 379634096 ps
T684 /workspace/coverage/default/14.spi_device_tpm_rw.1282241838 May 02 12:50:32 PM PDT 24 May 02 12:50:40 PM PDT 24 1050410258 ps
T685 /workspace/coverage/default/13.spi_device_mailbox.1857991951 May 02 12:50:42 PM PDT 24 May 02 12:51:12 PM PDT 24 53840977723 ps
T334 /workspace/coverage/default/41.spi_device_intercept.3981763555 May 02 12:51:24 PM PDT 24 May 02 12:51:33 PM PDT 24 1043947393 ps
T357 /workspace/coverage/default/49.spi_device_flash_mode.1870714896 May 02 12:51:50 PM PDT 24 May 02 12:53:24 PM PDT 24 144520034409 ps
T686 /workspace/coverage/default/4.spi_device_tpm_read_hw_reg.3916098286 May 02 12:50:15 PM PDT 24 May 02 12:50:28 PM PDT 24 6111450400 ps
T260 /workspace/coverage/default/41.spi_device_upload.963722516 May 02 12:51:30 PM PDT 24 May 02 12:51:35 PM PDT 24 305860056 ps
T407 /workspace/coverage/default/8.spi_device_tpm_all.174496114 May 02 12:50:41 PM PDT 24 May 02 12:51:01 PM PDT 24 4849046404 ps
T247 /workspace/coverage/default/46.spi_device_pass_addr_payload_swap.3816022393 May 02 12:51:52 PM PDT 24 May 02 12:52:08 PM PDT 24 2432908750 ps
T360 /workspace/coverage/default/10.spi_device_upload.1073380941 May 02 12:50:24 PM PDT 24 May 02 12:50:36 PM PDT 24 2080654753 ps
T687 /workspace/coverage/default/9.spi_device_tpm_sts_read.2334466097 May 02 12:50:00 PM PDT 24 May 02 12:50:05 PM PDT 24 15116889 ps
T326 /workspace/coverage/default/35.spi_device_pass_cmd_filtering.4268653488 May 02 12:51:17 PM PDT 24 May 02 12:51:39 PM PDT 24 6401775541 ps
T327 /workspace/coverage/default/45.spi_device_cfg_cmd.3245610245 May 02 12:51:51 PM PDT 24 May 02 12:52:05 PM PDT 24 9759869662 ps
T124 /workspace/coverage/default/45.spi_device_intercept.4075087017 May 02 12:51:48 PM PDT 24 May 02 12:52:01 PM PDT 24 4276502896 ps
T688 /workspace/coverage/default/33.spi_device_stress_all.1130757174 May 02 12:51:07 PM PDT 24 May 02 12:51:13 PM PDT 24 72180922 ps
T689 /workspace/coverage/default/22.spi_device_cfg_cmd.548071239 May 02 12:50:47 PM PDT 24 May 02 12:50:54 PM PDT 24 951941621 ps
T307 /workspace/coverage/default/16.spi_device_flash_mode.126287427 May 02 12:50:27 PM PDT 24 May 02 12:52:57 PM PDT 24 14104875915 ps
T690 /workspace/coverage/default/19.spi_device_alert_test.480821039 May 02 12:50:54 PM PDT 24 May 02 12:51:01 PM PDT 24 23624869 ps
T339 /workspace/coverage/default/15.spi_device_intercept.2996256754 May 02 12:50:24 PM PDT 24 May 02 12:50:32 PM PDT 24 417822017 ps
T352 /workspace/coverage/default/40.spi_device_pass_addr_payload_swap.3264092794 May 02 12:51:29 PM PDT 24 May 02 12:51:38 PM PDT 24 4105369083 ps
T691 /workspace/coverage/default/16.spi_device_read_buffer_direct.3958813078 May 02 12:50:35 PM PDT 24 May 02 12:50:41 PM PDT 24 539148025 ps
T692 /workspace/coverage/default/38.spi_device_read_buffer_direct.659637802 May 02 12:51:18 PM PDT 24 May 02 12:51:27 PM PDT 24 427242535 ps
T350 /workspace/coverage/default/7.spi_device_pass_addr_payload_swap.2178102797 May 02 12:50:10 PM PDT 24 May 02 12:50:19 PM PDT 24 1337731664 ps
T693 /workspace/coverage/default/12.spi_device_tpm_rw.4192922814 May 02 12:50:04 PM PDT 24 May 02 12:50:09 PM PDT 24 76744483 ps
T694 /workspace/coverage/default/5.spi_device_flash_mode.1350610113 May 02 12:50:13 PM PDT 24 May 02 12:50:30 PM PDT 24 571354126 ps
T52 /workspace/coverage/default/2.spi_device_sec_cm.3837187319 May 02 12:49:59 PM PDT 24 May 02 12:50:03 PM PDT 24 241437926 ps
T695 /workspace/coverage/default/40.spi_device_tpm_read_hw_reg.617034813 May 02 12:51:28 PM PDT 24 May 02 12:51:38 PM PDT 24 1723155643 ps
T351 /workspace/coverage/default/23.spi_device_pass_addr_payload_swap.1317747739 May 02 12:50:48 PM PDT 24 May 02 12:50:55 PM PDT 24 1204739240 ps
T696 /workspace/coverage/default/32.spi_device_read_buffer_direct.526659605 May 02 12:51:13 PM PDT 24 May 02 12:51:21 PM PDT 24 142798567 ps
T697 /workspace/coverage/default/36.spi_device_csb_read.1094326458 May 02 12:51:15 PM PDT 24 May 02 12:51:20 PM PDT 24 16201952 ps
T698 /workspace/coverage/default/22.spi_device_tpm_sts_read.1224806065 May 02 12:50:44 PM PDT 24 May 02 12:50:47 PM PDT 24 15119579 ps
T699 /workspace/coverage/default/28.spi_device_tpm_all.4107132005 May 02 12:50:52 PM PDT 24 May 02 12:51:33 PM PDT 24 2625853953 ps
T700 /workspace/coverage/default/2.spi_device_tpm_read_hw_reg.3533580578 May 02 12:50:00 PM PDT 24 May 02 12:50:18 PM PDT 24 35071830469 ps
T268 /workspace/coverage/default/22.spi_device_mailbox.4188197703 May 02 12:50:52 PM PDT 24 May 02 12:51:26 PM PDT 24 3182644848 ps
T701 /workspace/coverage/default/44.spi_device_tpm_rw.2578907680 May 02 12:51:28 PM PDT 24 May 02 12:51:35 PM PDT 24 1325902664 ps
T702 /workspace/coverage/default/33.spi_device_csb_read.4109341773 May 02 12:51:20 PM PDT 24 May 02 12:51:25 PM PDT 24 17616664 ps
T213 /workspace/coverage/default/15.spi_device_mailbox.1431551437 May 02 12:50:45 PM PDT 24 May 02 12:51:05 PM PDT 24 8208892384 ps
T703 /workspace/coverage/default/43.spi_device_read_buffer_direct.130426990 May 02 12:51:37 PM PDT 24 May 02 12:51:43 PM PDT 24 126676135 ps
T270 /workspace/coverage/default/36.spi_device_pass_cmd_filtering.2472365332 May 02 12:51:20 PM PDT 24 May 02 12:51:30 PM PDT 24 6225908938 ps
T704 /workspace/coverage/default/44.spi_device_tpm_sts_read.3591068967 May 02 12:51:33 PM PDT 24 May 02 12:51:37 PM PDT 24 469228065 ps
T705 /workspace/coverage/default/24.spi_device_tpm_sts_read.1512042044 May 02 12:50:48 PM PDT 24 May 02 12:50:52 PM PDT 24 67781110 ps
T706 /workspace/coverage/default/5.spi_device_alert_test.2866471588 May 02 12:50:19 PM PDT 24 May 02 12:50:22 PM PDT 24 28184381 ps
T707 /workspace/coverage/default/15.spi_device_tpm_sts_read.762363049 May 02 12:50:40 PM PDT 24 May 02 12:50:43 PM PDT 24 42561360 ps
T303 /workspace/coverage/default/28.spi_device_flash_mode.3590785977 May 02 12:50:56 PM PDT 24 May 02 12:51:25 PM PDT 24 4804539497 ps
T708 /workspace/coverage/default/6.spi_device_tpm_rw.3127624200 May 02 12:50:02 PM PDT 24 May 02 12:50:07 PM PDT 24 46953823 ps
T709 /workspace/coverage/default/17.spi_device_csb_read.3062992403 May 02 12:50:29 PM PDT 24 May 02 12:50:33 PM PDT 24 66793976 ps
T710 /workspace/coverage/default/46.spi_device_alert_test.2421290109 May 02 12:51:50 PM PDT 24 May 02 12:51:54 PM PDT 24 34429049 ps
T711 /workspace/coverage/default/18.spi_device_tpm_rw.1660228838 May 02 12:50:41 PM PDT 24 May 02 12:50:51 PM PDT 24 430538834 ps
T353 /workspace/coverage/default/6.spi_device_pass_addr_payload_swap.307896171 May 02 12:50:07 PM PDT 24 May 02 12:50:13 PM PDT 24 2089667910 ps
T261 /workspace/coverage/default/30.spi_device_intercept.3247235324 May 02 12:51:00 PM PDT 24 May 02 12:51:33 PM PDT 24 30749386023 ps
T712 /workspace/coverage/default/11.spi_device_alert_test.2982836248 May 02 12:50:02 PM PDT 24 May 02 12:50:06 PM PDT 24 37647905 ps
T713 /workspace/coverage/default/48.spi_device_read_buffer_direct.138137635 May 02 12:51:54 PM PDT 24 May 02 12:52:01 PM PDT 24 81822818 ps
T332 /workspace/coverage/default/30.spi_device_mailbox.1474075412 May 02 12:50:52 PM PDT 24 May 02 12:52:53 PM PDT 24 13647327103 ps
T714 /workspace/coverage/default/26.spi_device_tpm_read_hw_reg.4061213026 May 02 12:50:52 PM PDT 24 May 02 12:51:18 PM PDT 24 30316442229 ps
T715 /workspace/coverage/default/28.spi_device_tpm_rw.4039192876 May 02 12:51:00 PM PDT 24 May 02 12:51:19 PM PDT 24 334324226 ps
T716 /workspace/coverage/default/29.spi_device_alert_test.3590941713 May 02 12:51:08 PM PDT 24 May 02 12:51:13 PM PDT 24 31299993 ps
T717 /workspace/coverage/default/47.spi_device_tpm_sts_read.699991356 May 02 12:51:51 PM PDT 24 May 02 12:51:55 PM PDT 24 17232123 ps
T718 /workspace/coverage/default/37.spi_device_tpm_read_hw_reg.2512476941 May 02 12:51:16 PM PDT 24 May 02 12:51:27 PM PDT 24 1813145516 ps
T719 /workspace/coverage/default/2.spi_device_mailbox.2197946943 May 02 12:50:11 PM PDT 24 May 02 12:50:18 PM PDT 24 445180457 ps
T212 /workspace/coverage/default/43.spi_device_mailbox.697834310 May 02 12:51:29 PM PDT 24 May 02 12:52:03 PM PDT 24 21302092693 ps
T356 /workspace/coverage/default/7.spi_device_mailbox.810006838 May 02 12:50:02 PM PDT 24 May 02 12:50:21 PM PDT 24 1704785192 ps
T720 /workspace/coverage/default/4.spi_device_tpm_sts_read.1005172884 May 02 12:50:22 PM PDT 24 May 02 12:50:25 PM PDT 24 18359987 ps
T721 /workspace/coverage/default/12.spi_device_read_buffer_direct.3693716955 May 02 12:50:34 PM PDT 24 May 02 12:50:47 PM PDT 24 3920251340 ps
T722 /workspace/coverage/default/37.spi_device_mailbox.3905192090 May 02 12:51:17 PM PDT 24 May 02 12:51:27 PM PDT 24 831621708 ps
T723 /workspace/coverage/default/16.spi_device_tpm_all.3751551312 May 02 12:50:47 PM PDT 24 May 02 12:50:57 PM PDT 24 772850118 ps
T724 /workspace/coverage/default/28.spi_device_stress_all.3640185321 May 02 12:50:57 PM PDT 24 May 02 12:51:03 PM PDT 24 48395505 ps
T725 /workspace/coverage/default/49.spi_device_mailbox.268943836 May 02 12:51:48 PM PDT 24 May 02 12:53:36 PM PDT 24 12171067366 ps
T320 /workspace/coverage/default/9.spi_device_intercept.3527537456 May 02 12:50:04 PM PDT 24 May 02 12:50:10 PM PDT 24 201879486 ps
T726 /workspace/coverage/default/48.spi_device_stress_all.1118073014 May 02 12:51:51 PM PDT 24 May 02 12:51:56 PM PDT 24 267718137 ps
T727 /workspace/coverage/default/41.spi_device_tpm_read_hw_reg.202719391 May 02 12:51:21 PM PDT 24 May 02 12:51:37 PM PDT 24 16525092565 ps
T728 /workspace/coverage/default/14.spi_device_tpm_read_hw_reg.244282338 May 02 12:50:25 PM PDT 24 May 02 12:50:37 PM PDT 24 2435886823 ps
T729 /workspace/coverage/default/12.spi_device_pass_cmd_filtering.3293624948 May 02 12:50:22 PM PDT 24 May 02 12:50:35 PM PDT 24 4175034724 ps
T198 /workspace/coverage/default/3.spi_device_pass_cmd_filtering.1192737215 May 02 12:50:03 PM PDT 24 May 02 12:50:21 PM PDT 24 5578873662 ps
T730 /workspace/coverage/default/26.spi_device_csb_read.1216833125 May 02 12:50:48 PM PDT 24 May 02 12:50:53 PM PDT 24 38197968 ps
T328 /workspace/coverage/default/11.spi_device_cfg_cmd.2817690613 May 02 12:50:24 PM PDT 24 May 02 12:50:38 PM PDT 24 702517060 ps
T731 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.1611141547 May 02 12:47:17 PM PDT 24 May 02 12:47:22 PM PDT 24 38169161 ps
T126 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.368574365 May 02 12:47:09 PM PDT 24 May 02 12:47:14 PM PDT 24 418571344 ps
T732 /workspace/coverage/cover_reg_top/33.spi_device_intr_test.2830218211 May 02 12:47:19 PM PDT 24 May 02 12:47:23 PM PDT 24 12423395 ps
T141 /workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1799214123 May 02 12:46:54 PM PDT 24 May 02 12:47:01 PM PDT 24 583782777 ps
T127 /workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1478034672 May 02 12:47:02 PM PDT 24 May 02 12:47:05 PM PDT 24 70366324 ps
T38 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.4235642680 May 02 12:47:04 PM PDT 24 May 02 12:47:20 PM PDT 24 587669508 ps
T39 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.3413036223 May 02 12:47:12 PM PDT 24 May 02 12:47:36 PM PDT 24 833709828 ps
T733 /workspace/coverage/cover_reg_top/11.spi_device_intr_test.4192138753 May 02 12:47:12 PM PDT 24 May 02 12:47:16 PM PDT 24 40939114 ps
T161 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.137326454 May 02 12:47:09 PM PDT 24 May 02 12:47:15 PM PDT 24 412463862 ps
T40 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.566616628 May 02 12:47:01 PM PDT 24 May 02 12:47:07 PM PDT 24 144046839 ps
T149 /workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3037399026 May 02 12:46:59 PM PDT 24 May 02 12:47:03 PM PDT 24 32550752 ps
T128 /workspace/coverage/cover_reg_top/8.spi_device_tl_errors.338656418 May 02 12:46:53 PM PDT 24 May 02 12:47:00 PM PDT 24 389328857 ps
T140 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.2305983470 May 02 12:46:51 PM PDT 24 May 02 12:46:57 PM PDT 24 146608020 ps
T150 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2929260579 May 02 12:46:51 PM PDT 24 May 02 12:47:15 PM PDT 24 826040236 ps
T133 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2625842221 May 02 12:46:54 PM PDT 24 May 02 12:47:23 PM PDT 24 8941348760 ps
T143 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.609816676 May 02 12:46:43 PM PDT 24 May 02 12:46:49 PM PDT 24 136053802 ps
T162 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.371488825 May 02 12:47:21 PM PDT 24 May 02 12:47:28 PM PDT 24 108895298 ps
T163 /workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.3963158973 May 02 12:47:21 PM PDT 24 May 02 12:47:29 PM PDT 24 64563268 ps
T134 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.3314426167 May 02 12:46:56 PM PDT 24 May 02 12:47:04 PM PDT 24 179072829 ps
T164 /workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.2315828686 May 02 12:47:12 PM PDT 24 May 02 12:47:17 PM PDT 24 77973205 ps
T147 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.201271609 May 02 12:47:21 PM PDT 24 May 02 12:47:32 PM PDT 24 112540745 ps
T175 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.2860734607 May 02 12:47:14 PM PDT 24 May 02 12:47:19 PM PDT 24 15184673 ps
T165 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.226954298 May 02 12:46:50 PM PDT 24 May 02 12:46:55 PM PDT 24 169123409 ps
T176 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.2051417665 May 02 12:47:14 PM PDT 24 May 02 12:47:19 PM PDT 24 123954570 ps
T166 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.3884656423 May 02 12:46:55 PM PDT 24 May 02 12:47:01 PM PDT 24 58111982 ps
T135 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.53918442 May 02 12:46:53 PM PDT 24 May 02 12:47:01 PM PDT 24 265776870 ps
T144 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.819147850 May 02 12:46:55 PM PDT 24 May 02 12:47:03 PM PDT 24 572664951 ps
T734 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.246129780 May 02 12:47:23 PM PDT 24 May 02 12:47:28 PM PDT 24 175142581 ps
T177 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.3433952235 May 02 12:47:14 PM PDT 24 May 02 12:47:19 PM PDT 24 16932091 ps
T735 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1437751655 May 02 12:47:25 PM PDT 24 May 02 12:47:31 PM PDT 24 38161283 ps
T371 /workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.3015789078 May 02 12:47:13 PM PDT 24 May 02 12:47:30 PM PDT 24 199915057 ps
T167 /workspace/coverage/cover_reg_top/14.spi_device_csr_rw.2836837264 May 02 12:47:00 PM PDT 24 May 02 12:47:04 PM PDT 24 58431265 ps
T736 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.2038731451 May 02 12:47:11 PM PDT 24 May 02 12:47:15 PM PDT 24 48059869 ps
T372 /workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3465436721 May 02 12:47:14 PM PDT 24 May 02 12:47:33 PM PDT 24 1260014316 ps
T737 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.123704972 May 02 12:47:09 PM PDT 24 May 02 12:47:14 PM PDT 24 1587418645 ps
T368 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.2423940048 May 02 12:47:23 PM PDT 24 May 02 12:47:40 PM PDT 24 820415588 ps
T171 /workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.712463907 May 02 12:46:55 PM PDT 24 May 02 12:47:39 PM PDT 24 20877838538 ps
T738 /workspace/coverage/cover_reg_top/5.spi_device_intr_test.3476057489 May 02 12:47:21 PM PDT 24 May 02 12:47:26 PM PDT 24 20332892 ps
T139 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3094093034 May 02 12:46:56 PM PDT 24 May 02 12:47:02 PM PDT 24 137249250 ps
T168 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3349585954 May 02 12:47:13 PM PDT 24 May 02 12:47:19 PM PDT 24 147552499 ps
T369 /workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.1213755090 May 02 12:47:14 PM PDT 24 May 02 12:47:38 PM PDT 24 594236676 ps
T739 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.503691491 May 02 12:47:06 PM PDT 24 May 02 12:47:12 PM PDT 24 55789645 ps
T740 /workspace/coverage/cover_reg_top/11.spi_device_csr_rw.3680814768 May 02 12:46:55 PM PDT 24 May 02 12:47:01 PM PDT 24 78830756 ps
T741 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.1700094230 May 02 12:47:10 PM PDT 24 May 02 12:47:14 PM PDT 24 14089670 ps
T151 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.3889421786 May 02 12:46:59 PM PDT 24 May 02 12:47:17 PM PDT 24 853262428 ps
T138 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.3598929723 May 02 12:47:06 PM PDT 24 May 02 12:47:12 PM PDT 24 123776242 ps
T370 /workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.1578634186 May 02 12:46:53 PM PDT 24 May 02 12:47:10 PM PDT 24 192210094 ps
T152 /workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1819957297 May 02 12:46:53 PM PDT 24 May 02 12:47:25 PM PDT 24 9497556305 ps
T742 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.2687216106 May 02 12:47:10 PM PDT 24 May 02 12:47:35 PM PDT 24 3216970287 ps
T172 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3861410926 May 02 12:46:46 PM PDT 24 May 02 12:47:04 PM PDT 24 682267661 ps
T743 /workspace/coverage/cover_reg_top/4.spi_device_intr_test.1836698191 May 02 12:46:52 PM PDT 24 May 02 12:46:58 PM PDT 24 16056489 ps
T153 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.3119656233 May 02 12:47:16 PM PDT 24 May 02 12:47:22 PM PDT 24 108630414 ps
T154 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.2250404355 May 02 12:47:19 PM PDT 24 May 02 12:47:25 PM PDT 24 22112062 ps
T744 /workspace/coverage/cover_reg_top/28.spi_device_intr_test.93849662 May 02 12:47:36 PM PDT 24 May 02 12:47:38 PM PDT 24 28707237 ps
T745 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.2990680913 May 02 12:47:06 PM PDT 24 May 02 12:47:12 PM PDT 24 238773754 ps
T746 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.2833124744 May 02 12:47:19 PM PDT 24 May 02 12:47:24 PM PDT 24 12468620 ps
T155 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.1287469656 May 02 12:47:00 PM PDT 24 May 02 12:47:05 PM PDT 24 614203709 ps
T747 /workspace/coverage/cover_reg_top/30.spi_device_intr_test.2013100576 May 02 12:47:24 PM PDT 24 May 02 12:47:27 PM PDT 24 12327291 ps
T748 /workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.4258108573 May 02 12:47:01 PM PDT 24 May 02 12:47:07 PM PDT 24 609406306 ps
T173 /workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.3510318518 May 02 12:47:02 PM PDT 24 May 02 12:47:19 PM PDT 24 2377018682 ps
T156 /workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.3835511479 May 02 12:47:04 PM PDT 24 May 02 12:47:28 PM PDT 24 4271000697 ps
T749 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.3824427330 May 02 12:46:52 PM PDT 24 May 02 12:47:18 PM PDT 24 3838384173 ps
T136 /workspace/coverage/cover_reg_top/15.spi_device_tl_errors.3924776155 May 02 12:47:06 PM PDT 24 May 02 12:47:13 PM PDT 24 211214064 ps
T750 /workspace/coverage/cover_reg_top/13.spi_device_intr_test.1316328805 May 02 12:47:18 PM PDT 24 May 02 12:47:22 PM PDT 24 13895258 ps
T115 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.2040486905 May 02 12:47:01 PM PDT 24 May 02 12:47:04 PM PDT 24 61634622 ps
T751 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.3268278768 May 02 12:46:52 PM PDT 24 May 02 12:47:12 PM PDT 24 1593163521 ps
T137 /workspace/coverage/cover_reg_top/6.spi_device_tl_errors.3829278090 May 02 12:46:53 PM PDT 24 May 02 12:47:03 PM PDT 24 1060786121 ps
T752 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.3066782463 May 02 12:47:13 PM PDT 24 May 02 12:47:16 PM PDT 24 29374062 ps
T753 /workspace/coverage/cover_reg_top/0.spi_device_mem_walk.1083239598 May 02 12:46:54 PM PDT 24 May 02 12:46:59 PM PDT 24 27794054 ps
T754 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.35542339 May 02 12:46:55 PM PDT 24 May 02 12:47:01 PM PDT 24 115461384 ps
T755 /workspace/coverage/cover_reg_top/2.spi_device_mem_walk.1450694201 May 02 12:47:11 PM PDT 24 May 02 12:47:15 PM PDT 24 132293227 ps
T756 /workspace/coverage/cover_reg_top/9.spi_device_intr_test.2497366311 May 02 12:47:01 PM PDT 24 May 02 12:47:04 PM PDT 24 48469113 ps
T757 /workspace/coverage/cover_reg_top/36.spi_device_intr_test.2119889487 May 02 12:47:37 PM PDT 24 May 02 12:47:39 PM PDT 24 42139667 ps
T758 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.3568044010 May 02 12:46:52 PM PDT 24 May 02 12:46:57 PM PDT 24 14096085 ps
T759 /workspace/coverage/cover_reg_top/26.spi_device_intr_test.1016704283 May 02 12:47:38 PM PDT 24 May 02 12:47:40 PM PDT 24 75893977 ps
T760 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.3598658979 May 02 12:46:48 PM PDT 24 May 02 12:47:17 PM PDT 24 2372168494 ps
T761 /workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.876830057 May 02 12:47:18 PM PDT 24 May 02 12:47:24 PM PDT 24 223989060 ps
T762 /workspace/coverage/cover_reg_top/16.spi_device_tl_errors.130179268 May 02 12:47:17 PM PDT 24 May 02 12:47:24 PM PDT 24 262859740 ps
T763 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.2640070673 May 02 12:47:15 PM PDT 24 May 02 12:47:20 PM PDT 24 45751691 ps
T116 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3209665332 May 02 12:46:55 PM PDT 24 May 02 12:47:01 PM PDT 24 114504638 ps
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