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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
92.10 97.54 92.90 98.61 80.85 95.95 90.90 87.93


Total test records in report: 843
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T613 /workspace/coverage/default/16.spi_device_alert_test.575247690 May 05 12:43:55 PM PDT 24 May 05 12:43:56 PM PDT 24 25883775 ps
T614 /workspace/coverage/default/12.spi_device_stress_all.3586652613 May 05 12:43:44 PM PDT 24 May 05 12:43:46 PM PDT 24 203763782 ps
T615 /workspace/coverage/default/3.spi_device_tpm_sts_read.4013152648 May 05 12:43:13 PM PDT 24 May 05 12:43:16 PM PDT 24 342183954 ps
T616 /workspace/coverage/default/24.spi_device_alert_test.869309606 May 05 12:44:07 PM PDT 24 May 05 12:44:09 PM PDT 24 11228764 ps
T361 /workspace/coverage/default/45.spi_device_intercept.1745596258 May 05 12:45:14 PM PDT 24 May 05 12:45:24 PM PDT 24 2545507198 ps
T617 /workspace/coverage/default/17.spi_device_tpm_rw.3547725743 May 05 12:43:46 PM PDT 24 May 05 12:43:47 PM PDT 24 55508558 ps
T618 /workspace/coverage/default/2.spi_device_mem_parity.3760872591 May 05 12:42:54 PM PDT 24 May 05 12:42:56 PM PDT 24 286224814 ps
T363 /workspace/coverage/default/39.spi_device_mailbox.2779967210 May 05 12:44:47 PM PDT 24 May 05 12:45:52 PM PDT 24 41637730776 ps
T619 /workspace/coverage/default/26.spi_device_read_buffer_direct.2175599225 May 05 12:44:30 PM PDT 24 May 05 12:44:43 PM PDT 24 1200646689 ps
T329 /workspace/coverage/default/19.spi_device_intercept.3826901763 May 05 12:43:52 PM PDT 24 May 05 12:43:57 PM PDT 24 149624582 ps
T620 /workspace/coverage/default/3.spi_device_flash_mode.4110459642 May 05 12:43:20 PM PDT 24 May 05 12:44:15 PM PDT 24 7880521186 ps
T223 /workspace/coverage/default/15.spi_device_pass_cmd_filtering.655734379 May 05 12:43:55 PM PDT 24 May 05 12:44:05 PM PDT 24 12993668382 ps
T621 /workspace/coverage/default/28.spi_device_tpm_all.2738551585 May 05 12:44:18 PM PDT 24 May 05 12:45:29 PM PDT 24 59434905833 ps
T622 /workspace/coverage/default/22.spi_device_tpm_sts_read.3549528907 May 05 12:44:17 PM PDT 24 May 05 12:44:20 PM PDT 24 302980511 ps
T623 /workspace/coverage/default/21.spi_device_read_buffer_direct.1382660897 May 05 12:43:58 PM PDT 24 May 05 12:44:11 PM PDT 24 1442784552 ps
T624 /workspace/coverage/default/44.spi_device_alert_test.3413924902 May 05 12:45:06 PM PDT 24 May 05 12:45:07 PM PDT 24 12343694 ps
T366 /workspace/coverage/default/45.spi_device_flash_mode.1727747548 May 05 12:45:09 PM PDT 24 May 05 12:45:23 PM PDT 24 7344535310 ps
T625 /workspace/coverage/default/36.spi_device_tpm_sts_read.2328234760 May 05 12:45:03 PM PDT 24 May 05 12:45:05 PM PDT 24 167385887 ps
T626 /workspace/coverage/default/2.spi_device_stress_all.1097472777 May 05 12:43:13 PM PDT 24 May 05 12:43:16 PM PDT 24 211443415 ps
T627 /workspace/coverage/default/7.spi_device_read_buffer_direct.3485251106 May 05 12:43:17 PM PDT 24 May 05 12:43:32 PM PDT 24 1207270592 ps
T335 /workspace/coverage/default/20.spi_device_upload.3458556540 May 05 12:43:58 PM PDT 24 May 05 12:44:06 PM PDT 24 612409353 ps
T628 /workspace/coverage/default/0.spi_device_tpm_all.743982683 May 05 12:42:47 PM PDT 24 May 05 12:42:55 PM PDT 24 2388991401 ps
T629 /workspace/coverage/default/0.spi_device_read_buffer_direct.2328501254 May 05 12:42:48 PM PDT 24 May 05 12:42:55 PM PDT 24 177083959 ps
T630 /workspace/coverage/default/10.spi_device_csb_read.3808028688 May 05 12:43:24 PM PDT 24 May 05 12:43:25 PM PDT 24 15643539 ps
T334 /workspace/coverage/default/6.spi_device_intercept.4029270883 May 05 12:43:11 PM PDT 24 May 05 12:43:17 PM PDT 24 650575599 ps
T631 /workspace/coverage/default/3.spi_device_alert_test.1485990564 May 05 12:43:29 PM PDT 24 May 05 12:43:31 PM PDT 24 44657797 ps
T632 /workspace/coverage/default/24.spi_device_tpm_read_hw_reg.3091061898 May 05 12:44:03 PM PDT 24 May 05 12:44:09 PM PDT 24 5362203419 ps
T53 /workspace/coverage/default/1.spi_device_sec_cm.3854420981 May 05 12:42:48 PM PDT 24 May 05 12:42:52 PM PDT 24 123035844 ps
T206 /workspace/coverage/default/12.spi_device_mailbox.1715162606 May 05 12:44:14 PM PDT 24 May 05 12:45:32 PM PDT 24 40794803791 ps
T359 /workspace/coverage/default/19.spi_device_pass_addr_payload_swap.2364175276 May 05 12:44:06 PM PDT 24 May 05 12:44:16 PM PDT 24 2495840952 ps
T633 /workspace/coverage/default/48.spi_device_tpm_all.3774249164 May 05 12:45:25 PM PDT 24 May 05 12:46:04 PM PDT 24 8816692219 ps
T634 /workspace/coverage/default/42.spi_device_read_buffer_direct.3629638806 May 05 12:45:22 PM PDT 24 May 05 12:45:29 PM PDT 24 1100049968 ps
T635 /workspace/coverage/default/22.spi_device_tpm_all.2200935843 May 05 12:44:22 PM PDT 24 May 05 12:44:26 PM PDT 24 436912947 ps
T636 /workspace/coverage/default/46.spi_device_alert_test.1160809261 May 05 12:45:14 PM PDT 24 May 05 12:45:16 PM PDT 24 35702142 ps
T637 /workspace/coverage/default/44.spi_device_read_buffer_direct.2743189323 May 05 12:45:15 PM PDT 24 May 05 12:45:27 PM PDT 24 1694576242 ps
T638 /workspace/coverage/default/19.spi_device_mem_parity.4116965010 May 05 12:44:03 PM PDT 24 May 05 12:44:05 PM PDT 24 94924544 ps
T639 /workspace/coverage/default/44.spi_device_tpm_sts_read.2334838895 May 05 12:45:04 PM PDT 24 May 05 12:45:06 PM PDT 24 125939538 ps
T640 /workspace/coverage/default/25.spi_device_tpm_read_hw_reg.726916023 May 05 12:44:07 PM PDT 24 May 05 12:44:13 PM PDT 24 3676033287 ps
T280 /workspace/coverage/default/4.spi_device_pass_addr_payload_swap.1866763073 May 05 12:43:01 PM PDT 24 May 05 12:43:29 PM PDT 24 31468307292 ps
T340 /workspace/coverage/default/13.spi_device_pass_cmd_filtering.717291445 May 05 12:43:37 PM PDT 24 May 05 12:43:50 PM PDT 24 6127690748 ps
T641 /workspace/coverage/default/29.spi_device_read_buffer_direct.196978349 May 05 12:44:30 PM PDT 24 May 05 12:44:41 PM PDT 24 1237563696 ps
T642 /workspace/coverage/default/7.spi_device_tpm_sts_read.2214803874 May 05 12:43:37 PM PDT 24 May 05 12:43:39 PM PDT 24 234777204 ps
T643 /workspace/coverage/default/36.spi_device_tpm_rw.2042454461 May 05 12:45:05 PM PDT 24 May 05 12:45:07 PM PDT 24 145743370 ps
T644 /workspace/coverage/default/43.spi_device_tpm_rw.1774940828 May 05 12:45:04 PM PDT 24 May 05 12:45:06 PM PDT 24 86245453 ps
T277 /workspace/coverage/default/34.spi_device_pass_cmd_filtering.3165239513 May 05 12:44:33 PM PDT 24 May 05 12:44:55 PM PDT 24 21870923351 ps
T645 /workspace/coverage/default/36.spi_device_tpm_read_hw_reg.2457891738 May 05 12:45:20 PM PDT 24 May 05 12:45:25 PM PDT 24 3799626123 ps
T646 /workspace/coverage/default/27.spi_device_tpm_sts_read.2354270442 May 05 12:44:17 PM PDT 24 May 05 12:44:19 PM PDT 24 92248150 ps
T358 /workspace/coverage/default/35.spi_device_pass_addr_payload_swap.840334222 May 05 12:44:58 PM PDT 24 May 05 12:45:07 PM PDT 24 3713664906 ps
T647 /workspace/coverage/default/15.spi_device_tpm_all.2767679923 May 05 12:43:52 PM PDT 24 May 05 12:44:18 PM PDT 24 4884730753 ps
T83 /workspace/coverage/default/48.spi_device_pass_addr_payload_swap.4170157300 May 05 12:45:16 PM PDT 24 May 05 12:45:57 PM PDT 24 14272563085 ps
T648 /workspace/coverage/default/32.spi_device_alert_test.943959528 May 05 12:44:30 PM PDT 24 May 05 12:44:32 PM PDT 24 23720056 ps
T649 /workspace/coverage/default/43.spi_device_tpm_read_hw_reg.4128380402 May 05 12:45:14 PM PDT 24 May 05 12:45:21 PM PDT 24 860845563 ps
T230 /workspace/coverage/default/30.spi_device_mailbox.2127249346 May 05 12:44:32 PM PDT 24 May 05 12:44:43 PM PDT 24 429668148 ps
T299 /workspace/coverage/default/39.spi_device_pass_addr_payload_swap.1690750999 May 05 12:44:59 PM PDT 24 May 05 12:45:37 PM PDT 24 58420942024 ps
T650 /workspace/coverage/default/9.spi_device_tpm_all.3605138886 May 05 12:43:34 PM PDT 24 May 05 12:44:01 PM PDT 24 18512090770 ps
T651 /workspace/coverage/default/37.spi_device_stress_all.602876239 May 05 12:44:39 PM PDT 24 May 05 12:44:41 PM PDT 24 205969067 ps
T217 /workspace/coverage/default/38.spi_device_intercept.2621218052 May 05 12:44:55 PM PDT 24 May 05 12:45:06 PM PDT 24 4908859503 ps
T652 /workspace/coverage/default/15.spi_device_tpm_rw.3173859126 May 05 12:43:37 PM PDT 24 May 05 12:43:40 PM PDT 24 53534889 ps
T653 /workspace/coverage/default/32.spi_device_tpm_read_hw_reg.2849072429 May 05 12:44:23 PM PDT 24 May 05 12:44:26 PM PDT 24 377483230 ps
T654 /workspace/coverage/default/32.spi_device_mailbox.2221239278 May 05 12:44:32 PM PDT 24 May 05 12:45:14 PM PDT 24 4705554862 ps
T655 /workspace/coverage/default/5.spi_device_tpm_all.3394187592 May 05 12:43:00 PM PDT 24 May 05 12:43:21 PM PDT 24 11231819584 ps
T270 /workspace/coverage/default/16.spi_device_pass_cmd_filtering.2766277786 May 05 12:43:41 PM PDT 24 May 05 12:44:05 PM PDT 24 8627356677 ps
T656 /workspace/coverage/default/0.spi_device_csb_read.3256723741 May 05 12:42:53 PM PDT 24 May 05 12:42:55 PM PDT 24 82107861 ps
T657 /workspace/coverage/default/44.spi_device_tpm_rw.3686199039 May 05 12:45:19 PM PDT 24 May 05 12:45:21 PM PDT 24 60582629 ps
T275 /workspace/coverage/default/15.spi_device_pass_addr_payload_swap.208309459 May 05 12:43:45 PM PDT 24 May 05 12:44:04 PM PDT 24 10866308773 ps
T658 /workspace/coverage/default/9.spi_device_tpm_rw.4052132877 May 05 12:43:38 PM PDT 24 May 05 12:43:44 PM PDT 24 959013167 ps
T659 /workspace/coverage/default/40.spi_device_csb_read.1996523865 May 05 12:44:51 PM PDT 24 May 05 12:44:53 PM PDT 24 85671855 ps
T660 /workspace/coverage/default/47.spi_device_csb_read.326763117 May 05 12:45:27 PM PDT 24 May 05 12:45:29 PM PDT 24 50692938 ps
T266 /workspace/coverage/default/13.spi_device_mailbox.4214778471 May 05 12:43:35 PM PDT 24 May 05 12:43:48 PM PDT 24 517424687 ps
T661 /workspace/coverage/default/10.spi_device_tpm_read_hw_reg.2815567831 May 05 12:43:23 PM PDT 24 May 05 12:43:41 PM PDT 24 9296050010 ps
T302 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.4015783909 May 05 12:43:36 PM PDT 24 May 05 12:43:45 PM PDT 24 9081296375 ps
T662 /workspace/coverage/default/33.spi_device_tpm_sts_read.4113777608 May 05 12:44:28 PM PDT 24 May 05 12:44:30 PM PDT 24 639298828 ps
T362 /workspace/coverage/default/29.spi_device_upload.2831761519 May 05 12:44:31 PM PDT 24 May 05 12:44:40 PM PDT 24 5015486323 ps
T663 /workspace/coverage/default/13.spi_device_tpm_sts_read.943381078 May 05 12:43:36 PM PDT 24 May 05 12:43:38 PM PDT 24 57190643 ps
T664 /workspace/coverage/default/40.spi_device_tpm_read_hw_reg.2743784693 May 05 12:45:20 PM PDT 24 May 05 12:45:31 PM PDT 24 4106418679 ps
T297 /workspace/coverage/default/29.spi_device_pass_addr_payload_swap.2265222999 May 05 12:44:33 PM PDT 24 May 05 12:44:40 PM PDT 24 798116303 ps
T665 /workspace/coverage/default/12.spi_device_alert_test.3733257516 May 05 12:43:36 PM PDT 24 May 05 12:43:38 PM PDT 24 34028754 ps
T343 /workspace/coverage/default/22.spi_device_pass_cmd_filtering.3406565987 May 05 12:44:02 PM PDT 24 May 05 12:44:09 PM PDT 24 2143139718 ps
T666 /workspace/coverage/default/42.spi_device_tpm_sts_read.3490161432 May 05 12:45:00 PM PDT 24 May 05 12:45:01 PM PDT 24 100419288 ps
T204 /workspace/coverage/default/33.spi_device_pass_cmd_filtering.2090114589 May 05 12:44:36 PM PDT 24 May 05 12:44:42 PM PDT 24 2888315290 ps
T260 /workspace/coverage/default/8.spi_device_mailbox.3210669862 May 05 12:43:24 PM PDT 24 May 05 12:43:45 PM PDT 24 2999262573 ps
T667 /workspace/coverage/default/43.spi_device_csb_read.2513386367 May 05 12:45:13 PM PDT 24 May 05 12:45:15 PM PDT 24 140023026 ps
T668 /workspace/coverage/default/34.spi_device_alert_test.820003276 May 05 12:44:37 PM PDT 24 May 05 12:44:38 PM PDT 24 12520204 ps
T669 /workspace/coverage/default/20.spi_device_tpm_rw.1125991610 May 05 12:44:18 PM PDT 24 May 05 12:44:21 PM PDT 24 100776906 ps
T670 /workspace/coverage/default/25.spi_device_tpm_rw.3775004523 May 05 12:44:29 PM PDT 24 May 05 12:44:31 PM PDT 24 183205335 ps
T371 /workspace/coverage/default/33.spi_device_flash_mode.3569538924 May 05 12:44:37 PM PDT 24 May 05 12:44:49 PM PDT 24 600413643 ps
T671 /workspace/coverage/default/12.spi_device_tpm_read_hw_reg.3734117050 May 05 12:43:36 PM PDT 24 May 05 12:43:49 PM PDT 24 3254731837 ps
T672 /workspace/coverage/default/30.spi_device_csb_read.1176435278 May 05 12:44:26 PM PDT 24 May 05 12:44:28 PM PDT 24 37140415 ps
T673 /workspace/coverage/default/23.spi_device_tpm_all.3792784097 May 05 12:44:18 PM PDT 24 May 05 12:45:25 PM PDT 24 12304109487 ps
T674 /workspace/coverage/default/49.spi_device_intercept.3458206014 May 05 12:45:20 PM PDT 24 May 05 12:45:28 PM PDT 24 2794677632 ps
T342 /workspace/coverage/default/46.spi_device_upload.2818854751 May 05 12:45:14 PM PDT 24 May 05 12:45:19 PM PDT 24 741671876 ps
T675 /workspace/coverage/default/8.spi_device_alert_test.3174109579 May 05 12:43:37 PM PDT 24 May 05 12:43:40 PM PDT 24 55080830 ps
T239 /workspace/coverage/default/9.spi_device_cfg_cmd.662702546 May 05 12:43:33 PM PDT 24 May 05 12:43:42 PM PDT 24 1039835854 ps
T676 /workspace/coverage/default/18.spi_device_tpm_read_hw_reg.1869649510 May 05 12:43:49 PM PDT 24 May 05 12:44:04 PM PDT 24 3782614021 ps
T677 /workspace/coverage/default/10.spi_device_read_buffer_direct.1970065621 May 05 12:43:23 PM PDT 24 May 05 12:43:35 PM PDT 24 1860942841 ps
T233 /workspace/coverage/default/28.spi_device_pass_cmd_filtering.4202253211 May 05 12:44:16 PM PDT 24 May 05 12:44:22 PM PDT 24 376226011 ps
T678 /workspace/coverage/default/6.spi_device_tpm_read_hw_reg.186775282 May 05 12:43:30 PM PDT 24 May 05 12:43:31 PM PDT 24 397526071 ps
T263 /workspace/coverage/default/39.spi_device_pass_cmd_filtering.4247336603 May 05 12:44:55 PM PDT 24 May 05 12:45:06 PM PDT 24 1458360576 ps
T679 /workspace/coverage/default/46.spi_device_csb_read.1267757566 May 05 12:45:22 PM PDT 24 May 05 12:45:24 PM PDT 24 35340924 ps
T680 /workspace/coverage/default/27.spi_device_read_buffer_direct.1598363052 May 05 12:44:29 PM PDT 24 May 05 12:44:37 PM PDT 24 791305287 ps
T681 /workspace/coverage/default/43.spi_device_tpm_sts_read.1594080667 May 05 12:45:19 PM PDT 24 May 05 12:45:21 PM PDT 24 195164655 ps
T682 /workspace/coverage/default/20.spi_device_tpm_sts_read.1490167118 May 05 12:44:14 PM PDT 24 May 05 12:44:16 PM PDT 24 60817543 ps
T683 /workspace/coverage/default/46.spi_device_flash_mode.2544897811 May 05 12:45:12 PM PDT 24 May 05 12:46:54 PM PDT 24 34146887817 ps
T214 /workspace/coverage/default/25.spi_device_intercept.1447297790 May 05 12:44:12 PM PDT 24 May 05 12:44:20 PM PDT 24 1624197874 ps
T341 /workspace/coverage/default/43.spi_device_intercept.1174377991 May 05 12:45:04 PM PDT 24 May 05 12:45:09 PM PDT 24 1023299899 ps
T684 /workspace/coverage/default/42.spi_device_tpm_all.3043234574 May 05 12:45:21 PM PDT 24 May 05 12:45:58 PM PDT 24 22156367092 ps
T685 /workspace/coverage/default/20.spi_device_mailbox.2729487749 May 05 12:43:59 PM PDT 24 May 05 12:46:38 PM PDT 24 79063881604 ps
T686 /workspace/coverage/default/45.spi_device_upload.771866259 May 05 12:45:10 PM PDT 24 May 05 12:45:15 PM PDT 24 4750021436 ps
T687 /workspace/coverage/default/40.spi_device_tpm_sts_read.92636030 May 05 12:45:18 PM PDT 24 May 05 12:45:20 PM PDT 24 110484697 ps
T688 /workspace/coverage/default/4.spi_device_read_buffer_direct.838435513 May 05 12:43:07 PM PDT 24 May 05 12:43:17 PM PDT 24 11166292128 ps
T689 /workspace/coverage/default/10.spi_device_intercept.1588754070 May 05 12:43:28 PM PDT 24 May 05 12:43:34 PM PDT 24 720484924 ps
T690 /workspace/coverage/default/45.spi_device_tpm_read_hw_reg.4186643509 May 05 12:45:21 PM PDT 24 May 05 12:45:25 PM PDT 24 561484749 ps
T691 /workspace/coverage/default/40.spi_device_upload.200380631 May 05 12:44:51 PM PDT 24 May 05 12:44:53 PM PDT 24 385495222 ps
T692 /workspace/coverage/default/19.spi_device_alert_test.3525606898 May 05 12:44:12 PM PDT 24 May 05 12:44:13 PM PDT 24 12820953 ps
T317 /workspace/coverage/default/6.spi_device_flash_mode.3049592176 May 05 12:43:32 PM PDT 24 May 05 12:45:22 PM PDT 24 31599009846 ps
T693 /workspace/coverage/default/2.spi_device_tpm_rw.875543466 May 05 12:42:50 PM PDT 24 May 05 12:42:53 PM PDT 24 186318041 ps
T694 /workspace/coverage/default/13.spi_device_alert_test.2422327190 May 05 12:43:40 PM PDT 24 May 05 12:43:42 PM PDT 24 13023118 ps
T298 /workspace/coverage/default/42.spi_device_pass_addr_payload_swap.2719736005 May 05 12:45:18 PM PDT 24 May 05 12:45:30 PM PDT 24 10204055737 ps
T695 /workspace/coverage/default/41.spi_device_flash_mode.1120990193 May 05 12:44:55 PM PDT 24 May 05 12:45:14 PM PDT 24 3446616122 ps
T696 /workspace/coverage/default/11.spi_device_tpm_rw.1213036092 May 05 12:43:55 PM PDT 24 May 05 12:43:58 PM PDT 24 77083719 ps
T697 /workspace/coverage/default/6.spi_device_alert_test.1384178868 May 05 12:43:30 PM PDT 24 May 05 12:43:32 PM PDT 24 31881023 ps
T228 /workspace/coverage/default/6.spi_device_cfg_cmd.801660740 May 05 12:43:24 PM PDT 24 May 05 12:43:52 PM PDT 24 43960939949 ps
T354 /workspace/coverage/default/32.spi_device_pass_addr_payload_swap.217575233 May 05 12:44:33 PM PDT 24 May 05 12:44:42 PM PDT 24 9395137939 ps
T698 /workspace/coverage/default/30.spi_device_alert_test.693119762 May 05 12:44:30 PM PDT 24 May 05 12:44:32 PM PDT 24 15324823 ps
T365 /workspace/coverage/default/25.spi_device_flash_mode.3355098862 May 05 12:44:27 PM PDT 24 May 05 12:45:40 PM PDT 24 12155942556 ps
T699 /workspace/coverage/default/16.spi_device_tpm_sts_read.4095195934 May 05 12:43:43 PM PDT 24 May 05 12:43:45 PM PDT 24 344716433 ps
T700 /workspace/coverage/default/35.spi_device_tpm_read_hw_reg.768931288 May 05 12:44:39 PM PDT 24 May 05 12:44:52 PM PDT 24 3650837791 ps
T119 /workspace/coverage/default/0.spi_device_flash_mode.2529564766 May 05 12:42:53 PM PDT 24 May 05 12:43:17 PM PDT 24 4906295339 ps
T367 /workspace/coverage/default/20.spi_device_flash_mode.2765696010 May 05 12:44:08 PM PDT 24 May 05 12:44:44 PM PDT 24 4688715722 ps
T701 /workspace/coverage/default/5.spi_device_tpm_read_hw_reg.3143177979 May 05 12:43:07 PM PDT 24 May 05 12:43:12 PM PDT 24 946626450 ps
T702 /workspace/coverage/default/49.spi_device_csb_read.4224651448 May 05 12:45:22 PM PDT 24 May 05 12:45:24 PM PDT 24 12607403 ps
T703 /workspace/coverage/default/12.spi_device_read_buffer_direct.4070678618 May 05 12:43:33 PM PDT 24 May 05 12:43:43 PM PDT 24 871711429 ps
T704 /workspace/coverage/default/42.spi_device_tpm_read_hw_reg.536845579 May 05 12:45:01 PM PDT 24 May 05 12:45:17 PM PDT 24 25550084937 ps
T705 /workspace/coverage/default/38.spi_device_tpm_read_hw_reg.3847458804 May 05 12:44:46 PM PDT 24 May 05 12:44:58 PM PDT 24 3084344322 ps
T706 /workspace/coverage/default/44.spi_device_csb_read.2203121171 May 05 12:45:04 PM PDT 24 May 05 12:45:05 PM PDT 24 146813962 ps
T707 /workspace/coverage/default/42.spi_device_alert_test.3071296368 May 05 12:45:20 PM PDT 24 May 05 12:45:22 PM PDT 24 28620700 ps
T708 /workspace/coverage/default/32.spi_device_tpm_all.800238049 May 05 12:44:35 PM PDT 24 May 05 12:45:32 PM PDT 24 139931396652 ps
T709 /workspace/coverage/default/6.spi_device_tpm_rw.193122671 May 05 12:43:08 PM PDT 24 May 05 12:43:12 PM PDT 24 314974183 ps
T215 /workspace/coverage/default/2.spi_device_pass_cmd_filtering.3396117671 May 05 12:42:59 PM PDT 24 May 05 12:43:08 PM PDT 24 1205787884 ps
T710 /workspace/coverage/default/28.spi_device_tpm_read_hw_reg.340926424 May 05 12:44:29 PM PDT 24 May 05 12:44:39 PM PDT 24 1227262272 ps
T711 /workspace/coverage/default/41.spi_device_tpm_all.2582071104 May 05 12:44:51 PM PDT 24 May 05 12:45:04 PM PDT 24 8263866794 ps
T712 /workspace/coverage/default/9.spi_device_csb_read.740526100 May 05 12:43:24 PM PDT 24 May 05 12:43:26 PM PDT 24 38877809 ps
T713 /workspace/coverage/default/21.spi_device_alert_test.803813690 May 05 12:43:57 PM PDT 24 May 05 12:43:59 PM PDT 24 48459450 ps
T714 /workspace/coverage/default/35.spi_device_tpm_rw.3037740174 May 05 12:44:54 PM PDT 24 May 05 12:44:58 PM PDT 24 441480322 ps
T715 /workspace/coverage/default/20.spi_device_tpm_read_hw_reg.3205177689 May 05 12:44:02 PM PDT 24 May 05 12:44:08 PM PDT 24 835905075 ps
T716 /workspace/coverage/default/37.spi_device_tpm_rw.3379906116 May 05 12:44:43 PM PDT 24 May 05 12:44:45 PM PDT 24 383757852 ps
T717 /workspace/coverage/default/25.spi_device_alert_test.1241717203 May 05 12:44:29 PM PDT 24 May 05 12:44:31 PM PDT 24 42363899 ps
T261 /workspace/coverage/default/45.spi_device_pass_addr_payload_swap.4151868315 May 05 12:45:22 PM PDT 24 May 05 12:45:33 PM PDT 24 24020483696 ps
T291 /workspace/coverage/default/4.spi_device_pass_cmd_filtering.443150407 May 05 12:43:09 PM PDT 24 May 05 12:43:26 PM PDT 24 11740498410 ps
T296 /workspace/coverage/default/2.spi_device_pass_addr_payload_swap.215541101 May 05 12:43:15 PM PDT 24 May 05 12:43:36 PM PDT 24 6458763145 ps
T718 /workspace/coverage/default/13.spi_device_csb_read.3885075349 May 05 12:43:34 PM PDT 24 May 05 12:43:36 PM PDT 24 30661127 ps
T719 /workspace/coverage/default/15.spi_device_read_buffer_direct.1274158284 May 05 12:44:11 PM PDT 24 May 05 12:44:16 PM PDT 24 80264501 ps
T720 /workspace/coverage/default/9.spi_device_tpm_sts_read.2426928093 May 05 12:43:23 PM PDT 24 May 05 12:43:25 PM PDT 24 47373927 ps
T721 /workspace/coverage/default/26.spi_device_tpm_rw.4188063289 May 05 12:44:12 PM PDT 24 May 05 12:44:14 PM PDT 24 406033212 ps
T722 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.333597975 May 05 12:45:20 PM PDT 24 May 05 12:45:26 PM PDT 24 1179450213 ps
T314 /workspace/coverage/default/26.spi_device_flash_mode.4222215939 May 05 12:44:33 PM PDT 24 May 05 12:45:30 PM PDT 24 4651456868 ps
T315 /workspace/coverage/default/35.spi_device_flash_mode.2032128095 May 05 12:44:37 PM PDT 24 May 05 12:45:23 PM PDT 24 4995611400 ps
T723 /workspace/coverage/default/2.spi_device_read_buffer_direct.3001029087 May 05 12:43:09 PM PDT 24 May 05 12:43:17 PM PDT 24 422658134 ps
T724 /workspace/coverage/default/12.spi_device_tpm_rw.7495511 May 05 12:44:02 PM PDT 24 May 05 12:44:06 PM PDT 24 355915327 ps
T324 /workspace/coverage/default/0.spi_device_intercept.630823270 May 05 12:42:48 PM PDT 24 May 05 12:43:26 PM PDT 24 20566221351 ps
T725 /workspace/coverage/default/14.spi_device_intercept.2181398418 May 05 12:43:39 PM PDT 24 May 05 12:43:55 PM PDT 24 1377831057 ps
T726 /workspace/coverage/default/14.spi_device_read_buffer_direct.3386871491 May 05 12:43:37 PM PDT 24 May 05 12:43:53 PM PDT 24 6003804805 ps
T727 /workspace/coverage/default/5.spi_device_flash_mode.401806209 May 05 12:43:33 PM PDT 24 May 05 12:44:06 PM PDT 24 3102692858 ps
T728 /workspace/coverage/default/16.spi_device_stress_all.2153392469 May 05 12:44:07 PM PDT 24 May 05 12:44:09 PM PDT 24 190346466 ps
T729 /workspace/coverage/default/15.spi_device_tpm_sts_read.3164233023 May 05 12:43:39 PM PDT 24 May 05 12:43:41 PM PDT 24 54122446 ps
T730 /workspace/coverage/default/35.spi_device_cfg_cmd.1835902523 May 05 12:44:46 PM PDT 24 May 05 12:44:53 PM PDT 24 2304014301 ps
T731 /workspace/coverage/default/22.spi_device_flash_mode.1508829153 May 05 12:44:07 PM PDT 24 May 05 12:44:27 PM PDT 24 11377541157 ps
T732 /workspace/coverage/default/32.spi_device_csb_read.2324692716 May 05 12:44:27 PM PDT 24 May 05 12:44:28 PM PDT 24 19128056 ps
T733 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.2363145113 May 05 12:40:22 PM PDT 24 May 05 12:40:24 PM PDT 24 66693852 ps
T120 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1581232650 May 05 12:40:16 PM PDT 24 May 05 12:40:19 PM PDT 24 104114997 ps
T734 /workspace/coverage/cover_reg_top/1.spi_device_intr_test.747156686 May 05 12:40:08 PM PDT 24 May 05 12:40:09 PM PDT 24 47592311 ps
T179 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.1073102050 May 05 12:41:52 PM PDT 24 May 05 12:41:54 PM PDT 24 26635798 ps
T180 /workspace/coverage/cover_reg_top/45.spi_device_intr_test.3545045879 May 05 12:40:11 PM PDT 24 May 05 12:40:13 PM PDT 24 18830863 ps
T38 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.3967095613 May 05 12:40:09 PM PDT 24 May 05 12:40:12 PM PDT 24 48484119 ps
T735 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.2462572790 May 05 12:40:11 PM PDT 24 May 05 12:40:13 PM PDT 24 16212177 ps
T121 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.267988678 May 05 12:40:09 PM PDT 24 May 05 12:40:12 PM PDT 24 438846564 ps
T39 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.178889143 May 05 12:40:21 PM PDT 24 May 05 12:40:44 PM PDT 24 10812345287 ps
T40 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1906975032 May 05 12:40:10 PM PDT 24 May 05 12:40:13 PM PDT 24 113929989 ps
T181 /workspace/coverage/cover_reg_top/9.spi_device_intr_test.1772229144 May 05 12:40:43 PM PDT 24 May 05 12:40:44 PM PDT 24 18558439 ps
T122 /workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1231584543 May 05 12:40:11 PM PDT 24 May 05 12:40:25 PM PDT 24 207664773 ps
T151 /workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3522034073 May 05 12:40:26 PM PDT 24 May 05 12:40:28 PM PDT 24 54617387 ps
T736 /workspace/coverage/cover_reg_top/1.spi_device_mem_walk.2599475793 May 05 12:40:15 PM PDT 24 May 05 12:40:17 PM PDT 24 10105558 ps
T152 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.1817597190 May 05 12:40:13 PM PDT 24 May 05 12:40:16 PM PDT 24 327495766 ps
T165 /workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.2059639293 May 05 12:41:10 PM PDT 24 May 05 12:41:16 PM PDT 24 787821610 ps
T126 /workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.3547702977 May 05 12:40:13 PM PDT 24 May 05 12:40:22 PM PDT 24 122580828 ps
T127 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3293755967 May 05 12:40:12 PM PDT 24 May 05 12:40:17 PM PDT 24 199668188 ps
T128 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.1372149038 May 05 12:40:12 PM PDT 24 May 05 12:40:16 PM PDT 24 167547189 ps
T111 /workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2605975913 May 05 12:40:12 PM PDT 24 May 05 12:40:15 PM PDT 24 32310073 ps
T146 /workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.2308356947 May 05 12:40:10 PM PDT 24 May 05 12:40:14 PM PDT 24 83660775 ps
T737 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.3127021481 May 05 12:40:26 PM PDT 24 May 05 12:40:32 PM PDT 24 13786132 ps
T738 /workspace/coverage/cover_reg_top/22.spi_device_intr_test.1919124657 May 05 12:40:38 PM PDT 24 May 05 12:40:40 PM PDT 24 50749617 ps
T153 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.323852474 May 05 12:40:05 PM PDT 24 May 05 12:40:28 PM PDT 24 370587598 ps
T137 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.2927357775 May 05 12:40:34 PM PDT 24 May 05 12:40:39 PM PDT 24 321196403 ps
T739 /workspace/coverage/cover_reg_top/12.spi_device_intr_test.930347868 May 05 12:41:43 PM PDT 24 May 05 12:41:45 PM PDT 24 28972526 ps
T149 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1930624412 May 05 12:41:47 PM PDT 24 May 05 12:41:51 PM PDT 24 125203120 ps
T166 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.3748116395 May 05 12:40:15 PM PDT 24 May 05 12:40:20 PM PDT 24 563433119 ps
T182 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.2745841164 May 05 12:40:25 PM PDT 24 May 05 12:40:27 PM PDT 24 44109091 ps
T148 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.1497046880 May 05 12:40:09 PM PDT 24 May 05 12:40:13 PM PDT 24 42569372 ps
T138 /workspace/coverage/cover_reg_top/9.spi_device_tl_errors.2378000188 May 05 12:40:38 PM PDT 24 May 05 12:40:47 PM PDT 24 208388141 ps
T167 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.440963684 May 05 12:40:16 PM PDT 24 May 05 12:40:20 PM PDT 24 85703267 ps
T125 /workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.116254178 May 05 12:41:43 PM PDT 24 May 05 12:42:02 PM PDT 24 291833731 ps
T154 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.3358618048 May 05 12:40:12 PM PDT 24 May 05 12:40:16 PM PDT 24 104471949 ps
T168 /workspace/coverage/cover_reg_top/15.spi_device_csr_rw.4176953697 May 05 12:41:10 PM PDT 24 May 05 12:41:14 PM PDT 24 153167617 ps
T169 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.940806082 May 05 12:40:20 PM PDT 24 May 05 12:40:22 PM PDT 24 157708417 ps
T376 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.549471582 May 05 12:40:09 PM PDT 24 May 05 12:40:30 PM PDT 24 841764141 ps
T740 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.3863731134 May 05 12:41:10 PM PDT 24 May 05 12:41:14 PM PDT 24 15212841 ps
T173 /workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.2325807006 May 05 12:40:10 PM PDT 24 May 05 12:40:19 PM PDT 24 761465156 ps
T174 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1558057516 May 05 12:40:10 PM PDT 24 May 05 12:40:29 PM PDT 24 323591000 ps
T170 /workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.2503458301 May 05 12:40:13 PM PDT 24 May 05 12:40:17 PM PDT 24 202490723 ps
T155 /workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.3648234965 May 05 12:40:11 PM PDT 24 May 05 12:40:38 PM PDT 24 1211935094 ps
T156 /workspace/coverage/cover_reg_top/17.spi_device_csr_rw.3793620545 May 05 12:41:49 PM PDT 24 May 05 12:41:50 PM PDT 24 36133116 ps
T150 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.1723469224 May 05 12:40:20 PM PDT 24 May 05 12:40:24 PM PDT 24 275547280 ps
T741 /workspace/coverage/cover_reg_top/8.spi_device_intr_test.522726093 May 05 12:41:34 PM PDT 24 May 05 12:41:36 PM PDT 24 15295119 ps
T742 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.3595417141 May 05 12:41:08 PM PDT 24 May 05 12:41:14 PM PDT 24 97486979 ps
T157 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.933005656 May 05 12:40:14 PM PDT 24 May 05 12:40:16 PM PDT 24 53643465 ps
T139 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.1726341428 May 05 12:40:15 PM PDT 24 May 05 12:40:18 PM PDT 24 1159099381 ps
T743 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2253045287 May 05 12:40:38 PM PDT 24 May 05 12:40:43 PM PDT 24 107801750 ps
T744 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.3456141585 May 05 12:40:33 PM PDT 24 May 05 12:40:35 PM PDT 24 51179707 ps
T158 /workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.419423634 May 05 12:40:14 PM PDT 24 May 05 12:40:17 PM PDT 24 275929530 ps
T175 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.1829825933 May 05 12:40:55 PM PDT 24 May 05 12:41:12 PM PDT 24 11471574683 ps
T745 /workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.1749825579 May 05 12:40:06 PM PDT 24 May 05 12:40:09 PM PDT 24 232433064 ps
T746 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.1969679120 May 05 12:40:09 PM PDT 24 May 05 12:40:16 PM PDT 24 183137652 ps
T144 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.32959894 May 05 12:40:20 PM PDT 24 May 05 12:40:24 PM PDT 24 222996334 ps
T159 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.1765636169 May 05 12:40:28 PM PDT 24 May 05 12:40:30 PM PDT 24 31517971 ps
T747 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.2181316096 May 05 12:40:16 PM PDT 24 May 05 12:40:18 PM PDT 24 50011723 ps
T748 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.2960952489 May 05 12:40:07 PM PDT 24 May 05 12:40:10 PM PDT 24 29026286 ps
T112 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.2693650843 May 05 12:40:10 PM PDT 24 May 05 12:40:12 PM PDT 24 108286101 ps
T749 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.2448561669 May 05 12:40:15 PM PDT 24 May 05 12:40:17 PM PDT 24 58078204 ps
T750 /workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3287373307 May 05 12:40:08 PM PDT 24 May 05 12:40:10 PM PDT 24 97834843 ps
T751 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.2682496966 May 05 12:40:21 PM PDT 24 May 05 12:40:24 PM PDT 24 49471814 ps
T145 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.173741424 May 05 12:40:14 PM PDT 24 May 05 12:40:19 PM PDT 24 115789119 ps
T752 /workspace/coverage/cover_reg_top/10.spi_device_intr_test.1267324017 May 05 12:41:36 PM PDT 24 May 05 12:41:37 PM PDT 24 14121541 ps
T753 /workspace/coverage/cover_reg_top/19.spi_device_intr_test.4165311708 May 05 12:41:44 PM PDT 24 May 05 12:41:46 PM PDT 24 16048809 ps
T754 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.3618233464 May 05 12:40:08 PM PDT 24 May 05 12:40:10 PM PDT 24 16621521 ps
T755 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.2723092534 May 05 12:40:16 PM PDT 24 May 05 12:40:18 PM PDT 24 14892737 ps
T756 /workspace/coverage/cover_reg_top/44.spi_device_intr_test.3931794855 May 05 12:40:23 PM PDT 24 May 05 12:40:25 PM PDT 24 13578443 ps
T757 /workspace/coverage/cover_reg_top/7.spi_device_intr_test.1482531858 May 05 12:40:10 PM PDT 24 May 05 12:40:12 PM PDT 24 14991029 ps
T758 /workspace/coverage/cover_reg_top/39.spi_device_intr_test.1136404708 May 05 12:40:43 PM PDT 24 May 05 12:40:44 PM PDT 24 30002629 ps
T140 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.1210687321 May 05 12:40:16 PM PDT 24 May 05 12:40:21 PM PDT 24 163506605 ps
T160 /workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1691690495 May 05 12:40:09 PM PDT 24 May 05 12:40:13 PM PDT 24 117663118 ps
T759 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.3151764231 May 05 12:40:11 PM PDT 24 May 05 12:40:13 PM PDT 24 43451018 ps
T161 /workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.4253443587 May 05 12:40:08 PM PDT 24 May 05 12:40:10 PM PDT 24 65574803 ps
T162 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2733980239 May 05 12:40:17 PM PDT 24 May 05 12:40:21 PM PDT 24 117775232 ps
T760 /workspace/coverage/cover_reg_top/2.spi_device_mem_walk.1550624172 May 05 12:40:10 PM PDT 24 May 05 12:40:12 PM PDT 24 11466362 ps
T761 /workspace/coverage/cover_reg_top/24.spi_device_intr_test.591969847 May 05 12:40:33 PM PDT 24 May 05 12:40:35 PM PDT 24 13119796 ps
T113 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3356693328 May 05 12:40:52 PM PDT 24 May 05 12:40:54 PM PDT 24 44397612 ps
T176 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.644058818 May 05 12:40:30 PM PDT 24 May 05 12:40:33 PM PDT 24 129874228 ps
T762 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.1520579699 May 05 12:40:09 PM PDT 24 May 05 12:40:13 PM PDT 24 169908739 ps
T763 /workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.1571270359 May 05 12:40:14 PM PDT 24 May 05 12:40:22 PM PDT 24 312721421 ps
T163 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.3753746919 May 05 12:40:14 PM PDT 24 May 05 12:40:17 PM PDT 24 175394357 ps
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