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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.94 98.35 94.21 98.61 89.36 97.14 95.81 98.12


Total test records in report: 1101
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T822 /workspace/coverage/default/45.spi_device_flash_all.3978221970 May 09 01:11:25 PM PDT 24 May 09 01:11:29 PM PDT 24 37602098 ps
T823 /workspace/coverage/default/11.spi_device_pass_addr_payload_swap.3823320856 May 09 01:08:49 PM PDT 24 May 09 01:08:59 PM PDT 24 2509849436 ps
T824 /workspace/coverage/default/5.spi_device_tpm_read_hw_reg.3029926879 May 09 01:08:35 PM PDT 24 May 09 01:08:42 PM PDT 24 1415034353 ps
T825 /workspace/coverage/default/19.spi_device_tpm_read_hw_reg.2053154779 May 09 01:09:39 PM PDT 24 May 09 01:10:00 PM PDT 24 39804833571 ps
T826 /workspace/coverage/default/44.spi_device_pass_cmd_filtering.2828497918 May 09 01:11:26 PM PDT 24 May 09 01:11:34 PM PDT 24 4149002888 ps
T827 /workspace/coverage/default/5.spi_device_flash_and_tpm_min_idle.2812894346 May 09 01:08:36 PM PDT 24 May 09 01:10:28 PM PDT 24 11574811206 ps
T828 /workspace/coverage/default/9.spi_device_pass_cmd_filtering.2929763545 May 09 01:08:45 PM PDT 24 May 09 01:08:55 PM PDT 24 2646426113 ps
T829 /workspace/coverage/default/34.spi_device_tpm_read_hw_reg.457122929 May 09 01:10:40 PM PDT 24 May 09 01:10:56 PM PDT 24 27275278162 ps
T830 /workspace/coverage/default/41.spi_device_upload.802038406 May 09 01:11:13 PM PDT 24 May 09 01:11:44 PM PDT 24 8672065038 ps
T831 /workspace/coverage/default/13.spi_device_flash_all.1317174679 May 09 01:08:59 PM PDT 24 May 09 01:09:54 PM PDT 24 2754463679 ps
T832 /workspace/coverage/default/42.spi_device_tpm_sts_read.3420135694 May 09 01:11:12 PM PDT 24 May 09 01:11:14 PM PDT 24 73121052 ps
T833 /workspace/coverage/default/13.spi_device_read_buffer_direct.2721378457 May 09 01:08:59 PM PDT 24 May 09 01:09:06 PM PDT 24 1403492683 ps
T271 /workspace/coverage/default/23.spi_device_flash_and_tpm.3397180424 May 09 01:09:53 PM PDT 24 May 09 01:10:56 PM PDT 24 7910839250 ps
T834 /workspace/coverage/default/47.spi_device_flash_mode.2268528992 May 09 01:11:36 PM PDT 24 May 09 01:11:45 PM PDT 24 983639472 ps
T835 /workspace/coverage/default/47.spi_device_tpm_rw.2698692803 May 09 01:11:38 PM PDT 24 May 09 01:11:41 PM PDT 24 540622738 ps
T836 /workspace/coverage/default/1.spi_device_upload.1982271043 May 09 01:08:09 PM PDT 24 May 09 01:08:15 PM PDT 24 262855913 ps
T837 /workspace/coverage/default/1.spi_device_flash_and_tpm.2005313138 May 09 01:08:10 PM PDT 24 May 09 01:12:01 PM PDT 24 20479948617 ps
T838 /workspace/coverage/default/15.spi_device_cfg_cmd.1012189074 May 09 01:09:22 PM PDT 24 May 09 01:09:27 PM PDT 24 520642037 ps
T223 /workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.2137112205 May 09 01:09:49 PM PDT 24 May 09 01:11:35 PM PDT 24 114409316446 ps
T839 /workspace/coverage/default/18.spi_device_cfg_cmd.926758441 May 09 01:09:34 PM PDT 24 May 09 01:09:38 PM PDT 24 312623670 ps
T272 /workspace/coverage/default/16.spi_device_flash_and_tpm_min_idle.2340362298 May 09 01:09:22 PM PDT 24 May 09 01:11:25 PM PDT 24 6053774147 ps
T840 /workspace/coverage/default/11.spi_device_stress_all.2263014252 May 09 01:08:58 PM PDT 24 May 09 01:09:01 PM PDT 24 51983167 ps
T841 /workspace/coverage/default/33.spi_device_tpm_sts_read.1308068302 May 09 01:10:40 PM PDT 24 May 09 01:10:44 PM PDT 24 220619219 ps
T842 /workspace/coverage/default/11.spi_device_flash_mode.3226590773 May 09 01:08:51 PM PDT 24 May 09 01:08:56 PM PDT 24 767335654 ps
T45 /workspace/coverage/default/33.spi_device_flash_and_tpm.3370369840 May 09 01:10:39 PM PDT 24 May 09 01:13:21 PM PDT 24 40540799542 ps
T242 /workspace/coverage/default/14.spi_device_stress_all.115960155 May 09 01:09:22 PM PDT 24 May 09 01:14:34 PM PDT 24 181977608566 ps
T843 /workspace/coverage/default/14.spi_device_alert_test.3716830000 May 09 01:09:21 PM PDT 24 May 09 01:09:23 PM PDT 24 91378150 ps
T844 /workspace/coverage/default/29.spi_device_tpm_sts_read.2782733995 May 09 01:10:25 PM PDT 24 May 09 01:10:27 PM PDT 24 25634043 ps
T243 /workspace/coverage/default/7.spi_device_flash_and_tpm.1894642503 May 09 01:08:38 PM PDT 24 May 09 01:09:57 PM PDT 24 14803471764 ps
T845 /workspace/coverage/default/30.spi_device_mailbox.1255509103 May 09 01:10:28 PM PDT 24 May 09 01:10:59 PM PDT 24 2666320213 ps
T846 /workspace/coverage/default/7.spi_device_pass_cmd_filtering.1139439313 May 09 01:08:33 PM PDT 24 May 09 01:08:50 PM PDT 24 7786897934 ps
T847 /workspace/coverage/default/47.spi_device_flash_and_tpm.1652683285 May 09 01:11:35 PM PDT 24 May 09 01:12:00 PM PDT 24 11747032754 ps
T848 /workspace/coverage/default/30.spi_device_intercept.1563257986 May 09 01:10:26 PM PDT 24 May 09 01:10:32 PM PDT 24 214785578 ps
T849 /workspace/coverage/default/22.spi_device_read_buffer_direct.1583213174 May 09 01:09:38 PM PDT 24 May 09 01:09:47 PM PDT 24 4181419612 ps
T850 /workspace/coverage/default/12.spi_device_tpm_all.3844053887 May 09 01:09:00 PM PDT 24 May 09 01:09:29 PM PDT 24 16693819078 ps
T851 /workspace/coverage/default/45.spi_device_read_buffer_direct.3142924325 May 09 01:11:23 PM PDT 24 May 09 01:11:31 PM PDT 24 291302041 ps
T852 /workspace/coverage/default/38.spi_device_tpm_all.3826378085 May 09 01:10:49 PM PDT 24 May 09 01:11:12 PM PDT 24 2362103757 ps
T853 /workspace/coverage/default/3.spi_device_mem_parity.3818874116 May 09 01:08:20 PM PDT 24 May 09 01:08:22 PM PDT 24 95107935 ps
T854 /workspace/coverage/default/12.spi_device_csb_read.3549865148 May 09 01:08:58 PM PDT 24 May 09 01:09:00 PM PDT 24 109056339 ps
T855 /workspace/coverage/default/41.spi_device_flash_mode.440556261 May 09 01:11:10 PM PDT 24 May 09 01:12:04 PM PDT 24 7439984418 ps
T856 /workspace/coverage/default/15.spi_device_csb_read.4107383247 May 09 01:09:26 PM PDT 24 May 09 01:09:29 PM PDT 24 18059955 ps
T237 /workspace/coverage/default/44.spi_device_flash_and_tpm_min_idle.468082825 May 09 01:11:24 PM PDT 24 May 09 01:12:27 PM PDT 24 25773184314 ps
T857 /workspace/coverage/default/45.spi_device_mailbox.2799400051 May 09 01:11:23 PM PDT 24 May 09 01:11:32 PM PDT 24 429841674 ps
T858 /workspace/coverage/default/49.spi_device_tpm_rw.3271546795 May 09 01:11:38 PM PDT 24 May 09 01:11:41 PM PDT 24 35321016 ps
T859 /workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.630241521 May 09 01:08:13 PM PDT 24 May 09 01:10:32 PM PDT 24 26001222550 ps
T860 /workspace/coverage/default/16.spi_device_flash_mode.1815723849 May 09 01:09:25 PM PDT 24 May 09 01:09:58 PM PDT 24 38584148637 ps
T861 /workspace/coverage/default/20.spi_device_tpm_all.3929778325 May 09 01:09:32 PM PDT 24 May 09 01:10:03 PM PDT 24 4046649102 ps
T862 /workspace/coverage/default/40.spi_device_flash_and_tpm_min_idle.3482242692 May 09 01:11:07 PM PDT 24 May 09 01:12:08 PM PDT 24 11920212495 ps
T863 /workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.3662613815 May 09 01:08:14 PM PDT 24 May 09 01:10:43 PM PDT 24 36433037178 ps
T864 /workspace/coverage/default/46.spi_device_mailbox.1021253667 May 09 01:11:24 PM PDT 24 May 09 01:12:24 PM PDT 24 75403316928 ps
T865 /workspace/coverage/default/43.spi_device_stress_all.3263370546 May 09 01:11:25 PM PDT 24 May 09 01:19:08 PM PDT 24 98419169987 ps
T866 /workspace/coverage/default/12.spi_device_alert_test.4077350113 May 09 01:08:59 PM PDT 24 May 09 01:09:02 PM PDT 24 82924015 ps
T867 /workspace/coverage/default/9.spi_device_tpm_rw.3915585254 May 09 01:08:47 PM PDT 24 May 09 01:08:50 PM PDT 24 79969216 ps
T868 /workspace/coverage/default/32.spi_device_tpm_rw.211104285 May 09 01:10:40 PM PDT 24 May 09 01:10:43 PM PDT 24 258271377 ps
T869 /workspace/coverage/default/1.spi_device_mailbox.214880556 May 09 01:08:10 PM PDT 24 May 09 01:10:23 PM PDT 24 39117430051 ps
T870 /workspace/coverage/default/1.spi_device_stress_all.2993986885 May 09 01:08:11 PM PDT 24 May 09 01:11:16 PM PDT 24 30285329779 ps
T871 /workspace/coverage/default/22.spi_device_cfg_cmd.1928478493 May 09 01:09:37 PM PDT 24 May 09 01:09:45 PM PDT 24 238483593 ps
T267 /workspace/coverage/default/48.spi_device_flash_and_tpm.3128305911 May 09 01:11:34 PM PDT 24 May 09 01:12:59 PM PDT 24 3766580404 ps
T872 /workspace/coverage/default/17.spi_device_tpm_rw.2796639872 May 09 01:09:25 PM PDT 24 May 09 01:09:31 PM PDT 24 154040098 ps
T873 /workspace/coverage/default/20.spi_device_cfg_cmd.2460107330 May 09 01:09:37 PM PDT 24 May 09 01:09:43 PM PDT 24 198230411 ps
T874 /workspace/coverage/default/42.spi_device_read_buffer_direct.2472158839 May 09 01:11:09 PM PDT 24 May 09 01:11:18 PM PDT 24 1547111731 ps
T875 /workspace/coverage/default/25.spi_device_flash_and_tpm.4045968337 May 09 01:09:53 PM PDT 24 May 09 01:10:53 PM PDT 24 7855724204 ps
T876 /workspace/coverage/default/12.spi_device_stress_all.3890396027 May 09 01:08:58 PM PDT 24 May 09 01:09:01 PM PDT 24 76049135 ps
T877 /workspace/coverage/default/14.spi_device_pass_cmd_filtering.509691890 May 09 01:09:04 PM PDT 24 May 09 01:09:12 PM PDT 24 1854644942 ps
T878 /workspace/coverage/default/18.spi_device_flash_mode.1717816090 May 09 01:09:36 PM PDT 24 May 09 01:09:45 PM PDT 24 1106194874 ps
T879 /workspace/coverage/default/43.spi_device_flash_mode.484648098 May 09 01:11:24 PM PDT 24 May 09 01:11:37 PM PDT 24 216554097 ps
T880 /workspace/coverage/default/14.spi_device_read_buffer_direct.158007254 May 09 01:08:57 PM PDT 24 May 09 01:09:04 PM PDT 24 486356546 ps
T881 /workspace/coverage/default/17.spi_device_mem_parity.917007464 May 09 01:09:24 PM PDT 24 May 09 01:09:28 PM PDT 24 83226192 ps
T882 /workspace/coverage/default/9.spi_device_intercept.3639824548 May 09 01:08:47 PM PDT 24 May 09 01:08:53 PM PDT 24 158296244 ps
T239 /workspace/coverage/default/18.spi_device_flash_and_tpm_min_idle.2892399340 May 09 01:09:34 PM PDT 24 May 09 01:10:32 PM PDT 24 2494422261 ps
T883 /workspace/coverage/default/14.spi_device_flash_and_tpm.1557162118 May 09 01:08:57 PM PDT 24 May 09 01:10:33 PM PDT 24 13461727006 ps
T884 /workspace/coverage/default/18.spi_device_mem_parity.1785932511 May 09 01:09:22 PM PDT 24 May 09 01:09:24 PM PDT 24 33746059 ps
T885 /workspace/coverage/default/34.spi_device_pass_cmd_filtering.2276824140 May 09 01:10:39 PM PDT 24 May 09 01:10:55 PM PDT 24 52146024417 ps
T228 /workspace/coverage/default/0.spi_device_flash_all.1009658395 May 09 01:08:09 PM PDT 24 May 09 01:13:32 PM PDT 24 172809139322 ps
T886 /workspace/coverage/default/13.spi_device_cfg_cmd.387980420 May 09 01:08:58 PM PDT 24 May 09 01:09:05 PM PDT 24 338593865 ps
T887 /workspace/coverage/default/7.spi_device_tpm_read_hw_reg.851294953 May 09 01:08:41 PM PDT 24 May 09 01:08:46 PM PDT 24 716190114 ps
T888 /workspace/coverage/default/5.spi_device_pass_addr_payload_swap.3244428308 May 09 01:08:35 PM PDT 24 May 09 01:08:42 PM PDT 24 328442468 ps
T889 /workspace/coverage/default/34.spi_device_flash_and_tpm_min_idle.968152521 May 09 01:10:40 PM PDT 24 May 09 01:11:33 PM PDT 24 5300379270 ps
T890 /workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.1459988000 May 09 01:08:37 PM PDT 24 May 09 01:10:07 PM PDT 24 8351702220 ps
T891 /workspace/coverage/default/9.spi_device_tpm_sts_read.704974954 May 09 01:08:46 PM PDT 24 May 09 01:08:49 PM PDT 24 18348051 ps
T892 /workspace/coverage/default/40.spi_device_flash_mode.2778667435 May 09 01:10:59 PM PDT 24 May 09 01:11:07 PM PDT 24 414258091 ps
T893 /workspace/coverage/default/22.spi_device_upload.612843609 May 09 01:09:34 PM PDT 24 May 09 01:10:04 PM PDT 24 15367348645 ps
T894 /workspace/coverage/default/43.spi_device_tpm_sts_read.1558963584 May 09 01:11:09 PM PDT 24 May 09 01:11:11 PM PDT 24 42764204 ps
T895 /workspace/coverage/default/39.spi_device_csb_read.2664999038 May 09 01:10:55 PM PDT 24 May 09 01:10:57 PM PDT 24 22366091 ps
T896 /workspace/coverage/default/37.spi_device_alert_test.3640800297 May 09 01:10:57 PM PDT 24 May 09 01:10:59 PM PDT 24 47220003 ps
T897 /workspace/coverage/default/43.spi_device_mailbox.2188553399 May 09 01:11:12 PM PDT 24 May 09 01:11:50 PM PDT 24 6538806993 ps
T898 /workspace/coverage/default/33.spi_device_mailbox.326056783 May 09 01:10:40 PM PDT 24 May 09 01:12:54 PM PDT 24 29182156440 ps
T899 /workspace/coverage/default/30.spi_device_tpm_sts_read.1209668927 May 09 01:10:26 PM PDT 24 May 09 01:10:30 PM PDT 24 53281952 ps
T900 /workspace/coverage/default/45.spi_device_pass_addr_payload_swap.825006760 May 09 01:11:23 PM PDT 24 May 09 01:11:30 PM PDT 24 652585752 ps
T901 /workspace/coverage/default/8.spi_device_flash_mode.757563447 May 09 01:08:48 PM PDT 24 May 09 01:08:53 PM PDT 24 52196646 ps
T902 /workspace/coverage/default/30.spi_device_pass_cmd_filtering.3561832938 May 09 01:10:26 PM PDT 24 May 09 01:10:47 PM PDT 24 9769495621 ps
T903 /workspace/coverage/default/22.spi_device_tpm_read_hw_reg.3800136197 May 09 01:09:39 PM PDT 24 May 09 01:09:44 PM PDT 24 731589184 ps
T254 /workspace/coverage/default/41.spi_device_flash_and_tpm_min_idle.2262541305 May 09 01:11:12 PM PDT 24 May 09 01:14:39 PM PDT 24 39871169002 ps
T904 /workspace/coverage/default/13.spi_device_stress_all.1611348200 May 09 01:09:00 PM PDT 24 May 09 01:13:56 PM PDT 24 58319614859 ps
T905 /workspace/coverage/default/4.spi_device_flash_all.1526535263 May 09 01:08:33 PM PDT 24 May 09 01:13:22 PM PDT 24 41029547498 ps
T906 /workspace/coverage/default/10.spi_device_read_buffer_direct.1191983316 May 09 01:08:54 PM PDT 24 May 09 01:09:03 PM PDT 24 409797258 ps
T907 /workspace/coverage/default/39.spi_device_flash_and_tpm_min_idle.3674321856 May 09 01:10:56 PM PDT 24 May 09 01:13:24 PM PDT 24 72459925465 ps
T908 /workspace/coverage/default/16.spi_device_cfg_cmd.241793105 May 09 01:09:23 PM PDT 24 May 09 01:09:28 PM PDT 24 98350971 ps
T909 /workspace/coverage/default/48.spi_device_tpm_rw.2497145457 May 09 01:11:34 PM PDT 24 May 09 01:11:41 PM PDT 24 149910363 ps
T910 /workspace/coverage/default/6.spi_device_tpm_read_hw_reg.2930236046 May 09 01:08:35 PM PDT 24 May 09 01:08:38 PM PDT 24 34215051 ps
T911 /workspace/coverage/default/45.spi_device_tpm_rw.664460495 May 09 01:11:22 PM PDT 24 May 09 01:11:27 PM PDT 24 307950409 ps
T912 /workspace/coverage/default/2.spi_device_pass_cmd_filtering.162211292 May 09 01:08:10 PM PDT 24 May 09 01:08:28 PM PDT 24 4522332729 ps
T913 /workspace/coverage/default/1.spi_device_tpm_read_hw_reg.3271548676 May 09 01:08:11 PM PDT 24 May 09 01:08:27 PM PDT 24 10258077100 ps
T914 /workspace/coverage/default/28.spi_device_mailbox.960983549 May 09 01:10:14 PM PDT 24 May 09 01:10:28 PM PDT 24 5237218925 ps
T915 /workspace/coverage/default/32.spi_device_mailbox.87293903 May 09 01:10:40 PM PDT 24 May 09 01:10:51 PM PDT 24 549283504 ps
T916 /workspace/coverage/default/21.spi_device_tpm_sts_read.3930301113 May 09 01:09:36 PM PDT 24 May 09 01:09:39 PM PDT 24 104580778 ps
T917 /workspace/coverage/default/7.spi_device_tpm_sts_read.2360066960 May 09 01:08:37 PM PDT 24 May 09 01:08:41 PM PDT 24 101302996 ps
T918 /workspace/coverage/default/32.spi_device_cfg_cmd.3477202157 May 09 01:10:42 PM PDT 24 May 09 01:10:50 PM PDT 24 398462970 ps
T919 /workspace/coverage/default/12.spi_device_mailbox.1023083773 May 09 01:09:00 PM PDT 24 May 09 01:10:06 PM PDT 24 28533502544 ps
T920 /workspace/coverage/default/24.spi_device_alert_test.2348783659 May 09 01:09:50 PM PDT 24 May 09 01:09:53 PM PDT 24 14432238 ps
T244 /workspace/coverage/default/33.spi_device_flash_all.2322483450 May 09 01:10:40 PM PDT 24 May 09 01:11:31 PM PDT 24 63121328474 ps
T921 /workspace/coverage/default/29.spi_device_pass_cmd_filtering.2017316599 May 09 01:10:26 PM PDT 24 May 09 01:10:32 PM PDT 24 232362205 ps
T922 /workspace/coverage/default/45.spi_device_tpm_read_hw_reg.4143245871 May 09 01:11:24 PM PDT 24 May 09 01:11:29 PM PDT 24 768750178 ps
T923 /workspace/coverage/default/20.spi_device_read_buffer_direct.3565510762 May 09 01:09:37 PM PDT 24 May 09 01:09:45 PM PDT 24 1012027065 ps
T924 /workspace/coverage/default/18.spi_device_tpm_sts_read.2744996053 May 09 01:09:34 PM PDT 24 May 09 01:09:35 PM PDT 24 222952666 ps
T925 /workspace/coverage/default/10.spi_device_cfg_cmd.2186877537 May 09 01:08:46 PM PDT 24 May 09 01:08:51 PM PDT 24 228661414 ps
T926 /workspace/coverage/default/30.spi_device_flash_mode.4126866873 May 09 01:10:25 PM PDT 24 May 09 01:10:32 PM PDT 24 85005886 ps
T927 /workspace/coverage/default/42.spi_device_alert_test.1764123269 May 09 01:11:10 PM PDT 24 May 09 01:11:12 PM PDT 24 38836338 ps
T928 /workspace/coverage/default/7.spi_device_intercept.4290969705 May 09 01:08:36 PM PDT 24 May 09 01:08:47 PM PDT 24 646933760 ps
T929 /workspace/coverage/default/15.spi_device_mailbox.2645974282 May 09 01:09:23 PM PDT 24 May 09 01:09:31 PM PDT 24 174882486 ps
T930 /workspace/coverage/default/39.spi_device_mailbox.2416495756 May 09 01:10:50 PM PDT 24 May 09 01:10:54 PM PDT 24 86326058 ps
T931 /workspace/coverage/default/39.spi_device_pass_addr_payload_swap.1956628616 May 09 01:10:57 PM PDT 24 May 09 01:11:07 PM PDT 24 2839284160 ps
T932 /workspace/coverage/default/22.spi_device_tpm_all.2917781482 May 09 01:09:42 PM PDT 24 May 09 01:09:51 PM PDT 24 1171351768 ps
T933 /workspace/coverage/default/40.spi_device_pass_cmd_filtering.2961259566 May 09 01:11:03 PM PDT 24 May 09 01:11:16 PM PDT 24 15544851277 ps
T934 /workspace/coverage/default/5.spi_device_alert_test.1887900782 May 09 01:08:36 PM PDT 24 May 09 01:08:39 PM PDT 24 46982242 ps
T935 /workspace/coverage/default/48.spi_device_tpm_all.3745676955 May 09 01:11:37 PM PDT 24 May 09 01:11:55 PM PDT 24 4098700707 ps
T936 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.963987230 May 09 01:09:02 PM PDT 24 May 09 01:09:08 PM PDT 24 3225157339 ps
T937 /workspace/coverage/default/1.spi_device_csb_read.1592188426 May 09 01:08:09 PM PDT 24 May 09 01:08:11 PM PDT 24 42208297 ps
T938 /workspace/coverage/default/46.spi_device_tpm_rw.3500250319 May 09 01:11:24 PM PDT 24 May 09 01:11:34 PM PDT 24 162469055 ps
T939 /workspace/coverage/default/46.spi_device_pass_cmd_filtering.2634262214 May 09 01:11:24 PM PDT 24 May 09 01:11:29 PM PDT 24 34767495 ps
T940 /workspace/coverage/default/8.spi_device_stress_all.2416255001 May 09 01:08:47 PM PDT 24 May 09 01:10:02 PM PDT 24 69129386689 ps
T941 /workspace/coverage/default/30.spi_device_upload.2169900119 May 09 01:10:25 PM PDT 24 May 09 01:10:30 PM PDT 24 145110097 ps
T942 /workspace/coverage/default/45.spi_device_csb_read.1189157135 May 09 01:11:24 PM PDT 24 May 09 01:11:28 PM PDT 24 22951666 ps
T943 /workspace/coverage/default/28.spi_device_pass_cmd_filtering.3837193729 May 09 01:10:12 PM PDT 24 May 09 01:10:34 PM PDT 24 21347536428 ps
T63 /workspace/coverage/default/0.spi_device_ram_cfg.1391669810 May 09 01:08:02 PM PDT 24 May 09 01:08:05 PM PDT 24 16311232 ps
T944 /workspace/coverage/default/39.spi_device_alert_test.638589687 May 09 01:10:57 PM PDT 24 May 09 01:10:59 PM PDT 24 11325991 ps
T945 /workspace/coverage/default/13.spi_device_intercept.2557920244 May 09 01:09:04 PM PDT 24 May 09 01:09:07 PM PDT 24 274686124 ps
T946 /workspace/coverage/default/12.spi_device_intercept.1932858424 May 09 01:08:59 PM PDT 24 May 09 01:09:07 PM PDT 24 465341487 ps
T947 /workspace/coverage/default/40.spi_device_flash_all.3744588098 May 09 01:10:59 PM PDT 24 May 09 01:11:30 PM PDT 24 6442644893 ps
T948 /workspace/coverage/default/28.spi_device_flash_and_tpm_min_idle.1130984385 May 09 01:10:24 PM PDT 24 May 09 01:11:04 PM PDT 24 12866398337 ps
T949 /workspace/coverage/default/43.spi_device_tpm_rw.695275445 May 09 01:11:10 PM PDT 24 May 09 01:11:13 PM PDT 24 16061206 ps
T950 /workspace/coverage/default/47.spi_device_upload.1912784780 May 09 01:11:38 PM PDT 24 May 09 01:12:09 PM PDT 24 10036712891 ps
T951 /workspace/coverage/default/27.spi_device_tpm_read_hw_reg.4183898458 May 09 01:10:10 PM PDT 24 May 09 01:10:17 PM PDT 24 3220558382 ps
T952 /workspace/coverage/default/35.spi_device_mailbox.1932091432 May 09 01:10:43 PM PDT 24 May 09 01:10:52 PM PDT 24 510448709 ps
T953 /workspace/coverage/default/36.spi_device_alert_test.744485241 May 09 01:10:51 PM PDT 24 May 09 01:10:53 PM PDT 24 32343785 ps
T954 /workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.587436459 May 09 01:10:02 PM PDT 24 May 09 01:12:21 PM PDT 24 27277364637 ps
T955 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.2730216078 May 09 01:09:24 PM PDT 24 May 09 01:09:27 PM PDT 24 13489056 ps
T251 /workspace/coverage/default/21.spi_device_pass_addr_payload_swap.17847315 May 09 01:09:35 PM PDT 24 May 09 01:09:39 PM PDT 24 343870947 ps
T956 /workspace/coverage/default/32.spi_device_csb_read.3008163762 May 09 01:10:36 PM PDT 24 May 09 01:10:38 PM PDT 24 78620841 ps
T957 /workspace/coverage/default/31.spi_device_cfg_cmd.4283829047 May 09 01:10:28 PM PDT 24 May 09 01:10:34 PM PDT 24 132810625 ps
T958 /workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.1662035199 May 09 01:10:38 PM PDT 24 May 09 01:11:12 PM PDT 24 30087004315 ps
T68 /workspace/coverage/default/4.spi_device_sec_cm.1294847602 May 09 01:08:36 PM PDT 24 May 09 01:08:39 PM PDT 24 145581346 ps
T959 /workspace/coverage/default/1.spi_device_alert_test.2828304994 May 09 01:08:11 PM PDT 24 May 09 01:08:14 PM PDT 24 12908506 ps
T960 /workspace/coverage/default/10.spi_device_tpm_rw.190827757 May 09 01:08:47 PM PDT 24 May 09 01:08:50 PM PDT 24 255056348 ps
T961 /workspace/coverage/default/27.spi_device_alert_test.1052704032 May 09 01:10:05 PM PDT 24 May 09 01:10:07 PM PDT 24 19817314 ps
T962 /workspace/coverage/default/17.spi_device_pass_cmd_filtering.1953441479 May 09 01:09:24 PM PDT 24 May 09 01:09:29 PM PDT 24 114533787 ps
T141 /workspace/coverage/default/22.spi_device_stress_all.2713382752 May 09 01:09:50 PM PDT 24 May 09 01:16:54 PM PDT 24 208927516147 ps
T963 /workspace/coverage/default/43.spi_device_csb_read.4096576963 May 09 01:11:11 PM PDT 24 May 09 01:11:14 PM PDT 24 15872245 ps
T964 /workspace/coverage/default/9.spi_device_tpm_all.2544949459 May 09 01:08:50 PM PDT 24 May 09 01:08:58 PM PDT 24 593910160 ps
T965 /workspace/coverage/default/6.spi_device_pass_cmd_filtering.1103330354 May 09 01:08:34 PM PDT 24 May 09 01:08:41 PM PDT 24 505618098 ps
T966 /workspace/coverage/default/18.spi_device_flash_and_tpm.863428141 May 09 01:09:35 PM PDT 24 May 09 01:10:00 PM PDT 24 2320472383 ps
T967 /workspace/coverage/default/4.spi_device_pass_cmd_filtering.771509540 May 09 01:08:34 PM PDT 24 May 09 01:08:49 PM PDT 24 18318987516 ps
T968 /workspace/coverage/default/11.spi_device_cfg_cmd.4244403331 May 09 01:08:47 PM PDT 24 May 09 01:08:52 PM PDT 24 220204082 ps
T969 /workspace/coverage/default/14.spi_device_flash_mode.4280970251 May 09 01:09:04 PM PDT 24 May 09 01:09:16 PM PDT 24 3378250486 ps
T970 /workspace/coverage/default/7.spi_device_read_buffer_direct.346814723 May 09 01:08:38 PM PDT 24 May 09 01:08:46 PM PDT 24 1319949815 ps
T971 /workspace/coverage/default/38.spi_device_tpm_read_hw_reg.1593247967 May 09 01:10:57 PM PDT 24 May 09 01:10:59 PM PDT 24 43235779 ps
T972 /workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.1338713415 May 09 01:11:37 PM PDT 24 May 09 01:11:58 PM PDT 24 5289302791 ps
T973 /workspace/coverage/default/49.spi_device_alert_test.2141110609 May 09 01:11:39 PM PDT 24 May 09 01:11:42 PM PDT 24 20924809 ps
T974 /workspace/coverage/default/45.spi_device_pass_cmd_filtering.1239458477 May 09 01:11:25 PM PDT 24 May 09 01:11:59 PM PDT 24 58866594614 ps
T975 /workspace/coverage/default/6.spi_device_flash_mode.2323252515 May 09 01:08:35 PM PDT 24 May 09 01:08:47 PM PDT 24 343161562 ps
T976 /workspace/coverage/default/25.spi_device_intercept.1927723324 May 09 01:09:54 PM PDT 24 May 09 01:10:05 PM PDT 24 1741456518 ps
T977 /workspace/coverage/default/36.spi_device_flash_and_tpm_min_idle.2774908569 May 09 01:10:52 PM PDT 24 May 09 01:14:56 PM PDT 24 261765429602 ps
T978 /workspace/coverage/default/48.spi_device_stress_all.1384141161 May 09 01:11:36 PM PDT 24 May 09 01:16:09 PM PDT 24 136749372266 ps
T979 /workspace/coverage/default/30.spi_device_pass_addr_payload_swap.2808117674 May 09 01:10:25 PM PDT 24 May 09 01:10:40 PM PDT 24 35720663570 ps
T980 /workspace/coverage/default/28.spi_device_tpm_rw.1718555146 May 09 01:10:12 PM PDT 24 May 09 01:10:14 PM PDT 24 92853541 ps
T981 /workspace/coverage/default/36.spi_device_upload.2376313322 May 09 01:10:47 PM PDT 24 May 09 01:11:08 PM PDT 24 5796849623 ps
T982 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.1790894290 May 09 01:07:16 PM PDT 24 May 09 01:07:18 PM PDT 24 158933024 ps
T983 /workspace/coverage/cover_reg_top/42.spi_device_intr_test.2909546252 May 09 01:07:14 PM PDT 24 May 09 01:07:17 PM PDT 24 14453858 ps
T94 /workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.271965205 May 09 01:06:45 PM PDT 24 May 09 01:06:49 PM PDT 24 56069507 ps
T116 /workspace/coverage/cover_reg_top/16.spi_device_csr_rw.268198767 May 09 01:07:03 PM PDT 24 May 09 01:07:06 PM PDT 24 43128053 ps
T984 /workspace/coverage/cover_reg_top/7.spi_device_intr_test.2138667287 May 09 01:06:43 PM PDT 24 May 09 01:06:45 PM PDT 24 39416352 ps
T95 /workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.3753454375 May 09 01:06:36 PM PDT 24 May 09 01:06:40 PM PDT 24 114648994 ps
T96 /workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.2786216782 May 09 01:07:02 PM PDT 24 May 09 01:07:05 PM PDT 24 86303785 ps
T97 /workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.2452495262 May 09 01:07:01 PM PDT 24 May 09 01:07:22 PM PDT 24 997136841 ps
T985 /workspace/coverage/cover_reg_top/5.spi_device_intr_test.3315240591 May 09 01:06:42 PM PDT 24 May 09 01:06:44 PM PDT 24 20974176 ps
T98 /workspace/coverage/cover_reg_top/18.spi_device_tl_errors.1888810310 May 09 01:07:02 PM PDT 24 May 09 01:07:05 PM PDT 24 224522816 ps
T117 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.2969967821 May 09 01:06:27 PM PDT 24 May 09 01:07:02 PM PDT 24 543913274 ps
T118 /workspace/coverage/cover_reg_top/3.spi_device_csr_rw.4117715276 May 09 01:06:30 PM PDT 24 May 09 01:06:34 PM PDT 24 233936932 ps
T986 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.3236234028 May 09 01:07:02 PM PDT 24 May 09 01:07:04 PM PDT 24 18499419 ps
T80 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.1569476211 May 09 01:06:32 PM PDT 24 May 09 01:06:35 PM PDT 24 20874513 ps
T111 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1813087181 May 09 01:06:50 PM PDT 24 May 09 01:06:53 PM PDT 24 57847119 ps
T112 /workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.128042636 May 09 01:06:45 PM PDT 24 May 09 01:06:49 PM PDT 24 55434993 ps
T987 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.4255380105 May 09 01:07:01 PM PDT 24 May 09 01:07:03 PM PDT 24 29200816 ps
T988 /workspace/coverage/cover_reg_top/20.spi_device_intr_test.224283345 May 09 01:07:12 PM PDT 24 May 09 01:07:15 PM PDT 24 11876099 ps
T101 /workspace/coverage/cover_reg_top/7.spi_device_tl_errors.680444260 May 09 01:06:38 PM PDT 24 May 09 01:06:41 PM PDT 24 25789219 ps
T142 /workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2198045042 May 09 01:07:12 PM PDT 24 May 09 01:07:16 PM PDT 24 81239834 ps
T143 /workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.242903881 May 09 01:06:28 PM PDT 24 May 09 01:06:32 PM PDT 24 54353789 ps
T144 /workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2140005720 May 09 01:06:39 PM PDT 24 May 09 01:06:42 PM PDT 24 266361335 ps
T99 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.681661554 May 09 01:06:50 PM PDT 24 May 09 01:07:10 PM PDT 24 1173417084 ps
T989 /workspace/coverage/cover_reg_top/33.spi_device_intr_test.4252180721 May 09 01:07:14 PM PDT 24 May 09 01:07:17 PM PDT 24 85089555 ps
T990 /workspace/coverage/cover_reg_top/4.spi_device_mem_walk.1330764477 May 09 01:06:38 PM PDT 24 May 09 01:06:40 PM PDT 24 10782085 ps
T100 /workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.4245976558 May 09 01:06:43 PM PDT 24 May 09 01:06:52 PM PDT 24 361031529 ps
T81 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.2542029509 May 09 01:06:30 PM PDT 24 May 09 01:06:33 PM PDT 24 79890672 ps
T113 /workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.587938023 May 09 01:07:03 PM PDT 24 May 09 01:07:06 PM PDT 24 104796620 ps
T991 /workspace/coverage/cover_reg_top/10.spi_device_intr_test.22543090 May 09 01:06:39 PM PDT 24 May 09 01:06:41 PM PDT 24 56099822 ps
T119 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.428104208 May 09 01:06:38 PM PDT 24 May 09 01:06:42 PM PDT 24 177696037 ps
T145 /workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3878318999 May 09 01:07:01 PM PDT 24 May 09 01:07:05 PM PDT 24 179827017 ps
T992 /workspace/coverage/cover_reg_top/7.spi_device_same_csr_outstanding.458521712 May 09 01:06:42 PM PDT 24 May 09 01:06:47 PM PDT 24 228773110 ps
T120 /workspace/coverage/cover_reg_top/0.spi_device_csr_rw.525406991 May 09 01:06:15 PM PDT 24 May 09 01:06:18 PM PDT 24 103748361 ps
T993 /workspace/coverage/cover_reg_top/47.spi_device_intr_test.2903975282 May 09 01:07:13 PM PDT 24 May 09 01:07:17 PM PDT 24 21865576 ps
T102 /workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2633031136 May 09 01:06:49 PM PDT 24 May 09 01:06:55 PM PDT 24 685704122 ps
T994 /workspace/coverage/cover_reg_top/0.spi_device_intr_test.751642719 May 09 01:06:16 PM PDT 24 May 09 01:06:18 PM PDT 24 16647277 ps
T103 /workspace/coverage/cover_reg_top/3.spi_device_tl_errors.3751595811 May 09 01:06:31 PM PDT 24 May 09 01:06:37 PM PDT 24 174840887 ps
T995 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.546062201 May 09 01:06:30 PM PDT 24 May 09 01:06:33 PM PDT 24 12338710 ps
T996 /workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.4103404660 May 09 01:06:31 PM PDT 24 May 09 01:06:49 PM PDT 24 2522776062 ps
T259 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.1347375451 May 09 01:06:18 PM PDT 24 May 09 01:06:32 PM PDT 24 952583600 ps
T105 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.3317239832 May 09 01:06:44 PM PDT 24 May 09 01:06:52 PM PDT 24 230205368 ps
T997 /workspace/coverage/cover_reg_top/17.spi_device_intr_test.561928071 May 09 01:07:03 PM PDT 24 May 09 01:07:05 PM PDT 24 42903911 ps
T106 /workspace/coverage/cover_reg_top/9.spi_device_tl_errors.4097305654 May 09 01:06:39 PM PDT 24 May 09 01:06:45 PM PDT 24 307701126 ps
T998 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.2710934607 May 09 01:07:11 PM PDT 24 May 09 01:07:14 PM PDT 24 74700371 ps
T999 /workspace/coverage/cover_reg_top/9.spi_device_csr_rw.1947551770 May 09 01:06:42 PM PDT 24 May 09 01:06:44 PM PDT 24 20521462 ps
T110 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.488949709 May 09 01:06:41 PM PDT 24 May 09 01:06:44 PM PDT 24 128720370 ps
T1000 /workspace/coverage/cover_reg_top/4.spi_device_tl_errors.1390468554 May 09 01:06:29 PM PDT 24 May 09 01:06:33 PM PDT 24 146761589 ps
T1001 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.4027053076 May 09 01:07:12 PM PDT 24 May 09 01:07:15 PM PDT 24 18182497 ps
T1002 /workspace/coverage/cover_reg_top/13.spi_device_intr_test.3152733451 May 09 01:06:52 PM PDT 24 May 09 01:06:54 PM PDT 24 51566989 ps
T109 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.873772684 May 09 01:06:32 PM PDT 24 May 09 01:06:39 PM PDT 24 264338065 ps
T1003 /workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.2664189546 May 09 01:06:46 PM PDT 24 May 09 01:06:51 PM PDT 24 151033904 ps
T1004 /workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.930585387 May 09 01:07:02 PM PDT 24 May 09 01:07:20 PM PDT 24 2167964288 ps
T1005 /workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2942776808 May 09 01:07:13 PM PDT 24 May 09 01:07:18 PM PDT 24 155398910 ps
T1006 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1527251584 May 09 01:06:46 PM PDT 24 May 09 01:06:52 PM PDT 24 3568089639 ps
T1007 /workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.2425435179 May 09 01:06:45 PM PDT 24 May 09 01:07:24 PM PDT 24 1886226110 ps
T1008 /workspace/coverage/cover_reg_top/38.spi_device_intr_test.814130153 May 09 01:07:11 PM PDT 24 May 09 01:07:13 PM PDT 24 71096440 ps
T82 /workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.3332287547 May 09 01:06:30 PM PDT 24 May 09 01:06:33 PM PDT 24 20808055 ps
T1009 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.1122691188 May 09 01:06:39 PM PDT 24 May 09 01:06:41 PM PDT 24 144319518 ps
T1010 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.895704967 May 09 01:06:50 PM PDT 24 May 09 01:06:51 PM PDT 24 49073793 ps
T1011 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.1173876046 May 09 01:06:29 PM PDT 24 May 09 01:06:39 PM PDT 24 627821803 ps
T121 /workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.909951373 May 09 01:06:30 PM PDT 24 May 09 01:06:33 PM PDT 24 35474902 ps
T1012 /workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.3428169061 May 09 01:06:28 PM PDT 24 May 09 01:06:36 PM PDT 24 220832305 ps
T260 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.3538699248 May 09 01:06:38 PM PDT 24 May 09 01:06:59 PM PDT 24 296269836 ps
T151 /workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2977574714 May 09 01:06:27 PM PDT 24 May 09 01:06:30 PM PDT 24 188253085 ps
T152 /workspace/coverage/cover_reg_top/8.spi_device_tl_intg_err.3730346421 May 09 01:06:43 PM PDT 24 May 09 01:06:59 PM PDT 24 2544180128 ps
T1013 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.3225826229 May 09 01:06:31 PM PDT 24 May 09 01:06:37 PM PDT 24 486625064 ps
T1014 /workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.777356152 May 09 01:06:26 PM PDT 24 May 09 01:06:41 PM PDT 24 786757633 ps
T1015 /workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.1810301502 May 09 01:06:28 PM PDT 24 May 09 01:06:31 PM PDT 24 44296720 ps
T1016 /workspace/coverage/cover_reg_top/43.spi_device_intr_test.3254856687 May 09 01:07:14 PM PDT 24 May 09 01:07:17 PM PDT 24 55231403 ps
T1017 /workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1547901211 May 09 01:06:38 PM PDT 24 May 09 01:06:42 PM PDT 24 86530124 ps
T122 /workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1779174249 May 09 01:06:29 PM PDT 24 May 09 01:06:31 PM PDT 24 31944894 ps
T123 /workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.4283934532 May 09 01:06:17 PM PDT 24 May 09 01:06:21 PM PDT 24 81947723 ps
T1018 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.2988146612 May 09 01:06:31 PM PDT 24 May 09 01:06:35 PM PDT 24 378713175 ps
T1019 /workspace/coverage/cover_reg_top/35.spi_device_intr_test.3167796498 May 09 01:07:13 PM PDT 24 May 09 01:07:16 PM PDT 24 46966315 ps
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