Assert Coverage for Module :
spi_device_csr_assert_fpv
Assertion Details
TlulOOBAddrErr_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3767 |
0 |
0 |
T106 |
4803 |
2 |
0 |
0 |
T107 |
13043 |
204 |
0 |
0 |
T108 |
28693 |
4 |
0 |
0 |
T109 |
4423 |
12 |
0 |
0 |
T110 |
11813 |
168 |
0 |
0 |
T113 |
9942 |
158 |
0 |
0 |
T116 |
8547 |
102 |
0 |
0 |
T119 |
6878 |
249 |
0 |
0 |
T120 |
18226 |
295 |
0 |
0 |
T124 |
11210 |
5 |
0 |
0 |
addr_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1573 |
0 |
0 |
T94 |
3126 |
7 |
0 |
0 |
T124 |
11210 |
12 |
0 |
0 |
T127 |
10920 |
3 |
0 |
0 |
T155 |
67566 |
46 |
0 |
0 |
T156 |
66027 |
36 |
0 |
0 |
T157 |
10398 |
10 |
0 |
0 |
T158 |
62157 |
63 |
0 |
0 |
T159 |
11628 |
13 |
0 |
0 |
T160 |
34233 |
6 |
0 |
0 |
T161 |
15472 |
23 |
0 |
0 |
addr_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1600 |
0 |
0 |
T94 |
3126 |
9 |
0 |
0 |
T124 |
11210 |
4 |
0 |
0 |
T127 |
10920 |
8 |
0 |
0 |
T129 |
6540 |
8 |
0 |
0 |
T155 |
67566 |
62 |
0 |
0 |
T156 |
66027 |
21 |
0 |
0 |
T157 |
10398 |
8 |
0 |
0 |
T158 |
62157 |
43 |
0 |
0 |
T159 |
11628 |
13 |
0 |
0 |
T160 |
34233 |
37 |
0 |
0 |
cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
2042 |
0 |
0 |
T124 |
11210 |
40 |
0 |
0 |
T127 |
10920 |
20 |
0 |
0 |
T128 |
7134 |
11 |
0 |
0 |
T129 |
6540 |
6 |
0 |
0 |
T155 |
67566 |
167 |
0 |
0 |
T156 |
66027 |
85 |
0 |
0 |
T157 |
10398 |
21 |
0 |
0 |
T158 |
62157 |
92 |
0 |
0 |
T159 |
11628 |
25 |
0 |
0 |
T162 |
5106 |
11 |
0 |
0 |
cmd_filter_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
6266 |
0 |
0 |
T124 |
11210 |
21 |
0 |
0 |
T127 |
10920 |
234 |
0 |
0 |
T128 |
7134 |
42 |
0 |
0 |
T129 |
6540 |
12 |
0 |
0 |
T155 |
67566 |
1057 |
0 |
0 |
T156 |
66027 |
693 |
0 |
0 |
T157 |
10398 |
119 |
0 |
0 |
T158 |
62157 |
964 |
0 |
0 |
T159 |
11628 |
11 |
0 |
0 |
T162 |
5106 |
128 |
0 |
0 |
cmd_filter_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
6678 |
0 |
0 |
T124 |
11210 |
272 |
0 |
0 |
T127 |
10920 |
9 |
0 |
0 |
T128 |
7134 |
2 |
0 |
0 |
T129 |
6540 |
137 |
0 |
0 |
T155 |
67566 |
876 |
0 |
0 |
T156 |
66027 |
494 |
0 |
0 |
T157 |
10398 |
151 |
0 |
0 |
T158 |
62157 |
688 |
0 |
0 |
T159 |
11628 |
16 |
0 |
0 |
T162 |
5106 |
138 |
0 |
0 |
cmd_filter_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
5711 |
0 |
0 |
T124 |
11210 |
9 |
0 |
0 |
T127 |
10920 |
156 |
0 |
0 |
T128 |
7134 |
166 |
0 |
0 |
T129 |
6540 |
9 |
0 |
0 |
T155 |
67566 |
834 |
0 |
0 |
T156 |
66027 |
516 |
0 |
0 |
T157 |
10398 |
141 |
0 |
0 |
T158 |
62157 |
551 |
0 |
0 |
T159 |
11628 |
96 |
0 |
0 |
T162 |
5106 |
7 |
0 |
0 |
cmd_filter_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
8107 |
0 |
0 |
T124 |
11210 |
259 |
0 |
0 |
T127 |
10920 |
207 |
0 |
0 |
T128 |
7134 |
7 |
0 |
0 |
T129 |
6540 |
14 |
0 |
0 |
T155 |
67566 |
1347 |
0 |
0 |
T156 |
66027 |
1078 |
0 |
0 |
T157 |
10398 |
291 |
0 |
0 |
T158 |
62157 |
879 |
0 |
0 |
T159 |
11628 |
243 |
0 |
0 |
T162 |
5106 |
160 |
0 |
0 |
cmd_filter_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
7321 |
0 |
0 |
T124 |
11210 |
112 |
0 |
0 |
T127 |
10920 |
225 |
0 |
0 |
T128 |
7134 |
66 |
0 |
0 |
T129 |
6540 |
225 |
0 |
0 |
T155 |
67566 |
1356 |
0 |
0 |
T156 |
66027 |
806 |
0 |
0 |
T157 |
10398 |
150 |
0 |
0 |
T158 |
62157 |
782 |
0 |
0 |
T159 |
11628 |
268 |
0 |
0 |
T162 |
5106 |
124 |
0 |
0 |
cmd_filter_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
7235 |
0 |
0 |
T124 |
11210 |
229 |
0 |
0 |
T127 |
10920 |
360 |
0 |
0 |
T128 |
7134 |
73 |
0 |
0 |
T129 |
6540 |
9 |
0 |
0 |
T155 |
67566 |
1186 |
0 |
0 |
T156 |
66027 |
805 |
0 |
0 |
T157 |
10398 |
295 |
0 |
0 |
T158 |
62157 |
684 |
0 |
0 |
T159 |
11628 |
264 |
0 |
0 |
T162 |
5106 |
131 |
0 |
0 |
cmd_filter_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
7035 |
0 |
0 |
T124 |
11210 |
154 |
0 |
0 |
T127 |
10920 |
136 |
0 |
0 |
T128 |
7134 |
137 |
0 |
0 |
T129 |
6540 |
240 |
0 |
0 |
T155 |
67566 |
1450 |
0 |
0 |
T156 |
66027 |
667 |
0 |
0 |
T157 |
10398 |
8 |
0 |
0 |
T158 |
62157 |
538 |
0 |
0 |
T159 |
11628 |
131 |
0 |
0 |
T162 |
5106 |
2 |
0 |
0 |
cmd_filter_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
6194 |
0 |
0 |
T124 |
11210 |
112 |
0 |
0 |
T127 |
10920 |
107 |
0 |
0 |
T128 |
7134 |
61 |
0 |
0 |
T129 |
6540 |
2 |
0 |
0 |
T155 |
67566 |
1165 |
0 |
0 |
T156 |
66027 |
651 |
0 |
0 |
T157 |
10398 |
14 |
0 |
0 |
T158 |
62157 |
618 |
0 |
0 |
T159 |
11628 |
268 |
0 |
0 |
T162 |
5106 |
131 |
0 |
0 |
cmd_info_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3395 |
0 |
0 |
T94 |
3126 |
8 |
0 |
0 |
T124 |
11210 |
24 |
0 |
0 |
T127 |
10920 |
48 |
0 |
0 |
T128 |
7134 |
49 |
0 |
0 |
T129 |
6540 |
8 |
0 |
0 |
T155 |
67566 |
602 |
0 |
0 |
T156 |
66027 |
209 |
0 |
0 |
T157 |
10398 |
46 |
0 |
0 |
T158 |
62157 |
302 |
0 |
0 |
T159 |
11628 |
116 |
0 |
0 |
cmd_info_10_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3626 |
0 |
0 |
T124 |
11210 |
72 |
0 |
0 |
T127 |
10920 |
93 |
0 |
0 |
T128 |
7134 |
48 |
0 |
0 |
T129 |
6540 |
7 |
0 |
0 |
T155 |
67566 |
412 |
0 |
0 |
T156 |
66027 |
331 |
0 |
0 |
T157 |
10398 |
52 |
0 |
0 |
T158 |
62157 |
352 |
0 |
0 |
T159 |
11628 |
21 |
0 |
0 |
T162 |
5106 |
46 |
0 |
0 |
cmd_info_11_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3715 |
0 |
0 |
T124 |
11210 |
71 |
0 |
0 |
T127 |
10920 |
143 |
0 |
0 |
T128 |
7134 |
5 |
0 |
0 |
T129 |
6540 |
121 |
0 |
0 |
T155 |
67566 |
453 |
0 |
0 |
T156 |
66027 |
369 |
0 |
0 |
T157 |
10398 |
68 |
0 |
0 |
T158 |
62157 |
288 |
0 |
0 |
T159 |
11628 |
62 |
0 |
0 |
T162 |
5106 |
6 |
0 |
0 |
cmd_info_12_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3458 |
0 |
0 |
T124 |
11210 |
63 |
0 |
0 |
T127 |
10920 |
6 |
0 |
0 |
T128 |
7134 |
46 |
0 |
0 |
T129 |
6540 |
51 |
0 |
0 |
T155 |
67566 |
396 |
0 |
0 |
T156 |
66027 |
306 |
0 |
0 |
T157 |
10398 |
75 |
0 |
0 |
T158 |
62157 |
304 |
0 |
0 |
T159 |
11628 |
107 |
0 |
0 |
T162 |
5106 |
57 |
0 |
0 |
cmd_info_13_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3785 |
0 |
0 |
T124 |
11210 |
48 |
0 |
0 |
T127 |
10920 |
42 |
0 |
0 |
T128 |
7134 |
31 |
0 |
0 |
T129 |
6540 |
2 |
0 |
0 |
T155 |
67566 |
593 |
0 |
0 |
T156 |
66027 |
406 |
0 |
0 |
T157 |
10398 |
7 |
0 |
0 |
T158 |
62157 |
311 |
0 |
0 |
T159 |
11628 |
53 |
0 |
0 |
T162 |
5106 |
43 |
0 |
0 |
cmd_info_14_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3779 |
0 |
0 |
T124 |
11210 |
96 |
0 |
0 |
T127 |
10920 |
106 |
0 |
0 |
T128 |
7134 |
26 |
0 |
0 |
T129 |
6540 |
51 |
0 |
0 |
T155 |
67566 |
472 |
0 |
0 |
T156 |
66027 |
270 |
0 |
0 |
T157 |
10398 |
67 |
0 |
0 |
T158 |
62157 |
280 |
0 |
0 |
T159 |
11628 |
71 |
0 |
0 |
T162 |
5106 |
55 |
0 |
0 |
cmd_info_15_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3882 |
0 |
0 |
T124 |
11210 |
62 |
0 |
0 |
T127 |
10920 |
46 |
0 |
0 |
T128 |
7134 |
41 |
0 |
0 |
T129 |
6540 |
104 |
0 |
0 |
T155 |
67566 |
550 |
0 |
0 |
T156 |
66027 |
201 |
0 |
0 |
T157 |
10398 |
89 |
0 |
0 |
T158 |
62157 |
270 |
0 |
0 |
T159 |
11628 |
52 |
0 |
0 |
T162 |
5106 |
60 |
0 |
0 |
cmd_info_16_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3646 |
0 |
0 |
T124 |
11210 |
59 |
0 |
0 |
T127 |
10920 |
65 |
0 |
0 |
T128 |
7134 |
36 |
0 |
0 |
T129 |
6540 |
1 |
0 |
0 |
T155 |
67566 |
602 |
0 |
0 |
T156 |
66027 |
320 |
0 |
0 |
T157 |
10398 |
81 |
0 |
0 |
T158 |
62157 |
228 |
0 |
0 |
T159 |
11628 |
64 |
0 |
0 |
T162 |
5106 |
45 |
0 |
0 |
cmd_info_17_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3492 |
0 |
0 |
T113 |
9942 |
3 |
0 |
0 |
T124 |
11210 |
45 |
0 |
0 |
T127 |
10920 |
50 |
0 |
0 |
T128 |
7134 |
4 |
0 |
0 |
T129 |
6540 |
50 |
0 |
0 |
T155 |
67566 |
706 |
0 |
0 |
T156 |
66027 |
240 |
0 |
0 |
T157 |
10398 |
56 |
0 |
0 |
T158 |
62157 |
261 |
0 |
0 |
T162 |
5106 |
47 |
0 |
0 |
cmd_info_18_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3622 |
0 |
0 |
T124 |
11210 |
17 |
0 |
0 |
T127 |
10920 |
9 |
0 |
0 |
T128 |
7134 |
35 |
0 |
0 |
T129 |
6540 |
65 |
0 |
0 |
T155 |
67566 |
493 |
0 |
0 |
T156 |
66027 |
345 |
0 |
0 |
T157 |
10398 |
19 |
0 |
0 |
T158 |
62157 |
329 |
0 |
0 |
T159 |
11628 |
104 |
0 |
0 |
T162 |
5106 |
65 |
0 |
0 |
cmd_info_19_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3765 |
0 |
0 |
T124 |
11210 |
72 |
0 |
0 |
T127 |
10920 |
77 |
0 |
0 |
T128 |
7134 |
7 |
0 |
0 |
T129 |
6540 |
46 |
0 |
0 |
T155 |
67566 |
447 |
0 |
0 |
T156 |
66027 |
280 |
0 |
0 |
T157 |
10398 |
95 |
0 |
0 |
T158 |
62157 |
305 |
0 |
0 |
T159 |
11628 |
97 |
0 |
0 |
T162 |
5106 |
1 |
0 |
0 |
cmd_info_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3637 |
0 |
0 |
T124 |
11210 |
32 |
0 |
0 |
T127 |
10920 |
59 |
0 |
0 |
T128 |
7134 |
26 |
0 |
0 |
T129 |
6540 |
14 |
0 |
0 |
T155 |
67566 |
560 |
0 |
0 |
T156 |
66027 |
242 |
0 |
0 |
T157 |
10398 |
121 |
0 |
0 |
T158 |
62157 |
336 |
0 |
0 |
T159 |
11628 |
11 |
0 |
0 |
T162 |
5106 |
9 |
0 |
0 |
cmd_info_20_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3615 |
0 |
0 |
T113 |
9942 |
2 |
0 |
0 |
T124 |
11210 |
52 |
0 |
0 |
T127 |
10920 |
63 |
0 |
0 |
T129 |
6540 |
93 |
0 |
0 |
T155 |
67566 |
479 |
0 |
0 |
T156 |
66027 |
206 |
0 |
0 |
T157 |
10398 |
126 |
0 |
0 |
T158 |
62157 |
284 |
0 |
0 |
T159 |
11628 |
106 |
0 |
0 |
T162 |
5106 |
7 |
0 |
0 |
cmd_info_21_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3864 |
0 |
0 |
T124 |
11210 |
99 |
0 |
0 |
T127 |
10920 |
95 |
0 |
0 |
T128 |
7134 |
82 |
0 |
0 |
T129 |
6540 |
98 |
0 |
0 |
T155 |
67566 |
525 |
0 |
0 |
T156 |
66027 |
223 |
0 |
0 |
T157 |
10398 |
52 |
0 |
0 |
T158 |
62157 |
249 |
0 |
0 |
T159 |
11628 |
21 |
0 |
0 |
T162 |
5106 |
40 |
0 |
0 |
cmd_info_22_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3650 |
0 |
0 |
T124 |
11210 |
63 |
0 |
0 |
T127 |
10920 |
46 |
0 |
0 |
T128 |
7134 |
7 |
0 |
0 |
T129 |
6540 |
108 |
0 |
0 |
T155 |
67566 |
645 |
0 |
0 |
T156 |
66027 |
304 |
0 |
0 |
T157 |
10398 |
8 |
0 |
0 |
T158 |
62157 |
291 |
0 |
0 |
T159 |
11628 |
62 |
0 |
0 |
T162 |
5106 |
54 |
0 |
0 |
cmd_info_23_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3043 |
0 |
0 |
T94 |
3126 |
1 |
0 |
0 |
T124 |
11210 |
65 |
0 |
0 |
T127 |
10920 |
50 |
0 |
0 |
T129 |
6540 |
62 |
0 |
0 |
T155 |
67566 |
327 |
0 |
0 |
T156 |
66027 |
197 |
0 |
0 |
T157 |
10398 |
7 |
0 |
0 |
T158 |
62157 |
287 |
0 |
0 |
T159 |
11628 |
18 |
0 |
0 |
T162 |
5106 |
1 |
0 |
0 |
cmd_info_2_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3432 |
0 |
0 |
T124 |
11210 |
115 |
0 |
0 |
T127 |
10920 |
102 |
0 |
0 |
T128 |
7134 |
35 |
0 |
0 |
T129 |
6540 |
57 |
0 |
0 |
T155 |
67566 |
227 |
0 |
0 |
T156 |
66027 |
390 |
0 |
0 |
T157 |
10398 |
8 |
0 |
0 |
T158 |
62157 |
315 |
0 |
0 |
T159 |
11628 |
114 |
0 |
0 |
T162 |
5106 |
60 |
0 |
0 |
cmd_info_3_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3358 |
0 |
0 |
T124 |
11210 |
60 |
0 |
0 |
T127 |
10920 |
104 |
0 |
0 |
T128 |
7134 |
28 |
0 |
0 |
T129 |
6540 |
17 |
0 |
0 |
T155 |
67566 |
325 |
0 |
0 |
T156 |
66027 |
277 |
0 |
0 |
T157 |
10398 |
58 |
0 |
0 |
T158 |
62157 |
285 |
0 |
0 |
T159 |
11628 |
57 |
0 |
0 |
T162 |
5106 |
3 |
0 |
0 |
cmd_info_4_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3840 |
0 |
0 |
T124 |
11210 |
123 |
0 |
0 |
T127 |
10920 |
69 |
0 |
0 |
T128 |
7134 |
19 |
0 |
0 |
T129 |
6540 |
52 |
0 |
0 |
T155 |
67566 |
460 |
0 |
0 |
T156 |
66027 |
273 |
0 |
0 |
T157 |
10398 |
69 |
0 |
0 |
T158 |
62157 |
341 |
0 |
0 |
T159 |
11628 |
58 |
0 |
0 |
T162 |
5106 |
24 |
0 |
0 |
cmd_info_5_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3870 |
0 |
0 |
T124 |
11210 |
69 |
0 |
0 |
T127 |
10920 |
75 |
0 |
0 |
T128 |
7134 |
59 |
0 |
0 |
T129 |
6540 |
68 |
0 |
0 |
T155 |
67566 |
379 |
0 |
0 |
T156 |
66027 |
291 |
0 |
0 |
T157 |
10398 |
73 |
0 |
0 |
T158 |
62157 |
305 |
0 |
0 |
T159 |
11628 |
124 |
0 |
0 |
T162 |
5106 |
74 |
0 |
0 |
cmd_info_6_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
4033 |
0 |
0 |
T124 |
11210 |
82 |
0 |
0 |
T127 |
10920 |
1 |
0 |
0 |
T128 |
7134 |
35 |
0 |
0 |
T129 |
6540 |
101 |
0 |
0 |
T155 |
67566 |
608 |
0 |
0 |
T156 |
66027 |
419 |
0 |
0 |
T157 |
10398 |
66 |
0 |
0 |
T158 |
62157 |
387 |
0 |
0 |
T159 |
11628 |
89 |
0 |
0 |
T162 |
5106 |
6 |
0 |
0 |
cmd_info_7_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3890 |
0 |
0 |
T124 |
11210 |
61 |
0 |
0 |
T127 |
10920 |
70 |
0 |
0 |
T128 |
7134 |
59 |
0 |
0 |
T129 |
6540 |
81 |
0 |
0 |
T155 |
67566 |
643 |
0 |
0 |
T156 |
66027 |
296 |
0 |
0 |
T157 |
10398 |
48 |
0 |
0 |
T158 |
62157 |
379 |
0 |
0 |
T159 |
11628 |
58 |
0 |
0 |
T162 |
5106 |
52 |
0 |
0 |
cmd_info_8_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3623 |
0 |
0 |
T124 |
11210 |
73 |
0 |
0 |
T127 |
10920 |
98 |
0 |
0 |
T128 |
7134 |
74 |
0 |
0 |
T129 |
6540 |
13 |
0 |
0 |
T155 |
67566 |
484 |
0 |
0 |
T156 |
66027 |
276 |
0 |
0 |
T157 |
10398 |
121 |
0 |
0 |
T158 |
62157 |
415 |
0 |
0 |
T159 |
11628 |
45 |
0 |
0 |
T162 |
5106 |
5 |
0 |
0 |
cmd_info_9_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3591 |
0 |
0 |
T124 |
11210 |
64 |
0 |
0 |
T127 |
10920 |
86 |
0 |
0 |
T128 |
7134 |
21 |
0 |
0 |
T129 |
6540 |
7 |
0 |
0 |
T155 |
67566 |
562 |
0 |
0 |
T156 |
66027 |
219 |
0 |
0 |
T157 |
10398 |
68 |
0 |
0 |
T158 |
62157 |
189 |
0 |
0 |
T159 |
11628 |
67 |
0 |
0 |
T162 |
5106 |
3 |
0 |
0 |
cmd_info_en4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1825 |
0 |
0 |
T124 |
11210 |
17 |
0 |
0 |
T127 |
10920 |
12 |
0 |
0 |
T128 |
7134 |
5 |
0 |
0 |
T129 |
6540 |
2 |
0 |
0 |
T155 |
67566 |
132 |
0 |
0 |
T156 |
66027 |
69 |
0 |
0 |
T157 |
10398 |
20 |
0 |
0 |
T158 |
62157 |
74 |
0 |
0 |
T159 |
11628 |
19 |
0 |
0 |
T162 |
5106 |
13 |
0 |
0 |
cmd_info_ex4b_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1848 |
0 |
0 |
T113 |
9942 |
1 |
0 |
0 |
T124 |
11210 |
32 |
0 |
0 |
T127 |
10920 |
8 |
0 |
0 |
T128 |
7134 |
8 |
0 |
0 |
T129 |
6540 |
15 |
0 |
0 |
T155 |
67566 |
111 |
0 |
0 |
T156 |
66027 |
69 |
0 |
0 |
T157 |
10398 |
16 |
0 |
0 |
T158 |
62157 |
90 |
0 |
0 |
T162 |
5106 |
4 |
0 |
0 |
cmd_info_wrdi_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1775 |
0 |
0 |
T124 |
11210 |
33 |
0 |
0 |
T127 |
10920 |
14 |
0 |
0 |
T128 |
7134 |
7 |
0 |
0 |
T129 |
6540 |
11 |
0 |
0 |
T155 |
67566 |
115 |
0 |
0 |
T156 |
66027 |
54 |
0 |
0 |
T157 |
10398 |
37 |
0 |
0 |
T158 |
62157 |
80 |
0 |
0 |
T159 |
11628 |
17 |
0 |
0 |
T162 |
5106 |
12 |
0 |
0 |
cmd_info_wren_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1766 |
0 |
0 |
T124 |
11210 |
29 |
0 |
0 |
T127 |
10920 |
10 |
0 |
0 |
T128 |
7134 |
1 |
0 |
0 |
T129 |
6540 |
12 |
0 |
0 |
T155 |
67566 |
110 |
0 |
0 |
T156 |
66027 |
61 |
0 |
0 |
T157 |
10398 |
14 |
0 |
0 |
T158 |
62157 |
72 |
0 |
0 |
T159 |
11628 |
20 |
0 |
0 |
T162 |
5106 |
6 |
0 |
0 |
intercept_en_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1992 |
0 |
0 |
T124 |
11210 |
28 |
0 |
0 |
T127 |
10920 |
18 |
0 |
0 |
T128 |
7134 |
2 |
0 |
0 |
T129 |
6540 |
3 |
0 |
0 |
T155 |
67566 |
203 |
0 |
0 |
T156 |
66027 |
98 |
0 |
0 |
T157 |
10398 |
21 |
0 |
0 |
T158 |
62157 |
91 |
0 |
0 |
T159 |
11628 |
14 |
0 |
0 |
T162 |
5106 |
7 |
0 |
0 |
intr_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
3481 |
0 |
0 |
T24 |
70021 |
0 |
0 |
0 |
T32 |
293628 |
0 |
0 |
0 |
T35 |
634462 |
0 |
0 |
0 |
T38 |
749817 |
0 |
0 |
0 |
T39 |
122855 |
0 |
0 |
0 |
T47 |
207248 |
0 |
0 |
0 |
T48 |
6644 |
0 |
0 |
0 |
T49 |
662019 |
0 |
0 |
0 |
T56 |
14968 |
0 |
0 |
0 |
T77 |
7234 |
19 |
0 |
0 |
T92 |
0 |
27 |
0 |
0 |
T98 |
0 |
23 |
0 |
0 |
T163 |
0 |
19 |
0 |
0 |
T164 |
0 |
24 |
0 |
0 |
T165 |
0 |
24 |
0 |
0 |
T166 |
0 |
15 |
0 |
0 |
T167 |
0 |
17 |
0 |
0 |
T168 |
0 |
9 |
0 |
0 |
T169 |
0 |
54 |
0 |
0 |
jedec_cc_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1784 |
0 |
0 |
T124 |
11210 |
12 |
0 |
0 |
T127 |
10920 |
14 |
0 |
0 |
T128 |
7134 |
9 |
0 |
0 |
T129 |
6540 |
15 |
0 |
0 |
T155 |
67566 |
92 |
0 |
0 |
T156 |
66027 |
57 |
0 |
0 |
T157 |
10398 |
16 |
0 |
0 |
T158 |
62157 |
76 |
0 |
0 |
T159 |
11628 |
19 |
0 |
0 |
T162 |
5106 |
7 |
0 |
0 |
jedec_id_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1839 |
0 |
0 |
T94 |
3126 |
5 |
0 |
0 |
T124 |
11210 |
23 |
0 |
0 |
T127 |
10920 |
16 |
0 |
0 |
T129 |
6540 |
4 |
0 |
0 |
T155 |
67566 |
94 |
0 |
0 |
T156 |
66027 |
59 |
0 |
0 |
T157 |
10398 |
16 |
0 |
0 |
T158 |
62157 |
84 |
0 |
0 |
T159 |
11628 |
22 |
0 |
0 |
T162 |
5106 |
8 |
0 |
0 |
mailbox_addr_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1812 |
0 |
0 |
T94 |
3126 |
6 |
0 |
0 |
T124 |
11210 |
19 |
0 |
0 |
T127 |
10920 |
13 |
0 |
0 |
T129 |
6540 |
8 |
0 |
0 |
T155 |
67566 |
80 |
0 |
0 |
T156 |
66027 |
49 |
0 |
0 |
T157 |
10398 |
12 |
0 |
0 |
T158 |
62157 |
75 |
0 |
0 |
T159 |
11628 |
19 |
0 |
0 |
T162 |
5106 |
9 |
0 |
0 |
payload_swap_data_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1617 |
0 |
0 |
T124 |
11210 |
20 |
0 |
0 |
T127 |
10920 |
5 |
0 |
0 |
T128 |
7134 |
9 |
0 |
0 |
T129 |
6540 |
7 |
0 |
0 |
T155 |
67566 |
72 |
0 |
0 |
T156 |
66027 |
37 |
0 |
0 |
T157 |
10398 |
14 |
0 |
0 |
T158 |
62157 |
34 |
0 |
0 |
T159 |
11628 |
14 |
0 |
0 |
T162 |
5106 |
8 |
0 |
0 |
payload_swap_mask_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1660 |
0 |
0 |
T124 |
11210 |
12 |
0 |
0 |
T127 |
10920 |
13 |
0 |
0 |
T128 |
7134 |
2 |
0 |
0 |
T129 |
6540 |
4 |
0 |
0 |
T155 |
67566 |
79 |
0 |
0 |
T156 |
66027 |
34 |
0 |
0 |
T157 |
10398 |
8 |
0 |
0 |
T158 |
62157 |
18 |
0 |
0 |
T159 |
11628 |
32 |
0 |
0 |
T162 |
5106 |
8 |
0 |
0 |
read_threshold_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1659 |
0 |
0 |
T94 |
3126 |
9 |
0 |
0 |
T116 |
8547 |
3 |
0 |
0 |
T124 |
11210 |
14 |
0 |
0 |
T127 |
10920 |
17 |
0 |
0 |
T129 |
6540 |
4 |
0 |
0 |
T155 |
67566 |
55 |
0 |
0 |
T156 |
66027 |
39 |
0 |
0 |
T157 |
10398 |
26 |
0 |
0 |
T158 |
62157 |
40 |
0 |
0 |
T159 |
11628 |
15 |
0 |
0 |
tpm_access_0_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
2053 |
0 |
0 |
T124 |
11210 |
16 |
0 |
0 |
T127 |
10920 |
33 |
0 |
0 |
T128 |
7134 |
5 |
0 |
0 |
T129 |
6540 |
40 |
0 |
0 |
T155 |
67566 |
154 |
0 |
0 |
T156 |
66027 |
100 |
0 |
0 |
T157 |
10398 |
23 |
0 |
0 |
T158 |
62157 |
98 |
0 |
0 |
T159 |
11628 |
35 |
0 |
0 |
T162 |
5106 |
13 |
0 |
0 |
tpm_access_1_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1608 |
0 |
0 |
T94 |
3126 |
8 |
0 |
0 |
T124 |
11210 |
10 |
0 |
0 |
T127 |
10920 |
8 |
0 |
0 |
T129 |
6540 |
6 |
0 |
0 |
T155 |
67566 |
58 |
0 |
0 |
T156 |
66027 |
40 |
0 |
0 |
T157 |
10398 |
9 |
0 |
0 |
T158 |
62157 |
28 |
0 |
0 |
T159 |
11628 |
21 |
0 |
0 |
T162 |
5106 |
4 |
0 |
0 |
tpm_cfg_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
2428 |
0 |
0 |
T124 |
11210 |
28 |
0 |
0 |
T127 |
10920 |
36 |
0 |
0 |
T128 |
7134 |
26 |
0 |
0 |
T129 |
6540 |
37 |
0 |
0 |
T155 |
67566 |
248 |
0 |
0 |
T156 |
66027 |
131 |
0 |
0 |
T157 |
10398 |
25 |
0 |
0 |
T158 |
62157 |
126 |
0 |
0 |
T159 |
11628 |
45 |
0 |
0 |
T162 |
5106 |
25 |
0 |
0 |
tpm_did_vid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1819 |
0 |
0 |
T124 |
11210 |
29 |
0 |
0 |
T127 |
10920 |
25 |
0 |
0 |
T128 |
7134 |
6 |
0 |
0 |
T129 |
6540 |
5 |
0 |
0 |
T155 |
67566 |
115 |
0 |
0 |
T156 |
66027 |
38 |
0 |
0 |
T157 |
10398 |
26 |
0 |
0 |
T158 |
62157 |
70 |
0 |
0 |
T159 |
11628 |
23 |
0 |
0 |
T162 |
5106 |
14 |
0 |
0 |
tpm_int_enable_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1664 |
0 |
0 |
T124 |
11210 |
1 |
0 |
0 |
T127 |
10920 |
11 |
0 |
0 |
T128 |
7134 |
3 |
0 |
0 |
T129 |
6540 |
13 |
0 |
0 |
T155 |
67566 |
79 |
0 |
0 |
T156 |
66027 |
25 |
0 |
0 |
T157 |
10398 |
8 |
0 |
0 |
T158 |
62157 |
36 |
0 |
0 |
T159 |
11628 |
15 |
0 |
0 |
T162 |
5106 |
6 |
0 |
0 |
tpm_int_status_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1698 |
0 |
0 |
T94 |
3126 |
3 |
0 |
0 |
T124 |
11210 |
16 |
0 |
0 |
T127 |
10920 |
6 |
0 |
0 |
T129 |
6540 |
13 |
0 |
0 |
T155 |
67566 |
75 |
0 |
0 |
T156 |
66027 |
41 |
0 |
0 |
T157 |
10398 |
17 |
0 |
0 |
T158 |
62157 |
75 |
0 |
0 |
T159 |
11628 |
14 |
0 |
0 |
T162 |
5106 |
7 |
0 |
0 |
tpm_int_vector_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1643 |
0 |
0 |
T94 |
3126 |
8 |
0 |
0 |
T124 |
11210 |
16 |
0 |
0 |
T127 |
10920 |
10 |
0 |
0 |
T129 |
6540 |
12 |
0 |
0 |
T155 |
67566 |
55 |
0 |
0 |
T156 |
66027 |
57 |
0 |
0 |
T157 |
10398 |
12 |
0 |
0 |
T158 |
62157 |
35 |
0 |
0 |
T159 |
11628 |
17 |
0 |
0 |
T162 |
5106 |
5 |
0 |
0 |
tpm_intf_capability_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1520 |
0 |
0 |
T124 |
11210 |
19 |
0 |
0 |
T127 |
10920 |
11 |
0 |
0 |
T128 |
7134 |
7 |
0 |
0 |
T129 |
6540 |
1 |
0 |
0 |
T155 |
67566 |
56 |
0 |
0 |
T156 |
66027 |
61 |
0 |
0 |
T157 |
10398 |
13 |
0 |
0 |
T158 |
62157 |
40 |
0 |
0 |
T159 |
11628 |
15 |
0 |
0 |
T162 |
5106 |
9 |
0 |
0 |
tpm_rid_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1733 |
0 |
0 |
T124 |
11210 |
20 |
0 |
0 |
T127 |
10920 |
16 |
0 |
0 |
T128 |
7134 |
4 |
0 |
0 |
T129 |
6540 |
10 |
0 |
0 |
T155 |
67566 |
97 |
0 |
0 |
T156 |
66027 |
56 |
0 |
0 |
T157 |
10398 |
5 |
0 |
0 |
T158 |
62157 |
50 |
0 |
0 |
T159 |
11628 |
24 |
0 |
0 |
T162 |
5106 |
2 |
0 |
0 |
tpm_sts_rd_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
432025235 |
1497 |
0 |
0 |
T124 |
11210 |
24 |
0 |
0 |
T127 |
10920 |
4 |
0 |
0 |
T128 |
7134 |
5 |
0 |
0 |
T129 |
6540 |
7 |
0 |
0 |
T155 |
67566 |
76 |
0 |
0 |
T156 |
66027 |
14 |
0 |
0 |
T157 |
10398 |
10 |
0 |
0 |
T158 |
62157 |
32 |
0 |
0 |
T159 |
11628 |
15 |
0 |
0 |
T162 |
5106 |
3 |
0 |
0 |