Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.95 98.35 94.20 98.61 89.36 97.14 95.81 98.17


Total test records in report: 1101
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T817 /workspace/coverage/default/30.spi_device_mailbox.2726407876 May 12 12:53:41 PM PDT 24 May 12 12:53:57 PM PDT 24 8942264343 ps
T818 /workspace/coverage/default/8.spi_device_flash_all.4147452752 May 12 12:51:45 PM PDT 24 May 12 12:52:36 PM PDT 24 22442187668 ps
T819 /workspace/coverage/default/23.spi_device_flash_and_tpm.3046730097 May 12 12:53:00 PM PDT 24 May 12 12:53:23 PM PDT 24 5918082260 ps
T820 /workspace/coverage/default/30.spi_device_read_buffer_direct.1777547131 May 12 12:53:32 PM PDT 24 May 12 12:53:36 PM PDT 24 327060760 ps
T821 /workspace/coverage/default/38.spi_device_tpm_sts_read.2306954509 May 12 12:53:56 PM PDT 24 May 12 12:53:57 PM PDT 24 188092376 ps
T822 /workspace/coverage/default/23.spi_device_tpm_all.1927317158 May 12 12:52:55 PM PDT 24 May 12 12:53:12 PM PDT 24 1657269863 ps
T823 /workspace/coverage/default/26.spi_device_read_buffer_direct.1672779850 May 12 12:53:18 PM PDT 24 May 12 12:53:22 PM PDT 24 82573780 ps
T824 /workspace/coverage/default/38.spi_device_flash_mode.1852912498 May 12 12:53:50 PM PDT 24 May 12 12:53:55 PM PDT 24 278230908 ps
T825 /workspace/coverage/default/48.spi_device_pass_cmd_filtering.1987697543 May 12 12:54:22 PM PDT 24 May 12 12:54:28 PM PDT 24 1861435522 ps
T826 /workspace/coverage/default/5.spi_device_tpm_read_hw_reg.2180910068 May 12 12:51:11 PM PDT 24 May 12 12:51:29 PM PDT 24 5983395781 ps
T827 /workspace/coverage/default/36.spi_device_alert_test.2595643199 May 12 12:53:56 PM PDT 24 May 12 12:53:58 PM PDT 24 13360807 ps
T828 /workspace/coverage/default/2.spi_device_flash_and_tpm.3963058395 May 12 12:51:14 PM PDT 24 May 12 12:53:16 PM PDT 24 61200978541 ps
T829 /workspace/coverage/default/28.spi_device_intercept.50831408 May 12 12:53:23 PM PDT 24 May 12 12:53:29 PM PDT 24 2678634850 ps
T830 /workspace/coverage/default/28.spi_device_cfg_cmd.3555295686 May 12 12:53:28 PM PDT 24 May 12 12:53:36 PM PDT 24 828043728 ps
T831 /workspace/coverage/default/42.spi_device_pass_addr_payload_swap.537775071 May 12 12:53:58 PM PDT 24 May 12 12:54:02 PM PDT 24 65639115 ps
T832 /workspace/coverage/default/43.spi_device_tpm_all.4285843868 May 12 12:54:02 PM PDT 24 May 12 12:54:27 PM PDT 24 9205350632 ps
T833 /workspace/coverage/default/28.spi_device_alert_test.3239754143 May 12 12:53:43 PM PDT 24 May 12 12:53:45 PM PDT 24 60843129 ps
T834 /workspace/coverage/default/47.spi_device_csb_read.3203821474 May 12 12:54:13 PM PDT 24 May 12 12:54:14 PM PDT 24 30100480 ps
T835 /workspace/coverage/default/3.spi_device_cfg_cmd.3275622109 May 12 12:51:09 PM PDT 24 May 12 12:51:13 PM PDT 24 122844536 ps
T836 /workspace/coverage/default/26.spi_device_alert_test.397568971 May 12 12:53:12 PM PDT 24 May 12 12:53:14 PM PDT 24 12830564 ps
T837 /workspace/coverage/default/26.spi_device_upload.2043247861 May 12 12:53:13 PM PDT 24 May 12 12:53:25 PM PDT 24 10234652042 ps
T838 /workspace/coverage/default/1.spi_device_mem_parity.4247451625 May 12 12:51:08 PM PDT 24 May 12 12:51:09 PM PDT 24 263611186 ps
T839 /workspace/coverage/default/21.spi_device_pass_addr_payload_swap.2475384407 May 12 12:52:51 PM PDT 24 May 12 12:52:59 PM PDT 24 2312197216 ps
T840 /workspace/coverage/default/42.spi_device_intercept.2239533760 May 12 12:53:59 PM PDT 24 May 12 12:54:02 PM PDT 24 645392522 ps
T841 /workspace/coverage/default/2.spi_device_upload.1157610222 May 12 12:51:10 PM PDT 24 May 12 12:51:15 PM PDT 24 398965319 ps
T842 /workspace/coverage/default/27.spi_device_pass_cmd_filtering.2360601563 May 12 12:53:16 PM PDT 24 May 12 12:53:22 PM PDT 24 1638049475 ps
T843 /workspace/coverage/default/37.spi_device_stress_all.1027234232 May 12 12:53:54 PM PDT 24 May 12 12:54:30 PM PDT 24 3565160208 ps
T844 /workspace/coverage/default/14.spi_device_read_buffer_direct.2316323483 May 12 12:52:09 PM PDT 24 May 12 12:52:17 PM PDT 24 1773923297 ps
T845 /workspace/coverage/default/15.spi_device_csb_read.3669185341 May 12 12:51:57 PM PDT 24 May 12 12:51:59 PM PDT 24 58382333 ps
T846 /workspace/coverage/default/27.spi_device_read_buffer_direct.1473360384 May 12 12:53:18 PM PDT 24 May 12 12:53:23 PM PDT 24 352827029 ps
T847 /workspace/coverage/default/45.spi_device_tpm_rw.4237785610 May 12 12:54:17 PM PDT 24 May 12 12:54:21 PM PDT 24 259770673 ps
T848 /workspace/coverage/default/39.spi_device_intercept.3528176841 May 12 12:53:48 PM PDT 24 May 12 12:53:54 PM PDT 24 3991284479 ps
T849 /workspace/coverage/default/21.spi_device_tpm_all.3714612505 May 12 12:52:54 PM PDT 24 May 12 12:53:11 PM PDT 24 9330871491 ps
T850 /workspace/coverage/default/11.spi_device_flash_all.3897363386 May 12 12:51:54 PM PDT 24 May 12 12:52:32 PM PDT 24 4175313300 ps
T851 /workspace/coverage/default/48.spi_device_tpm_rw.3125119851 May 12 12:54:22 PM PDT 24 May 12 12:54:23 PM PDT 24 34581309 ps
T852 /workspace/coverage/default/0.spi_device_tpm_all.2029313714 May 12 12:50:49 PM PDT 24 May 12 12:50:50 PM PDT 24 11623298 ps
T853 /workspace/coverage/default/15.spi_device_intercept.932323352 May 12 12:52:06 PM PDT 24 May 12 12:52:12 PM PDT 24 148227776 ps
T854 /workspace/coverage/default/21.spi_device_flash_and_tpm_min_idle.3330020867 May 12 12:52:46 PM PDT 24 May 12 12:58:49 PM PDT 24 141664433896 ps
T855 /workspace/coverage/default/17.spi_device_tpm_sts_read.2969678190 May 12 12:52:12 PM PDT 24 May 12 12:52:14 PM PDT 24 42240079 ps
T856 /workspace/coverage/default/29.spi_device_pass_addr_payload_swap.3204840266 May 12 12:53:33 PM PDT 24 May 12 12:53:40 PM PDT 24 1577581833 ps
T857 /workspace/coverage/default/18.spi_device_mem_parity.2722707845 May 12 12:52:31 PM PDT 24 May 12 12:52:32 PM PDT 24 25619462 ps
T858 /workspace/coverage/default/13.spi_device_tpm_read_hw_reg.3283662939 May 12 12:51:59 PM PDT 24 May 12 12:52:11 PM PDT 24 3960876189 ps
T859 /workspace/coverage/default/42.spi_device_csb_read.4212484506 May 12 12:54:09 PM PDT 24 May 12 12:54:10 PM PDT 24 26003916 ps
T860 /workspace/coverage/default/40.spi_device_stress_all.3742481303 May 12 12:53:56 PM PDT 24 May 12 12:57:54 PM PDT 24 31066715685 ps
T861 /workspace/coverage/default/39.spi_device_upload.1144392066 May 12 12:53:50 PM PDT 24 May 12 12:54:01 PM PDT 24 1056012605 ps
T862 /workspace/coverage/default/16.spi_device_mailbox.2977138355 May 12 12:52:05 PM PDT 24 May 12 12:52:42 PM PDT 24 20946245107 ps
T863 /workspace/coverage/default/20.spi_device_alert_test.1890722612 May 12 12:52:39 PM PDT 24 May 12 12:52:40 PM PDT 24 12148304 ps
T864 /workspace/coverage/default/31.spi_device_tpm_read_hw_reg.1374257796 May 12 12:53:40 PM PDT 24 May 12 12:54:00 PM PDT 24 9204933038 ps
T865 /workspace/coverage/default/17.spi_device_tpm_read_hw_reg.1517819362 May 12 12:52:13 PM PDT 24 May 12 12:52:23 PM PDT 24 2776974730 ps
T240 /workspace/coverage/default/2.spi_device_stress_all.3434650876 May 12 12:51:04 PM PDT 24 May 12 12:54:25 PM PDT 24 101248337906 ps
T866 /workspace/coverage/default/43.spi_device_mailbox.1013967589 May 12 12:54:04 PM PDT 24 May 12 12:54:32 PM PDT 24 14725567796 ps
T235 /workspace/coverage/default/19.spi_device_flash_all.3569292048 May 12 12:52:39 PM PDT 24 May 12 12:55:47 PM PDT 24 329242703226 ps
T867 /workspace/coverage/default/7.spi_device_upload.371674948 May 12 12:51:29 PM PDT 24 May 12 12:52:01 PM PDT 24 36175726996 ps
T868 /workspace/coverage/default/46.spi_device_flash_all.1866388662 May 12 12:54:15 PM PDT 24 May 12 12:59:50 PM PDT 24 43866370466 ps
T869 /workspace/coverage/default/23.spi_device_tpm_sts_read.3589200303 May 12 12:52:59 PM PDT 24 May 12 12:53:01 PM PDT 24 42535961 ps
T870 /workspace/coverage/default/1.spi_device_pass_cmd_filtering.2827284600 May 12 12:50:59 PM PDT 24 May 12 12:51:22 PM PDT 24 30705096921 ps
T871 /workspace/coverage/default/19.spi_device_intercept.3447036168 May 12 12:52:38 PM PDT 24 May 12 12:53:03 PM PDT 24 3378998294 ps
T259 /workspace/coverage/default/24.spi_device_flash_and_tpm.1607585068 May 12 12:52:59 PM PDT 24 May 12 12:54:45 PM PDT 24 25614247758 ps
T872 /workspace/coverage/default/41.spi_device_flash_all.3550195644 May 12 12:54:10 PM PDT 24 May 12 12:57:09 PM PDT 24 19699171240 ps
T873 /workspace/coverage/default/20.spi_device_read_buffer_direct.2834733775 May 12 12:52:48 PM PDT 24 May 12 12:52:52 PM PDT 24 1594883262 ps
T874 /workspace/coverage/default/16.spi_device_flash_and_tpm.1999676995 May 12 12:52:05 PM PDT 24 May 12 12:52:26 PM PDT 24 11042663077 ps
T875 /workspace/coverage/default/46.spi_device_pass_addr_payload_swap.1554100599 May 12 12:54:17 PM PDT 24 May 12 12:54:22 PM PDT 24 344446886 ps
T876 /workspace/coverage/default/43.spi_device_tpm_sts_read.3815604929 May 12 12:54:16 PM PDT 24 May 12 12:54:17 PM PDT 24 814016952 ps
T877 /workspace/coverage/default/29.spi_device_csb_read.2685407816 May 12 12:53:43 PM PDT 24 May 12 12:53:46 PM PDT 24 71063180 ps
T878 /workspace/coverage/default/13.spi_device_mailbox.1894015648 May 12 12:52:01 PM PDT 24 May 12 12:52:04 PM PDT 24 592261318 ps
T257 /workspace/coverage/default/31.spi_device_flash_all.2294396797 May 12 12:53:43 PM PDT 24 May 12 12:55:37 PM PDT 24 18708449608 ps
T879 /workspace/coverage/default/10.spi_device_tpm_sts_read.442690865 May 12 12:51:47 PM PDT 24 May 12 12:51:48 PM PDT 24 95120321 ps
T880 /workspace/coverage/default/12.spi_device_cfg_cmd.328486453 May 12 12:51:57 PM PDT 24 May 12 12:52:00 PM PDT 24 115339947 ps
T881 /workspace/coverage/default/42.spi_device_tpm_sts_read.3978582357 May 12 12:53:59 PM PDT 24 May 12 12:54:01 PM PDT 24 136669536 ps
T882 /workspace/coverage/default/9.spi_device_csb_read.2710647029 May 12 12:51:34 PM PDT 24 May 12 12:51:35 PM PDT 24 24025536 ps
T883 /workspace/coverage/default/21.spi_device_tpm_sts_read.2485078495 May 12 12:52:49 PM PDT 24 May 12 12:52:51 PM PDT 24 25365076 ps
T884 /workspace/coverage/default/32.spi_device_read_buffer_direct.104333740 May 12 12:53:43 PM PDT 24 May 12 12:53:57 PM PDT 24 1078067816 ps
T885 /workspace/coverage/default/27.spi_device_cfg_cmd.2835731265 May 12 12:53:22 PM PDT 24 May 12 12:53:32 PM PDT 24 731697596 ps
T886 /workspace/coverage/default/1.spi_device_tpm_sts_read.3950261831 May 12 12:51:02 PM PDT 24 May 12 12:51:03 PM PDT 24 14185524 ps
T887 /workspace/coverage/default/4.spi_device_tpm_read_hw_reg.4131324094 May 12 12:51:15 PM PDT 24 May 12 12:51:38 PM PDT 24 64386901149 ps
T888 /workspace/coverage/default/46.spi_device_cfg_cmd.1446794373 May 12 12:54:15 PM PDT 24 May 12 12:54:31 PM PDT 24 2682003765 ps
T889 /workspace/coverage/default/37.spi_device_tpm_rw.4170129538 May 12 12:54:01 PM PDT 24 May 12 12:54:02 PM PDT 24 153781645 ps
T890 /workspace/coverage/default/12.spi_device_pass_cmd_filtering.82775023 May 12 12:52:10 PM PDT 24 May 12 12:52:43 PM PDT 24 112538762361 ps
T891 /workspace/coverage/default/27.spi_device_tpm_sts_read.1295203119 May 12 12:53:20 PM PDT 24 May 12 12:53:21 PM PDT 24 158610335 ps
T892 /workspace/coverage/default/14.spi_device_flash_all.625084622 May 12 12:52:10 PM PDT 24 May 12 12:54:20 PM PDT 24 18247165735 ps
T893 /workspace/coverage/default/0.spi_device_flash_mode.1284761256 May 12 12:50:48 PM PDT 24 May 12 12:50:52 PM PDT 24 82558018 ps
T894 /workspace/coverage/default/24.spi_device_pass_cmd_filtering.729924487 May 12 12:53:03 PM PDT 24 May 12 12:53:13 PM PDT 24 2186757681 ps
T895 /workspace/coverage/default/25.spi_device_tpm_sts_read.3699060930 May 12 12:53:01 PM PDT 24 May 12 12:53:03 PM PDT 24 63330744 ps
T896 /workspace/coverage/default/20.spi_device_cfg_cmd.2665140464 May 12 12:52:42 PM PDT 24 May 12 12:52:45 PM PDT 24 1527530805 ps
T232 /workspace/coverage/default/12.spi_device_flash_and_tpm_min_idle.2390577352 May 12 12:51:59 PM PDT 24 May 12 12:56:23 PM PDT 24 118587280866 ps
T897 /workspace/coverage/default/10.spi_device_read_buffer_direct.2640540827 May 12 12:51:45 PM PDT 24 May 12 12:51:52 PM PDT 24 2824196876 ps
T898 /workspace/coverage/default/15.spi_device_pass_addr_payload_swap.4050403828 May 12 12:52:06 PM PDT 24 May 12 12:52:32 PM PDT 24 43668827817 ps
T899 /workspace/coverage/default/13.spi_device_csb_read.2370519302 May 12 12:51:57 PM PDT 24 May 12 12:51:59 PM PDT 24 56012140 ps
T900 /workspace/coverage/default/29.spi_device_cfg_cmd.372836315 May 12 12:53:37 PM PDT 24 May 12 12:53:43 PM PDT 24 415042768 ps
T266 /workspace/coverage/default/20.spi_device_stress_all.2831962326 May 12 12:52:53 PM PDT 24 May 12 01:00:25 PM PDT 24 466786355051 ps
T901 /workspace/coverage/default/32.spi_device_alert_test.1012740927 May 12 12:53:47 PM PDT 24 May 12 12:53:48 PM PDT 24 14440858 ps
T902 /workspace/coverage/default/14.spi_device_upload.3524039764 May 12 12:51:58 PM PDT 24 May 12 12:52:11 PM PDT 24 18887928665 ps
T903 /workspace/coverage/default/4.spi_device_tpm_sts_read.2156356534 May 12 12:51:03 PM PDT 24 May 12 12:51:04 PM PDT 24 14435101 ps
T904 /workspace/coverage/default/14.spi_device_tpm_rw.1717838173 May 12 12:52:06 PM PDT 24 May 12 12:52:08 PM PDT 24 17607712 ps
T905 /workspace/coverage/default/45.spi_device_alert_test.4260117220 May 12 12:54:17 PM PDT 24 May 12 12:54:18 PM PDT 24 21729673 ps
T289 /workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.2574901391 May 12 12:51:52 PM PDT 24 May 12 12:55:16 PM PDT 24 114031380865 ps
T906 /workspace/coverage/default/45.spi_device_flash_and_tpm.3323189944 May 12 12:54:22 PM PDT 24 May 12 12:58:51 PM PDT 24 30730173229 ps
T250 /workspace/coverage/default/29.spi_device_flash_and_tpm.4018518519 May 12 12:53:35 PM PDT 24 May 12 12:55:33 PM PDT 24 6277432518 ps
T907 /workspace/coverage/default/49.spi_device_read_buffer_direct.2206556849 May 12 12:54:32 PM PDT 24 May 12 12:54:36 PM PDT 24 65126194 ps
T908 /workspace/coverage/default/1.spi_device_cfg_cmd.954957033 May 12 12:50:52 PM PDT 24 May 12 12:50:56 PM PDT 24 36052573 ps
T909 /workspace/coverage/default/36.spi_device_upload.2821200446 May 12 12:53:55 PM PDT 24 May 12 12:54:09 PM PDT 24 3266784395 ps
T910 /workspace/coverage/default/31.spi_device_tpm_sts_read.2945143798 May 12 12:53:40 PM PDT 24 May 12 12:53:42 PM PDT 24 97184552 ps
T911 /workspace/coverage/default/9.spi_device_tpm_all.1741748494 May 12 12:51:36 PM PDT 24 May 12 12:52:06 PM PDT 24 23797730368 ps
T912 /workspace/coverage/default/2.spi_device_pass_addr_payload_swap.533910685 May 12 12:50:57 PM PDT 24 May 12 12:51:20 PM PDT 24 25938820726 ps
T913 /workspace/coverage/default/29.spi_device_tpm_read_hw_reg.777534805 May 12 12:53:46 PM PDT 24 May 12 12:53:55 PM PDT 24 3018776216 ps
T145 /workspace/coverage/default/16.spi_device_flash_and_tpm_min_idle.1827288010 May 12 12:52:13 PM PDT 24 May 12 12:57:33 PM PDT 24 32296098176 ps
T914 /workspace/coverage/default/40.spi_device_csb_read.1695746055 May 12 12:53:56 PM PDT 24 May 12 12:53:58 PM PDT 24 31070344 ps
T915 /workspace/coverage/default/13.spi_device_alert_test.2303955731 May 12 12:51:54 PM PDT 24 May 12 12:51:56 PM PDT 24 45246171 ps
T916 /workspace/coverage/default/11.spi_device_pass_addr_payload_swap.1945411912 May 12 12:51:59 PM PDT 24 May 12 12:52:10 PM PDT 24 1113631987 ps
T917 /workspace/coverage/default/16.spi_device_flash_all.996421734 May 12 12:52:13 PM PDT 24 May 12 12:53:28 PM PDT 24 5404907367 ps
T918 /workspace/coverage/default/23.spi_device_csb_read.907102444 May 12 12:52:56 PM PDT 24 May 12 12:52:58 PM PDT 24 22849541 ps
T919 /workspace/coverage/default/45.spi_device_flash_mode.1949004830 May 12 12:54:03 PM PDT 24 May 12 12:54:19 PM PDT 24 4239698356 ps
T920 /workspace/coverage/default/2.spi_device_tpm_sts_read.4235470257 May 12 12:51:10 PM PDT 24 May 12 12:51:11 PM PDT 24 91598221 ps
T921 /workspace/coverage/default/30.spi_device_tpm_all.3787942741 May 12 12:53:40 PM PDT 24 May 12 12:53:59 PM PDT 24 2553340048 ps
T234 /workspace/coverage/default/27.spi_device_flash_and_tpm.698120398 May 12 12:53:35 PM PDT 24 May 12 01:00:51 PM PDT 24 303730030270 ps
T922 /workspace/coverage/default/49.spi_device_flash_all.2109376442 May 12 12:54:23 PM PDT 24 May 12 12:56:21 PM PDT 24 16766232200 ps
T923 /workspace/coverage/default/40.spi_device_mailbox.4211897459 May 12 12:54:14 PM PDT 24 May 12 12:54:29 PM PDT 24 1191243119 ps
T251 /workspace/coverage/default/35.spi_device_flash_and_tpm_min_idle.65678917 May 12 12:53:49 PM PDT 24 May 12 12:54:10 PM PDT 24 2752266322 ps
T924 /workspace/coverage/default/35.spi_device_mailbox.1494599113 May 12 12:53:43 PM PDT 24 May 12 12:54:14 PM PDT 24 2315761538 ps
T925 /workspace/coverage/default/34.spi_device_flash_mode.702127293 May 12 12:53:51 PM PDT 24 May 12 12:54:17 PM PDT 24 2135195641 ps
T926 /workspace/coverage/default/4.spi_device_flash_all.1582515770 May 12 12:51:06 PM PDT 24 May 12 12:51:45 PM PDT 24 2144968917 ps
T927 /workspace/coverage/default/14.spi_device_tpm_read_hw_reg.49082295 May 12 12:51:55 PM PDT 24 May 12 12:51:57 PM PDT 24 24733584 ps
T928 /workspace/coverage/default/14.spi_device_mailbox.3657520318 May 12 12:51:55 PM PDT 24 May 12 12:52:48 PM PDT 24 12306632955 ps
T929 /workspace/coverage/default/42.spi_device_tpm_rw.3622487536 May 12 12:54:14 PM PDT 24 May 12 12:54:15 PM PDT 24 45222039 ps
T930 /workspace/coverage/default/21.spi_device_read_buffer_direct.1643413155 May 12 12:52:46 PM PDT 24 May 12 12:52:51 PM PDT 24 143920922 ps
T931 /workspace/coverage/default/5.spi_device_tpm_all.2410058784 May 12 12:51:13 PM PDT 24 May 12 12:51:30 PM PDT 24 3862531674 ps
T932 /workspace/coverage/default/41.spi_device_intercept.2865168995 May 12 12:54:12 PM PDT 24 May 12 12:54:19 PM PDT 24 1739556183 ps
T933 /workspace/coverage/default/29.spi_device_flash_all.1470202422 May 12 12:53:32 PM PDT 24 May 12 12:56:57 PM PDT 24 23428588272 ps
T934 /workspace/coverage/default/6.spi_device_mem_parity.4283036092 May 12 12:51:29 PM PDT 24 May 12 12:51:30 PM PDT 24 61166688 ps
T245 /workspace/coverage/default/6.spi_device_flash_and_tpm_min_idle.401170772 May 12 12:51:20 PM PDT 24 May 12 12:53:54 PM PDT 24 10263821607 ps
T935 /workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.320213358 May 12 12:52:08 PM PDT 24 May 12 12:53:30 PM PDT 24 7737214142 ps
T936 /workspace/coverage/default/35.spi_device_pass_addr_payload_swap.3208722468 May 12 12:53:46 PM PDT 24 May 12 12:54:04 PM PDT 24 5102215363 ps
T937 /workspace/coverage/default/30.spi_device_tpm_rw.1299094687 May 12 12:53:40 PM PDT 24 May 12 12:53:42 PM PDT 24 71555866 ps
T938 /workspace/coverage/default/36.spi_device_tpm_read_hw_reg.3696651432 May 12 12:53:49 PM PDT 24 May 12 12:53:53 PM PDT 24 482226330 ps
T939 /workspace/coverage/default/46.spi_device_flash_mode.770768138 May 12 12:54:15 PM PDT 24 May 12 12:54:19 PM PDT 24 778500476 ps
T940 /workspace/coverage/default/31.spi_device_mailbox.2614213612 May 12 12:53:40 PM PDT 24 May 12 12:53:44 PM PDT 24 304546905 ps
T248 /workspace/coverage/default/41.spi_device_flash_and_tpm.508481811 May 12 12:54:01 PM PDT 24 May 12 12:57:42 PM PDT 24 20526923258 ps
T941 /workspace/coverage/default/29.spi_device_flash_mode.3311169778 May 12 12:53:34 PM PDT 24 May 12 12:53:37 PM PDT 24 33877833 ps
T249 /workspace/coverage/default/28.spi_device_flash_all.1352702337 May 12 12:53:29 PM PDT 24 May 12 12:56:10 PM PDT 24 242584023887 ps
T942 /workspace/coverage/default/19.spi_device_pass_cmd_filtering.377520765 May 12 12:52:37 PM PDT 24 May 12 12:52:43 PM PDT 24 447999944 ps
T943 /workspace/coverage/default/47.spi_device_flash_and_tpm.3651984033 May 12 12:54:23 PM PDT 24 May 12 12:57:16 PM PDT 24 16690192369 ps
T944 /workspace/coverage/default/25.spi_device_pass_cmd_filtering.3961635380 May 12 12:53:02 PM PDT 24 May 12 12:53:07 PM PDT 24 551799881 ps
T945 /workspace/coverage/default/21.spi_device_intercept.836081781 May 12 12:52:44 PM PDT 24 May 12 12:52:48 PM PDT 24 461637775 ps
T946 /workspace/coverage/default/39.spi_device_tpm_read_hw_reg.547866457 May 12 12:54:03 PM PDT 24 May 12 12:54:08 PM PDT 24 756785788 ps
T947 /workspace/coverage/default/19.spi_device_tpm_rw.3597669453 May 12 12:52:33 PM PDT 24 May 12 12:52:36 PM PDT 24 245203087 ps
T948 /workspace/coverage/default/10.spi_device_intercept.1791951081 May 12 12:51:46 PM PDT 24 May 12 12:51:55 PM PDT 24 696516425 ps
T84 /workspace/coverage/default/3.spi_device_sec_cm.776136218 May 12 12:51:03 PM PDT 24 May 12 12:51:05 PM PDT 24 89868786 ps
T239 /workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.2737318253 May 12 12:52:51 PM PDT 24 May 12 12:55:26 PM PDT 24 14779844556 ps
T949 /workspace/coverage/default/47.spi_device_tpm_read_hw_reg.2834812299 May 12 12:54:20 PM PDT 24 May 12 12:54:25 PM PDT 24 7117702009 ps
T950 /workspace/coverage/default/7.spi_device_csb_read.3483438710 May 12 12:51:15 PM PDT 24 May 12 12:51:17 PM PDT 24 118827821 ps
T951 /workspace/coverage/default/22.spi_device_tpm_sts_read.4045229001 May 12 12:52:52 PM PDT 24 May 12 12:52:54 PM PDT 24 158042887 ps
T952 /workspace/coverage/default/16.spi_device_pass_cmd_filtering.3184395270 May 12 12:52:06 PM PDT 24 May 12 12:52:25 PM PDT 24 24344062558 ps
T953 /workspace/coverage/default/48.spi_device_intercept.471135835 May 12 12:54:27 PM PDT 24 May 12 12:54:32 PM PDT 24 3415437479 ps
T236 /workspace/coverage/default/20.spi_device_flash_all.3131148622 May 12 12:52:42 PM PDT 24 May 12 12:59:13 PM PDT 24 53481619054 ps
T954 /workspace/coverage/default/25.spi_device_upload.3245282946 May 12 12:53:02 PM PDT 24 May 12 12:53:14 PM PDT 24 14098962304 ps
T955 /workspace/coverage/default/42.spi_device_flash_mode.1224370430 May 12 12:54:04 PM PDT 24 May 12 12:54:55 PM PDT 24 4095910924 ps
T956 /workspace/coverage/default/46.spi_device_pass_cmd_filtering.1244565424 May 12 12:54:28 PM PDT 24 May 12 12:54:35 PM PDT 24 2367431360 ps
T957 /workspace/coverage/default/23.spi_device_mailbox.450723026 May 12 12:52:59 PM PDT 24 May 12 12:53:10 PM PDT 24 538338905 ps
T958 /workspace/coverage/default/26.spi_device_tpm_sts_read.2100523587 May 12 12:53:09 PM PDT 24 May 12 12:53:10 PM PDT 24 31897334 ps
T959 /workspace/coverage/default/6.spi_device_upload.1760382099 May 12 12:51:19 PM PDT 24 May 12 12:51:34 PM PDT 24 12492303939 ps
T960 /workspace/coverage/default/41.spi_device_csb_read.3275044081 May 12 12:54:05 PM PDT 24 May 12 12:54:06 PM PDT 24 27667612 ps
T961 /workspace/coverage/default/5.spi_device_tpm_rw.3489240458 May 12 12:51:11 PM PDT 24 May 12 12:51:14 PM PDT 24 546327587 ps
T962 /workspace/coverage/default/1.spi_device_csb_read.4209286432 May 12 12:51:01 PM PDT 24 May 12 12:51:02 PM PDT 24 56121733 ps
T963 /workspace/coverage/default/29.spi_device_tpm_all.2579007488 May 12 12:53:28 PM PDT 24 May 12 12:53:42 PM PDT 24 17767285493 ps
T964 /workspace/coverage/default/25.spi_device_pass_addr_payload_swap.284587500 May 12 12:53:08 PM PDT 24 May 12 12:53:40 PM PDT 24 16556787438 ps
T965 /workspace/coverage/default/12.spi_device_tpm_rw.3933302771 May 12 12:52:04 PM PDT 24 May 12 12:52:06 PM PDT 24 303800471 ps
T966 /workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.1640984399 May 12 12:53:11 PM PDT 24 May 12 12:58:04 PM PDT 24 32219219260 ps
T967 /workspace/coverage/default/17.spi_device_flash_all.35681750 May 12 12:52:17 PM PDT 24 May 12 12:54:10 PM PDT 24 35920390120 ps
T968 /workspace/coverage/default/43.spi_device_tpm_rw.3607852466 May 12 12:54:27 PM PDT 24 May 12 12:54:33 PM PDT 24 1359135977 ps
T969 /workspace/coverage/default/38.spi_device_tpm_rw.2913459112 May 12 12:53:50 PM PDT 24 May 12 12:53:54 PM PDT 24 723973304 ps
T255 /workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.3264549621 May 12 12:54:09 PM PDT 24 May 12 12:54:23 PM PDT 24 795405002 ps
T970 /workspace/coverage/default/18.spi_device_read_buffer_direct.3429001209 May 12 12:52:30 PM PDT 24 May 12 12:52:39 PM PDT 24 467199697 ps
T971 /workspace/coverage/default/25.spi_device_read_buffer_direct.582525011 May 12 12:53:09 PM PDT 24 May 12 12:53:17 PM PDT 24 1806995306 ps
T972 /workspace/coverage/default/21.spi_device_flash_mode.3198735197 May 12 12:52:45 PM PDT 24 May 12 12:52:50 PM PDT 24 95550736 ps
T973 /workspace/coverage/default/18.spi_device_cfg_cmd.2384873043 May 12 12:52:19 PM PDT 24 May 12 12:52:26 PM PDT 24 286940494 ps
T974 /workspace/coverage/default/25.spi_device_stress_all.1165830153 May 12 12:53:05 PM PDT 24 May 12 12:55:38 PM PDT 24 20242979048 ps
T106 /workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.3361099360 May 12 12:46:11 PM PDT 24 May 12 12:46:14 PM PDT 24 94207811 ps
T975 /workspace/coverage/cover_reg_top/27.spi_device_intr_test.3298682451 May 12 12:45:56 PM PDT 24 May 12 12:45:58 PM PDT 24 25029123 ps
T976 /workspace/coverage/cover_reg_top/12.spi_device_intr_test.2492200155 May 12 12:45:51 PM PDT 24 May 12 12:45:53 PM PDT 24 168739048 ps
T107 /workspace/coverage/cover_reg_top/12.spi_device_tl_errors.3893838745 May 12 12:46:17 PM PDT 24 May 12 12:46:26 PM PDT 24 266196479 ps
T977 /workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.3977820515 May 12 12:45:39 PM PDT 24 May 12 12:46:16 PM PDT 24 7256589060 ps
T108 /workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.154825199 May 12 12:45:42 PM PDT 24 May 12 12:46:08 PM PDT 24 289845923 ps
T109 /workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.366218046 May 12 12:45:38 PM PDT 24 May 12 12:45:42 PM PDT 24 44263264 ps
T110 /workspace/coverage/cover_reg_top/0.spi_device_tl_errors.482870956 May 12 12:45:45 PM PDT 24 May 12 12:45:52 PM PDT 24 472621792 ps
T146 /workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.3040888535 May 12 12:45:49 PM PDT 24 May 12 12:45:54 PM PDT 24 248307906 ps
T113 /workspace/coverage/cover_reg_top/1.spi_device_tl_errors.3208951503 May 12 12:45:49 PM PDT 24 May 12 12:45:54 PM PDT 24 414345496 ps
T111 /workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.2722317899 May 12 12:45:46 PM PDT 24 May 12 12:45:56 PM PDT 24 1135039215 ps
T124 /workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.646955377 May 12 12:46:12 PM PDT 24 May 12 12:46:16 PM PDT 24 415202641 ps
T147 /workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.1339577589 May 12 12:45:55 PM PDT 24 May 12 12:45:57 PM PDT 24 78453458 ps
T120 /workspace/coverage/cover_reg_top/16.spi_device_tl_errors.3960697133 May 12 12:45:58 PM PDT 24 May 12 12:46:04 PM PDT 24 182290919 ps
T978 /workspace/coverage/cover_reg_top/25.spi_device_intr_test.18062079 May 12 12:46:14 PM PDT 24 May 12 12:46:15 PM PDT 24 18707277 ps
T979 /workspace/coverage/cover_reg_top/46.spi_device_intr_test.2433805266 May 12 12:45:57 PM PDT 24 May 12 12:45:59 PM PDT 24 16137408 ps
T116 /workspace/coverage/cover_reg_top/15.spi_device_tl_errors.3465968717 May 12 12:46:05 PM PDT 24 May 12 12:46:08 PM PDT 24 164402919 ps
T980 /workspace/coverage/cover_reg_top/31.spi_device_intr_test.3164283994 May 12 12:46:06 PM PDT 24 May 12 12:46:08 PM PDT 24 43917613 ps
T125 /workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.3874626587 May 12 12:45:42 PM PDT 24 May 12 12:46:01 PM PDT 24 2757425498 ps
T981 /workspace/coverage/cover_reg_top/32.spi_device_intr_test.3135995245 May 12 12:45:56 PM PDT 24 May 12 12:45:58 PM PDT 24 13778996 ps
T119 /workspace/coverage/cover_reg_top/5.spi_device_tl_errors.1226417040 May 12 12:46:12 PM PDT 24 May 12 12:46:18 PM PDT 24 275218029 ps
T122 /workspace/coverage/cover_reg_top/10.spi_device_tl_errors.3052049952 May 12 12:45:44 PM PDT 24 May 12 12:45:51 PM PDT 24 188103378 ps
T112 /workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.1008497694 May 12 12:46:03 PM PDT 24 May 12 12:46:17 PM PDT 24 2064515861 ps
T269 /workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.3400166405 May 12 12:45:46 PM PDT 24 May 12 12:46:01 PM PDT 24 203168527 ps
T117 /workspace/coverage/cover_reg_top/2.spi_device_tl_errors.1162844053 May 12 12:45:56 PM PDT 24 May 12 12:46:00 PM PDT 24 1360434681 ps
T271 /workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.24057730 May 12 12:46:05 PM PDT 24 May 12 12:46:13 PM PDT 24 294098132 ps
T982 /workspace/coverage/cover_reg_top/10.spi_device_intr_test.4206558871 May 12 12:46:10 PM PDT 24 May 12 12:46:12 PM PDT 24 27838854 ps
T983 /workspace/coverage/cover_reg_top/3.spi_device_mem_walk.2060955827 May 12 12:45:51 PM PDT 24 May 12 12:45:53 PM PDT 24 14739265 ps
T984 /workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.937628563 May 12 12:45:40 PM PDT 24 May 12 12:45:44 PM PDT 24 516262123 ps
T126 /workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.313076902 May 12 12:45:51 PM PDT 24 May 12 12:46:12 PM PDT 24 541924139 ps
T985 /workspace/coverage/cover_reg_top/0.spi_device_mem_walk.2436780125 May 12 12:45:40 PM PDT 24 May 12 12:45:41 PM PDT 24 11382833 ps
T162 /workspace/coverage/cover_reg_top/8.spi_device_csr_rw.1071293668 May 12 12:45:43 PM PDT 24 May 12 12:45:47 PM PDT 24 52120551 ps
T123 /workspace/coverage/cover_reg_top/19.spi_device_tl_errors.1785338250 May 12 12:45:45 PM PDT 24 May 12 12:45:51 PM PDT 24 461193094 ps
T986 /workspace/coverage/cover_reg_top/43.spi_device_intr_test.4033728993 May 12 12:46:21 PM PDT 24 May 12 12:46:22 PM PDT 24 51206629 ps
T987 /workspace/coverage/cover_reg_top/34.spi_device_intr_test.94885950 May 12 12:46:07 PM PDT 24 May 12 12:46:08 PM PDT 24 14164131 ps
T988 /workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2988969645 May 12 12:46:18 PM PDT 24 May 12 12:46:22 PM PDT 24 701126502 ps
T989 /workspace/coverage/cover_reg_top/23.spi_device_intr_test.1700374710 May 12 12:45:47 PM PDT 24 May 12 12:45:51 PM PDT 24 37179613 ps
T990 /workspace/coverage/cover_reg_top/48.spi_device_intr_test.1315247548 May 12 12:45:42 PM PDT 24 May 12 12:45:44 PM PDT 24 18219389 ps
T93 /workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.2642181460 May 12 12:45:45 PM PDT 24 May 12 12:45:49 PM PDT 24 17066636 ps
T991 /workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3591753465 May 12 12:45:50 PM PDT 24 May 12 12:46:03 PM PDT 24 361866818 ps
T992 /workspace/coverage/cover_reg_top/9.spi_device_intr_test.3967888287 May 12 12:45:47 PM PDT 24 May 12 12:45:50 PM PDT 24 53273681 ps
T993 /workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.379187383 May 12 12:45:58 PM PDT 24 May 12 12:46:01 PM PDT 24 53928756 ps
T994 /workspace/coverage/cover_reg_top/30.spi_device_intr_test.3189481629 May 12 12:46:11 PM PDT 24 May 12 12:46:12 PM PDT 24 13965391 ps
T155 /workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.917150406 May 12 12:46:00 PM PDT 24 May 12 12:46:17 PM PDT 24 682503475 ps
T270 /workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.688389552 May 12 12:46:27 PM PDT 24 May 12 12:46:42 PM PDT 24 2274990853 ps
T995 /workspace/coverage/cover_reg_top/33.spi_device_intr_test.4280712465 May 12 12:45:57 PM PDT 24 May 12 12:46:00 PM PDT 24 19559911 ps
T996 /workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.1644909248 May 12 12:45:57 PM PDT 24 May 12 12:46:00 PM PDT 24 23885482 ps
T997 /workspace/coverage/cover_reg_top/41.spi_device_intr_test.3934895838 May 12 12:46:06 PM PDT 24 May 12 12:46:08 PM PDT 24 62581552 ps
T998 /workspace/coverage/cover_reg_top/14.spi_device_intr_test.1783488248 May 12 12:45:57 PM PDT 24 May 12 12:45:59 PM PDT 24 10700655 ps
T156 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.454152160 May 12 12:45:46 PM PDT 24 May 12 12:46:03 PM PDT 24 1784536806 ps
T999 /workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.925288779 May 12 12:45:53 PM PDT 24 May 12 12:46:06 PM PDT 24 411280158 ps
T1000 /workspace/coverage/cover_reg_top/16.spi_device_intr_test.2214305351 May 12 12:45:51 PM PDT 24 May 12 12:45:53 PM PDT 24 36687923 ps
T1001 /workspace/coverage/cover_reg_top/2.spi_device_mem_walk.3296999745 May 12 12:45:39 PM PDT 24 May 12 12:45:41 PM PDT 24 26901913 ps
T157 /workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.4181885946 May 12 12:45:50 PM PDT 24 May 12 12:45:54 PM PDT 24 452135411 ps
T127 /workspace/coverage/cover_reg_top/12.spi_device_csr_rw.1825093447 May 12 12:45:53 PM PDT 24 May 12 12:45:56 PM PDT 24 109232071 ps
T1002 /workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2632903236 May 12 12:45:45 PM PDT 24 May 12 12:45:50 PM PDT 24 34213537 ps
T128 /workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3954411153 May 12 12:45:45 PM PDT 24 May 12 12:45:50 PM PDT 24 74347610 ps
T1003 /workspace/coverage/cover_reg_top/15.spi_device_intr_test.2024412085 May 12 12:46:15 PM PDT 24 May 12 12:46:17 PM PDT 24 32809683 ps
T1004 /workspace/coverage/cover_reg_top/8.spi_device_same_csr_outstanding.1462922749 May 12 12:46:03 PM PDT 24 May 12 12:46:08 PM PDT 24 160432629 ps
T129 /workspace/coverage/cover_reg_top/6.spi_device_csr_rw.1494617559 May 12 12:45:54 PM PDT 24 May 12 12:45:57 PM PDT 24 545092117 ps
T1005 /workspace/coverage/cover_reg_top/4.spi_device_csr_rw.3680964408 May 12 12:45:42 PM PDT 24 May 12 12:45:46 PM PDT 24 22904548 ps
T1006 /workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.2760944265 May 12 12:45:52 PM PDT 24 May 12 12:45:56 PM PDT 24 149851818 ps
T1007 /workspace/coverage/cover_reg_top/40.spi_device_intr_test.2138220547 May 12 12:46:27 PM PDT 24 May 12 12:46:29 PM PDT 24 30682407 ps
T1008 /workspace/coverage/cover_reg_top/49.spi_device_intr_test.1297036512 May 12 12:45:43 PM PDT 24 May 12 12:45:46 PM PDT 24 50392893 ps
T158 /workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.2673083267 May 12 12:45:40 PM PDT 24 May 12 12:45:54 PM PDT 24 12431780843 ps
T1009 /workspace/coverage/cover_reg_top/38.spi_device_intr_test.967940697 May 12 12:46:14 PM PDT 24 May 12 12:46:15 PM PDT 24 46293977 ps
T1010 /workspace/coverage/cover_reg_top/29.spi_device_intr_test.1441782057 May 12 12:45:41 PM PDT 24 May 12 12:45:42 PM PDT 24 12967010 ps
T1011 /workspace/coverage/cover_reg_top/21.spi_device_intr_test.2380571562 May 12 12:46:08 PM PDT 24 May 12 12:46:09 PM PDT 24 26509382 ps
T1012 /workspace/coverage/cover_reg_top/3.spi_device_intr_test.3073455661 May 12 12:45:55 PM PDT 24 May 12 12:45:56 PM PDT 24 28787188 ps
T1013 /workspace/coverage/cover_reg_top/36.spi_device_intr_test.2782609618 May 12 12:46:28 PM PDT 24 May 12 12:46:29 PM PDT 24 44086067 ps
T1014 /workspace/coverage/cover_reg_top/13.spi_device_intr_test.3475896872 May 12 12:45:44 PM PDT 24 May 12 12:45:48 PM PDT 24 30989227 ps
T159 /workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.1517283057 May 12 12:45:52 PM PDT 24 May 12 12:45:57 PM PDT 24 121158485 ps
T1015 /workspace/coverage/cover_reg_top/2.spi_device_csr_rw.3933743759 May 12 12:45:45 PM PDT 24 May 12 12:45:49 PM PDT 24 99116968 ps
T118 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.2307001147 May 12 12:45:56 PM PDT 24 May 12 12:46:00 PM PDT 24 149341788 ps
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